2 * vsp1_dl.h -- R-Car VSP1 Display List
4 * Copyright (C) 2015 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gfp.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
23 #define VSP1_DL_NUM_ENTRIES 256
25 #define VSP1_DLH_INT_ENABLE (1 << 1)
26 #define VSP1_DLH_AUTO_START (1 << 0)
28 struct vsp1_dl_header_list {
31 } __attribute__((__packed__));
33 struct vsp1_dl_header {
35 struct vsp1_dl_header_list lists[8];
38 } __attribute__((__packed__));
40 struct vsp1_dl_entry {
43 } __attribute__((__packed__));
46 * struct vsp1_dl_body - Display list body
47 * @list: entry in the display list list of bodies
48 * @vsp1: the VSP1 device
49 * @entries: array of entries
50 * @dma: DMA address of the entries
51 * @size: size of the DMA memory in bytes
52 * @num_entries: number of stored entries
55 struct list_head list;
56 struct vsp1_device *vsp1;
58 struct vsp1_dl_entry *entries;
62 unsigned int num_entries;
66 * struct vsp1_dl_list - Display list
67 * @list: entry in the display list manager lists
68 * @dlm: the display list manager
69 * @header: display list header, NULL for headerless lists
70 * @dma: DMA address for the header
71 * @body0: first display list body
72 * @fragments: list of extra display list bodies
73 * @chain: entry in the display list partition chain
76 struct list_head list;
77 struct vsp1_dl_manager *dlm;
79 struct vsp1_dl_header *header;
82 struct vsp1_dl_body body0;
83 struct list_head fragments;
86 struct list_head chain;
91 VSP1_DL_MODE_HEADERLESS,
95 * struct vsp1_dl_manager - Display List manager
96 * @index: index of the related WPF
97 * @mode: display list operation mode (header or headerless)
98 * @singleshot: execute the display list in single-shot mode
99 * @vsp1: the VSP1 device
100 * @lock: protects the free, active, queued, pending and gc_fragments lists
101 * @free: array of all free display lists
102 * @active: list currently being processed (loaded) by hardware
103 * @queued: list queued to the hardware (written to the DL registers)
104 * @pending: list waiting to be queued to the hardware
105 * @gc_work: fragments garbage collector work struct
106 * @gc_fragments: array of display list fragments waiting to be freed
108 struct vsp1_dl_manager {
110 enum vsp1_dl_mode mode;
112 struct vsp1_device *vsp1;
115 struct list_head free;
116 struct vsp1_dl_list *active;
117 struct vsp1_dl_list *queued;
118 struct vsp1_dl_list *pending;
120 struct work_struct gc_work;
121 struct list_head gc_fragments;
124 /* -----------------------------------------------------------------------------
125 * Display List Body Management
129 * Initialize a display list body object and allocate DMA memory for the body
130 * data. The display list body object is expected to have been initialized to
133 static int vsp1_dl_body_init(struct vsp1_device *vsp1,
134 struct vsp1_dl_body *dlb, unsigned int num_entries,
137 size_t size = num_entries * sizeof(*dlb->entries) + extra_size;
142 dlb->entries = dma_alloc_wc(vsp1->bus_master, dlb->size, &dlb->dma,
151 * Cleanup a display list body and free allocated DMA memory allocated.
153 static void vsp1_dl_body_cleanup(struct vsp1_dl_body *dlb)
155 dma_free_wc(dlb->vsp1->bus_master, dlb->size, dlb->entries, dlb->dma);
159 * vsp1_dl_fragment_alloc - Allocate a display list fragment
160 * @vsp1: The VSP1 device
161 * @num_entries: The maximum number of entries that the fragment can contain
163 * Allocate a display list fragment with enough memory to contain the requested
166 * Return a pointer to a fragment on success or NULL if memory can't be
169 struct vsp1_dl_body *vsp1_dl_fragment_alloc(struct vsp1_device *vsp1,
170 unsigned int num_entries)
172 struct vsp1_dl_body *dlb;
175 dlb = kzalloc(sizeof(*dlb), GFP_KERNEL);
179 ret = vsp1_dl_body_init(vsp1, dlb, num_entries, 0);
189 * vsp1_dl_fragment_free - Free a display list fragment
192 * Free the given display list fragment and the associated DMA memory.
194 * Fragments must only be freed explicitly if they are not added to a display
195 * list, as the display list will take ownership of them and free them
196 * otherwise. Manual free typically happens at cleanup time for fragments that
197 * have been allocated but not used.
199 * Passing a NULL pointer to this function is safe, in that case no operation
202 void vsp1_dl_fragment_free(struct vsp1_dl_body *dlb)
207 vsp1_dl_body_cleanup(dlb);
212 * vsp1_dl_fragment_write - Write a register to a display list fragment
214 * @reg: The register address
215 * @data: The register value
217 * Write the given register and value to the display list fragment. The maximum
218 * number of entries that can be written in a fragment is specified when the
219 * fragment is allocated by vsp1_dl_fragment_alloc().
221 void vsp1_dl_fragment_write(struct vsp1_dl_body *dlb, u32 reg, u32 data)
223 dlb->entries[dlb->num_entries].addr = reg;
224 dlb->entries[dlb->num_entries].data = data;
228 /* -----------------------------------------------------------------------------
229 * Display List Transaction Management
232 static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
234 struct vsp1_dl_list *dl;
238 dl = kzalloc(sizeof(*dl), GFP_KERNEL);
242 INIT_LIST_HEAD(&dl->fragments);
246 * Initialize the display list body and allocate DMA memory for the body
247 * and the optional header. Both are allocated together to avoid memory
248 * fragmentation, with the header located right after the body in
251 header_size = dlm->mode == VSP1_DL_MODE_HEADER
252 ? ALIGN(sizeof(struct vsp1_dl_header), 8)
255 ret = vsp1_dl_body_init(dlm->vsp1, &dl->body0, VSP1_DL_NUM_ENTRIES,
262 if (dlm->mode == VSP1_DL_MODE_HEADER) {
263 size_t header_offset = VSP1_DL_NUM_ENTRIES
264 * sizeof(*dl->body0.entries);
266 dl->header = ((void *)dl->body0.entries) + header_offset;
267 dl->dma = dl->body0.dma + header_offset;
269 memset(dl->header, 0, sizeof(*dl->header));
270 dl->header->lists[0].addr = dl->body0.dma;
276 static void vsp1_dl_list_free(struct vsp1_dl_list *dl)
278 vsp1_dl_body_cleanup(&dl->body0);
279 list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
284 * vsp1_dl_list_get - Get a free display list
285 * @dlm: The display list manager
287 * Get a display list from the pool of free lists and return it.
289 * This function must be called without the display list manager lock held.
291 struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
293 struct vsp1_dl_list *dl = NULL;
296 spin_lock_irqsave(&dlm->lock, flags);
298 if (!list_empty(&dlm->free)) {
299 dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
303 * The display list chain must be initialised to ensure every
304 * display list can assert list_empty() if it is not in a chain.
306 INIT_LIST_HEAD(&dl->chain);
309 spin_unlock_irqrestore(&dlm->lock, flags);
314 /* This function must be called with the display list manager lock held.*/
315 static void __vsp1_dl_list_put(struct vsp1_dl_list *dl)
317 struct vsp1_dl_list *dl_child;
323 * Release any linked display-lists which were chained for a single
324 * hardware operation.
327 list_for_each_entry(dl_child, &dl->chain, chain)
328 __vsp1_dl_list_put(dl_child);
331 dl->has_chain = false;
334 * We can't free fragments here as DMA memory can only be freed in
335 * interruptible context. Move all fragments to the display list
336 * manager's list of fragments to be freed, they will be
337 * garbage-collected by the work queue.
339 if (!list_empty(&dl->fragments)) {
340 list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
341 schedule_work(&dl->dlm->gc_work);
344 dl->body0.num_entries = 0;
346 list_add_tail(&dl->list, &dl->dlm->free);
350 * vsp1_dl_list_put - Release a display list
351 * @dl: The display list
353 * Release the display list and return it to the pool of free lists.
355 * Passing a NULL pointer to this function is safe, in that case no operation
358 void vsp1_dl_list_put(struct vsp1_dl_list *dl)
365 spin_lock_irqsave(&dl->dlm->lock, flags);
366 __vsp1_dl_list_put(dl);
367 spin_unlock_irqrestore(&dl->dlm->lock, flags);
371 * vsp1_dl_list_write - Write a register to the display list
372 * @dl: The display list
373 * @reg: The register address
374 * @data: The register value
376 * Write the given register and value to the display list. Up to 256 registers
377 * can be written per display list.
379 void vsp1_dl_list_write(struct vsp1_dl_list *dl, u32 reg, u32 data)
381 vsp1_dl_fragment_write(&dl->body0, reg, data);
385 * vsp1_dl_list_add_fragment - Add a fragment to the display list
386 * @dl: The display list
389 * Add a display list body as a fragment to a display list. Registers contained
390 * in fragments are processed after registers contained in the main display
391 * list, in the order in which fragments are added.
393 * Adding a fragment to a display list passes ownership of the fragment to the
394 * list. The caller must not touch the fragment after this call, and must not
395 * free it explicitly with vsp1_dl_fragment_free().
397 * Fragments are only usable for display lists in header mode. Attempt to
398 * add a fragment to a header-less display list will return an error.
400 int vsp1_dl_list_add_fragment(struct vsp1_dl_list *dl,
401 struct vsp1_dl_body *dlb)
403 /* Multi-body lists are only available in header mode. */
404 if (dl->dlm->mode != VSP1_DL_MODE_HEADER)
407 list_add_tail(&dlb->list, &dl->fragments);
412 * vsp1_dl_list_add_chain - Add a display list to a chain
413 * @head: The head display list
414 * @dl: The new display list
416 * Add a display list to an existing display list chain. The chained lists
417 * will be automatically processed by the hardware without intervention from
418 * the CPU. A display list end interrupt will only complete after the last
419 * display list in the chain has completed processing.
421 * Adding a display list to a chain passes ownership of the display list to
422 * the head display list item. The chain is released when the head dl item is
423 * put back with __vsp1_dl_list_put().
425 * Chained display lists are only usable in header mode. Attempts to add a
426 * display list to a chain in header-less mode will return an error.
428 int vsp1_dl_list_add_chain(struct vsp1_dl_list *head,
429 struct vsp1_dl_list *dl)
431 /* Chained lists are only available in header mode. */
432 if (head->dlm->mode != VSP1_DL_MODE_HEADER)
435 head->has_chain = true;
436 list_add_tail(&dl->chain, &head->chain);
440 static void vsp1_dl_list_fill_header(struct vsp1_dl_list *dl, bool is_last)
442 struct vsp1_dl_manager *dlm = dl->dlm;
443 struct vsp1_dl_header_list *hdr = dl->header->lists;
444 struct vsp1_dl_body *dlb;
445 unsigned int num_lists = 0;
448 * Fill the header with the display list bodies addresses and sizes. The
449 * address of the first body has already been filled when the display
450 * list was allocated.
453 hdr->num_bytes = dl->body0.num_entries
454 * sizeof(*dl->header->lists);
456 list_for_each_entry(dlb, &dl->fragments, list) {
460 hdr->addr = dlb->dma;
461 hdr->num_bytes = dlb->num_entries
462 * sizeof(*dl->header->lists);
465 dl->header->num_lists = num_lists;
467 if (!list_empty(&dl->chain) && !is_last) {
469 * If this display list's chain is not empty, we are on a list,
470 * and the next item is the display list that we must queue for
471 * automatic processing by the hardware.
473 struct vsp1_dl_list *next = list_next_entry(dl, chain);
475 dl->header->next_header = next->dma;
476 dl->header->flags = VSP1_DLH_AUTO_START;
477 } else if (!dlm->singleshot) {
479 * if the display list manager works in continuous mode, the VSP
480 * should loop over the display list continuously until
481 * instructed to do otherwise.
483 dl->header->next_header = dl->dma;
484 dl->header->flags = VSP1_DLH_INT_ENABLE | VSP1_DLH_AUTO_START;
487 * Otherwise, in mem-to-mem mode, we work in single-shot mode
488 * and the next display list must not be started automatically.
490 dl->header->flags = VSP1_DLH_INT_ENABLE;
494 static bool vsp1_dl_list_hw_update_pending(struct vsp1_dl_manager *dlm)
496 struct vsp1_device *vsp1 = dlm->vsp1;
502 * Check whether the VSP1 has taken the update. In headerless mode the
503 * hardware indicates this by clearing the UPD bit in the DL_BODY_SIZE
504 * register, and in header mode by clearing the UPDHDR bit in the CMD
507 if (dlm->mode == VSP1_DL_MODE_HEADERLESS)
508 return !!(vsp1_read(vsp1, VI6_DL_BODY_SIZE)
509 & VI6_DL_BODY_SIZE_UPD);
511 return !!(vsp1_read(vsp1, VI6_CMD(dlm->index))
515 static void vsp1_dl_list_hw_enqueue(struct vsp1_dl_list *dl)
517 struct vsp1_dl_manager *dlm = dl->dlm;
518 struct vsp1_device *vsp1 = dlm->vsp1;
520 if (dlm->mode == VSP1_DL_MODE_HEADERLESS) {
522 * In headerless mode, program the hardware directly with the
523 * display list body address and size and set the UPD bit. The
524 * bit will be cleared by the hardware when the display list
527 vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), dl->body0.dma);
528 vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
529 (dl->body0.num_entries * sizeof(*dl->header->lists)));
532 * In header mode, program the display list header address. If
533 * the hardware is idle (single-shot mode or first frame in
534 * continuous mode) it will then be started independently. If
535 * the hardware is operating, the VI6_DL_HDR_REF_ADDR register
536 * will be updated with the display list address.
538 vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
542 static void vsp1_dl_list_commit_continuous(struct vsp1_dl_list *dl)
544 struct vsp1_dl_manager *dlm = dl->dlm;
547 * If a previous display list has been queued to the hardware but not
548 * processed yet, the VSP can start processing it at any time. In that
549 * case we can't replace the queued list by the new one, as we could
550 * race with the hardware. We thus mark the update as pending, it will
551 * be queued up to the hardware by the frame end interrupt handler.
553 if (vsp1_dl_list_hw_update_pending(dlm)) {
554 __vsp1_dl_list_put(dlm->pending);
560 * Pass the new display list to the hardware and mark it as queued. It
561 * will become active when the hardware starts processing it.
563 vsp1_dl_list_hw_enqueue(dl);
565 __vsp1_dl_list_put(dlm->queued);
569 static void vsp1_dl_list_commit_singleshot(struct vsp1_dl_list *dl)
571 struct vsp1_dl_manager *dlm = dl->dlm;
574 * When working in single-shot mode, the caller guarantees that the
575 * hardware is idle at this point. Just commit the head display list
576 * to hardware. Chained lists will be started automatically.
578 vsp1_dl_list_hw_enqueue(dl);
583 void vsp1_dl_list_commit(struct vsp1_dl_list *dl)
585 struct vsp1_dl_manager *dlm = dl->dlm;
586 struct vsp1_dl_list *dl_child;
589 if (dlm->mode == VSP1_DL_MODE_HEADER) {
590 /* Fill the header for the head and chained display lists. */
591 vsp1_dl_list_fill_header(dl, list_empty(&dl->chain));
593 list_for_each_entry(dl_child, &dl->chain, chain) {
594 bool last = list_is_last(&dl_child->chain, &dl->chain);
596 vsp1_dl_list_fill_header(dl_child, last);
600 spin_lock_irqsave(&dlm->lock, flags);
603 vsp1_dl_list_commit_singleshot(dl);
605 vsp1_dl_list_commit_continuous(dl);
607 spin_unlock_irqrestore(&dlm->lock, flags);
610 /* -----------------------------------------------------------------------------
611 * Display List Manager
615 * vsp1_dlm_irq_frame_end - Display list handler for the frame end interrupt
616 * @dlm: the display list manager
618 * Return true if the previous display list has completed at frame end, or false
619 * if it has been delayed by one frame because the display list commit raced
620 * with the frame end interrupt. The function always returns true in header mode
621 * as display list processing is then not continuous and races never occur.
623 bool vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
625 bool completed = false;
627 spin_lock(&dlm->lock);
630 * The mem-to-mem pipelines work in single-shot mode. No new display
631 * list can be queued, we don't have to do anything.
633 if (dlm->singleshot) {
634 __vsp1_dl_list_put(dlm->active);
641 * If the commit operation raced with the interrupt and occurred after
642 * the frame end event but before interrupt processing, the hardware
643 * hasn't taken the update into account yet. We have to skip one frame
646 if (vsp1_dl_list_hw_update_pending(dlm))
650 * The device starts processing the queued display list right after the
651 * frame end interrupt. The display list thus becomes active.
654 __vsp1_dl_list_put(dlm->active);
655 dlm->active = dlm->queued;
661 * Now that the VSP has started processing the queued display list, we
662 * can queue the pending display list to the hardware if one has been
666 vsp1_dl_list_hw_enqueue(dlm->pending);
667 dlm->queued = dlm->pending;
672 spin_unlock(&dlm->lock);
678 void vsp1_dlm_setup(struct vsp1_device *vsp1)
680 u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
681 | VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
685 * The DRM pipeline operates with display lists in Continuous Frame
686 * Mode, all other pipelines use manual start.
689 ctrl |= VI6_DL_CTRL_CFM0 | VI6_DL_CTRL_NH0;
691 vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
692 vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
695 void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
699 spin_lock_irqsave(&dlm->lock, flags);
701 __vsp1_dl_list_put(dlm->active);
702 __vsp1_dl_list_put(dlm->queued);
703 __vsp1_dl_list_put(dlm->pending);
705 spin_unlock_irqrestore(&dlm->lock, flags);
713 * Free all fragments awaiting to be garbage-collected.
715 * This function must be called without the display list manager lock held.
717 static void vsp1_dlm_fragments_free(struct vsp1_dl_manager *dlm)
721 spin_lock_irqsave(&dlm->lock, flags);
723 while (!list_empty(&dlm->gc_fragments)) {
724 struct vsp1_dl_body *dlb;
726 dlb = list_first_entry(&dlm->gc_fragments, struct vsp1_dl_body,
728 list_del(&dlb->list);
730 spin_unlock_irqrestore(&dlm->lock, flags);
731 vsp1_dl_fragment_free(dlb);
732 spin_lock_irqsave(&dlm->lock, flags);
735 spin_unlock_irqrestore(&dlm->lock, flags);
738 static void vsp1_dlm_garbage_collect(struct work_struct *work)
740 struct vsp1_dl_manager *dlm =
741 container_of(work, struct vsp1_dl_manager, gc_work);
743 vsp1_dlm_fragments_free(dlm);
746 struct vsp1_dl_manager *vsp1_dlm_create(struct vsp1_device *vsp1,
748 unsigned int prealloc)
750 struct vsp1_dl_manager *dlm;
753 dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
758 dlm->mode = index == 0 && !vsp1->info->uapi
759 ? VSP1_DL_MODE_HEADERLESS : VSP1_DL_MODE_HEADER;
760 dlm->singleshot = vsp1->info->uapi;
763 spin_lock_init(&dlm->lock);
764 INIT_LIST_HEAD(&dlm->free);
765 INIT_LIST_HEAD(&dlm->gc_fragments);
766 INIT_WORK(&dlm->gc_work, vsp1_dlm_garbage_collect);
768 for (i = 0; i < prealloc; ++i) {
769 struct vsp1_dl_list *dl;
771 dl = vsp1_dl_list_alloc(dlm);
775 list_add_tail(&dl->list, &dlm->free);
781 void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
783 struct vsp1_dl_list *dl, *next;
788 cancel_work_sync(&dlm->gc_work);
790 list_for_each_entry_safe(dl, next, &dlm->free, list) {
792 vsp1_dl_list_free(dl);
795 vsp1_dlm_fragments_free(dlm);