drivers/media/platform/vsp1/vsp1_bru.c

   1 /*
   2  * vsp1_bru.c  --  R-Car VSP1 Blend ROP Unit
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/gfp.h>
  16
  17 #include <media/v4l2-subdev.h>
  18
  19 #include "vsp1.h"
  20 #include "vsp1_bru.h"
  21 #include "vsp1_dl.h"
  22 #include "vsp1_pipe.h"
  23 #include "vsp1_rwpf.h"
  24 #include "vsp1_video.h"
  25
  26 #define BRU_MIN_SIZE                            1U
  27 #define BRU_MAX_SIZE                            8190U
  28
  29 /* -----------------------------------------------------------------------------
  30  * Device Access
  31  */
  32
  33 static inline void vsp1_bru_write(struct vsp1_bru *bru, struct vsp1_dl_list *dl,
  34                                   u32 reg, u32 data)
  35 {
  36         vsp1_dl_list_write(dl, reg, data);
  37 }
  38
  39 /* -----------------------------------------------------------------------------
  40  * Controls
  41  */
  42
  43 static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
  44 {
  45         struct vsp1_bru *bru =
  46                 container_of(ctrl->handler, struct vsp1_bru, ctrls);
  47
  48         switch (ctrl->id) {
  49         case V4L2_CID_BG_COLOR:
  50                 bru->bgcolor = ctrl->val;
  51                 break;
  52         }
  53
  54         return 0;
  55 }
  56
  57 static const struct v4l2_ctrl_ops bru_ctrl_ops = {
  58         .s_ctrl = bru_s_ctrl,
  59 };
  60
  61 /* -----------------------------------------------------------------------------
  62  * V4L2 Subdevice Operations
  63  */
  64
  65 /*
  66  * The BRU can't perform format conversion, all sink and source formats must be
  67  * identical. We pick the format on the first sink pad (pad 0) and propagate it
  68  * to all other pads.
  69  */
  70
  71 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
  72                               struct v4l2_subdev_pad_config *cfg,
  73                               struct v4l2_subdev_mbus_code_enum *code)
  74 {
  75         static const unsigned int codes[] = {
  76                 MEDIA_BUS_FMT_ARGB8888_1X32,
  77                 MEDIA_BUS_FMT_AYUV8_1X32,
  78         };
  79
  80         return vsp1_subdev_enum_mbus_code(subdev, cfg, code, codes,
  81                                           ARRAY_SIZE(codes));
  82 }
  83
  84 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
  85                                struct v4l2_subdev_pad_config *cfg,
  86                                struct v4l2_subdev_frame_size_enum *fse)
  87 {
  88         if (fse->index)
  89                 return -EINVAL;
  90
  91         if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
  92             fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
  93                 return -EINVAL;
  94
  95         fse->min_width = BRU_MIN_SIZE;
  96         fse->max_width = BRU_MAX_SIZE;
  97         fse->min_height = BRU_MIN_SIZE;
  98         fse->max_height = BRU_MAX_SIZE;
  99
 100         return 0;
 101 }
 102
 103 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
 104                                          struct v4l2_subdev_pad_config *cfg,
 105                                          unsigned int pad)
 106 {
 107         return v4l2_subdev_get_try_compose(&bru->entity.subdev, cfg, pad);
 108 }
 109
 110 static void bru_try_format(struct vsp1_bru *bru,
 111                            struct v4l2_subdev_pad_config *config,
 112                            unsigned int pad, struct v4l2_mbus_framefmt *fmt)
 113 {
 114         struct v4l2_mbus_framefmt *format;
 115
 116         switch (pad) {
 117         case BRU_PAD_SINK(0):
 118                 /* Default to YUV if the requested format is not supported. */
 119                 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 120                     fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
 121                         fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
 122                 break;
 123
 124         default:
 125                 /* The BRU can't perform format conversion. */
 126                 format = vsp1_entity_get_pad_format(&bru->entity, config,
 127                                                     BRU_PAD_SINK(0));
 128                 fmt->code = format->code;
 129                 break;
 130         }
 131
 132         fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
 133         fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
 134         fmt->field = V4L2_FIELD_NONE;
 135         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 136 }
 137
 138 static int bru_set_format(struct v4l2_subdev *subdev,
 139                           struct v4l2_subdev_pad_config *cfg,
 140                           struct v4l2_subdev_format *fmt)
 141 {
 142         struct vsp1_bru *bru = to_bru(subdev);
 143         struct v4l2_subdev_pad_config *config;
 144         struct v4l2_mbus_framefmt *format;
 145         int ret = 0;
 146
 147         mutex_lock(&bru->entity.lock);
 148
 149         config = vsp1_entity_get_pad_config(&bru->entity, cfg, fmt->which);
 150         if (!config) {
 151                 ret = -EINVAL;
 152                 goto done;
 153         }
 154
 155         bru_try_format(bru, config, fmt->pad, &fmt->format);
 156
 157         format = vsp1_entity_get_pad_format(&bru->entity, config, fmt->pad);
 158         *format = fmt->format;
 159
 160         /* Reset the compose rectangle */
 161         if (fmt->pad != bru->entity.source_pad) {
 162                 struct v4l2_rect *compose;
 163
 164                 compose = bru_get_compose(bru, config, fmt->pad);
 165                 compose->left = 0;
 166                 compose->top = 0;
 167                 compose->width = format->width;
 168                 compose->height = format->height;
 169         }
 170
 171         /* Propagate the format code to all pads */
 172         if (fmt->pad == BRU_PAD_SINK(0)) {
 173                 unsigned int i;
 174
 175                 for (i = 0; i <= bru->entity.source_pad; ++i) {
 176                         format = vsp1_entity_get_pad_format(&bru->entity,
 177                                                             config, i);
 178                         format->code = fmt->format.code;
 179                 }
 180         }
 181
 182 done:
 183         mutex_unlock(&bru->entity.lock);
 184         return ret;
 185 }
 186
 187 static int bru_get_selection(struct v4l2_subdev *subdev,
 188                              struct v4l2_subdev_pad_config *cfg,
 189                              struct v4l2_subdev_selection *sel)
 190 {
 191         struct vsp1_bru *bru = to_bru(subdev);
 192         struct v4l2_subdev_pad_config *config;
 193
 194         if (sel->pad == bru->entity.source_pad)
 195                 return -EINVAL;
 196
 197         switch (sel->target) {
 198         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 199                 sel->r.left = 0;
 200                 sel->r.top = 0;
 201                 sel->r.width = BRU_MAX_SIZE;
 202                 sel->r.height = BRU_MAX_SIZE;
 203                 return 0;
 204
 205         case V4L2_SEL_TGT_COMPOSE:
 206                 config = vsp1_entity_get_pad_config(&bru->entity, cfg,
 207                                                     sel->which);
 208                 if (!config)
 209                         return -EINVAL;
 210
 211                 mutex_lock(&bru->entity.lock);
 212                 sel->r = *bru_get_compose(bru, config, sel->pad);
 213                 mutex_unlock(&bru->entity.lock);
 214                 return 0;
 215
 216         default:
 217                 return -EINVAL;
 218         }
 219 }
 220
 221 static int bru_set_selection(struct v4l2_subdev *subdev,
 222                              struct v4l2_subdev_pad_config *cfg,
 223                              struct v4l2_subdev_selection *sel)
 224 {
 225         struct vsp1_bru *bru = to_bru(subdev);
 226         struct v4l2_subdev_pad_config *config;
 227         struct v4l2_mbus_framefmt *format;
 228         struct v4l2_rect *compose;
 229         int ret = 0;
 230
 231         if (sel->pad == bru->entity.source_pad)
 232                 return -EINVAL;
 233
 234         if (sel->target != V4L2_SEL_TGT_COMPOSE)
 235                 return -EINVAL;
 236
 237         mutex_lock(&bru->entity.lock);
 238
 239         config = vsp1_entity_get_pad_config(&bru->entity, cfg, sel->which);
 240         if (!config) {
 241                 ret = -EINVAL;
 242                 goto done;
 243         }
 244
 245         /*
 246          * The compose rectangle top left corner must be inside the output
 247          * frame.
 248          */
 249         format = vsp1_entity_get_pad_format(&bru->entity, config,
 250                                             bru->entity.source_pad);
 251         sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
 252         sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
 253
 254         /* Scaling isn't supported, the compose rectangle size must be identical
 255          * to the sink format size.
 256          */
 257         format = vsp1_entity_get_pad_format(&bru->entity, config, sel->pad);
 258         sel->r.width = format->width;
 259         sel->r.height = format->height;
 260
 261         compose = bru_get_compose(bru, config, sel->pad);
 262         *compose = sel->r;
 263
 264 done:
 265         mutex_unlock(&bru->entity.lock);
 266         return ret;
 267 }
 268
 269 static const struct v4l2_subdev_pad_ops bru_pad_ops = {
 270         .init_cfg = vsp1_entity_init_cfg,
 271         .enum_mbus_code = bru_enum_mbus_code,
 272         .enum_frame_size = bru_enum_frame_size,
 273         .get_fmt = vsp1_subdev_get_pad_format,
 274         .set_fmt = bru_set_format,
 275         .get_selection = bru_get_selection,
 276         .set_selection = bru_set_selection,
 277 };
 278
 279 static const struct v4l2_subdev_ops bru_ops = {
 280         .pad    = &bru_pad_ops,
 281 };
 282
 283 /* -----------------------------------------------------------------------------
 284  * VSP1 Entity Operations
 285  */
 286
 287 static void bru_configure(struct vsp1_entity *entity,
 288                           struct vsp1_pipeline *pipe,
 289                           struct vsp1_dl_list *dl,
 290                           enum vsp1_entity_params params)
 291 {
 292         struct vsp1_bru *bru = to_bru(&entity->subdev);
 293         struct v4l2_mbus_framefmt *format;
 294         unsigned int flags;
 295         unsigned int i;
 296
 297         if (params != VSP1_ENTITY_PARAMS_INIT)
 298                 return;
 299
 300         format = vsp1_entity_get_pad_format(&bru->entity, bru->entity.config,
 301                                             bru->entity.source_pad);
 302
 303         /* The hardware is extremely flexible but we have no userspace API to
 304          * expose all the parameters, nor is it clear whether we would have use
 305          * cases for all the supported modes. Let's just harcode the parameters
 306          * to sane default values for now.
 307          */
 308
 309         /* Disable dithering and enable color data normalization unless the
 310          * format at the pipeline output is premultiplied.
 311          */
 312         flags = pipe->output ? pipe->output->format.flags : 0;
 313         vsp1_bru_write(bru, dl, VI6_BRU_INCTRL,
 314                        flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
 315                        0 : VI6_BRU_INCTRL_NRM);
 316
 317         /* Set the background position to cover the whole output image and
 318          * configure its color.
 319          */
 320         vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_SIZE,
 321                        (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
 322                        (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
 323         vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_LOC, 0);
 324
 325         vsp1_bru_write(bru, dl, VI6_BRU_VIRRPF_COL, bru->bgcolor |
 326                        (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
 327
 328         /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
 329          * unit with a NOP operation to make BRU input 1 available as the
 330          * Blend/ROP unit B SRC input.
 331          */
 332         vsp1_bru_write(bru, dl, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
 333                        VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
 334                        VI6_BRU_ROP_AROP(VI6_ROP_NOP));
 335
 336         for (i = 0; i < bru->entity.source_pad; ++i) {
 337                 bool premultiplied = false;
 338                 u32 ctrl = 0;
 339
 340                 /* Configure all Blend/ROP units corresponding to an enabled BRU
 341                  * input for alpha blending. Blend/ROP units corresponding to
 342                  * disabled BRU inputs are used in ROP NOP mode to ignore the
 343                  * SRC input.
 344                  */
 345                 if (bru->inputs[i].rpf) {
 346                         ctrl |= VI6_BRU_CTRL_RBC;
 347
 348                         premultiplied = bru->inputs[i].rpf->format.flags
 349                                       & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
 350                 } else {
 351                         ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
 352                              |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
 353                 }
 354
 355                 /* Select the virtual RPF as the Blend/ROP unit A DST input to
 356                  * serve as a background color.
 357                  */
 358                 if (i == 0)
 359                         ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
 360
 361                 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
 362                  * D in that order. The Blend/ROP unit B SRC is hardwired to the
 363                  * ROP unit output, the corresponding register bits must be set
 364                  * to 0.
 365                  */
 366                 if (i != 1)
 367                         ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
 368
 369                 vsp1_bru_write(bru, dl, VI6_BRU_CTRL(i), ctrl);
 370
 371                 /* Harcode the blending formula to
 372                  *
 373                  *      DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
 374                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 375                  *
 376                  * when the SRC input isn't premultiplied, and to
 377                  *
 378                  *      DSTc = DSTc * (1 - SRCa) + SRCc
 379                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 380                  *
 381                  * otherwise.
 382                  */
 383                 vsp1_bru_write(bru, dl, VI6_BRU_BLD(i),
 384                                VI6_BRU_BLD_CCMDX_255_SRC_A |
 385                                (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
 386                                                 VI6_BRU_BLD_CCMDY_SRC_A) |
 387                                VI6_BRU_BLD_ACMDX_255_SRC_A |
 388                                VI6_BRU_BLD_ACMDY_COEFY |
 389                                (0xff << VI6_BRU_BLD_COEFY_SHIFT));
 390         }
 391 }
 392
 393 static const struct vsp1_entity_operations bru_entity_ops = {
 394         .configure = bru_configure,
 395 };
 396
 397 /* -----------------------------------------------------------------------------
 398  * Initialization and Cleanup
 399  */
 400
 401 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
 402 {
 403         struct vsp1_bru *bru;
 404         int ret;
 405
 406         bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
 407         if (bru == NULL)
 408                 return ERR_PTR(-ENOMEM);
 409
 410         bru->entity.ops = &bru_entity_ops;
 411         bru->entity.type = VSP1_ENTITY_BRU;
 412
 413         ret = vsp1_entity_init(vsp1, &bru->entity, "bru",
 414                                vsp1->info->num_bru_inputs + 1, &bru_ops,
 415                                MEDIA_ENT_F_PROC_VIDEO_COMPOSER);
 416         if (ret < 0)
 417                 return ERR_PTR(ret);
 418
 419         /* Initialize the control handler. */
 420         v4l2_ctrl_handler_init(&bru->ctrls, 1);
 421         v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
 422                           0, 0xffffff, 1, 0);
 423
 424         bru->bgcolor = 0;
 425
 426         bru->entity.subdev.ctrl_handler = &bru->ctrls;
 427
 428         if (bru->ctrls.error) {
 429                 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
 430                 ret = bru->ctrls.error;
 431                 vsp1_entity_destroy(&bru->entity);
 432                 return ERR_PTR(ret);
 433         }
 434
 435         return bru;
 436 }