1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STM32 Digital Camera Memory Interface
5 * Copyright (C) STMicroelectronics SA 2017
6 * Authors: Yannick Fertre <yannick.fertre@st.com>
7 * Hugues Fruchet <hugues.fruchet@st.com>
8 * for STMicroelectronics.
10 * This driver is based on atmel_isi.c
14 #include <linux/clk.h>
15 #include <linux/completion.h>
16 #include <linux/delay.h>
17 #include <linux/dmaengine.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/of_graph.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/reset.h>
29 #include <linux/videodev2.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-dev.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-event.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-image-sizes.h>
37 #include <media/v4l2-ioctl.h>
38 #include <media/v4l2-rect.h>
39 #include <media/videobuf2-dma-contig.h>
41 #define DRV_NAME "stm32-dcmi"
43 /* Registers offset for DCMI */
44 #define DCMI_CR 0x00 /* Control Register */
45 #define DCMI_SR 0x04 /* Status Register */
46 #define DCMI_RIS 0x08 /* Raw Interrupt Status register */
47 #define DCMI_IER 0x0C /* Interrupt Enable Register */
48 #define DCMI_MIS 0x10 /* Masked Interrupt Status register */
49 #define DCMI_ICR 0x14 /* Interrupt Clear Register */
50 #define DCMI_ESCR 0x18 /* Embedded Synchronization Code Register */
51 #define DCMI_ESUR 0x1C /* Embedded Synchronization Unmask Register */
52 #define DCMI_CWSTRT 0x20 /* Crop Window STaRT */
53 #define DCMI_CWSIZE 0x24 /* Crop Window SIZE */
54 #define DCMI_DR 0x28 /* Data Register */
55 #define DCMI_IDR 0x2C /* IDentifier Register */
57 /* Bits definition for control register (DCMI_CR) */
58 #define CR_CAPTURE BIT(0)
60 #define CR_CROP BIT(2)
61 #define CR_JPEG BIT(3)
63 #define CR_PCKPOL BIT(5)
64 #define CR_HSPOL BIT(6)
65 #define CR_VSPOL BIT(7)
66 #define CR_FCRC_0 BIT(8)
67 #define CR_FCRC_1 BIT(9)
68 #define CR_EDM_0 BIT(10)
69 #define CR_EDM_1 BIT(11)
70 #define CR_ENABLE BIT(14)
72 /* Bits definition for status register (DCMI_SR) */
73 #define SR_HSYNC BIT(0)
74 #define SR_VSYNC BIT(1)
78 * Bits definition for interrupt registers
79 * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR)
81 #define IT_FRAME BIT(0)
84 #define IT_VSYNC BIT(3)
85 #define IT_LINE BIT(4)
94 #define MAX_WIDTH 2592U
95 #define MIN_HEIGHT 16U
96 #define MAX_HEIGHT 2592U
98 #define TIMEOUT_MS 1000
100 struct dcmi_graph_entity {
101 struct device_node *node;
103 struct v4l2_async_subdev asd;
104 struct v4l2_subdev *subdev;
113 struct dcmi_framesize {
119 struct vb2_v4l2_buffer vb;
123 struct list_head list;
127 /* Protects the access of variables shared within the interrupt */
131 struct resource *res;
132 struct reset_control *rstc;
134 struct list_head buffers;
135 struct dcmi_buf *active;
137 struct v4l2_device v4l2_dev;
138 struct video_device *vdev;
139 struct v4l2_async_notifier notifier;
140 struct dcmi_graph_entity entity;
141 struct v4l2_format fmt;
142 struct v4l2_rect crop;
145 const struct dcmi_format **sd_formats;
146 unsigned int num_of_sd_formats;
147 const struct dcmi_format *sd_format;
148 struct dcmi_framesize *sd_framesizes;
149 unsigned int num_of_sd_framesizes;
150 struct dcmi_framesize sd_framesize;
151 struct v4l2_rect sd_bounds;
153 /* Protect this data structure */
155 struct vb2_queue queue;
157 struct v4l2_fwnode_bus_parallel bus;
158 struct completion complete;
161 struct dma_chan *dma_chan;
162 dma_cookie_t dma_cookie;
168 /* Ensure DMA operations atomicity */
169 struct mutex dma_lock;
172 static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n)
174 return container_of(n, struct stm32_dcmi, notifier);
177 static inline u32 reg_read(void __iomem *base, u32 reg)
179 return readl_relaxed(base + reg);
182 static inline void reg_write(void __iomem *base, u32 reg, u32 val)
184 writel_relaxed(val, base + reg);
187 static inline void reg_set(void __iomem *base, u32 reg, u32 mask)
189 reg_write(base, reg, reg_read(base, reg) | mask);
192 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask)
194 reg_write(base, reg, reg_read(base, reg) & ~mask);
197 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf);
199 static void dcmi_buffer_done(struct stm32_dcmi *dcmi,
200 struct dcmi_buf *buf,
204 struct vb2_v4l2_buffer *vbuf;
209 list_del_init(&buf->list);
213 vbuf->sequence = dcmi->sequence++;
214 vbuf->field = V4L2_FIELD_NONE;
215 vbuf->vb2_buf.timestamp = ktime_get_ns();
216 vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused);
217 vb2_buffer_done(&vbuf->vb2_buf,
218 err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
219 dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n",
220 vbuf->vb2_buf.index, vbuf->sequence, bytesused);
222 dcmi->buffers_count++;
226 static int dcmi_restart_capture(struct stm32_dcmi *dcmi)
228 struct dcmi_buf *buf;
230 spin_lock_irq(&dcmi->irqlock);
232 if (dcmi->state != RUNNING) {
233 spin_unlock_irq(&dcmi->irqlock);
237 /* Restart a new DMA transfer with next buffer */
238 if (list_empty(&dcmi->buffers)) {
239 dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n");
240 dcmi->state = WAIT_FOR_BUFFER;
241 spin_unlock_irq(&dcmi->irqlock);
244 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
247 spin_unlock_irq(&dcmi->irqlock);
249 return dcmi_start_capture(dcmi, buf);
252 static void dcmi_dma_callback(void *param)
254 struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param;
255 struct dma_tx_state state;
256 enum dma_status status;
257 struct dcmi_buf *buf = dcmi->active;
259 spin_lock_irq(&dcmi->irqlock);
261 /* Check DMA status */
262 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
265 case DMA_IN_PROGRESS:
266 dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__);
269 dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__);
272 dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__);
274 /* Return buffer to V4L2 in error state */
275 dcmi_buffer_done(dcmi, buf, 0, -EIO);
278 dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__);
280 /* Return buffer to V4L2 */
281 dcmi_buffer_done(dcmi, buf, buf->size, 0);
283 spin_unlock_irq(&dcmi->irqlock);
285 /* Restart capture */
286 if (dcmi_restart_capture(dcmi))
287 dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n",
291 dev_err(dcmi->dev, "%s: Received unknown status\n", __func__);
295 spin_unlock_irq(&dcmi->irqlock);
298 static int dcmi_start_dma(struct stm32_dcmi *dcmi,
299 struct dcmi_buf *buf)
301 struct dma_async_tx_descriptor *desc = NULL;
302 struct dma_slave_config config;
305 memset(&config, 0, sizeof(config));
307 config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR;
308 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
309 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
310 config.dst_maxburst = 4;
312 /* Configure DMA channel */
313 ret = dmaengine_slave_config(dcmi->dma_chan, &config);
315 dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n",
321 * Avoid call of dmaengine_terminate_all() between
322 * dmaengine_prep_slave_single() and dmaengine_submit()
323 * by locking the whole DMA submission sequence
325 mutex_lock(&dcmi->dma_lock);
327 /* Prepare a DMA transaction */
328 desc = dmaengine_prep_slave_single(dcmi->dma_chan, buf->paddr,
333 dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_single failed for buffer phy=%pad size=%zu\n",
334 __func__, &buf->paddr, buf->size);
335 mutex_unlock(&dcmi->dma_lock);
339 /* Set completion callback routine for notification */
340 desc->callback = dcmi_dma_callback;
341 desc->callback_param = dcmi;
343 /* Push current DMA transaction in the pending queue */
344 dcmi->dma_cookie = dmaengine_submit(desc);
345 if (dma_submit_error(dcmi->dma_cookie)) {
346 dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__);
347 mutex_unlock(&dcmi->dma_lock);
351 mutex_unlock(&dcmi->dma_lock);
353 dma_async_issue_pending(dcmi->dma_chan);
358 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf)
365 ret = dcmi_start_dma(dcmi, buf);
367 dcmi->errors_count++;
372 reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE);
377 static void dcmi_set_crop(struct stm32_dcmi *dcmi)
381 /* Crop resolution */
382 size = ((dcmi->crop.height - 1) << 16) |
383 ((dcmi->crop.width << 1) - 1);
384 reg_write(dcmi->regs, DCMI_CWSIZE, size);
386 /* Crop start point */
387 start = ((dcmi->crop.top) << 16) |
388 ((dcmi->crop.left << 1));
389 reg_write(dcmi->regs, DCMI_CWSTRT, start);
391 dev_dbg(dcmi->dev, "Cropping to %ux%u@%u:%u\n",
392 dcmi->crop.width, dcmi->crop.height,
393 dcmi->crop.left, dcmi->crop.top);
396 reg_set(dcmi->regs, DCMI_CR, CR_CROP);
399 static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
401 struct dma_tx_state state;
402 enum dma_status status;
403 struct dcmi_buf *buf = dcmi->active;
409 * Because of variable JPEG buffer size sent by sensor,
410 * DMA transfer never completes due to transfer size never reached.
411 * In order to ensure that all the JPEG data are transferred
412 * in active buffer memory, DMA is drained.
413 * Then DMA tx status gives the amount of data transferred
414 * to memory, which is then returned to V4L2 through the active
419 dmaengine_synchronize(dcmi->dma_chan);
421 /* Get DMA residue to get JPEG size */
422 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
423 if (status != DMA_ERROR && state.residue < buf->size) {
424 /* Return JPEG buffer to V4L2 with received JPEG buffer size */
425 dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0);
427 dcmi->errors_count++;
428 dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n",
430 /* Return JPEG buffer to V4L2 in ERROR state */
431 dcmi_buffer_done(dcmi, buf, 0, -EIO);
434 /* Abort DMA operation */
435 dmaengine_terminate_all(dcmi->dma_chan);
437 /* Restart capture */
438 if (dcmi_restart_capture(dcmi))
439 dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n",
443 static irqreturn_t dcmi_irq_thread(int irq, void *arg)
445 struct stm32_dcmi *dcmi = arg;
447 spin_lock_irq(&dcmi->irqlock);
449 if ((dcmi->misr & IT_OVR) || (dcmi->misr & IT_ERR)) {
450 dcmi->errors_count++;
451 if (dcmi->misr & IT_OVR)
452 dcmi->overrun_count++;
455 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG &&
456 dcmi->misr & IT_FRAME) {
458 spin_unlock_irq(&dcmi->irqlock);
459 dcmi_process_jpeg(dcmi);
463 spin_unlock_irq(&dcmi->irqlock);
467 static irqreturn_t dcmi_irq_callback(int irq, void *arg)
469 struct stm32_dcmi *dcmi = arg;
472 spin_lock_irqsave(&dcmi->irqlock, flags);
474 dcmi->misr = reg_read(dcmi->regs, DCMI_MIS);
476 /* Clear interrupt */
477 reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR);
479 spin_unlock_irqrestore(&dcmi->irqlock, flags);
481 return IRQ_WAKE_THREAD;
484 static int dcmi_queue_setup(struct vb2_queue *vq,
485 unsigned int *nbuffers,
486 unsigned int *nplanes,
487 unsigned int sizes[],
488 struct device *alloc_devs[])
490 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
493 size = dcmi->fmt.fmt.pix.sizeimage;
495 /* Make sure the image size is large enough */
497 return sizes[0] < size ? -EINVAL : 0;
502 dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n",
508 static int dcmi_buf_init(struct vb2_buffer *vb)
510 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
511 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
513 INIT_LIST_HEAD(&buf->list);
518 static int dcmi_buf_prepare(struct vb2_buffer *vb)
520 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
521 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
522 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
525 size = dcmi->fmt.fmt.pix.sizeimage;
527 if (vb2_plane_size(vb, 0) < size) {
528 dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n",
529 __func__, vb2_plane_size(vb, 0), size);
533 vb2_set_plane_payload(vb, 0, size);
535 if (!buf->prepared) {
536 /* Get memory addresses */
538 vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
539 buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
540 buf->prepared = true;
542 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
544 dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
545 vb->index, &buf->paddr, buf->size);
551 static void dcmi_buf_queue(struct vb2_buffer *vb)
553 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
554 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
555 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
557 spin_lock_irq(&dcmi->irqlock);
559 /* Enqueue to video buffers list */
560 list_add_tail(&buf->list, &dcmi->buffers);
562 if (dcmi->state == WAIT_FOR_BUFFER) {
563 dcmi->state = RUNNING;
566 dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n",
567 buf->vb.vb2_buf.index);
569 spin_unlock_irq(&dcmi->irqlock);
570 if (dcmi_start_capture(dcmi, buf))
571 dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n",
576 spin_unlock_irq(&dcmi->irqlock);
579 static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
581 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
582 struct dcmi_buf *buf, *node;
586 ret = pm_runtime_get_sync(dcmi->dev);
588 dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
593 /* Enable stream on the sub device */
594 ret = v4l2_subdev_call(dcmi->entity.subdev, video, s_stream, 1);
595 if (ret && ret != -ENOIOCTLCMD) {
596 dev_err(dcmi->dev, "%s: Failed to start streaming, subdev streamon error",
601 spin_lock_irq(&dcmi->irqlock);
604 switch (dcmi->bus.bus_width) {
606 val |= CR_EDM_0 | CR_EDM_1;
615 /* Set bus width to 8 bits by default */
619 /* Set vertical synchronization polarity */
620 if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
623 /* Set horizontal synchronization polarity */
624 if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
627 /* Set pixel clock polarity */
628 if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
631 reg_write(dcmi->regs, DCMI_CR, val);
637 /* Enable jpeg capture */
638 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
639 reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */
642 reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
645 dcmi->errors_count = 0;
646 dcmi->overrun_count = 0;
647 dcmi->buffers_count = 0;
650 * Start transfer if at least one buffer has been queued,
651 * otherwise transfer is deferred at buffer queueing
653 if (list_empty(&dcmi->buffers)) {
654 dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n");
655 dcmi->state = WAIT_FOR_BUFFER;
656 spin_unlock_irq(&dcmi->irqlock);
660 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
663 dcmi->state = RUNNING;
665 dev_dbg(dcmi->dev, "Start streaming, starting capture\n");
667 spin_unlock_irq(&dcmi->irqlock);
668 ret = dcmi_start_capture(dcmi, buf);
670 dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n",
672 goto err_subdev_streamoff;
675 /* Enable interruptions */
676 reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
680 err_subdev_streamoff:
681 v4l2_subdev_call(dcmi->entity.subdev, video, s_stream, 0);
684 pm_runtime_put(dcmi->dev);
685 spin_lock_irq(&dcmi->irqlock);
687 * Return all buffers to vb2 in QUEUED state.
688 * This will give ownership back to userspace
690 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
691 list_del_init(&buf->list);
692 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
695 spin_unlock_irq(&dcmi->irqlock);
700 static void dcmi_stop_streaming(struct vb2_queue *vq)
702 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
703 struct dcmi_buf *buf, *node;
706 /* Disable stream on the sub device */
707 ret = v4l2_subdev_call(dcmi->entity.subdev, video, s_stream, 0);
708 if (ret && ret != -ENOIOCTLCMD)
709 dev_err(dcmi->dev, "%s: Failed to stop streaming, subdev streamoff error (%d)\n",
712 spin_lock_irq(&dcmi->irqlock);
714 /* Disable interruptions */
715 reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
718 reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE);
720 /* Return all queued buffers to vb2 in ERROR state */
721 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
722 list_del_init(&buf->list);
723 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
727 dcmi->state = STOPPED;
729 spin_unlock_irq(&dcmi->irqlock);
731 /* Stop all pending DMA operations */
732 mutex_lock(&dcmi->dma_lock);
733 dmaengine_terminate_all(dcmi->dma_chan);
734 mutex_unlock(&dcmi->dma_lock);
736 pm_runtime_put(dcmi->dev);
738 if (dcmi->errors_count)
739 dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n",
740 dcmi->errors_count, dcmi->overrun_count,
741 dcmi->buffers_count);
742 dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n",
743 dcmi->errors_count, dcmi->overrun_count,
744 dcmi->buffers_count);
747 static const struct vb2_ops dcmi_video_qops = {
748 .queue_setup = dcmi_queue_setup,
749 .buf_init = dcmi_buf_init,
750 .buf_prepare = dcmi_buf_prepare,
751 .buf_queue = dcmi_buf_queue,
752 .start_streaming = dcmi_start_streaming,
753 .stop_streaming = dcmi_stop_streaming,
754 .wait_prepare = vb2_ops_wait_prepare,
755 .wait_finish = vb2_ops_wait_finish,
758 static int dcmi_g_fmt_vid_cap(struct file *file, void *priv,
759 struct v4l2_format *fmt)
761 struct stm32_dcmi *dcmi = video_drvdata(file);
768 static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi,
771 unsigned int num_formats = dcmi->num_of_sd_formats;
772 const struct dcmi_format *fmt;
775 for (i = 0; i < num_formats; i++) {
776 fmt = dcmi->sd_formats[i];
777 if (fmt->fourcc == fourcc)
784 static void __find_outer_frame_size(struct stm32_dcmi *dcmi,
785 struct v4l2_pix_format *pix,
786 struct dcmi_framesize *framesize)
788 struct dcmi_framesize *match = NULL;
790 unsigned int min_err = UINT_MAX;
792 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
793 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
794 int w_err = (fsize->width - pix->width);
795 int h_err = (fsize->height - pix->height);
796 int err = w_err + h_err;
798 if (w_err >= 0 && h_err >= 0 && err < min_err) {
804 match = &dcmi->sd_framesizes[0];
809 static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f,
810 const struct dcmi_format **sd_format,
811 struct dcmi_framesize *sd_framesize)
813 const struct dcmi_format *sd_fmt;
814 struct dcmi_framesize sd_fsize;
815 struct v4l2_pix_format *pix = &f->fmt.pix;
816 struct v4l2_subdev_pad_config pad_cfg;
817 struct v4l2_subdev_format format = {
818 .which = V4L2_SUBDEV_FORMAT_TRY,
823 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
825 if (!dcmi->num_of_sd_formats)
828 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
829 pix->pixelformat = sd_fmt->fourcc;
832 /* Limit to hardware capabilities */
833 pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH);
834 pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT);
836 /* No crop if JPEG is requested */
837 do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG);
839 if (do_crop && dcmi->num_of_sd_framesizes) {
840 struct dcmi_framesize outer_sd_fsize;
842 * If crop is requested and sensor have discrete frame sizes,
843 * select the frame size that is just larger than request
845 __find_outer_frame_size(dcmi, pix, &outer_sd_fsize);
846 pix->width = outer_sd_fsize.width;
847 pix->height = outer_sd_fsize.height;
850 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
851 ret = v4l2_subdev_call(dcmi->entity.subdev, pad, set_fmt,
856 /* Update pix regarding to what sensor can do */
857 v4l2_fill_pix_format(pix, &format.format);
859 /* Save resolution that sensor can actually do */
860 sd_fsize.width = pix->width;
861 sd_fsize.height = pix->height;
864 struct v4l2_rect c = dcmi->crop;
865 struct v4l2_rect max_rect;
868 * Adjust crop by making the intersection between
869 * format resolution request and crop request
873 max_rect.width = pix->width;
874 max_rect.height = pix->height;
875 v4l2_rect_map_inside(&c, &max_rect);
876 c.top = clamp_t(s32, c.top, 0, pix->height - c.height);
877 c.left = clamp_t(s32, c.left, 0, pix->width - c.width);
880 /* Adjust format resolution request to crop */
881 pix->width = dcmi->crop.width;
882 pix->height = dcmi->crop.height;
885 pix->field = V4L2_FIELD_NONE;
886 pix->bytesperline = pix->width * sd_fmt->bpp;
887 pix->sizeimage = pix->bytesperline * pix->height;
892 *sd_framesize = sd_fsize;
897 static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
899 struct v4l2_subdev_format format = {
900 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
902 const struct dcmi_format *sd_format;
903 struct dcmi_framesize sd_framesize;
904 struct v4l2_mbus_framefmt *mf = &format.format;
905 struct v4l2_pix_format *pix = &f->fmt.pix;
909 * Try format, fmt.width/height could have been changed
910 * to match sensor capability or crop request
911 * sd_format & sd_framesize will contain what subdev
912 * can do for this request.
914 ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize);
918 /* Disable crop if JPEG is requested */
919 if (pix->pixelformat == V4L2_PIX_FMT_JPEG)
920 dcmi->do_crop = false;
922 /* pix to mbus format */
923 v4l2_fill_mbus_format(mf, pix,
924 sd_format->mbus_code);
925 mf->width = sd_framesize.width;
926 mf->height = sd_framesize.height;
928 ret = v4l2_subdev_call(dcmi->entity.subdev, pad,
929 set_fmt, NULL, &format);
933 dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n",
934 mf->code, mf->width, mf->height);
935 dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n",
936 (char *)&pix->pixelformat,
937 pix->width, pix->height);
940 dcmi->sd_format = sd_format;
941 dcmi->sd_framesize = sd_framesize;
946 static int dcmi_s_fmt_vid_cap(struct file *file, void *priv,
947 struct v4l2_format *f)
949 struct stm32_dcmi *dcmi = video_drvdata(file);
951 if (vb2_is_streaming(&dcmi->queue))
954 return dcmi_set_fmt(dcmi, f);
957 static int dcmi_try_fmt_vid_cap(struct file *file, void *priv,
958 struct v4l2_format *f)
960 struct stm32_dcmi *dcmi = video_drvdata(file);
962 return dcmi_try_fmt(dcmi, f, NULL, NULL);
965 static int dcmi_enum_fmt_vid_cap(struct file *file, void *priv,
966 struct v4l2_fmtdesc *f)
968 struct stm32_dcmi *dcmi = video_drvdata(file);
970 if (f->index >= dcmi->num_of_sd_formats)
973 f->pixelformat = dcmi->sd_formats[f->index]->fourcc;
977 static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi,
978 struct v4l2_pix_format *pix)
980 struct v4l2_subdev_format fmt = {
981 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
985 ret = v4l2_subdev_call(dcmi->entity.subdev, pad, get_fmt, NULL, &fmt);
989 v4l2_fill_pix_format(pix, &fmt.format);
994 static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi,
995 struct v4l2_pix_format *pix)
997 const struct dcmi_format *sd_fmt;
998 struct v4l2_subdev_format format = {
999 .which = V4L2_SUBDEV_FORMAT_TRY,
1001 struct v4l2_subdev_pad_config pad_cfg;
1004 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1006 if (!dcmi->num_of_sd_formats)
1009 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1010 pix->pixelformat = sd_fmt->fourcc;
1013 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1014 ret = v4l2_subdev_call(dcmi->entity.subdev, pad, set_fmt,
1022 static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi,
1023 struct v4l2_rect *r)
1025 struct v4l2_subdev_selection bounds = {
1026 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1027 .target = V4L2_SEL_TGT_CROP_BOUNDS,
1029 unsigned int max_width, max_height, max_pixsize;
1030 struct v4l2_pix_format pix;
1035 * Get sensor bounds first
1037 ret = v4l2_subdev_call(dcmi->entity.subdev, pad, get_selection,
1041 if (ret != -ENOIOCTLCMD)
1045 * If selection is not implemented,
1046 * fallback by enumerating sensor frame sizes
1047 * and take the largest one
1052 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1053 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
1054 unsigned int pixsize = fsize->width * fsize->height;
1056 if (pixsize > max_pixsize) {
1057 max_pixsize = pixsize;
1058 max_width = fsize->width;
1059 max_height = fsize->height;
1062 if (max_pixsize > 0) {
1065 r->width = max_width;
1066 r->height = max_height;
1071 * If frame sizes enumeration is not implemented,
1072 * fallback by getting current sensor frame size
1074 ret = dcmi_get_sensor_format(dcmi, &pix);
1080 r->width = pix.width;
1081 r->height = pix.height;
1086 static int dcmi_g_selection(struct file *file, void *fh,
1087 struct v4l2_selection *s)
1089 struct stm32_dcmi *dcmi = video_drvdata(file);
1091 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1094 switch (s->target) {
1095 case V4L2_SEL_TGT_CROP_DEFAULT:
1096 case V4L2_SEL_TGT_CROP_BOUNDS:
1097 s->r = dcmi->sd_bounds;
1099 case V4L2_SEL_TGT_CROP:
1100 if (dcmi->do_crop) {
1105 s->r.width = dcmi->fmt.fmt.pix.width;
1106 s->r.height = dcmi->fmt.fmt.pix.height;
1116 static int dcmi_s_selection(struct file *file, void *priv,
1117 struct v4l2_selection *s)
1119 struct stm32_dcmi *dcmi = video_drvdata(file);
1120 struct v4l2_rect r = s->r;
1121 struct v4l2_rect max_rect;
1122 struct v4l2_pix_format pix;
1124 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1125 s->target != V4L2_SEL_TGT_CROP)
1128 /* Reset sensor resolution to max resolution */
1129 pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat;
1130 pix.width = dcmi->sd_bounds.width;
1131 pix.height = dcmi->sd_bounds.height;
1132 dcmi_set_sensor_format(dcmi, &pix);
1135 * Make the intersection between
1141 max_rect.width = pix.width;
1142 max_rect.height = pix.height;
1143 v4l2_rect_map_inside(&r, &max_rect);
1144 r.top = clamp_t(s32, r.top, 0, pix.height - r.height);
1145 r.left = clamp_t(s32, r.left, 0, pix.width - r.width);
1147 if (!(r.top == dcmi->sd_bounds.top &&
1148 r.left == dcmi->sd_bounds.left &&
1149 r.width == dcmi->sd_bounds.width &&
1150 r.height == dcmi->sd_bounds.height)) {
1151 /* Crop if request is different than sensor resolution */
1152 dcmi->do_crop = true;
1154 dev_dbg(dcmi->dev, "s_selection: crop %ux%u@(%u,%u) from %ux%u\n",
1155 r.width, r.height, r.left, r.top,
1156 pix.width, pix.height);
1159 dcmi->do_crop = false;
1160 dev_dbg(dcmi->dev, "s_selection: crop is disabled\n");
1167 static int dcmi_querycap(struct file *file, void *priv,
1168 struct v4l2_capability *cap)
1170 strlcpy(cap->driver, DRV_NAME, sizeof(cap->driver));
1171 strlcpy(cap->card, "STM32 Camera Memory Interface",
1173 strlcpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info));
1177 static int dcmi_enum_input(struct file *file, void *priv,
1178 struct v4l2_input *i)
1183 i->type = V4L2_INPUT_TYPE_CAMERA;
1184 strlcpy(i->name, "Camera", sizeof(i->name));
1188 static int dcmi_g_input(struct file *file, void *priv, unsigned int *i)
1194 static int dcmi_s_input(struct file *file, void *priv, unsigned int i)
1201 static int dcmi_enum_framesizes(struct file *file, void *fh,
1202 struct v4l2_frmsizeenum *fsize)
1204 struct stm32_dcmi *dcmi = video_drvdata(file);
1205 const struct dcmi_format *sd_fmt;
1206 struct v4l2_subdev_frame_size_enum fse = {
1207 .index = fsize->index,
1208 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1212 sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format);
1216 fse.code = sd_fmt->mbus_code;
1218 ret = v4l2_subdev_call(dcmi->entity.subdev, pad, enum_frame_size,
1223 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1224 fsize->discrete.width = fse.max_width;
1225 fsize->discrete.height = fse.max_height;
1230 static int dcmi_g_parm(struct file *file, void *priv,
1231 struct v4l2_streamparm *p)
1233 struct stm32_dcmi *dcmi = video_drvdata(file);
1235 return v4l2_g_parm_cap(video_devdata(file), dcmi->entity.subdev, p);
1238 static int dcmi_s_parm(struct file *file, void *priv,
1239 struct v4l2_streamparm *p)
1241 struct stm32_dcmi *dcmi = video_drvdata(file);
1243 return v4l2_s_parm_cap(video_devdata(file), dcmi->entity.subdev, p);
1246 static int dcmi_enum_frameintervals(struct file *file, void *fh,
1247 struct v4l2_frmivalenum *fival)
1249 struct stm32_dcmi *dcmi = video_drvdata(file);
1250 const struct dcmi_format *sd_fmt;
1251 struct v4l2_subdev_frame_interval_enum fie = {
1252 .index = fival->index,
1253 .width = fival->width,
1254 .height = fival->height,
1255 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1259 sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format);
1263 fie.code = sd_fmt->mbus_code;
1265 ret = v4l2_subdev_call(dcmi->entity.subdev, pad,
1266 enum_frame_interval, NULL, &fie);
1270 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1271 fival->discrete = fie.interval;
1276 static const struct of_device_id stm32_dcmi_of_match[] = {
1277 { .compatible = "st,stm32-dcmi"},
1280 MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match);
1282 static int dcmi_open(struct file *file)
1284 struct stm32_dcmi *dcmi = video_drvdata(file);
1285 struct v4l2_subdev *sd = dcmi->entity.subdev;
1288 if (mutex_lock_interruptible(&dcmi->lock))
1289 return -ERESTARTSYS;
1291 ret = v4l2_fh_open(file);
1295 if (!v4l2_fh_is_singular_file(file))
1298 ret = v4l2_subdev_call(sd, core, s_power, 1);
1299 if (ret < 0 && ret != -ENOIOCTLCMD)
1302 ret = dcmi_set_fmt(dcmi, &dcmi->fmt);
1304 v4l2_subdev_call(sd, core, s_power, 0);
1307 v4l2_fh_release(file);
1309 mutex_unlock(&dcmi->lock);
1313 static int dcmi_release(struct file *file)
1315 struct stm32_dcmi *dcmi = video_drvdata(file);
1316 struct v4l2_subdev *sd = dcmi->entity.subdev;
1320 mutex_lock(&dcmi->lock);
1322 fh_singular = v4l2_fh_is_singular_file(file);
1324 ret = _vb2_fop_release(file, NULL);
1327 v4l2_subdev_call(sd, core, s_power, 0);
1329 mutex_unlock(&dcmi->lock);
1334 static const struct v4l2_ioctl_ops dcmi_ioctl_ops = {
1335 .vidioc_querycap = dcmi_querycap,
1337 .vidioc_try_fmt_vid_cap = dcmi_try_fmt_vid_cap,
1338 .vidioc_g_fmt_vid_cap = dcmi_g_fmt_vid_cap,
1339 .vidioc_s_fmt_vid_cap = dcmi_s_fmt_vid_cap,
1340 .vidioc_enum_fmt_vid_cap = dcmi_enum_fmt_vid_cap,
1341 .vidioc_g_selection = dcmi_g_selection,
1342 .vidioc_s_selection = dcmi_s_selection,
1344 .vidioc_enum_input = dcmi_enum_input,
1345 .vidioc_g_input = dcmi_g_input,
1346 .vidioc_s_input = dcmi_s_input,
1348 .vidioc_g_parm = dcmi_g_parm,
1349 .vidioc_s_parm = dcmi_s_parm,
1351 .vidioc_enum_framesizes = dcmi_enum_framesizes,
1352 .vidioc_enum_frameintervals = dcmi_enum_frameintervals,
1354 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1355 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1356 .vidioc_querybuf = vb2_ioctl_querybuf,
1357 .vidioc_qbuf = vb2_ioctl_qbuf,
1358 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1359 .vidioc_expbuf = vb2_ioctl_expbuf,
1360 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1361 .vidioc_streamon = vb2_ioctl_streamon,
1362 .vidioc_streamoff = vb2_ioctl_streamoff,
1364 .vidioc_log_status = v4l2_ctrl_log_status,
1365 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1366 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1369 static const struct v4l2_file_operations dcmi_fops = {
1370 .owner = THIS_MODULE,
1371 .unlocked_ioctl = video_ioctl2,
1373 .release = dcmi_release,
1374 .poll = vb2_fop_poll,
1375 .mmap = vb2_fop_mmap,
1377 .get_unmapped_area = vb2_fop_get_unmapped_area,
1379 .read = vb2_fop_read,
1382 static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi)
1384 struct v4l2_format f = {
1385 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
1388 .height = CIF_HEIGHT,
1389 .field = V4L2_FIELD_NONE,
1390 .pixelformat = dcmi->sd_formats[0]->fourcc,
1395 ret = dcmi_try_fmt(dcmi, &f, NULL, NULL);
1398 dcmi->sd_format = dcmi->sd_formats[0];
1403 static const struct dcmi_format dcmi_formats[] = {
1405 .fourcc = V4L2_PIX_FMT_RGB565,
1406 .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
1409 .fourcc = V4L2_PIX_FMT_YUYV,
1410 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
1413 .fourcc = V4L2_PIX_FMT_UYVY,
1414 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
1417 .fourcc = V4L2_PIX_FMT_JPEG,
1418 .mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
1423 static int dcmi_formats_init(struct stm32_dcmi *dcmi)
1425 const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)];
1426 unsigned int num_fmts = 0, i, j;
1427 struct v4l2_subdev *subdev = dcmi->entity.subdev;
1428 struct v4l2_subdev_mbus_code_enum mbus_code = {
1429 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1432 while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
1433 NULL, &mbus_code)) {
1434 for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) {
1435 if (dcmi_formats[i].mbus_code != mbus_code.code)
1438 /* Code supported, have we got this fourcc yet? */
1439 for (j = 0; j < num_fmts; j++)
1440 if (sd_fmts[j]->fourcc ==
1441 dcmi_formats[i].fourcc)
1442 /* Already available */
1446 sd_fmts[num_fmts++] = dcmi_formats + i;
1454 dcmi->num_of_sd_formats = num_fmts;
1455 dcmi->sd_formats = devm_kcalloc(dcmi->dev,
1456 num_fmts, sizeof(struct dcmi_format *),
1458 if (!dcmi->sd_formats) {
1459 dev_err(dcmi->dev, "Could not allocate memory\n");
1463 memcpy(dcmi->sd_formats, sd_fmts,
1464 num_fmts * sizeof(struct dcmi_format *));
1465 dcmi->sd_format = dcmi->sd_formats[0];
1470 static int dcmi_framesizes_init(struct stm32_dcmi *dcmi)
1472 unsigned int num_fsize = 0;
1473 struct v4l2_subdev *subdev = dcmi->entity.subdev;
1474 struct v4l2_subdev_frame_size_enum fse = {
1475 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1476 .code = dcmi->sd_format->mbus_code,
1481 /* Allocate discrete framesizes array */
1482 while (!v4l2_subdev_call(subdev, pad, enum_frame_size,
1486 num_fsize = fse.index;
1490 dcmi->num_of_sd_framesizes = num_fsize;
1491 dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize,
1492 sizeof(struct dcmi_framesize),
1494 if (!dcmi->sd_framesizes) {
1495 dev_err(dcmi->dev, "Could not allocate memory\n");
1499 /* Fill array with sensor supported framesizes */
1500 dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize);
1501 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1503 ret = v4l2_subdev_call(subdev, pad, enum_frame_size,
1507 dcmi->sd_framesizes[fse.index].width = fse.max_width;
1508 dcmi->sd_framesizes[fse.index].height = fse.max_height;
1509 dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height);
1515 static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier)
1517 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1520 dcmi->vdev->ctrl_handler = dcmi->entity.subdev->ctrl_handler;
1521 ret = dcmi_formats_init(dcmi);
1523 dev_err(dcmi->dev, "No supported mediabus format found\n");
1527 ret = dcmi_framesizes_init(dcmi);
1529 dev_err(dcmi->dev, "Could not initialize framesizes\n");
1533 ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds);
1535 dev_err(dcmi->dev, "Could not get sensor bounds\n");
1539 ret = dcmi_set_default_fmt(dcmi);
1541 dev_err(dcmi->dev, "Could not set default format\n");
1545 ret = video_register_device(dcmi->vdev, VFL_TYPE_GRABBER, -1);
1547 dev_err(dcmi->dev, "Failed to register video device\n");
1551 dev_dbg(dcmi->dev, "Device registered as %s\n",
1552 video_device_node_name(dcmi->vdev));
1556 static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
1557 struct v4l2_subdev *sd,
1558 struct v4l2_async_subdev *asd)
1560 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1562 dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
1564 /* Checks internaly if vdev has been init or not */
1565 video_unregister_device(dcmi->vdev);
1568 static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
1569 struct v4l2_subdev *subdev,
1570 struct v4l2_async_subdev *asd)
1572 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1574 dev_dbg(dcmi->dev, "Subdev %s bound\n", subdev->name);
1576 dcmi->entity.subdev = subdev;
1581 static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
1582 .bound = dcmi_graph_notify_bound,
1583 .unbind = dcmi_graph_notify_unbind,
1584 .complete = dcmi_graph_notify_complete,
1587 static int dcmi_graph_parse(struct stm32_dcmi *dcmi, struct device_node *node)
1589 struct device_node *ep = NULL;
1590 struct device_node *remote;
1592 ep = of_graph_get_next_endpoint(node, ep);
1596 remote = of_graph_get_remote_port_parent(ep);
1601 /* Remote node to connect */
1602 dcmi->entity.node = remote;
1603 dcmi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
1604 dcmi->entity.asd.match.fwnode = of_fwnode_handle(remote);
1608 static int dcmi_graph_init(struct stm32_dcmi *dcmi)
1610 struct v4l2_async_subdev **subdevs = NULL;
1613 /* Parse the graph to extract a list of subdevice DT nodes. */
1614 ret = dcmi_graph_parse(dcmi, dcmi->dev->of_node);
1616 dev_err(dcmi->dev, "Graph parsing failed\n");
1620 /* Register the subdevices notifier. */
1621 subdevs = devm_kzalloc(dcmi->dev, sizeof(*subdevs), GFP_KERNEL);
1623 of_node_put(dcmi->entity.node);
1627 subdevs[0] = &dcmi->entity.asd;
1629 dcmi->notifier.subdevs = subdevs;
1630 dcmi->notifier.num_subdevs = 1;
1631 dcmi->notifier.ops = &dcmi_graph_notify_ops;
1633 ret = v4l2_async_notifier_register(&dcmi->v4l2_dev, &dcmi->notifier);
1635 dev_err(dcmi->dev, "Notifier registration failed\n");
1636 of_node_put(dcmi->entity.node);
1643 static int dcmi_probe(struct platform_device *pdev)
1645 struct device_node *np = pdev->dev.of_node;
1646 const struct of_device_id *match = NULL;
1647 struct v4l2_fwnode_endpoint ep;
1648 struct stm32_dcmi *dcmi;
1649 struct vb2_queue *q;
1650 struct dma_chan *chan;
1655 match = of_match_device(of_match_ptr(stm32_dcmi_of_match), &pdev->dev);
1657 dev_err(&pdev->dev, "Could not find a match in devicetree\n");
1661 dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL);
1665 dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1666 if (IS_ERR(dcmi->rstc)) {
1667 dev_err(&pdev->dev, "Could not get reset control\n");
1668 return PTR_ERR(dcmi->rstc);
1671 /* Get bus characteristics from devicetree */
1672 np = of_graph_get_next_endpoint(np, NULL);
1674 dev_err(&pdev->dev, "Could not find the endpoint\n");
1679 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
1682 dev_err(&pdev->dev, "Could not parse the endpoint\n");
1686 if (ep.bus_type == V4L2_MBUS_CSI2) {
1687 dev_err(&pdev->dev, "CSI bus not supported\n");
1690 dcmi->bus.flags = ep.bus.parallel.flags;
1691 dcmi->bus.bus_width = ep.bus.parallel.bus_width;
1692 dcmi->bus.data_shift = ep.bus.parallel.data_shift;
1694 irq = platform_get_irq(pdev, 0);
1696 if (irq != -EPROBE_DEFER)
1697 dev_err(&pdev->dev, "Could not get irq\n");
1698 return irq ? irq : -ENXIO;
1701 dcmi->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1703 dev_err(&pdev->dev, "Could not get resource\n");
1707 dcmi->regs = devm_ioremap_resource(&pdev->dev, dcmi->res);
1708 if (IS_ERR(dcmi->regs)) {
1709 dev_err(&pdev->dev, "Could not map registers\n");
1710 return PTR_ERR(dcmi->regs);
1713 ret = devm_request_threaded_irq(&pdev->dev, irq, dcmi_irq_callback,
1714 dcmi_irq_thread, IRQF_ONESHOT,
1715 dev_name(&pdev->dev), dcmi);
1717 dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
1721 mclk = devm_clk_get(&pdev->dev, "mclk");
1723 if (PTR_ERR(mclk) != -EPROBE_DEFER)
1724 dev_err(&pdev->dev, "Unable to get mclk\n");
1725 return PTR_ERR(mclk);
1728 chan = dma_request_slave_channel(&pdev->dev, "tx");
1730 dev_info(&pdev->dev, "Unable to request DMA channel, defer probing\n");
1731 return -EPROBE_DEFER;
1734 spin_lock_init(&dcmi->irqlock);
1735 mutex_init(&dcmi->lock);
1736 mutex_init(&dcmi->dma_lock);
1737 init_completion(&dcmi->complete);
1738 INIT_LIST_HEAD(&dcmi->buffers);
1740 dcmi->dev = &pdev->dev;
1742 dcmi->state = STOPPED;
1743 dcmi->dma_chan = chan;
1747 /* Initialize the top-level structure */
1748 ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev);
1750 goto err_dma_release;
1752 dcmi->vdev = video_device_alloc();
1755 goto err_device_unregister;
1759 dcmi->vdev->fops = &dcmi_fops;
1760 dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev;
1761 dcmi->vdev->queue = &dcmi->queue;
1762 strlcpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name));
1763 dcmi->vdev->release = video_device_release;
1764 dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops;
1765 dcmi->vdev->lock = &dcmi->lock;
1766 dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
1768 video_set_drvdata(dcmi->vdev, dcmi);
1771 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1772 q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
1773 q->lock = &dcmi->lock;
1775 q->buf_struct_size = sizeof(struct dcmi_buf);
1776 q->ops = &dcmi_video_qops;
1777 q->mem_ops = &vb2_dma_contig_memops;
1778 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1779 q->min_buffers_needed = 2;
1780 q->dev = &pdev->dev;
1782 ret = vb2_queue_init(q);
1784 dev_err(&pdev->dev, "Failed to initialize vb2 queue\n");
1785 goto err_device_release;
1788 ret = dcmi_graph_init(dcmi);
1790 goto err_device_release;
1793 ret = reset_control_assert(dcmi->rstc);
1795 dev_err(&pdev->dev, "Failed to assert the reset line\n");
1796 goto err_device_release;
1799 usleep_range(3000, 5000);
1801 ret = reset_control_deassert(dcmi->rstc);
1803 dev_err(&pdev->dev, "Failed to deassert the reset line\n");
1804 goto err_device_release;
1807 dev_info(&pdev->dev, "Probe done\n");
1809 platform_set_drvdata(pdev, dcmi);
1811 pm_runtime_enable(&pdev->dev);
1816 video_device_release(dcmi->vdev);
1817 err_device_unregister:
1818 v4l2_device_unregister(&dcmi->v4l2_dev);
1820 dma_release_channel(dcmi->dma_chan);
1825 static int dcmi_remove(struct platform_device *pdev)
1827 struct stm32_dcmi *dcmi = platform_get_drvdata(pdev);
1829 pm_runtime_disable(&pdev->dev);
1831 v4l2_async_notifier_unregister(&dcmi->notifier);
1832 v4l2_device_unregister(&dcmi->v4l2_dev);
1834 dma_release_channel(dcmi->dma_chan);
1839 static __maybe_unused int dcmi_runtime_suspend(struct device *dev)
1841 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
1843 clk_disable_unprepare(dcmi->mclk);
1848 static __maybe_unused int dcmi_runtime_resume(struct device *dev)
1850 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
1853 ret = clk_prepare_enable(dcmi->mclk);
1855 dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__);
1860 static __maybe_unused int dcmi_suspend(struct device *dev)
1863 pm_runtime_force_suspend(dev);
1865 /* change pinctrl state */
1866 pinctrl_pm_select_sleep_state(dev);
1871 static __maybe_unused int dcmi_resume(struct device *dev)
1873 /* restore pinctl default state */
1874 pinctrl_pm_select_default_state(dev);
1877 pm_runtime_force_resume(dev);
1882 static const struct dev_pm_ops dcmi_pm_ops = {
1883 SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume)
1884 SET_RUNTIME_PM_OPS(dcmi_runtime_suspend,
1885 dcmi_runtime_resume, NULL)
1888 static struct platform_driver stm32_dcmi_driver = {
1889 .probe = dcmi_probe,
1890 .remove = dcmi_remove,
1893 .of_match_table = of_match_ptr(stm32_dcmi_of_match),
1898 module_platform_driver(stm32_dcmi_driver);
1900 MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>");
1901 MODULE_AUTHOR("Hugues Fruchet <hugues.fruchet@st.com>");
1902 MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver");
1903 MODULE_LICENSE("GPL");
1904 MODULE_SUPPORTED_DEVICE("video");