1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
13 #include <linux/delay.h>
14 #include <linux/sched.h>
15 #include <linux/spinlock.h>
16 #include <linux/types.h>
17 #include <linux/videodev2.h>
19 #include <linux/pm_runtime.h>
20 #include <media/videobuf2-v4l2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-mediabus.h>
25 #include <media/videobuf2-dma-contig.h>
29 #define CONFIG_VB2_GSC_DMA_CONTIG 1
30 #define GSC_MODULE_NAME "exynos-gsc"
32 #define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
33 #define GSC_MAX_DEVS 4
34 #define GSC_MAX_CLOCKS 4
35 #define GSC_M2M_BUF_NUM 0
36 #define GSC_MAX_CTRL_NUM 10
37 #define GSC_SC_ALIGN_4 4
38 #define GSC_SC_ALIGN_2 2
39 #define DEFAULT_CSC_EQ 1
40 #define DEFAULT_CSC_RANGE 1
42 #define GSC_PARAMS (1 << 0)
43 #define GSC_SRC_FMT (1 << 1)
44 #define GSC_DST_FMT (1 << 2)
45 #define GSC_CTX_M2M (1 << 3)
46 #define GSC_CTX_STOP_REQ (1 << 6)
47 #define GSC_CTX_ABORT (1 << 7)
64 * enum gsc_datapath - the path of data used for G-Scaler
65 * @GSC_CAMERA: from camera
66 * @GSC_DMA: from/to DMA
67 * @GSC_WRITEBACK: from FIMD
89 #define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
90 #define is_rgb(x) (!!((x) & 0x1))
91 #define is_yuv420(x) (!!((x) & 0x2))
92 #define is_yuv422(x) (!!((x) & 0x4))
94 #define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
95 #define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
96 #define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
98 #define ctrl_to_ctx(__ctrl) \
99 container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
101 * struct gsc_fmt - the driver's internal color format data
102 * @mbus_code: Media Bus pixel code, -1 if not applicable
103 * @pixelformat: the fourcc code for this format, 0 if not applicable
104 * @color: color encoding
106 * @corder: Chrominance order control
107 * @num_planes: number of physically non-contiguous data planes
108 * @num_comp: number of physically contiguous data planes
109 * @depth: per plane driver's private 'number of bits per pixel'
110 * @flags: flags indicating which operation mode format applies to
120 u8 depth[VIDEO_MAX_PLANES];
125 * struct gsc_input_buf - the driver's video buffer
126 * @vb: videobuf2 buffer
127 * @list : linked list structure for buffer queue
128 * @idx : index of G-Scaler input buffer
130 struct gsc_input_buf {
131 struct vb2_v4l2_buffer vb;
132 struct list_head list;
137 * struct gsc_addr - the G-Scaler physical address set
138 * @y: luminance plane address
139 * @cb: Cb plane address
140 * @cr: Cr plane address
148 /* struct gsc_ctrls - the G-Scaler control set
149 * @rotate: rotation degree
150 * @hflip: horizontal flip
151 * @vflip: vertical flip
152 * @global_alpha: the alpha value of current frame
155 struct v4l2_ctrl *rotate;
156 struct v4l2_ctrl *hflip;
157 struct v4l2_ctrl *vflip;
158 struct v4l2_ctrl *global_alpha;
162 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
163 * @pre_shfactor: pre sclaer shift factor
164 * @pre_hratio: horizontal ratio of the prescaler
165 * @pre_vratio: vertical ratio of the prescaler
166 * @main_hratio: the main scaler's horizontal ratio
167 * @main_vratio: the main scaler's vertical ratio
182 * struct gsc_frame - source/target frame properties
183 * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
184 * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
185 * @crop: cropped(source)/scaled(destination) size
186 * @payload: image size in bytes (w x h x bpp)
187 * @addr: image frame buffer physical addresses
188 * @fmt: G-Scaler color format pointer
189 * @colorspace: value indicating v4l2_colorspace
190 * @alpha: frame's alpha value
195 struct v4l2_rect crop;
196 unsigned long payload[VIDEO_MAX_PLANES];
197 struct gsc_addr addr;
198 const struct gsc_fmt *fmt;
204 * struct gsc_m2m_device - v4l2 memory-to-memory device data
205 * @vfd: the video device node for v4l2 m2m mode
206 * @m2m_dev: v4l2 memory-to-memory device data
207 * @ctx: hardware context data
208 * @refcnt: the reference counter
210 struct gsc_m2m_device {
211 struct video_device *vfd;
212 struct v4l2_m2m_dev *m2m_dev;
218 * struct gsc_pix_max - image pixel size limits in various IP configurations
220 * @org_scaler_bypass_w: max pixel width when the scaler is disabled
221 * @org_scaler_bypass_h: max pixel height when the scaler is disabled
222 * @org_scaler_input_w: max pixel width when the scaler is enabled
223 * @org_scaler_input_h: max pixel height when the scaler is enabled
224 * @real_rot_dis_w: max pixel src cropped height with the rotator is off
225 * @real_rot_dis_h: max pixel src cropped width with the rotator is off
226 * @real_rot_en_w: max pixel src cropped width with the rotator is on
227 * @real_rot_en_h: max pixel src cropped height with the rotator is on
228 * @target_rot_dis_w: max pixel dst scaled width with the rotator is off
229 * @target_rot_dis_h: max pixel dst scaled height with the rotator is off
230 * @target_rot_en_w: max pixel dst scaled width with the rotator is on
231 * @target_rot_en_h: max pixel dst scaled height with the rotator is on
234 u16 org_scaler_bypass_w;
235 u16 org_scaler_bypass_h;
236 u16 org_scaler_input_w;
237 u16 org_scaler_input_h;
242 u16 target_rot_dis_w;
243 u16 target_rot_dis_h;
249 * struct gsc_pix_min - image pixel size limits in various IP configurations
251 * @org_w: minimum source pixel width
252 * @org_h: minimum source pixel height
253 * @real_w: minimum input crop pixel width
254 * @real_h: minimum input crop pixel height
255 * @target_rot_dis_w: minimum output scaled pixel height when rotator is off
256 * @target_rot_dis_h: minimum output scaled pixel height when rotator is off
257 * @target_rot_en_w: minimum output scaled pixel height when rotator is on
258 * @target_rot_en_h: minimum output scaled pixel height when rotator is on
265 u16 target_rot_dis_w;
266 u16 target_rot_dis_h;
271 struct gsc_pix_align {
282 * struct gsc_variant - G-Scaler variant information
285 struct gsc_pix_max *pix_max;
286 struct gsc_pix_min *pix_min;
287 struct gsc_pix_align *pix_align;
292 u16 poly_sc_down_max;
298 * struct gsc_driverdata - per device type driver data for init time.
300 * @variant: the variant information for this driver.
301 * @num_entities: the number of g-scalers
302 * @clk_names: clock names
303 * @num_clocks: the number of clocks in @clk_names
304 * @num_entities: the number of g-scalers
306 struct gsc_driverdata {
307 struct gsc_variant *variant[GSC_MAX_DEVS];
308 const char *clk_names[GSC_MAX_CLOCKS];
314 * struct gsc_dev - abstraction for G-Scaler entity
315 * @slock: the spinlock protecting this data structure
316 * @lock: the mutex protecting this data structure
317 * @pdev: pointer to the G-Scaler platform device
318 * @variant: the IP variant information
319 * @id: G-Scaler device index (0..GSC_MAX_DEVS)
320 * @num_clocks: number of clocks required for G-Scaler operation
321 * @clock: clocks required for G-Scaler operation
322 * @regs: the mapped hardware registers
323 * @irq_queue: interrupt handler waitqueue
324 * @m2m: memory-to-memory V4L2 device information
325 * @state: flags used to synchronize m2m and capture mode operation
326 * @vdev: video device for G-Scaler instance
327 * @v4l2_dev: v4l2_device for G-Scaler instance
332 struct platform_device *pdev;
333 struct gsc_variant *variant;
336 struct clk *clock[GSC_MAX_CLOCKS];
338 wait_queue_head_t irq_queue;
339 struct gsc_m2m_device m2m;
341 struct video_device vdev;
342 struct v4l2_device v4l2_dev;
346 * struct gsc_ctx - the device context data
347 * @s_frame: source frame properties
348 * @d_frame: destination frame properties
349 * @in_path: input mode (DMA or camera)
350 * @out_path: output mode (DMA or FIFO)
351 * @scaler: image scaler properties
352 * @flags: additional flags for image conversion
353 * @state: flags to keep track of user configuration
354 * @rotation: rotation
355 * @hflip: horizontal flip
356 * @vflip: vertical flip
357 * @gsc_dev: the G-Scaler device this context applies to
358 * @m2m_ctx: memory-to-memory device context
359 * @fh: v4l2 file handle
360 * @ctrl_handler: v4l2 controls handler
361 * @gsc_ctrls: G-Scaler control set
362 * @ctrls_rdy: true if the control handler is initialized
363 * @out_colorspace: the colorspace of the OUTPUT queue
366 struct gsc_frame s_frame;
367 struct gsc_frame d_frame;
368 enum gsc_datapath in_path;
369 enum gsc_datapath out_path;
370 struct gsc_scaler scaler;
374 unsigned int hflip:1;
375 unsigned int vflip:1;
376 struct gsc_dev *gsc_dev;
377 struct v4l2_m2m_ctx *m2m_ctx;
379 struct v4l2_ctrl_handler ctrl_handler;
380 struct gsc_ctrls gsc_ctrls;
382 enum v4l2_colorspace out_colorspace;
385 void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
386 int gsc_register_m2m_device(struct gsc_dev *gsc);
387 void gsc_unregister_m2m_device(struct gsc_dev *gsc);
388 void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
390 u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
391 const struct gsc_fmt *get_format(int index);
392 const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
393 int gsc_enum_fmt(struct v4l2_fmtdesc *f);
394 int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
395 void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
396 int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
397 void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
398 int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s);
399 int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
401 void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
402 void gsc_check_src_scale_info(struct gsc_variant *var,
403 struct gsc_frame *s_frame,
404 u32 *wratio, u32 tx, u32 ty, u32 *hratio);
405 int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
406 int dh, int rot, int out_path);
407 int gsc_set_scaler_info(struct gsc_ctx *ctx);
408 int gsc_ctrls_create(struct gsc_ctx *ctx);
409 void gsc_ctrls_delete(struct gsc_ctx *ctx);
410 int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
411 struct gsc_frame *frame, struct gsc_addr *addr);
413 static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
417 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
419 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
422 static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
426 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
427 ctx->state &= ~state;
428 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
431 static inline int is_tiled(const struct gsc_fmt *fmt)
433 return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
436 static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
438 u32 cfg = readl(dev->regs + GSC_ENABLE);
441 cfg |= GSC_ENABLE_ON;
443 cfg &= ~GSC_ENABLE_ON;
445 writel(cfg, dev->regs + GSC_ENABLE);
448 static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
450 u32 cfg = readl(dev->regs + GSC_IRQ);
451 if (cfg & GSC_IRQ_STATUS_OR_IRQ)
452 return GSC_IRQ_OVERRUN;
458 static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
460 u32 cfg = readl(dev->regs + GSC_IRQ);
461 if (irq == GSC_IRQ_OVERRUN)
462 cfg |= GSC_IRQ_STATUS_OR_IRQ;
463 else if (irq == GSC_IRQ_DONE)
464 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
465 writel(cfg, dev->regs + GSC_IRQ);
468 static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
473 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
474 ret = (ctx->state & mask) == mask;
475 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
479 static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
480 enum v4l2_buf_type type)
482 struct gsc_frame *frame;
484 if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
485 frame = &ctx->s_frame;
486 } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
487 frame = &ctx->d_frame;
489 pr_err("Wrong buffer/video queue type (%d)", type);
490 return ERR_PTR(-EINVAL);
496 void gsc_hw_set_sw_reset(struct gsc_dev *dev);
497 int gsc_wait_reset(struct gsc_dev *dev);
499 void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
500 void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
501 void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
502 void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
503 void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
505 void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
507 void gsc_hw_set_input_path(struct gsc_ctx *ctx);
508 void gsc_hw_set_in_size(struct gsc_ctx *ctx);
509 void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
510 void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
511 void gsc_hw_set_output_path(struct gsc_ctx *ctx);
512 void gsc_hw_set_out_size(struct gsc_ctx *ctx);
513 void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
514 void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
515 void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
516 void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
517 void gsc_hw_set_rotation(struct gsc_ctx *ctx);
518 void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
519 void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
521 #endif /* GSC_CORE_H_ */