drivers/media/platform/s5p-mfc/s5p_mfc.c

   1 /*
   2  * Samsung S5P Multi Format Codec v 5.1
   3  *
   4  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   5  * Kamil Debski, <k.debski@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/delay.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/io.h>
  17 #include <linux/module.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/sched.h>
  20 #include <linux/slab.h>
  21 #include <linux/videodev2.h>
  22 #include <media/v4l2-event.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/of.h>
  25 #include <media/videobuf2-v4l2.h>
  26 #include "s5p_mfc_common.h"
  27 #include "s5p_mfc_ctrl.h"
  28 #include "s5p_mfc_debug.h"
  29 #include "s5p_mfc_dec.h"
  30 #include "s5p_mfc_enc.h"
  31 #include "s5p_mfc_intr.h"
  32 #include "s5p_mfc_opr.h"
  33 #include "s5p_mfc_cmd.h"
  34 #include "s5p_mfc_pm.h"
  35
  36 #define S5P_MFC_NAME            "s5p-mfc"
  37 #define S5P_MFC_DEC_NAME        "s5p-mfc-dec"
  38 #define S5P_MFC_ENC_NAME        "s5p-mfc-enc"
  39
  40 int mfc_debug_level;
  41 module_param_named(debug, mfc_debug_level, int, S_IRUGO | S_IWUSR);
  42 MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages");
  43
  44 /* Helper functions for interrupt processing */
  45
  46 /* Remove from hw execution round robin */
  47 void clear_work_bit(struct s5p_mfc_ctx *ctx)
  48 {
  49         struct s5p_mfc_dev *dev = ctx->dev;
  50
  51         spin_lock(&dev->condlock);
  52         __clear_bit(ctx->num, &dev->ctx_work_bits);
  53         spin_unlock(&dev->condlock);
  54 }
  55
  56 /* Add to hw execution round robin */
  57 void set_work_bit(struct s5p_mfc_ctx *ctx)
  58 {
  59         struct s5p_mfc_dev *dev = ctx->dev;
  60
  61         spin_lock(&dev->condlock);
  62         __set_bit(ctx->num, &dev->ctx_work_bits);
  63         spin_unlock(&dev->condlock);
  64 }
  65
  66 /* Remove from hw execution round robin */
  67 void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx)
  68 {
  69         struct s5p_mfc_dev *dev = ctx->dev;
  70         unsigned long flags;
  71
  72         spin_lock_irqsave(&dev->condlock, flags);
  73         __clear_bit(ctx->num, &dev->ctx_work_bits);
  74         spin_unlock_irqrestore(&dev->condlock, flags);
  75 }
  76
  77 /* Add to hw execution round robin */
  78 void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx)
  79 {
  80         struct s5p_mfc_dev *dev = ctx->dev;
  81         unsigned long flags;
  82
  83         spin_lock_irqsave(&dev->condlock, flags);
  84         __set_bit(ctx->num, &dev->ctx_work_bits);
  85         spin_unlock_irqrestore(&dev->condlock, flags);
  86 }
  87
  88 /* Wake up context wait_queue */
  89 static void wake_up_ctx(struct s5p_mfc_ctx *ctx, unsigned int reason,
  90                         unsigned int err)
  91 {
  92         ctx->int_cond = 1;
  93         ctx->int_type = reason;
  94         ctx->int_err = err;
  95         wake_up(&ctx->queue);
  96 }
  97
  98 /* Wake up device wait_queue */
  99 static void wake_up_dev(struct s5p_mfc_dev *dev, unsigned int reason,
 100                         unsigned int err)
 101 {
 102         dev->int_cond = 1;
 103         dev->int_type = reason;
 104         dev->int_err = err;
 105         wake_up(&dev->queue);
 106 }
 107
 108 static void s5p_mfc_watchdog(unsigned long arg)
 109 {
 110         struct s5p_mfc_dev *dev = (struct s5p_mfc_dev *)arg;
 111
 112         if (test_bit(0, &dev->hw_lock))
 113                 atomic_inc(&dev->watchdog_cnt);
 114         if (atomic_read(&dev->watchdog_cnt) >= MFC_WATCHDOG_CNT) {
 115                 /* This means that hw is busy and no interrupts were
 116                  * generated by hw for the Nth time of running this
 117                  * watchdog timer. This usually means a serious hw
 118                  * error. Now it is time to kill all instances and
 119                  * reset the MFC. */
 120                 mfc_err("Time out during waiting for HW\n");
 121                 queue_work(dev->watchdog_workqueue, &dev->watchdog_work);
 122         }
 123         dev->watchdog_timer.expires = jiffies +
 124                                         msecs_to_jiffies(MFC_WATCHDOG_INTERVAL);
 125         add_timer(&dev->watchdog_timer);
 126 }
 127
 128 static void s5p_mfc_watchdog_worker(struct work_struct *work)
 129 {
 130         struct s5p_mfc_dev *dev;
 131         struct s5p_mfc_ctx *ctx;
 132         unsigned long flags;
 133         int mutex_locked;
 134         int i, ret;
 135
 136         dev = container_of(work, struct s5p_mfc_dev, watchdog_work);
 137
 138         mfc_err("Driver timeout error handling\n");
 139         /* Lock the mutex that protects open and release.
 140          * This is necessary as they may load and unload firmware. */
 141         mutex_locked = mutex_trylock(&dev->mfc_mutex);
 142         if (!mutex_locked)
 143                 mfc_err("Error: some instance may be closing/opening\n");
 144         spin_lock_irqsave(&dev->irqlock, flags);
 145
 146         s5p_mfc_clock_off();
 147
 148         for (i = 0; i < MFC_NUM_CONTEXTS; i++) {
 149                 ctx = dev->ctx[i];
 150                 if (!ctx)
 151                         continue;
 152                 ctx->state = MFCINST_ERROR;
 153                 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
 154                                                 &ctx->dst_queue, &ctx->vq_dst);
 155                 s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
 156                                                 &ctx->src_queue, &ctx->vq_src);
 157                 clear_work_bit(ctx);
 158                 wake_up_ctx(ctx, S5P_MFC_R2H_CMD_ERR_RET, 0);
 159         }
 160         clear_bit(0, &dev->hw_lock);
 161         spin_unlock_irqrestore(&dev->irqlock, flags);
 162
 163         /* De-init MFC */
 164         s5p_mfc_deinit_hw(dev);
 165
 166         /* Double check if there is at least one instance running.
 167          * If no instance is in memory than no firmware should be present */
 168         if (dev->num_inst > 0) {
 169                 ret = s5p_mfc_load_firmware(dev);
 170                 if (ret) {
 171                         mfc_err("Failed to reload FW\n");
 172                         goto unlock;
 173                 }
 174                 s5p_mfc_clock_on();
 175                 ret = s5p_mfc_init_hw(dev);
 176                 s5p_mfc_clock_off();
 177                 if (ret)
 178                         mfc_err("Failed to reinit FW\n");
 179         }
 180 unlock:
 181         if (mutex_locked)
 182                 mutex_unlock(&dev->mfc_mutex);
 183 }
 184
 185 static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx)
 186 {
 187         struct s5p_mfc_buf *dst_buf;
 188         struct s5p_mfc_dev *dev = ctx->dev;
 189
 190         ctx->state = MFCINST_FINISHED;
 191         ctx->sequence++;
 192         while (!list_empty(&ctx->dst_queue)) {
 193                 dst_buf = list_entry(ctx->dst_queue.next,
 194                                      struct s5p_mfc_buf, list);
 195                 mfc_debug(2, "Cleaning up buffer: %d\n",
 196                                           dst_buf->b->vb2_buf.index);
 197                 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 0, 0);
 198                 vb2_set_plane_payload(&dst_buf->b->vb2_buf, 1, 0);
 199                 list_del(&dst_buf->list);
 200                 dst_buf->flags |= MFC_BUF_FLAG_EOS;
 201                 ctx->dst_queue_cnt--;
 202                 dst_buf->b->sequence = (ctx->sequence++);
 203
 204                 if (s5p_mfc_hw_call(dev->mfc_ops, get_pic_type_top, ctx) ==
 205                         s5p_mfc_hw_call(dev->mfc_ops, get_pic_type_bot, ctx))
 206                         dst_buf->b->field = V4L2_FIELD_NONE;
 207                 else
 208                         dst_buf->b->field = V4L2_FIELD_INTERLACED;
 209                 dst_buf->b->flags |= V4L2_BUF_FLAG_LAST;
 210
 211                 ctx->dec_dst_flag &= ~(1 << dst_buf->b->vb2_buf.index);
 212                 vb2_buffer_done(&dst_buf->b->vb2_buf, VB2_BUF_STATE_DONE);
 213         }
 214 }
 215
 216 static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx)
 217 {
 218         struct s5p_mfc_dev *dev = ctx->dev;
 219         struct s5p_mfc_buf  *dst_buf, *src_buf;
 220         size_t dec_y_addr;
 221         unsigned int frame_type;
 222
 223         /* Make sure we actually have a new frame before continuing. */
 224         frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev);
 225         if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED)
 226                 return;
 227         dec_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dec_y_adr, dev);
 228
 229         /* Copy timestamp / timecode from decoded src to dst and set
 230            appropriate flags. */
 231         src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
 232         list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
 233                 if (vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0)
 234                                 == dec_y_addr) {
 235                         dst_buf->b->timecode =
 236                                                 src_buf->b->timecode;
 237                         dst_buf->b->timestamp =
 238                                                 src_buf->b->timestamp;
 239                         dst_buf->b->flags &=
 240                                 ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 241                         dst_buf->b->flags |=
 242                                 src_buf->b->flags
 243                                 & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 244                         switch (frame_type) {
 245                         case S5P_FIMV_DECODE_FRAME_I_FRAME:
 246                                 dst_buf->b->flags |=
 247                                                 V4L2_BUF_FLAG_KEYFRAME;
 248                                 break;
 249                         case S5P_FIMV_DECODE_FRAME_P_FRAME:
 250                                 dst_buf->b->flags |=
 251                                                 V4L2_BUF_FLAG_PFRAME;
 252                                 break;
 253                         case S5P_FIMV_DECODE_FRAME_B_FRAME:
 254                                 dst_buf->b->flags |=
 255                                                 V4L2_BUF_FLAG_BFRAME;
 256                                 break;
 257                         default:
 258                                 /* Don't know how to handle
 259                                    S5P_FIMV_DECODE_FRAME_OTHER_FRAME. */
 260                                 mfc_debug(2, "Unexpected frame type: %d\n",
 261                                                 frame_type);
 262                         }
 263                         break;
 264                 }
 265         }
 266 }
 267
 268 static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err)
 269 {
 270         struct s5p_mfc_dev *dev = ctx->dev;
 271         struct s5p_mfc_buf  *dst_buf;
 272         size_t dspl_y_addr;
 273         unsigned int frame_type;
 274
 275         dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev);
 276         if (IS_MFCV6_PLUS(dev))
 277                 frame_type = s5p_mfc_hw_call(dev->mfc_ops,
 278                         get_disp_frame_type, ctx);
 279         else
 280                 frame_type = s5p_mfc_hw_call(dev->mfc_ops,
 281                         get_dec_frame_type, dev);
 282
 283         /* If frame is same as previous then skip and do not dequeue */
 284         if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) {
 285                 if (!ctx->after_packed_pb)
 286                         ctx->sequence++;
 287                 ctx->after_packed_pb = 0;
 288                 return;
 289         }
 290         ctx->sequence++;
 291         /* The MFC returns address of the buffer, now we have to
 292          * check which videobuf does it correspond to */
 293         list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
 294                 /* Check if this is the buffer we're looking for */
 295                 if (vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0)
 296                                 == dspl_y_addr) {
 297                         list_del(&dst_buf->list);
 298                         ctx->dst_queue_cnt--;
 299                         dst_buf->b->sequence = ctx->sequence;
 300                         if (s5p_mfc_hw_call(dev->mfc_ops,
 301                                         get_pic_type_top, ctx) ==
 302                                 s5p_mfc_hw_call(dev->mfc_ops,
 303                                         get_pic_type_bot, ctx))
 304                                 dst_buf->b->field = V4L2_FIELD_NONE;
 305                         else
 306                                 dst_buf->b->field =
 307                                                         V4L2_FIELD_INTERLACED;
 308                         vb2_set_plane_payload(&dst_buf->b->vb2_buf, 0,
 309                                                 ctx->luma_size);
 310                         vb2_set_plane_payload(&dst_buf->b->vb2_buf, 1,
 311                                                 ctx->chroma_size);
 312                         clear_bit(dst_buf->b->vb2_buf.index,
 313                                                         &ctx->dec_dst_flag);
 314
 315                         vb2_buffer_done(&dst_buf->b->vb2_buf, err ?
 316                                 VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
 317
 318                         break;
 319                 }
 320         }
 321 }
 322
 323 /* Handle frame decoding interrupt */
 324 static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx,
 325                                         unsigned int reason, unsigned int err)
 326 {
 327         struct s5p_mfc_dev *dev = ctx->dev;
 328         unsigned int dst_frame_status;
 329         unsigned int dec_frame_status;
 330         struct s5p_mfc_buf *src_buf;
 331         unsigned long flags;
 332         unsigned int res_change;
 333
 334         dst_frame_status = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_status, dev)
 335                                 & S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK;
 336         dec_frame_status = s5p_mfc_hw_call(dev->mfc_ops, get_dec_status, dev)
 337                                 & S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK;
 338         res_change = (s5p_mfc_hw_call(dev->mfc_ops, get_dspl_status, dev)
 339                                 & S5P_FIMV_DEC_STATUS_RESOLUTION_MASK)
 340                                 >> S5P_FIMV_DEC_STATUS_RESOLUTION_SHIFT;
 341         mfc_debug(2, "Frame Status: %x\n", dst_frame_status);
 342         if (ctx->state == MFCINST_RES_CHANGE_INIT)
 343                 ctx->state = MFCINST_RES_CHANGE_FLUSH;
 344         if (res_change == S5P_FIMV_RES_INCREASE ||
 345                 res_change == S5P_FIMV_RES_DECREASE) {
 346                 ctx->state = MFCINST_RES_CHANGE_INIT;
 347                 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 348                 wake_up_ctx(ctx, reason, err);
 349                 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 350                 s5p_mfc_clock_off();
 351                 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 352                 return;
 353         }
 354         if (ctx->dpb_flush_flag)
 355                 ctx->dpb_flush_flag = 0;
 356
 357         spin_lock_irqsave(&dev->irqlock, flags);
 358         /* All frames remaining in the buffer have been extracted  */
 359         if (dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_EMPTY) {
 360                 if (ctx->state == MFCINST_RES_CHANGE_FLUSH) {
 361                         static const struct v4l2_event ev_src_ch = {
 362                                 .type = V4L2_EVENT_SOURCE_CHANGE,
 363                                 .u.src_change.changes =
 364                                         V4L2_EVENT_SRC_CH_RESOLUTION,
 365                         };
 366
 367                         s5p_mfc_handle_frame_all_extracted(ctx);
 368                         ctx->state = MFCINST_RES_CHANGE_END;
 369                         v4l2_event_queue_fh(&ctx->fh, &ev_src_ch);
 370
 371                         goto leave_handle_frame;
 372                 } else {
 373                         s5p_mfc_handle_frame_all_extracted(ctx);
 374                 }
 375         }
 376
 377         if (dec_frame_status == S5P_FIMV_DEC_STATUS_DECODING_DISPLAY)
 378                 s5p_mfc_handle_frame_copy_time(ctx);
 379
 380         /* A frame has been decoded and is in the buffer  */
 381         if (dst_frame_status == S5P_FIMV_DEC_STATUS_DISPLAY_ONLY ||
 382             dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_DISPLAY) {
 383                 s5p_mfc_handle_frame_new(ctx, err);
 384         } else {
 385                 mfc_debug(2, "No frame decode\n");
 386         }
 387         /* Mark source buffer as complete */
 388         if (dst_frame_status != S5P_FIMV_DEC_STATUS_DISPLAY_ONLY
 389                 && !list_empty(&ctx->src_queue)) {
 390                 src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
 391                                                                 list);
 392                 ctx->consumed_stream += s5p_mfc_hw_call(dev->mfc_ops,
 393                                                 get_consumed_stream, dev);
 394                 if (ctx->codec_mode != S5P_MFC_CODEC_H264_DEC &&
 395                         ctx->codec_mode != S5P_MFC_CODEC_VP8_DEC &&
 396                         ctx->consumed_stream + STUFF_BYTE <
 397                         src_buf->b->vb2_buf.planes[0].bytesused) {
 398                         /* Run MFC again on the same buffer */
 399                         mfc_debug(2, "Running again the same buffer\n");
 400                         ctx->after_packed_pb = 1;
 401                 } else {
 402                         mfc_debug(2, "MFC needs next buffer\n");
 403                         ctx->consumed_stream = 0;
 404                         if (src_buf->flags & MFC_BUF_FLAG_EOS)
 405                                 ctx->state = MFCINST_FINISHING;
 406                         list_del(&src_buf->list);
 407                         ctx->src_queue_cnt--;
 408                         if (s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) > 0)
 409                                 vb2_buffer_done(&src_buf->b->vb2_buf,
 410                                                 VB2_BUF_STATE_ERROR);
 411                         else
 412                                 vb2_buffer_done(&src_buf->b->vb2_buf,
 413                                                 VB2_BUF_STATE_DONE);
 414                 }
 415         }
 416 leave_handle_frame:
 417         spin_unlock_irqrestore(&dev->irqlock, flags);
 418         if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING)
 419                                     || ctx->dst_queue_cnt < ctx->pb_count)
 420                 clear_work_bit(ctx);
 421         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 422         wake_up_ctx(ctx, reason, err);
 423         WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 424         s5p_mfc_clock_off();
 425         /* if suspending, wake up device and do not try_run again*/
 426         if (test_bit(0, &dev->enter_suspend))
 427                 wake_up_dev(dev, reason, err);
 428         else
 429                 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 430 }
 431
 432 /* Error handling for interrupt */
 433 static void s5p_mfc_handle_error(struct s5p_mfc_dev *dev,
 434                 struct s5p_mfc_ctx *ctx, unsigned int reason, unsigned int err)
 435 {
 436         unsigned long flags;
 437
 438         mfc_err("Interrupt Error: %08x\n", err);
 439
 440         if (ctx != NULL) {
 441                 /* Error recovery is dependent on the state of context */
 442                 switch (ctx->state) {
 443                 case MFCINST_RES_CHANGE_INIT:
 444                 case MFCINST_RES_CHANGE_FLUSH:
 445                 case MFCINST_RES_CHANGE_END:
 446                 case MFCINST_FINISHING:
 447                 case MFCINST_FINISHED:
 448                 case MFCINST_RUNNING:
 449                         /* It is highly probable that an error occurred
 450                          * while decoding a frame */
 451                         clear_work_bit(ctx);
 452                         ctx->state = MFCINST_ERROR;
 453                         /* Mark all dst buffers as having an error */
 454                         spin_lock_irqsave(&dev->irqlock, flags);
 455                         s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
 456                                                 &ctx->dst_queue, &ctx->vq_dst);
 457                         /* Mark all src buffers as having an error */
 458                         s5p_mfc_hw_call_void(dev->mfc_ops, cleanup_queue,
 459                                                 &ctx->src_queue, &ctx->vq_src);
 460                         spin_unlock_irqrestore(&dev->irqlock, flags);
 461                         wake_up_ctx(ctx, reason, err);
 462                         break;
 463                 default:
 464                         clear_work_bit(ctx);
 465                         ctx->state = MFCINST_ERROR;
 466                         wake_up_ctx(ctx, reason, err);
 467                         break;
 468                 }
 469         }
 470         WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 471         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 472         s5p_mfc_clock_off();
 473         wake_up_dev(dev, reason, err);
 474         return;
 475 }
 476
 477 /* Header parsing interrupt handling */
 478 static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx,
 479                                  unsigned int reason, unsigned int err)
 480 {
 481         struct s5p_mfc_dev *dev;
 482
 483         if (ctx == NULL)
 484                 return;
 485         dev = ctx->dev;
 486         if (ctx->c_ops->post_seq_start) {
 487                 if (ctx->c_ops->post_seq_start(ctx))
 488                         mfc_err("post_seq_start() failed\n");
 489         } else {
 490                 ctx->img_width = s5p_mfc_hw_call(dev->mfc_ops, get_img_width,
 491                                 dev);
 492                 ctx->img_height = s5p_mfc_hw_call(dev->mfc_ops, get_img_height,
 493                                 dev);
 494
 495                 s5p_mfc_hw_call_void(dev->mfc_ops, dec_calc_dpb_size, ctx);
 496
 497                 ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_dpb_count,
 498                                 dev);
 499                 ctx->mv_count = s5p_mfc_hw_call(dev->mfc_ops, get_mv_count,
 500                                 dev);
 501                 if (ctx->img_width == 0 || ctx->img_height == 0)
 502                         ctx->state = MFCINST_ERROR;
 503                 else
 504                         ctx->state = MFCINST_HEAD_PARSED;
 505
 506                 if ((ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
 507                         ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) &&
 508                                 !list_empty(&ctx->src_queue)) {
 509                         struct s5p_mfc_buf *src_buf;
 510                         src_buf = list_entry(ctx->src_queue.next,
 511                                         struct s5p_mfc_buf, list);
 512                         if (s5p_mfc_hw_call(dev->mfc_ops, get_consumed_stream,
 513                                                 dev) <
 514                                         src_buf->b->vb2_buf.planes[0].bytesused)
 515                                 ctx->head_processed = 0;
 516                         else
 517                                 ctx->head_processed = 1;
 518                 } else {
 519                         ctx->head_processed = 1;
 520                 }
 521         }
 522         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 523         clear_work_bit(ctx);
 524         WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 525         s5p_mfc_clock_off();
 526         s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 527         wake_up_ctx(ctx, reason, err);
 528 }
 529
 530 /* Header parsing interrupt handling */
 531 static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx,
 532                                  unsigned int reason, unsigned int err)
 533 {
 534         struct s5p_mfc_buf *src_buf;
 535         struct s5p_mfc_dev *dev;
 536         unsigned long flags;
 537
 538         if (ctx == NULL)
 539                 return;
 540         dev = ctx->dev;
 541         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 542         ctx->int_type = reason;
 543         ctx->int_err = err;
 544         ctx->int_cond = 1;
 545         clear_work_bit(ctx);
 546         if (err == 0) {
 547                 ctx->state = MFCINST_RUNNING;
 548                 if (!ctx->dpb_flush_flag && ctx->head_processed) {
 549                         spin_lock_irqsave(&dev->irqlock, flags);
 550                         if (!list_empty(&ctx->src_queue)) {
 551                                 src_buf = list_entry(ctx->src_queue.next,
 552                                              struct s5p_mfc_buf, list);
 553                                 list_del(&src_buf->list);
 554                                 ctx->src_queue_cnt--;
 555                                 vb2_buffer_done(&src_buf->b->vb2_buf,
 556                                                 VB2_BUF_STATE_DONE);
 557                         }
 558                         spin_unlock_irqrestore(&dev->irqlock, flags);
 559                 } else {
 560                         ctx->dpb_flush_flag = 0;
 561                 }
 562                 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 563
 564                 s5p_mfc_clock_off();
 565
 566                 wake_up(&ctx->queue);
 567                 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 568         } else {
 569                 WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 570
 571                 s5p_mfc_clock_off();
 572
 573                 wake_up(&ctx->queue);
 574         }
 575 }
 576
 577 static void s5p_mfc_handle_stream_complete(struct s5p_mfc_ctx *ctx)
 578 {
 579         struct s5p_mfc_dev *dev = ctx->dev;
 580         struct s5p_mfc_buf *mb_entry;
 581
 582         mfc_debug(2, "Stream completed\n");
 583
 584         ctx->state = MFCINST_FINISHED;
 585
 586         spin_lock(&dev->irqlock);
 587         if (!list_empty(&ctx->dst_queue)) {
 588                 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf,
 589                                                                         list);
 590                 list_del(&mb_entry->list);
 591                 ctx->dst_queue_cnt--;
 592                 vb2_set_plane_payload(&mb_entry->b->vb2_buf, 0, 0);
 593                 vb2_buffer_done(&mb_entry->b->vb2_buf, VB2_BUF_STATE_DONE);
 594         }
 595         spin_unlock(&dev->irqlock);
 596
 597         clear_work_bit(ctx);
 598
 599         WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 600
 601         s5p_mfc_clock_off();
 602         wake_up(&ctx->queue);
 603         s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 604 }
 605
 606 /* Interrupt processing */
 607 static irqreturn_t s5p_mfc_irq(int irq, void *priv)
 608 {
 609         struct s5p_mfc_dev *dev = priv;
 610         struct s5p_mfc_ctx *ctx;
 611         unsigned int reason;
 612         unsigned int err;
 613
 614         mfc_debug_enter();
 615         /* Reset the timeout watchdog */
 616         atomic_set(&dev->watchdog_cnt, 0);
 617         ctx = dev->ctx[dev->curr_ctx];
 618         /* Get the reason of interrupt and the error code */
 619         reason = s5p_mfc_hw_call(dev->mfc_ops, get_int_reason, dev);
 620         err = s5p_mfc_hw_call(dev->mfc_ops, get_int_err, dev);
 621         mfc_debug(1, "Int reason: %d (err: %08x)\n", reason, err);
 622         switch (reason) {
 623         case S5P_MFC_R2H_CMD_ERR_RET:
 624                 /* An error has occurred */
 625                 if (ctx->state == MFCINST_RUNNING &&
 626                         s5p_mfc_hw_call(dev->mfc_ops, err_dec, err) >=
 627                                 dev->warn_start)
 628                         s5p_mfc_handle_frame(ctx, reason, err);
 629                 else
 630                         s5p_mfc_handle_error(dev, ctx, reason, err);
 631                 clear_bit(0, &dev->enter_suspend);
 632                 break;
 633
 634         case S5P_MFC_R2H_CMD_SLICE_DONE_RET:
 635         case S5P_MFC_R2H_CMD_FIELD_DONE_RET:
 636         case S5P_MFC_R2H_CMD_FRAME_DONE_RET:
 637                 if (ctx->c_ops->post_frame_start) {
 638                         if (ctx->c_ops->post_frame_start(ctx))
 639                                 mfc_err("post_frame_start() failed\n");
 640
 641                         if (ctx->state == MFCINST_FINISHING &&
 642                                                 list_empty(&ctx->ref_queue)) {
 643                                 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 644                                 s5p_mfc_handle_stream_complete(ctx);
 645                                 break;
 646                         }
 647                         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 648                         wake_up_ctx(ctx, reason, err);
 649                         WARN_ON(test_and_clear_bit(0, &dev->hw_lock) == 0);
 650                         s5p_mfc_clock_off();
 651                         s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 652                 } else {
 653                         s5p_mfc_handle_frame(ctx, reason, err);
 654                 }
 655                 break;
 656
 657         case S5P_MFC_R2H_CMD_SEQ_DONE_RET:
 658                 s5p_mfc_handle_seq_done(ctx, reason, err);
 659                 break;
 660
 661         case S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET:
 662                 ctx->inst_no = s5p_mfc_hw_call(dev->mfc_ops, get_inst_no, dev);
 663                 ctx->state = MFCINST_GOT_INST;
 664                 clear_work_bit(ctx);
 665                 wake_up(&ctx->queue);
 666                 goto irq_cleanup_hw;
 667
 668         case S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET:
 669                 clear_work_bit(ctx);
 670                 ctx->inst_no = MFC_NO_INSTANCE_SET;
 671                 ctx->state = MFCINST_FREE;
 672                 wake_up(&ctx->queue);
 673                 goto irq_cleanup_hw;
 674
 675         case S5P_MFC_R2H_CMD_SYS_INIT_RET:
 676         case S5P_MFC_R2H_CMD_FW_STATUS_RET:
 677         case S5P_MFC_R2H_CMD_SLEEP_RET:
 678         case S5P_MFC_R2H_CMD_WAKEUP_RET:
 679                 if (ctx)
 680                         clear_work_bit(ctx);
 681                 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 682                 wake_up_dev(dev, reason, err);
 683                 clear_bit(0, &dev->hw_lock);
 684                 clear_bit(0, &dev->enter_suspend);
 685                 break;
 686
 687         case S5P_MFC_R2H_CMD_INIT_BUFFERS_RET:
 688                 s5p_mfc_handle_init_buffers(ctx, reason, err);
 689                 break;
 690
 691         case S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET:
 692                 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 693                 ctx->int_type = reason;
 694                 ctx->int_err = err;
 695                 s5p_mfc_handle_stream_complete(ctx);
 696                 break;
 697
 698         case S5P_MFC_R2H_CMD_DPB_FLUSH_RET:
 699                 clear_work_bit(ctx);
 700                 ctx->state = MFCINST_RUNNING;
 701                 wake_up(&ctx->queue);
 702                 goto irq_cleanup_hw;
 703
 704         default:
 705                 mfc_debug(2, "Unknown int reason\n");
 706                 s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 707         }
 708         mfc_debug_leave();
 709         return IRQ_HANDLED;
 710 irq_cleanup_hw:
 711         s5p_mfc_hw_call_void(dev->mfc_ops, clear_int_flags, dev);
 712         ctx->int_type = reason;
 713         ctx->int_err = err;
 714         ctx->int_cond = 1;
 715         if (test_and_clear_bit(0, &dev->hw_lock) == 0)
 716                 mfc_err("Failed to unlock hw\n");
 717
 718         s5p_mfc_clock_off();
 719
 720         s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev);
 721         mfc_debug(2, "Exit via irq_cleanup_hw\n");
 722         return IRQ_HANDLED;
 723 }
 724
 725 /* Open an MFC node */
 726 static int s5p_mfc_open(struct file *file)
 727 {
 728         struct video_device *vdev = video_devdata(file);
 729         struct s5p_mfc_dev *dev = video_drvdata(file);
 730         struct s5p_mfc_ctx *ctx = NULL;
 731         struct vb2_queue *q;
 732         int ret = 0;
 733
 734         mfc_debug_enter();
 735         if (mutex_lock_interruptible(&dev->mfc_mutex))
 736                 return -ERESTARTSYS;
 737         dev->num_inst++;        /* It is guarded by mfc_mutex in vfd */
 738         /* Allocate memory for context */
 739         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 740         if (!ctx) {
 741                 mfc_err("Not enough memory\n");
 742                 ret = -ENOMEM;
 743                 goto err_alloc;
 744         }
 745         v4l2_fh_init(&ctx->fh, vdev);
 746         file->private_data = &ctx->fh;
 747         v4l2_fh_add(&ctx->fh);
 748         ctx->dev = dev;
 749         INIT_LIST_HEAD(&ctx->src_queue);
 750         INIT_LIST_HEAD(&ctx->dst_queue);
 751         ctx->src_queue_cnt = 0;
 752         ctx->dst_queue_cnt = 0;
 753         /* Get context number */
 754         ctx->num = 0;
 755         while (dev->ctx[ctx->num]) {
 756                 ctx->num++;
 757                 if (ctx->num >= MFC_NUM_CONTEXTS) {
 758                         mfc_err("Too many open contexts\n");
 759                         ret = -EBUSY;
 760                         goto err_no_ctx;
 761                 }
 762         }
 763         /* Mark context as idle */
 764         clear_work_bit_irqsave(ctx);
 765         dev->ctx[ctx->num] = ctx;
 766         if (vdev == dev->vfd_dec) {
 767                 ctx->type = MFCINST_DECODER;
 768                 ctx->c_ops = get_dec_codec_ops();
 769                 s5p_mfc_dec_init(ctx);
 770                 /* Setup ctrl handler */
 771                 ret = s5p_mfc_dec_ctrls_setup(ctx);
 772                 if (ret) {
 773                         mfc_err("Failed to setup mfc controls\n");
 774                         goto err_ctrls_setup;
 775                 }
 776         } else if (vdev == dev->vfd_enc) {
 777                 ctx->type = MFCINST_ENCODER;
 778                 ctx->c_ops = get_enc_codec_ops();
 779                 /* only for encoder */
 780                 INIT_LIST_HEAD(&ctx->ref_queue);
 781                 ctx->ref_queue_cnt = 0;
 782                 s5p_mfc_enc_init(ctx);
 783                 /* Setup ctrl handler */
 784                 ret = s5p_mfc_enc_ctrls_setup(ctx);
 785                 if (ret) {
 786                         mfc_err("Failed to setup mfc controls\n");
 787                         goto err_ctrls_setup;
 788                 }
 789         } else {
 790                 ret = -ENOENT;
 791                 goto err_bad_node;
 792         }
 793         ctx->fh.ctrl_handler = &ctx->ctrl_handler;
 794         ctx->inst_no = MFC_NO_INSTANCE_SET;
 795         /* Load firmware if this is the first instance */
 796         if (dev->num_inst == 1) {
 797                 dev->watchdog_timer.expires = jiffies +
 798                                         msecs_to_jiffies(MFC_WATCHDOG_INTERVAL);
 799                 add_timer(&dev->watchdog_timer);
 800                 ret = s5p_mfc_power_on();
 801                 if (ret < 0) {
 802                         mfc_err("power on failed\n");
 803                         goto err_pwr_enable;
 804                 }
 805                 s5p_mfc_clock_on();
 806                 ret = s5p_mfc_load_firmware(dev);
 807                 if (ret) {
 808                         s5p_mfc_clock_off();
 809                         goto err_load_fw;
 810                 }
 811                 /* Init the FW */
 812                 ret = s5p_mfc_init_hw(dev);
 813                 s5p_mfc_clock_off();
 814                 if (ret)
 815                         goto err_init_hw;
 816         }
 817         /* Init videobuf2 queue for CAPTURE */
 818         q = &ctx->vq_dst;
 819         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
 820         q->drv_priv = &ctx->fh;
 821         q->lock = &dev->mfc_mutex;
 822         if (vdev == dev->vfd_dec) {
 823                 q->io_modes = VB2_MMAP;
 824                 q->ops = get_dec_queue_ops();
 825         } else if (vdev == dev->vfd_enc) {
 826                 q->io_modes = VB2_MMAP | VB2_USERPTR;
 827                 q->ops = get_enc_queue_ops();
 828         } else {
 829                 ret = -ENOENT;
 830                 goto err_queue_init;
 831         }
 832         q->mem_ops = &vb2_dma_contig_memops;
 833         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 834         ret = vb2_queue_init(q);
 835         if (ret) {
 836                 mfc_err("Failed to initialize videobuf2 queue(capture)\n");
 837                 goto err_queue_init;
 838         }
 839         /* Init videobuf2 queue for OUTPUT */
 840         q = &ctx->vq_src;
 841         q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
 842         q->io_modes = VB2_MMAP;
 843         q->drv_priv = &ctx->fh;
 844         q->lock = &dev->mfc_mutex;
 845         if (vdev == dev->vfd_dec) {
 846                 q->io_modes = VB2_MMAP;
 847                 q->ops = get_dec_queue_ops();
 848         } else if (vdev == dev->vfd_enc) {
 849                 q->io_modes = VB2_MMAP | VB2_USERPTR;
 850                 q->ops = get_enc_queue_ops();
 851         } else {
 852                 ret = -ENOENT;
 853                 goto err_queue_init;
 854         }
 855         /* One way to indicate end-of-stream for MFC is to set the
 856          * bytesused == 0. However by default videobuf2 handles bytesused
 857          * equal to 0 as a special case and changes its value to the size
 858          * of the buffer. Set the allow_zero_bytesused flag so that videobuf2
 859          * will keep the value of bytesused intact.
 860          */
 861         q->allow_zero_bytesused = 1;
 862         q->mem_ops = &vb2_dma_contig_memops;
 863         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 864         ret = vb2_queue_init(q);
 865         if (ret) {
 866                 mfc_err("Failed to initialize videobuf2 queue(output)\n");
 867                 goto err_queue_init;
 868         }
 869         init_waitqueue_head(&ctx->queue);
 870         mutex_unlock(&dev->mfc_mutex);
 871         mfc_debug_leave();
 872         return ret;
 873         /* Deinit when failure occurred */
 874 err_queue_init:
 875         if (dev->num_inst == 1)
 876                 s5p_mfc_deinit_hw(dev);
 877 err_init_hw:
 878 err_load_fw:
 879 err_pwr_enable:
 880         if (dev->num_inst == 1) {
 881                 if (s5p_mfc_power_off() < 0)
 882                         mfc_err("power off failed\n");
 883                 del_timer_sync(&dev->watchdog_timer);
 884         }
 885 err_ctrls_setup:
 886         s5p_mfc_dec_ctrls_delete(ctx);
 887 err_bad_node:
 888         dev->ctx[ctx->num] = NULL;
 889 err_no_ctx:
 890         v4l2_fh_del(&ctx->fh);
 891         v4l2_fh_exit(&ctx->fh);
 892         kfree(ctx);
 893 err_alloc:
 894         dev->num_inst--;
 895         mutex_unlock(&dev->mfc_mutex);
 896         mfc_debug_leave();
 897         return ret;
 898 }
 899
 900 /* Release MFC context */
 901 static int s5p_mfc_release(struct file *file)
 902 {
 903         struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data);
 904         struct s5p_mfc_dev *dev = ctx->dev;
 905
 906         mfc_debug_enter();
 907         mutex_lock(&dev->mfc_mutex);
 908         s5p_mfc_clock_on();
 909         vb2_queue_release(&ctx->vq_src);
 910         vb2_queue_release(&ctx->vq_dst);
 911         /* Mark context as idle */
 912         clear_work_bit_irqsave(ctx);
 913         /* If instance was initialised and not yet freed,
 914          * return instance and free resources */
 915         if (ctx->state != MFCINST_FREE && ctx->state != MFCINST_INIT) {
 916                 mfc_debug(2, "Has to free instance\n");
 917                 s5p_mfc_close_mfc_inst(dev, ctx);
 918         }
 919         /* hardware locking scheme */
 920         if (dev->curr_ctx == ctx->num)
 921                 clear_bit(0, &dev->hw_lock);
 922         dev->num_inst--;
 923         if (dev->num_inst == 0) {
 924                 mfc_debug(2, "Last instance\n");
 925                 s5p_mfc_deinit_hw(dev);
 926                 del_timer_sync(&dev->watchdog_timer);
 927                 if (s5p_mfc_power_off() < 0)
 928                         mfc_err("Power off failed\n");
 929         }
 930         mfc_debug(2, "Shutting down clock\n");
 931         s5p_mfc_clock_off();
 932         dev->ctx[ctx->num] = NULL;
 933         s5p_mfc_dec_ctrls_delete(ctx);
 934         v4l2_fh_del(&ctx->fh);
 935         v4l2_fh_exit(&ctx->fh);
 936         kfree(ctx);
 937         mfc_debug_leave();
 938         mutex_unlock(&dev->mfc_mutex);
 939         return 0;
 940 }
 941
 942 /* Poll */
 943 static unsigned int s5p_mfc_poll(struct file *file,
 944                                  struct poll_table_struct *wait)
 945 {
 946         struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data);
 947         struct s5p_mfc_dev *dev = ctx->dev;
 948         struct vb2_queue *src_q, *dst_q;
 949         struct vb2_buffer *src_vb = NULL, *dst_vb = NULL;
 950         unsigned int rc = 0;
 951         unsigned long flags;
 952
 953         mutex_lock(&dev->mfc_mutex);
 954         src_q = &ctx->vq_src;
 955         dst_q = &ctx->vq_dst;
 956         /*
 957          * There has to be at least one buffer queued on each queued_list, which
 958          * means either in driver already or waiting for driver to claim it
 959          * and start processing.
 960          */
 961         if ((!src_q->streaming || list_empty(&src_q->queued_list))
 962                 && (!dst_q->streaming || list_empty(&dst_q->queued_list))) {
 963                 rc = POLLERR;
 964                 goto end;
 965         }
 966         mutex_unlock(&dev->mfc_mutex);
 967         poll_wait(file, &ctx->fh.wait, wait);
 968         poll_wait(file, &src_q->done_wq, wait);
 969         poll_wait(file, &dst_q->done_wq, wait);
 970         mutex_lock(&dev->mfc_mutex);
 971         if (v4l2_event_pending(&ctx->fh))
 972                 rc |= POLLPRI;
 973         spin_lock_irqsave(&src_q->done_lock, flags);
 974         if (!list_empty(&src_q->done_list))
 975                 src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer,
 976                                                                 done_entry);
 977         if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE
 978                                 || src_vb->state == VB2_BUF_STATE_ERROR))
 979                 rc |= POLLOUT | POLLWRNORM;
 980         spin_unlock_irqrestore(&src_q->done_lock, flags);
 981         spin_lock_irqsave(&dst_q->done_lock, flags);
 982         if (!list_empty(&dst_q->done_list))
 983                 dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer,
 984                                                                 done_entry);
 985         if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE
 986                                 || dst_vb->state == VB2_BUF_STATE_ERROR))
 987                 rc |= POLLIN | POLLRDNORM;
 988         spin_unlock_irqrestore(&dst_q->done_lock, flags);
 989 end:
 990         mutex_unlock(&dev->mfc_mutex);
 991         return rc;
 992 }
 993
 994 /* Mmap */
 995 static int s5p_mfc_mmap(struct file *file, struct vm_area_struct *vma)
 996 {
 997         struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data);
 998         struct s5p_mfc_dev *dev = ctx->dev;
 999         unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1000         int ret;
1001
1002         if (mutex_lock_interruptible(&dev->mfc_mutex))
1003                 return -ERESTARTSYS;
1004         if (offset < DST_QUEUE_OFF_BASE) {
1005                 mfc_debug(2, "mmaping source\n");
1006                 ret = vb2_mmap(&ctx->vq_src, vma);
1007         } else {                /* capture */
1008                 mfc_debug(2, "mmaping destination\n");
1009                 vma->vm_pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT);
1010                 ret = vb2_mmap(&ctx->vq_dst, vma);
1011         }
1012         mutex_unlock(&dev->mfc_mutex);
1013         return ret;
1014 }
1015
1016 /* v4l2 ops */
1017 static const struct v4l2_file_operations s5p_mfc_fops = {
1018         .owner = THIS_MODULE,
1019         .open = s5p_mfc_open,
1020         .release = s5p_mfc_release,
1021         .poll = s5p_mfc_poll,
1022         .unlocked_ioctl = video_ioctl2,
1023         .mmap = s5p_mfc_mmap,
1024 };
1025
1026 static int match_child(struct device *dev, void *data)
1027 {
1028         if (!dev_name(dev))
1029                 return 0;
1030         return !strcmp(dev_name(dev), (char *)data);
1031 }
1032
1033 static void s5p_mfc_memdev_release(struct device *dev)
1034 {
1035         dma_release_declared_memory(dev);
1036 }
1037
1038 static void *mfc_get_drv_data(struct platform_device *pdev);
1039
1040 static int s5p_mfc_alloc_memdevs(struct s5p_mfc_dev *dev)
1041 {
1042         unsigned int mem_info[2] = { };
1043
1044         dev->mem_dev_l = devm_kzalloc(&dev->plat_dev->dev,
1045                         sizeof(struct device), GFP_KERNEL);
1046         if (!dev->mem_dev_l) {
1047                 mfc_err("Not enough memory\n");
1048                 return -ENOMEM;
1049         }
1050
1051         dev_set_name(dev->mem_dev_l, "%s", "s5p-mfc-l");
1052         dev->mem_dev_l->release = s5p_mfc_memdev_release;
1053         device_initialize(dev->mem_dev_l);
1054         of_property_read_u32_array(dev->plat_dev->dev.of_node,
1055                         "samsung,mfc-l", mem_info, 2);
1056         if (dma_declare_coherent_memory(dev->mem_dev_l, mem_info[0],
1057                                 mem_info[0], mem_info[1],
1058                                 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) {
1059                 mfc_err("Failed to declare coherent memory for\n"
1060                 "MFC device\n");
1061                 return -ENOMEM;
1062         }
1063
1064         dev->mem_dev_r = devm_kzalloc(&dev->plat_dev->dev,
1065                         sizeof(struct device), GFP_KERNEL);
1066         if (!dev->mem_dev_r) {
1067                 mfc_err("Not enough memory\n");
1068                 return -ENOMEM;
1069         }
1070
1071         dev_set_name(dev->mem_dev_r, "%s", "s5p-mfc-r");
1072         dev->mem_dev_r->release = s5p_mfc_memdev_release;
1073         device_initialize(dev->mem_dev_r);
1074         of_property_read_u32_array(dev->plat_dev->dev.of_node,
1075                         "samsung,mfc-r", mem_info, 2);
1076         if (dma_declare_coherent_memory(dev->mem_dev_r, mem_info[0],
1077                                 mem_info[0], mem_info[1],
1078                                 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0) {
1079                 pr_err("Failed to declare coherent memory for\n"
1080                 "MFC device\n");
1081                 return -ENOMEM;
1082         }
1083         return 0;
1084 }
1085
1086 /* MFC probe function */
1087 static int s5p_mfc_probe(struct platform_device *pdev)
1088 {
1089         struct s5p_mfc_dev *dev;
1090         struct video_device *vfd;
1091         struct resource *res;
1092         int ret;
1093
1094         pr_debug("%s++\n", __func__);
1095         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
1096         if (!dev) {
1097                 dev_err(&pdev->dev, "Not enough memory for MFC device\n");
1098                 return -ENOMEM;
1099         }
1100
1101         spin_lock_init(&dev->irqlock);
1102         spin_lock_init(&dev->condlock);
1103         dev->plat_dev = pdev;
1104         if (!dev->plat_dev) {
1105                 mfc_err("No platform data specified\n");
1106                 return -ENODEV;
1107         }
1108
1109         dev->variant = mfc_get_drv_data(pdev);
1110
1111         ret = s5p_mfc_init_pm(dev);
1112         if (ret < 0) {
1113                 dev_err(&pdev->dev, "failed to get mfc clock source\n");
1114                 return ret;
1115         }
1116
1117         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1118
1119         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
1120         if (IS_ERR(dev->regs_base))
1121                 return PTR_ERR(dev->regs_base);
1122
1123         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1124         if (res == NULL) {
1125                 dev_err(&pdev->dev, "failed to get irq resource\n");
1126                 ret = -ENOENT;
1127                 goto err_res;
1128         }
1129         dev->irq = res->start;
1130         ret = devm_request_irq(&pdev->dev, dev->irq, s5p_mfc_irq,
1131                                         0, pdev->name, dev);
1132         if (ret) {
1133                 dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
1134                 goto err_res;
1135         }
1136
1137         if (pdev->dev.of_node) {
1138                 ret = s5p_mfc_alloc_memdevs(dev);
1139                 if (ret < 0)
1140                         goto err_res;
1141         } else {
1142                 dev->mem_dev_l = device_find_child(&dev->plat_dev->dev,
1143                                 "s5p-mfc-l", match_child);
1144                 if (!dev->mem_dev_l) {
1145                         mfc_err("Mem child (L) device get failed\n");
1146                         ret = -ENODEV;
1147                         goto err_res;
1148                 }
1149                 dev->mem_dev_r = device_find_child(&dev->plat_dev->dev,
1150                                 "s5p-mfc-r", match_child);
1151                 if (!dev->mem_dev_r) {
1152                         mfc_err("Mem child (R) device get failed\n");
1153                         ret = -ENODEV;
1154                         goto err_res;
1155                 }
1156         }
1157
1158         dev->alloc_ctx[0] = vb2_dma_contig_init_ctx(dev->mem_dev_l);
1159         if (IS_ERR(dev->alloc_ctx[0])) {
1160                 ret = PTR_ERR(dev->alloc_ctx[0]);
1161                 goto err_res;
1162         }
1163         dev->alloc_ctx[1] = vb2_dma_contig_init_ctx(dev->mem_dev_r);
1164         if (IS_ERR(dev->alloc_ctx[1])) {
1165                 ret = PTR_ERR(dev->alloc_ctx[1]);
1166                 goto err_mem_init_ctx_1;
1167         }
1168
1169         mutex_init(&dev->mfc_mutex);
1170
1171         ret = s5p_mfc_alloc_firmware(dev);
1172         if (ret)
1173                 goto err_alloc_fw;
1174
1175         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1176         if (ret)
1177                 goto err_v4l2_dev_reg;
1178         init_waitqueue_head(&dev->queue);
1179
1180         /* decoder */
1181         vfd = video_device_alloc();
1182         if (!vfd) {
1183                 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n");
1184                 ret = -ENOMEM;
1185                 goto err_dec_alloc;
1186         }
1187         vfd->fops       = &s5p_mfc_fops;
1188         vfd->ioctl_ops  = get_dec_v4l2_ioctl_ops();
1189         vfd->release    = video_device_release;
1190         vfd->lock       = &dev->mfc_mutex;
1191         vfd->v4l2_dev   = &dev->v4l2_dev;
1192         vfd->vfl_dir    = VFL_DIR_M2M;
1193         snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_DEC_NAME);
1194         dev->vfd_dec    = vfd;
1195         ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
1196         if (ret) {
1197                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1198                 video_device_release(vfd);
1199                 goto err_dec_reg;
1200         }
1201         v4l2_info(&dev->v4l2_dev,
1202                   "decoder registered as /dev/video%d\n", vfd->num);
1203         video_set_drvdata(vfd, dev);
1204
1205         /* encoder */
1206         vfd = video_device_alloc();
1207         if (!vfd) {
1208                 v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n");
1209                 ret = -ENOMEM;
1210                 goto err_enc_alloc;
1211         }
1212         vfd->fops       = &s5p_mfc_fops;
1213         vfd->ioctl_ops  = get_enc_v4l2_ioctl_ops();
1214         vfd->release    = video_device_release;
1215         vfd->lock       = &dev->mfc_mutex;
1216         vfd->v4l2_dev   = &dev->v4l2_dev;
1217         vfd->vfl_dir    = VFL_DIR_M2M;
1218         snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_ENC_NAME);
1219         dev->vfd_enc    = vfd;
1220         ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0);
1221         if (ret) {
1222                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1223                 video_device_release(vfd);
1224                 goto err_enc_reg;
1225         }
1226         v4l2_info(&dev->v4l2_dev,
1227                   "encoder registered as /dev/video%d\n", vfd->num);
1228         video_set_drvdata(vfd, dev);
1229         platform_set_drvdata(pdev, dev);
1230
1231         dev->hw_lock = 0;
1232         dev->watchdog_workqueue = create_singlethread_workqueue(S5P_MFC_NAME);
1233         INIT_WORK(&dev->watchdog_work, s5p_mfc_watchdog_worker);
1234         atomic_set(&dev->watchdog_cnt, 0);
1235         init_timer(&dev->watchdog_timer);
1236         dev->watchdog_timer.data = (unsigned long)dev;
1237         dev->watchdog_timer.function = s5p_mfc_watchdog;
1238
1239         /* Initialize HW ops and commands based on MFC version */
1240         s5p_mfc_init_hw_ops(dev);
1241         s5p_mfc_init_hw_cmds(dev);
1242         s5p_mfc_init_regs(dev);
1243
1244         pr_debug("%s--\n", __func__);
1245         return 0;
1246
1247 /* Deinit MFC if probe had failed */
1248 err_enc_reg:
1249         video_device_release(dev->vfd_enc);
1250 err_enc_alloc:
1251         video_unregister_device(dev->vfd_dec);
1252 err_dec_reg:
1253         video_device_release(dev->vfd_dec);
1254 err_dec_alloc:
1255         v4l2_device_unregister(&dev->v4l2_dev);
1256 err_v4l2_dev_reg:
1257         s5p_mfc_release_firmware(dev);
1258 err_alloc_fw:
1259         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[1]);
1260 err_mem_init_ctx_1:
1261         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[0]);
1262 err_res:
1263         s5p_mfc_final_pm(dev);
1264
1265         pr_debug("%s-- with error\n", __func__);
1266         return ret;
1267
1268 }
1269
1270 /* Remove the driver */
1271 static int s5p_mfc_remove(struct platform_device *pdev)
1272 {
1273         struct s5p_mfc_dev *dev = platform_get_drvdata(pdev);
1274
1275         v4l2_info(&dev->v4l2_dev, "Removing %s\n", pdev->name);
1276
1277         del_timer_sync(&dev->watchdog_timer);
1278         flush_workqueue(dev->watchdog_workqueue);
1279         destroy_workqueue(dev->watchdog_workqueue);
1280
1281         video_unregister_device(dev->vfd_enc);
1282         video_unregister_device(dev->vfd_dec);
1283         v4l2_device_unregister(&dev->v4l2_dev);
1284         s5p_mfc_release_firmware(dev);
1285         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[0]);
1286         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[1]);
1287         if (pdev->dev.of_node) {
1288                 put_device(dev->mem_dev_l);
1289                 put_device(dev->mem_dev_r);
1290         }
1291
1292         s5p_mfc_final_pm(dev);
1293         return 0;
1294 }
1295
1296 #ifdef CONFIG_PM_SLEEP
1297
1298 static int s5p_mfc_suspend(struct device *dev)
1299 {
1300         struct platform_device *pdev = to_platform_device(dev);
1301         struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev);
1302         int ret;
1303
1304         if (m_dev->num_inst == 0)
1305                 return 0;
1306
1307         if (test_and_set_bit(0, &m_dev->enter_suspend) != 0) {
1308                 mfc_err("Error: going to suspend for a second time\n");
1309                 return -EIO;
1310         }
1311
1312         /* Check if we're processing then wait if it necessary. */
1313         while (test_and_set_bit(0, &m_dev->hw_lock) != 0) {
1314                 /* Try and lock the HW */
1315                 /* Wait on the interrupt waitqueue */
1316                 ret = wait_event_interruptible_timeout(m_dev->queue,
1317                         m_dev->int_cond, msecs_to_jiffies(MFC_INT_TIMEOUT));
1318                 if (ret == 0) {
1319                         mfc_err("Waiting for hardware to finish timed out\n");
1320                         clear_bit(0, &m_dev->enter_suspend);
1321                         return -EIO;
1322                 }
1323         }
1324
1325         ret = s5p_mfc_sleep(m_dev);
1326         if (ret) {
1327                 clear_bit(0, &m_dev->enter_suspend);
1328                 clear_bit(0, &m_dev->hw_lock);
1329         }
1330         return ret;
1331 }
1332
1333 static int s5p_mfc_resume(struct device *dev)
1334 {
1335         struct platform_device *pdev = to_platform_device(dev);
1336         struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev);
1337
1338         if (m_dev->num_inst == 0)
1339                 return 0;
1340         return s5p_mfc_wakeup(m_dev);
1341 }
1342 #endif
1343
1344 #ifdef CONFIG_PM
1345 static int s5p_mfc_runtime_suspend(struct device *dev)
1346 {
1347         struct platform_device *pdev = to_platform_device(dev);
1348         struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev);
1349
1350         atomic_set(&m_dev->pm.power, 0);
1351         return 0;
1352 }
1353
1354 static int s5p_mfc_runtime_resume(struct device *dev)
1355 {
1356         struct platform_device *pdev = to_platform_device(dev);
1357         struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev);
1358
1359         atomic_set(&m_dev->pm.power, 1);
1360         return 0;
1361 }
1362 #endif
1363
1364 /* Power management */
1365 static const struct dev_pm_ops s5p_mfc_pm_ops = {
1366         SET_SYSTEM_SLEEP_PM_OPS(s5p_mfc_suspend, s5p_mfc_resume)
1367         SET_RUNTIME_PM_OPS(s5p_mfc_runtime_suspend, s5p_mfc_runtime_resume,
1368                            NULL)
1369 };
1370
1371 static struct s5p_mfc_buf_size_v5 mfc_buf_size_v5 = {
1372         .h264_ctx       = MFC_H264_CTX_BUF_SIZE,
1373         .non_h264_ctx   = MFC_CTX_BUF_SIZE,
1374         .dsc            = DESC_BUF_SIZE,
1375         .shm            = SHARED_BUF_SIZE,
1376 };
1377
1378 static struct s5p_mfc_buf_size buf_size_v5 = {
1379         .fw     = MAX_FW_SIZE,
1380         .cpb    = MAX_CPB_SIZE,
1381         .priv   = &mfc_buf_size_v5,
1382 };
1383
1384 static struct s5p_mfc_buf_align mfc_buf_align_v5 = {
1385         .base = MFC_BASE_ALIGN_ORDER,
1386 };
1387
1388 static struct s5p_mfc_variant mfc_drvdata_v5 = {
1389         .version        = MFC_VERSION,
1390         .version_bit    = MFC_V5_BIT,
1391         .port_num       = MFC_NUM_PORTS,
1392         .buf_size       = &buf_size_v5,
1393         .buf_align      = &mfc_buf_align_v5,
1394         .fw_name[0]     = "/*(DEBLOBBED)*/",
1395 };
1396
1397 static struct s5p_mfc_buf_size_v6 mfc_buf_size_v6 = {
1398         .dev_ctx        = MFC_CTX_BUF_SIZE_V6,
1399         .h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V6,
1400         .other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V6,
1401         .h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V6,
1402         .other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V6,
1403 };
1404
1405 static struct s5p_mfc_buf_size buf_size_v6 = {
1406         .fw     = MAX_FW_SIZE_V6,
1407         .cpb    = MAX_CPB_SIZE_V6,
1408         .priv   = &mfc_buf_size_v6,
1409 };
1410
1411 static struct s5p_mfc_buf_align mfc_buf_align_v6 = {
1412         .base = 0,
1413 };
1414
1415 static struct s5p_mfc_variant mfc_drvdata_v6 = {
1416         .version        = MFC_VERSION_V6,
1417         .version_bit    = MFC_V6_BIT,
1418         .port_num       = MFC_NUM_PORTS_V6,
1419         .buf_size       = &buf_size_v6,
1420         .buf_align      = &mfc_buf_align_v6,
1421         .fw_name[0]     = "/*(DEBLOBBED)*/",
1422         /*
1423          * v6-v2 firmware contains bug fixes and interface change
1424          * for init buffer command
1425          */
1426         .fw_name[1]     = "/*(DEBLOBBED)*/",
1427 };
1428
1429 static struct s5p_mfc_buf_size_v6 mfc_buf_size_v7 = {
1430         .dev_ctx        = MFC_CTX_BUF_SIZE_V7,
1431         .h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V7,
1432         .other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V7,
1433         .h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V7,
1434         .other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V7,
1435 };
1436
1437 static struct s5p_mfc_buf_size buf_size_v7 = {
1438         .fw     = MAX_FW_SIZE_V7,
1439         .cpb    = MAX_CPB_SIZE_V7,
1440         .priv   = &mfc_buf_size_v7,
1441 };
1442
1443 static struct s5p_mfc_buf_align mfc_buf_align_v7 = {
1444         .base = 0,
1445 };
1446
1447 static struct s5p_mfc_variant mfc_drvdata_v7 = {
1448         .version        = MFC_VERSION_V7,
1449         .version_bit    = MFC_V7_BIT,
1450         .port_num       = MFC_NUM_PORTS_V7,
1451         .buf_size       = &buf_size_v7,
1452         .buf_align      = &mfc_buf_align_v7,
1453         .fw_name[0]     = "/*(DEBLOBBED)*/",
1454 };
1455
1456 static struct s5p_mfc_buf_size_v6 mfc_buf_size_v8 = {
1457         .dev_ctx        = MFC_CTX_BUF_SIZE_V8,
1458         .h264_dec_ctx   = MFC_H264_DEC_CTX_BUF_SIZE_V8,
1459         .other_dec_ctx  = MFC_OTHER_DEC_CTX_BUF_SIZE_V8,
1460         .h264_enc_ctx   = MFC_H264_ENC_CTX_BUF_SIZE_V8,
1461         .other_enc_ctx  = MFC_OTHER_ENC_CTX_BUF_SIZE_V8,
1462 };
1463
1464 static struct s5p_mfc_buf_size buf_size_v8 = {
1465         .fw     = MAX_FW_SIZE_V8,
1466         .cpb    = MAX_CPB_SIZE_V8,
1467         .priv   = &mfc_buf_size_v8,
1468 };
1469
1470 static struct s5p_mfc_buf_align mfc_buf_align_v8 = {
1471         .base = 0,
1472 };
1473
1474 static struct s5p_mfc_variant mfc_drvdata_v8 = {
1475         .version        = MFC_VERSION_V8,
1476         .version_bit    = MFC_V8_BIT,
1477         .port_num       = MFC_NUM_PORTS_V8,
1478         .buf_size       = &buf_size_v8,
1479         .buf_align      = &mfc_buf_align_v8,
1480         .fw_name[0]     = "/*(DEBLOBBED)*/",
1481 };
1482
1483 static const struct platform_device_id mfc_driver_ids[] = {
1484         {
1485                 .name = "s5p-mfc",
1486                 .driver_data = (unsigned long)&mfc_drvdata_v5,
1487         }, {
1488                 .name = "s5p-mfc-v5",
1489                 .driver_data = (unsigned long)&mfc_drvdata_v5,
1490         }, {
1491                 .name = "s5p-mfc-v6",
1492                 .driver_data = (unsigned long)&mfc_drvdata_v6,
1493         }, {
1494                 .name = "s5p-mfc-v7",
1495                 .driver_data = (unsigned long)&mfc_drvdata_v7,
1496         }, {
1497                 .name = "s5p-mfc-v8",
1498                 .driver_data = (unsigned long)&mfc_drvdata_v8,
1499         },
1500         {},
1501 };
1502 MODULE_DEVICE_TABLE(platform, mfc_driver_ids);
1503
1504 static const struct of_device_id exynos_mfc_match[] = {
1505         {
1506                 .compatible = "samsung,mfc-v5",
1507                 .data = &mfc_drvdata_v5,
1508         }, {
1509                 .compatible = "samsung,mfc-v6",
1510                 .data = &mfc_drvdata_v6,
1511         }, {
1512                 .compatible = "samsung,mfc-v7",
1513                 .data = &mfc_drvdata_v7,
1514         }, {
1515                 .compatible = "samsung,mfc-v8",
1516                 .data = &mfc_drvdata_v8,
1517         },
1518         {},
1519 };
1520 MODULE_DEVICE_TABLE(of, exynos_mfc_match);
1521
1522 static void *mfc_get_drv_data(struct platform_device *pdev)
1523 {
1524         struct s5p_mfc_variant *driver_data = NULL;
1525
1526         if (pdev->dev.of_node) {
1527                 const struct of_device_id *match;
1528                 match = of_match_node(exynos_mfc_match,
1529                                 pdev->dev.of_node);
1530                 if (match)
1531                         driver_data = (struct s5p_mfc_variant *)match->data;
1532         } else {
1533                 driver_data = (struct s5p_mfc_variant *)
1534                         platform_get_device_id(pdev)->driver_data;
1535         }
1536         return driver_data;
1537 }
1538
1539 static struct platform_driver s5p_mfc_driver = {
1540         .probe          = s5p_mfc_probe,
1541         .remove         = s5p_mfc_remove,
1542         .id_table       = mfc_driver_ids,
1543         .driver = {
1544                 .name   = S5P_MFC_NAME,
1545                 .pm     = &s5p_mfc_pm_ops,
1546                 .of_match_table = exynos_mfc_match,
1547         },
1548 };
1549
1550 module_platform_driver(s5p_mfc_driver);
1551
1552 MODULE_LICENSE("GPL");
1553 MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>");
1554 MODULE_DESCRIPTION("Samsung S5P Multi Format Codec V4L2 driver");
1555