1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2017 Linaro Ltd.
7 #include <linux/delay.h>
8 #include <linux/device.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/interrupt.h>
11 #include <linux/iopoll.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
18 #include "hfi_venus.h"
19 #include "hfi_venus_io.h"
22 #define HFI_MASK_QHDR_TX_TYPE 0xff000000
23 #define HFI_MASK_QHDR_RX_TYPE 0x00ff0000
24 #define HFI_MASK_QHDR_PRI_TYPE 0x0000ff00
25 #define HFI_MASK_QHDR_ID_TYPE 0x000000ff
27 #define HFI_HOST_TO_CTRL_CMD_Q 0
28 #define HFI_CTRL_TO_HOST_MSG_Q 1
29 #define HFI_CTRL_TO_HOST_DBG_Q 2
30 #define HFI_MASK_QHDR_STATUS 0x000000ff
33 #define IFACEQ_CMD_IDX 0
34 #define IFACEQ_MSG_IDX 1
35 #define IFACEQ_DBG_IDX 2
36 #define IFACEQ_MAX_BUF_COUNT 50
37 #define IFACEQ_MAX_PARALLEL_CLNTS 16
38 #define IFACEQ_DFLT_QHDR 0x01010000
40 #define POLL_INTERVAL_US 50
42 #define IFACEQ_MAX_PKT_SIZE 1024
43 #define IFACEQ_MED_PKT_SIZE 768
44 #define IFACEQ_MIN_PKT_SIZE 8
45 #define IFACEQ_VAR_SMALL_PKT_SIZE 100
46 #define IFACEQ_VAR_LARGE_PKT_SIZE 512
47 #define IFACEQ_VAR_HUGE_PKT_SIZE (1024 * 12)
49 struct hfi_queue_table_header {
58 struct hfi_queue_header {
75 #define IFACEQ_TABLE_SIZE \
76 (sizeof(struct hfi_queue_table_header) + \
77 sizeof(struct hfi_queue_header) * IFACEQ_NUM)
79 #define IFACEQ_QUEUE_SIZE (IFACEQ_MAX_PKT_SIZE * \
80 IFACEQ_MAX_BUF_COUNT * IFACEQ_MAX_PARALLEL_CLNTS)
82 #define IFACEQ_GET_QHDR_START_ADDR(ptr, i) \
83 (void *)(((ptr) + sizeof(struct hfi_queue_table_header)) + \
84 ((i) * sizeof(struct hfi_queue_header)))
86 #define QDSS_SIZE SZ_4K
87 #define SFR_SIZE SZ_4K
89 (IFACEQ_TABLE_SIZE + (IFACEQ_QUEUE_SIZE * IFACEQ_NUM))
91 #define ALIGNED_QDSS_SIZE ALIGN(QDSS_SIZE, SZ_4K)
92 #define ALIGNED_SFR_SIZE ALIGN(SFR_SIZE, SZ_4K)
93 #define ALIGNED_QUEUE_SIZE ALIGN(QUEUE_SIZE, SZ_4K)
94 #define SHARED_QSIZE ALIGN(ALIGNED_SFR_SIZE + ALIGNED_QUEUE_SIZE + \
95 ALIGNED_QDSS_SIZE, SZ_1M)
98 dma_addr_t da; /* device address */
99 void *kva; /* kernel virtual address */
105 struct hfi_queue_header *qhdr;
106 struct mem_desc qmem;
110 VENUS_STATE_DEINIT = 1,
114 struct venus_hfi_device {
115 struct venus_core *core;
117 u32 last_packet_type;
120 enum venus_state state;
121 /* serialize read / write to the shared memory */
123 struct completion pwr_collapse_prep;
124 struct completion release_resource;
125 struct mem_desc ifaceq_table;
127 struct iface_queue queues[IFACEQ_NUM];
128 u8 pkt_buf[IFACEQ_VAR_HUGE_PKT_SIZE];
129 u8 dbg_buf[IFACEQ_VAR_HUGE_PKT_SIZE];
132 static bool venus_pkt_debug;
133 int venus_fw_debug = HFI_DEBUG_MSG_ERROR | HFI_DEBUG_MSG_FATAL;
134 static bool venus_sys_idle_indicator;
135 static bool venus_fw_low_power_mode = true;
136 static int venus_hw_rsp_timeout = 1000;
137 static bool venus_fw_coverage;
139 static void venus_set_state(struct venus_hfi_device *hdev,
140 enum venus_state state)
142 mutex_lock(&hdev->lock);
144 mutex_unlock(&hdev->lock);
147 static bool venus_is_valid_state(struct venus_hfi_device *hdev)
149 return hdev->state != VENUS_STATE_DEINIT;
152 static void venus_dump_packet(struct venus_hfi_device *hdev, const void *packet)
154 size_t pkt_size = *(u32 *)packet;
156 if (!venus_pkt_debug)
159 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, packet,
163 static int venus_write_queue(struct venus_hfi_device *hdev,
164 struct iface_queue *queue,
165 void *packet, u32 *rx_req)
167 struct hfi_queue_header *qhdr;
168 u32 dwords, new_wr_idx;
169 u32 empty_space, rd_idx, wr_idx, qsize;
172 if (!queue->qmem.kva)
179 venus_dump_packet(hdev, packet);
181 dwords = (*(u32 *)packet) >> 2;
185 rd_idx = qhdr->read_idx;
186 wr_idx = qhdr->write_idx;
187 qsize = qhdr->q_size;
188 /* ensure rd/wr indices's are read from memory */
191 if (wr_idx >= rd_idx)
192 empty_space = qsize - (wr_idx - rd_idx);
194 empty_space = rd_idx - wr_idx;
196 if (empty_space <= dwords) {
198 /* ensure tx_req is updated in memory */
204 /* ensure tx_req is updated in memory */
207 new_wr_idx = wr_idx + dwords;
208 wr_ptr = (u32 *)(queue->qmem.kva + (wr_idx << 2));
209 if (new_wr_idx < qsize) {
210 memcpy(wr_ptr, packet, dwords << 2);
215 len = (dwords - new_wr_idx) << 2;
216 memcpy(wr_ptr, packet, len);
217 memcpy(queue->qmem.kva, packet + len, new_wr_idx << 2);
220 /* make sure packet is written before updating the write index */
223 qhdr->write_idx = new_wr_idx;
224 *rx_req = qhdr->rx_req ? 1 : 0;
226 /* make sure write index is updated before an interrupt is raised */
232 static int venus_read_queue(struct venus_hfi_device *hdev,
233 struct iface_queue *queue, void *pkt, u32 *tx_req)
235 struct hfi_queue_header *qhdr;
236 u32 dwords, new_rd_idx;
237 u32 rd_idx, wr_idx, type, qsize;
239 u32 recv_request = 0;
242 if (!queue->qmem.kva)
250 rd_idx = qhdr->read_idx;
251 wr_idx = qhdr->write_idx;
252 qsize = qhdr->q_size;
254 /* make sure data is valid before using it */
258 * Do not set receive request for debug queue, if set, Venus generates
259 * interrupt for debug messages even when there is no response message
260 * available. In general debug queue will not become full as it is being
261 * emptied out for every interrupt from Venus. Venus will anyway
262 * generates interrupt if it is full.
264 if (type & HFI_CTRL_TO_HOST_MSG_Q)
267 if (rd_idx == wr_idx) {
268 qhdr->rx_req = recv_request;
270 /* update rx_req field in memory */
275 rd_ptr = (u32 *)(queue->qmem.kva + (rd_idx << 2));
276 dwords = *rd_ptr >> 2;
280 new_rd_idx = rd_idx + dwords;
281 if (((dwords << 2) <= IFACEQ_VAR_HUGE_PKT_SIZE) && rd_idx <= qsize) {
282 if (new_rd_idx < qsize) {
283 memcpy(pkt, rd_ptr, dwords << 2);
288 len = (dwords - new_rd_idx) << 2;
289 memcpy(pkt, rd_ptr, len);
290 memcpy(pkt + len, queue->qmem.kva, new_rd_idx << 2);
293 /* bad packet received, dropping */
294 new_rd_idx = qhdr->write_idx;
298 /* ensure the packet is read before updating read index */
301 qhdr->read_idx = new_rd_idx;
302 /* ensure updating read index */
305 rd_idx = qhdr->read_idx;
306 wr_idx = qhdr->write_idx;
307 /* ensure rd/wr indices are read from memory */
310 if (rd_idx != wr_idx)
313 qhdr->rx_req = recv_request;
315 *tx_req = qhdr->tx_req ? 1 : 0;
317 /* ensure rx_req is stored to memory and tx_req is loaded from memory */
320 venus_dump_packet(hdev, pkt);
325 static int venus_alloc(struct venus_hfi_device *hdev, struct mem_desc *desc,
328 struct device *dev = hdev->core->dev;
330 desc->attrs = DMA_ATTR_WRITE_COMBINE;
331 desc->size = ALIGN(size, SZ_4K);
333 desc->kva = dma_alloc_attrs(dev, desc->size, &desc->da, GFP_KERNEL,
341 static void venus_free(struct venus_hfi_device *hdev, struct mem_desc *mem)
343 struct device *dev = hdev->core->dev;
345 dma_free_attrs(dev, mem->size, mem->kva, mem->da, mem->attrs);
348 static void venus_set_registers(struct venus_hfi_device *hdev)
350 const struct venus_resources *res = hdev->core->res;
351 const struct reg_val *tbl = res->reg_tbl;
352 unsigned int count = res->reg_tbl_size;
355 for (i = 0; i < count; i++)
356 writel(tbl[i].value, hdev->core->base + tbl[i].reg);
359 static void venus_soft_int(struct venus_hfi_device *hdev)
361 void __iomem *cpu_ic_base = hdev->core->cpu_ic_base;
364 if (IS_V6(hdev->core))
365 clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT_V6);
367 clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT);
369 writel(clear_bit, cpu_ic_base + CPU_IC_SOFTINT);
372 static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev,
373 void *pkt, bool sync)
375 struct device *dev = hdev->core->dev;
376 struct hfi_pkt_hdr *cmd_packet;
377 struct iface_queue *queue;
381 if (!venus_is_valid_state(hdev))
384 cmd_packet = (struct hfi_pkt_hdr *)pkt;
385 hdev->last_packet_type = cmd_packet->pkt_type;
387 queue = &hdev->queues[IFACEQ_CMD_IDX];
389 ret = venus_write_queue(hdev, queue, pkt, &rx_req);
391 dev_err(dev, "write to iface cmd queue failed (%d)\n", ret);
397 * Inform video hardware to raise interrupt for synchronous
400 queue = &hdev->queues[IFACEQ_MSG_IDX];
401 queue->qhdr->rx_req = 1;
402 /* ensure rx_req is updated in memory */
407 venus_soft_int(hdev);
412 static int venus_iface_cmdq_write(struct venus_hfi_device *hdev, void *pkt, bool sync)
416 mutex_lock(&hdev->lock);
417 ret = venus_iface_cmdq_write_nolock(hdev, pkt, sync);
418 mutex_unlock(&hdev->lock);
423 static int venus_hfi_core_set_resource(struct venus_core *core, u32 id,
424 u32 size, u32 addr, void *cookie)
426 struct venus_hfi_device *hdev = to_hfi_priv(core);
427 struct hfi_sys_set_resource_pkt *pkt;
428 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
431 if (id == VIDC_RESOURCE_NONE)
434 pkt = (struct hfi_sys_set_resource_pkt *)packet;
436 ret = pkt_sys_set_resource(pkt, id, size, addr, cookie);
440 ret = venus_iface_cmdq_write(hdev, pkt, false);
447 static int venus_boot_core(struct venus_hfi_device *hdev)
449 struct device *dev = hdev->core->dev;
450 static const unsigned int max_tries = 100;
451 u32 ctrl_status = 0, mask_val;
452 unsigned int count = 0;
453 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
454 void __iomem *wrapper_base = hdev->core->wrapper_base;
457 writel(BIT(VIDC_CTRL_INIT_CTRL_SHIFT), cpu_cs_base + VIDC_CTRL_INIT);
458 if (IS_V6(hdev->core)) {
459 mask_val = readl(wrapper_base + WRAPPER_INTR_MASK);
460 mask_val &= ~(WRAPPER_INTR_MASK_A2HWD_BASK_V6 |
461 WRAPPER_INTR_MASK_A2HCPU_MASK);
463 mask_val = WRAPPER_INTR_MASK_A2HVCODEC_MASK;
465 writel(mask_val, wrapper_base + WRAPPER_INTR_MASK);
466 writel(1, cpu_cs_base + CPU_CS_SCIACMDARG3);
468 while (!ctrl_status && count < max_tries) {
469 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
470 if ((ctrl_status & CPU_CS_SCIACMDARG0_ERROR_STATUS_MASK) == 4) {
471 dev_err(dev, "invalid setting for UC_REGION\n");
476 usleep_range(500, 1000);
480 if (count >= max_tries)
483 if (IS_V6(hdev->core)) {
484 writel(0x1, cpu_cs_base + CPU_CS_H2XSOFTINTEN_V6);
485 writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6);
491 static u32 venus_hwversion(struct venus_hfi_device *hdev)
493 struct device *dev = hdev->core->dev;
494 void __iomem *wrapper_base = hdev->core->wrapper_base;
496 u32 major, minor, step;
498 ver = readl(wrapper_base + WRAPPER_HW_VERSION);
499 major = ver & WRAPPER_HW_VERSION_MAJOR_VERSION_MASK;
500 major = major >> WRAPPER_HW_VERSION_MAJOR_VERSION_SHIFT;
501 minor = ver & WRAPPER_HW_VERSION_MINOR_VERSION_MASK;
502 minor = minor >> WRAPPER_HW_VERSION_MINOR_VERSION_SHIFT;
503 step = ver & WRAPPER_HW_VERSION_STEP_VERSION_MASK;
505 dev_dbg(dev, VDBGL "venus hw version %x.%x.%x\n", major, minor, step);
510 static int venus_run(struct venus_hfi_device *hdev)
512 struct device *dev = hdev->core->dev;
513 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
517 * Re-program all of the registers that get reset as a result of
518 * regulator_disable() and _enable()
520 venus_set_registers(hdev);
522 writel(hdev->ifaceq_table.da, cpu_cs_base + UC_REGION_ADDR);
523 writel(SHARED_QSIZE, cpu_cs_base + UC_REGION_SIZE);
524 writel(hdev->ifaceq_table.da, cpu_cs_base + CPU_CS_SCIACMDARG2);
525 writel(0x01, cpu_cs_base + CPU_CS_SCIACMDARG1);
527 writel(hdev->sfr.da, cpu_cs_base + SFR_ADDR);
529 ret = venus_boot_core(hdev);
531 dev_err(dev, "failed to reset venus core\n");
535 venus_hwversion(hdev);
540 static int venus_halt_axi(struct venus_hfi_device *hdev)
542 void __iomem *wrapper_base = hdev->core->wrapper_base;
543 void __iomem *vbif_base = hdev->core->vbif_base;
544 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
545 void __iomem *aon_base = hdev->core->aon_base;
546 struct device *dev = hdev->core->dev;
551 if (IS_V6(hdev->core)) {
552 writel(0x3, cpu_cs_base + CPU_CS_X2RPMH_V6);
554 if (hdev->core->res->num_vpp_pipes == 1)
555 goto skip_aon_mvp_noc;
557 writel(0x1, aon_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
558 ret = readl_poll_timeout(aon_base + AON_WRAPPER_MVP_NOC_LPI_STATUS,
562 VBIF_AXI_HALT_ACK_TIMEOUT_US);
567 mask_val = (BIT(2) | BIT(1) | BIT(0));
568 writel(mask_val, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6);
570 writel(0x00, wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6);
571 ret = readl_poll_timeout(wrapper_base + WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6,
575 VBIF_AXI_HALT_ACK_TIMEOUT_US);
578 dev_err(dev, "DBLP Release: lpi_status %x\n", val);
584 if (IS_V4(hdev->core)) {
585 val = readl(wrapper_base + WRAPPER_CPU_AXI_HALT);
586 val |= WRAPPER_CPU_AXI_HALT_HALT;
587 writel(val, wrapper_base + WRAPPER_CPU_AXI_HALT);
589 ret = readl_poll_timeout(wrapper_base + WRAPPER_CPU_AXI_HALT_STATUS,
591 val & WRAPPER_CPU_AXI_HALT_STATUS_IDLE,
593 VBIF_AXI_HALT_ACK_TIMEOUT_US);
595 dev_err(dev, "AXI bus port halt timeout\n");
602 /* Halt AXI and AXI IMEM VBIF Access */
603 val = readl(vbif_base + VBIF_AXI_HALT_CTRL0);
604 val |= VBIF_AXI_HALT_CTRL0_HALT_REQ;
605 writel(val, vbif_base + VBIF_AXI_HALT_CTRL0);
607 /* Request for AXI bus port halt */
608 ret = readl_poll_timeout(vbif_base + VBIF_AXI_HALT_CTRL1, val,
609 val & VBIF_AXI_HALT_CTRL1_HALT_ACK,
611 VBIF_AXI_HALT_ACK_TIMEOUT_US);
613 dev_err(dev, "AXI bus port halt timeout\n");
620 static int venus_power_off(struct venus_hfi_device *hdev)
624 if (!hdev->power_enabled)
627 ret = venus_set_hw_state_suspend(hdev->core);
631 ret = venus_halt_axi(hdev);
635 hdev->power_enabled = false;
640 static int venus_power_on(struct venus_hfi_device *hdev)
644 if (hdev->power_enabled)
647 ret = venus_set_hw_state_resume(hdev->core);
651 ret = venus_run(hdev);
655 hdev->power_enabled = true;
660 venus_set_hw_state_suspend(hdev->core);
662 hdev->power_enabled = false;
666 static int venus_iface_msgq_read_nolock(struct venus_hfi_device *hdev,
669 struct iface_queue *queue;
673 if (!venus_is_valid_state(hdev))
676 queue = &hdev->queues[IFACEQ_MSG_IDX];
678 ret = venus_read_queue(hdev, queue, pkt, &tx_req);
683 venus_soft_int(hdev);
688 static int venus_iface_msgq_read(struct venus_hfi_device *hdev, void *pkt)
692 mutex_lock(&hdev->lock);
693 ret = venus_iface_msgq_read_nolock(hdev, pkt);
694 mutex_unlock(&hdev->lock);
699 static int venus_iface_dbgq_read_nolock(struct venus_hfi_device *hdev,
702 struct iface_queue *queue;
706 ret = venus_is_valid_state(hdev);
710 queue = &hdev->queues[IFACEQ_DBG_IDX];
712 ret = venus_read_queue(hdev, queue, pkt, &tx_req);
717 venus_soft_int(hdev);
722 static int venus_iface_dbgq_read(struct venus_hfi_device *hdev, void *pkt)
729 mutex_lock(&hdev->lock);
730 ret = venus_iface_dbgq_read_nolock(hdev, pkt);
731 mutex_unlock(&hdev->lock);
736 static void venus_set_qhdr_defaults(struct hfi_queue_header *qhdr)
739 qhdr->type = IFACEQ_DFLT_QHDR;
740 qhdr->q_size = IFACEQ_QUEUE_SIZE / 4;
746 qhdr->rx_irq_status = 0;
747 qhdr->tx_irq_status = 0;
752 static void venus_interface_queues_release(struct venus_hfi_device *hdev)
754 mutex_lock(&hdev->lock);
756 venus_free(hdev, &hdev->ifaceq_table);
757 venus_free(hdev, &hdev->sfr);
759 memset(hdev->queues, 0, sizeof(hdev->queues));
760 memset(&hdev->ifaceq_table, 0, sizeof(hdev->ifaceq_table));
761 memset(&hdev->sfr, 0, sizeof(hdev->sfr));
763 mutex_unlock(&hdev->lock);
766 static int venus_interface_queues_init(struct venus_hfi_device *hdev)
768 struct hfi_queue_table_header *tbl_hdr;
769 struct iface_queue *queue;
771 struct mem_desc desc = {0};
776 ret = venus_alloc(hdev, &desc, ALIGNED_QUEUE_SIZE);
780 hdev->ifaceq_table = desc;
781 offset = IFACEQ_TABLE_SIZE;
783 for (i = 0; i < IFACEQ_NUM; i++) {
784 queue = &hdev->queues[i];
785 queue->qmem.da = desc.da + offset;
786 queue->qmem.kva = desc.kva + offset;
787 queue->qmem.size = IFACEQ_QUEUE_SIZE;
788 offset += queue->qmem.size;
790 IFACEQ_GET_QHDR_START_ADDR(hdev->ifaceq_table.kva, i);
792 venus_set_qhdr_defaults(queue->qhdr);
794 queue->qhdr->start_addr = queue->qmem.da;
796 if (i == IFACEQ_CMD_IDX)
797 queue->qhdr->type |= HFI_HOST_TO_CTRL_CMD_Q;
798 else if (i == IFACEQ_MSG_IDX)
799 queue->qhdr->type |= HFI_CTRL_TO_HOST_MSG_Q;
800 else if (i == IFACEQ_DBG_IDX)
801 queue->qhdr->type |= HFI_CTRL_TO_HOST_DBG_Q;
804 tbl_hdr = hdev->ifaceq_table.kva;
805 tbl_hdr->version = 0;
806 tbl_hdr->size = IFACEQ_TABLE_SIZE;
807 tbl_hdr->qhdr0_offset = sizeof(struct hfi_queue_table_header);
808 tbl_hdr->qhdr_size = sizeof(struct hfi_queue_header);
809 tbl_hdr->num_q = IFACEQ_NUM;
810 tbl_hdr->num_active_q = IFACEQ_NUM;
813 * Set receive request to zero on debug queue as there is no
814 * need of interrupt from video hardware for debug messages
816 queue = &hdev->queues[IFACEQ_DBG_IDX];
817 queue->qhdr->rx_req = 0;
819 ret = venus_alloc(hdev, &desc, ALIGNED_SFR_SIZE);
825 sfr->buf_size = ALIGNED_SFR_SIZE;
828 /* ensure table and queue header structs are settled in memory */
834 static int venus_sys_set_debug(struct venus_hfi_device *hdev, u32 debug)
836 struct hfi_sys_set_property_pkt *pkt;
837 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
840 pkt = (struct hfi_sys_set_property_pkt *)packet;
842 pkt_sys_debug_config(pkt, HFI_DEBUG_MODE_QUEUE, debug);
844 ret = venus_iface_cmdq_write(hdev, pkt, false);
851 static int venus_sys_set_coverage(struct venus_hfi_device *hdev, u32 mode)
853 struct hfi_sys_set_property_pkt *pkt;
854 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
857 pkt = (struct hfi_sys_set_property_pkt *)packet;
859 pkt_sys_coverage_config(pkt, mode);
861 ret = venus_iface_cmdq_write(hdev, pkt, false);
868 static int venus_sys_set_idle_message(struct venus_hfi_device *hdev,
871 struct hfi_sys_set_property_pkt *pkt;
872 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
878 pkt = (struct hfi_sys_set_property_pkt *)packet;
880 pkt_sys_idle_indicator(pkt, enable);
882 ret = venus_iface_cmdq_write(hdev, pkt, false);
889 static int venus_sys_set_power_control(struct venus_hfi_device *hdev,
892 struct hfi_sys_set_property_pkt *pkt;
893 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
896 pkt = (struct hfi_sys_set_property_pkt *)packet;
898 pkt_sys_power_control(pkt, enable);
900 ret = venus_iface_cmdq_write(hdev, pkt, false);
907 static int venus_get_queue_size(struct venus_hfi_device *hdev,
910 struct hfi_queue_header *qhdr;
912 if (index >= IFACEQ_NUM)
915 qhdr = hdev->queues[index].qhdr;
919 return abs(qhdr->read_idx - qhdr->write_idx);
922 static int venus_sys_set_default_properties(struct venus_hfi_device *hdev)
924 struct device *dev = hdev->core->dev;
927 ret = venus_sys_set_debug(hdev, venus_fw_debug);
929 dev_warn(dev, "setting fw debug msg ON failed (%d)\n", ret);
932 * Idle indicator is disabled by default on some 4xx firmware versions,
933 * enable it explicitly in order to make suspend functional by checking
934 * WFI (wait-for-interrupt) bit.
936 if (IS_V4(hdev->core) || IS_V6(hdev->core))
937 venus_sys_idle_indicator = true;
939 ret = venus_sys_set_idle_message(hdev, venus_sys_idle_indicator);
941 dev_warn(dev, "setting idle response ON failed (%d)\n", ret);
943 ret = venus_sys_set_power_control(hdev, venus_fw_low_power_mode);
945 dev_warn(dev, "setting hw power collapse ON failed (%d)\n",
951 static int venus_session_cmd(struct venus_inst *inst, u32 pkt_type, bool sync)
953 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
954 struct hfi_session_pkt pkt;
956 pkt_session_cmd(&pkt, pkt_type, inst);
958 return venus_iface_cmdq_write(hdev, &pkt, sync);
961 static void venus_flush_debug_queue(struct venus_hfi_device *hdev)
963 struct device *dev = hdev->core->dev;
964 void *packet = hdev->dbg_buf;
966 while (!venus_iface_dbgq_read(hdev, packet)) {
967 struct hfi_msg_sys_coverage_pkt *pkt = packet;
969 if (pkt->hdr.pkt_type != HFI_MSG_SYS_COV) {
970 struct hfi_msg_sys_debug_pkt *pkt = packet;
972 dev_dbg(dev, VDBGFW "%s", pkt->msg_data);
977 static int venus_prepare_power_collapse(struct venus_hfi_device *hdev,
980 unsigned long timeout = msecs_to_jiffies(venus_hw_rsp_timeout);
981 struct hfi_sys_pc_prep_pkt pkt;
984 init_completion(&hdev->pwr_collapse_prep);
986 pkt_sys_pc_prep(&pkt);
988 ret = venus_iface_cmdq_write(hdev, &pkt, false);
995 ret = wait_for_completion_timeout(&hdev->pwr_collapse_prep, timeout);
997 venus_flush_debug_queue(hdev);
1004 static int venus_are_queues_empty(struct venus_hfi_device *hdev)
1008 ret1 = venus_get_queue_size(hdev, IFACEQ_MSG_IDX);
1012 ret2 = venus_get_queue_size(hdev, IFACEQ_CMD_IDX);
1022 static void venus_sfr_print(struct venus_hfi_device *hdev)
1024 struct device *dev = hdev->core->dev;
1025 struct hfi_sfr *sfr = hdev->sfr.kva;
1031 p = memchr(sfr->data, '\0', sfr->buf_size);
1033 * SFR isn't guaranteed to be NULL terminated since SYS_ERROR indicates
1034 * that Venus is in the process of crashing.
1037 sfr->data[sfr->buf_size - 1] = '\0';
1039 dev_err_ratelimited(dev, "SFR message from FW: %s\n", sfr->data);
1042 static void venus_process_msg_sys_error(struct venus_hfi_device *hdev,
1045 struct hfi_msg_event_notify_pkt *event_pkt = packet;
1047 if (event_pkt->event_id != HFI_EVENT_SYS_ERROR)
1050 venus_set_state(hdev, VENUS_STATE_DEINIT);
1052 venus_sfr_print(hdev);
1055 static irqreturn_t venus_isr_thread(struct venus_core *core)
1057 struct venus_hfi_device *hdev = to_hfi_priv(core);
1058 const struct venus_resources *res;
1065 res = hdev->core->res;
1066 pkt = hdev->pkt_buf;
1069 while (!venus_iface_msgq_read(hdev, pkt)) {
1070 msg_ret = hfi_process_msg_packet(core, pkt);
1072 case HFI_MSG_EVENT_NOTIFY:
1073 venus_process_msg_sys_error(hdev, pkt);
1075 case HFI_MSG_SYS_INIT:
1076 venus_hfi_core_set_resource(core, res->vmem_id,
1081 case HFI_MSG_SYS_RELEASE_RESOURCE:
1082 complete(&hdev->release_resource);
1084 case HFI_MSG_SYS_PC_PREP:
1085 complete(&hdev->pwr_collapse_prep);
1092 venus_flush_debug_queue(hdev);
1097 static irqreturn_t venus_isr(struct venus_core *core)
1099 struct venus_hfi_device *hdev = to_hfi_priv(core);
1101 void __iomem *cpu_cs_base;
1102 void __iomem *wrapper_base;
1107 cpu_cs_base = hdev->core->cpu_cs_base;
1108 wrapper_base = hdev->core->wrapper_base;
1110 status = readl(wrapper_base + WRAPPER_INTR_STATUS);
1112 if (status & WRAPPER_INTR_STATUS_A2H_MASK ||
1113 status & WRAPPER_INTR_STATUS_A2HWD_MASK_V6 ||
1114 status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK)
1115 hdev->irq_status = status;
1117 if (status & WRAPPER_INTR_STATUS_A2H_MASK ||
1118 status & WRAPPER_INTR_STATUS_A2HWD_MASK ||
1119 status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK)
1120 hdev->irq_status = status;
1122 writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR);
1124 writel(status, wrapper_base + WRAPPER_INTR_CLEAR);
1126 return IRQ_WAKE_THREAD;
1129 static int venus_core_init(struct venus_core *core)
1131 struct venus_hfi_device *hdev = to_hfi_priv(core);
1132 struct device *dev = core->dev;
1133 struct hfi_sys_get_property_pkt version_pkt;
1134 struct hfi_sys_init_pkt pkt;
1137 pkt_sys_init(&pkt, HFI_VIDEO_ARCH_OX);
1139 venus_set_state(hdev, VENUS_STATE_INIT);
1141 ret = venus_iface_cmdq_write(hdev, &pkt, false);
1145 pkt_sys_image_version(&version_pkt);
1147 ret = venus_iface_cmdq_write(hdev, &version_pkt, false);
1149 dev_warn(dev, "failed to send image version pkt to fw\n");
1151 ret = venus_sys_set_default_properties(hdev);
1158 static int venus_core_deinit(struct venus_core *core)
1160 struct venus_hfi_device *hdev = to_hfi_priv(core);
1162 venus_set_state(hdev, VENUS_STATE_DEINIT);
1163 hdev->suspended = true;
1164 hdev->power_enabled = false;
1169 static int venus_core_ping(struct venus_core *core, u32 cookie)
1171 struct venus_hfi_device *hdev = to_hfi_priv(core);
1172 struct hfi_sys_ping_pkt pkt;
1174 pkt_sys_ping(&pkt, cookie);
1176 return venus_iface_cmdq_write(hdev, &pkt, false);
1179 static int venus_core_trigger_ssr(struct venus_core *core, u32 trigger_type)
1181 struct venus_hfi_device *hdev = to_hfi_priv(core);
1182 struct hfi_sys_test_ssr_pkt pkt;
1185 ret = pkt_sys_ssr_cmd(&pkt, trigger_type);
1189 return venus_iface_cmdq_write(hdev, &pkt, false);
1192 static int venus_session_init(struct venus_inst *inst, u32 session_type,
1195 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1196 struct hfi_session_init_pkt pkt;
1199 ret = venus_sys_set_debug(hdev, venus_fw_debug);
1203 ret = pkt_session_init(&pkt, inst, session_type, codec);
1207 ret = venus_iface_cmdq_write(hdev, &pkt, true);
1214 venus_flush_debug_queue(hdev);
1218 static int venus_session_end(struct venus_inst *inst)
1220 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1221 struct device *dev = hdev->core->dev;
1223 if (venus_fw_coverage) {
1224 if (venus_sys_set_coverage(hdev, venus_fw_coverage))
1225 dev_warn(dev, "fw coverage msg ON failed\n");
1228 return venus_session_cmd(inst, HFI_CMD_SYS_SESSION_END, true);
1231 static int venus_session_abort(struct venus_inst *inst)
1233 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1235 venus_flush_debug_queue(hdev);
1237 return venus_session_cmd(inst, HFI_CMD_SYS_SESSION_ABORT, true);
1240 static int venus_session_flush(struct venus_inst *inst, u32 flush_mode)
1242 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1243 struct hfi_session_flush_pkt pkt;
1246 ret = pkt_session_flush(&pkt, inst, flush_mode);
1250 return venus_iface_cmdq_write(hdev, &pkt, true);
1253 static int venus_session_start(struct venus_inst *inst)
1255 return venus_session_cmd(inst, HFI_CMD_SESSION_START, true);
1258 static int venus_session_stop(struct venus_inst *inst)
1260 return venus_session_cmd(inst, HFI_CMD_SESSION_STOP, true);
1263 static int venus_session_continue(struct venus_inst *inst)
1265 return venus_session_cmd(inst, HFI_CMD_SESSION_CONTINUE, false);
1268 static int venus_session_etb(struct venus_inst *inst,
1269 struct hfi_frame_data *in_frame)
1271 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1272 u32 session_type = inst->session_type;
1275 if (session_type == VIDC_SESSION_TYPE_DEC) {
1276 struct hfi_session_empty_buffer_compressed_pkt pkt;
1278 ret = pkt_session_etb_decoder(&pkt, inst, in_frame);
1282 ret = venus_iface_cmdq_write(hdev, &pkt, false);
1283 } else if (session_type == VIDC_SESSION_TYPE_ENC) {
1284 struct hfi_session_empty_buffer_uncompressed_plane0_pkt pkt;
1286 ret = pkt_session_etb_encoder(&pkt, inst, in_frame);
1290 ret = venus_iface_cmdq_write(hdev, &pkt, false);
1298 static int venus_session_ftb(struct venus_inst *inst,
1299 struct hfi_frame_data *out_frame)
1301 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1302 struct hfi_session_fill_buffer_pkt pkt;
1305 ret = pkt_session_ftb(&pkt, inst, out_frame);
1309 return venus_iface_cmdq_write(hdev, &pkt, false);
1312 static int venus_session_set_buffers(struct venus_inst *inst,
1313 struct hfi_buffer_desc *bd)
1315 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1316 struct hfi_session_set_buffers_pkt *pkt;
1317 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE];
1320 if (bd->buffer_type == HFI_BUFFER_INPUT)
1323 pkt = (struct hfi_session_set_buffers_pkt *)packet;
1325 ret = pkt_session_set_buffers(pkt, inst, bd);
1329 return venus_iface_cmdq_write(hdev, pkt, false);
1332 static int venus_session_unset_buffers(struct venus_inst *inst,
1333 struct hfi_buffer_desc *bd)
1335 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1336 struct hfi_session_release_buffer_pkt *pkt;
1337 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE];
1340 if (bd->buffer_type == HFI_BUFFER_INPUT)
1343 pkt = (struct hfi_session_release_buffer_pkt *)packet;
1345 ret = pkt_session_unset_buffers(pkt, inst, bd);
1349 return venus_iface_cmdq_write(hdev, pkt, true);
1352 static int venus_session_load_res(struct venus_inst *inst)
1354 return venus_session_cmd(inst, HFI_CMD_SESSION_LOAD_RESOURCES, true);
1357 static int venus_session_release_res(struct venus_inst *inst)
1359 return venus_session_cmd(inst, HFI_CMD_SESSION_RELEASE_RESOURCES, true);
1362 static int venus_session_parse_seq_hdr(struct venus_inst *inst, u32 seq_hdr,
1365 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1366 struct hfi_session_parse_sequence_header_pkt *pkt;
1367 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
1370 pkt = (struct hfi_session_parse_sequence_header_pkt *)packet;
1372 ret = pkt_session_parse_seq_header(pkt, inst, seq_hdr, seq_hdr_len);
1376 ret = venus_iface_cmdq_write(hdev, pkt, false);
1383 static int venus_session_get_seq_hdr(struct venus_inst *inst, u32 seq_hdr,
1386 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1387 struct hfi_session_get_sequence_header_pkt *pkt;
1388 u8 packet[IFACEQ_VAR_SMALL_PKT_SIZE];
1391 pkt = (struct hfi_session_get_sequence_header_pkt *)packet;
1393 ret = pkt_session_get_seq_hdr(pkt, inst, seq_hdr, seq_hdr_len);
1397 return venus_iface_cmdq_write(hdev, pkt, false);
1400 static int venus_session_set_property(struct venus_inst *inst, u32 ptype,
1403 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1404 struct hfi_session_set_property_pkt *pkt;
1405 u8 packet[IFACEQ_VAR_LARGE_PKT_SIZE];
1408 pkt = (struct hfi_session_set_property_pkt *)packet;
1410 ret = pkt_session_set_property(pkt, inst, ptype, pdata);
1411 if (ret == -ENOTSUPP)
1416 return venus_iface_cmdq_write(hdev, pkt, false);
1419 static int venus_session_get_property(struct venus_inst *inst, u32 ptype)
1421 struct venus_hfi_device *hdev = to_hfi_priv(inst->core);
1422 struct hfi_session_get_property_pkt pkt;
1425 ret = pkt_session_get_property(&pkt, inst, ptype);
1429 return venus_iface_cmdq_write(hdev, &pkt, true);
1432 static int venus_resume(struct venus_core *core)
1434 struct venus_hfi_device *hdev = to_hfi_priv(core);
1437 mutex_lock(&hdev->lock);
1439 if (!hdev->suspended)
1442 ret = venus_power_on(hdev);
1446 hdev->suspended = false;
1448 mutex_unlock(&hdev->lock);
1453 static int venus_suspend_1xx(struct venus_core *core)
1455 struct venus_hfi_device *hdev = to_hfi_priv(core);
1456 struct device *dev = core->dev;
1457 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
1461 if (!hdev->power_enabled || hdev->suspended)
1464 mutex_lock(&hdev->lock);
1465 ret = venus_is_valid_state(hdev);
1466 mutex_unlock(&hdev->lock);
1469 dev_err(dev, "bad state, cannot suspend\n");
1473 ret = venus_prepare_power_collapse(hdev, true);
1475 dev_err(dev, "prepare for power collapse fail (%d)\n", ret);
1479 mutex_lock(&hdev->lock);
1481 if (hdev->last_packet_type != HFI_CMD_SYS_PC_PREP) {
1482 mutex_unlock(&hdev->lock);
1486 ret = venus_are_queues_empty(hdev);
1487 if (ret < 0 || !ret) {
1488 mutex_unlock(&hdev->lock);
1492 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
1493 if (!(ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)) {
1494 mutex_unlock(&hdev->lock);
1498 ret = venus_power_off(hdev);
1500 mutex_unlock(&hdev->lock);
1504 hdev->suspended = true;
1506 mutex_unlock(&hdev->lock);
1511 static bool venus_cpu_and_video_core_idle(struct venus_hfi_device *hdev)
1513 void __iomem *wrapper_base = hdev->core->wrapper_base;
1514 void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base;
1515 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
1516 u32 ctrl_status, cpu_status;
1518 if (IS_V6(hdev->core))
1519 cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6);
1521 cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS);
1522 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
1524 if (cpu_status & WRAPPER_CPU_STATUS_WFI &&
1525 ctrl_status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK)
1531 static bool venus_cpu_idle_and_pc_ready(struct venus_hfi_device *hdev)
1533 void __iomem *wrapper_base = hdev->core->wrapper_base;
1534 void __iomem *wrapper_tz_base = hdev->core->wrapper_tz_base;
1535 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
1536 u32 ctrl_status, cpu_status;
1538 if (IS_V6(hdev->core))
1539 cpu_status = readl(wrapper_tz_base + WRAPPER_TZ_CPU_STATUS_V6);
1541 cpu_status = readl(wrapper_base + WRAPPER_CPU_STATUS);
1542 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
1544 if (cpu_status & WRAPPER_CPU_STATUS_WFI &&
1545 ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)
1551 static int venus_suspend_3xx(struct venus_core *core)
1553 struct venus_hfi_device *hdev = to_hfi_priv(core);
1554 struct device *dev = core->dev;
1555 void __iomem *cpu_cs_base = hdev->core->cpu_cs_base;
1560 if (!hdev->power_enabled || hdev->suspended)
1563 mutex_lock(&hdev->lock);
1564 ret = venus_is_valid_state(hdev);
1565 mutex_unlock(&hdev->lock);
1568 dev_err(dev, "bad state, cannot suspend\n");
1572 ctrl_status = readl(cpu_cs_base + CPU_CS_SCIACMDARG0);
1573 if (ctrl_status & CPU_CS_SCIACMDARG0_PC_READY)
1577 * Power collapse sequence for Venus 3xx and 4xx versions:
1578 * 1. Check for ARM9 and video core to be idle by checking WFI bit
1579 * (bit 0) in CPU status register and by checking Idle (bit 30) in
1580 * Control status register for video core.
1581 * 2. Send a command to prepare for power collapse.
1582 * 3. Check for WFI and PC_READY bits.
1584 ret = readx_poll_timeout(venus_cpu_and_video_core_idle, hdev, val, val,
1587 dev_err(dev, "wait for cpu and video core idle fail (%d)\n", ret);
1591 ret = venus_prepare_power_collapse(hdev, false);
1593 dev_err(dev, "prepare for power collapse fail (%d)\n", ret);
1597 ret = readx_poll_timeout(venus_cpu_idle_and_pc_ready, hdev, val, val,
1603 mutex_lock(&hdev->lock);
1605 ret = venus_power_off(hdev);
1607 dev_err(dev, "venus_power_off (%d)\n", ret);
1608 mutex_unlock(&hdev->lock);
1612 hdev->suspended = true;
1614 mutex_unlock(&hdev->lock);
1619 static int venus_suspend(struct venus_core *core)
1621 if (IS_V3(core) || IS_V4(core) || IS_V6(core))
1622 return venus_suspend_3xx(core);
1624 return venus_suspend_1xx(core);
1627 static const struct hfi_ops venus_hfi_ops = {
1628 .core_init = venus_core_init,
1629 .core_deinit = venus_core_deinit,
1630 .core_ping = venus_core_ping,
1631 .core_trigger_ssr = venus_core_trigger_ssr,
1633 .session_init = venus_session_init,
1634 .session_end = venus_session_end,
1635 .session_abort = venus_session_abort,
1636 .session_flush = venus_session_flush,
1637 .session_start = venus_session_start,
1638 .session_stop = venus_session_stop,
1639 .session_continue = venus_session_continue,
1640 .session_etb = venus_session_etb,
1641 .session_ftb = venus_session_ftb,
1642 .session_set_buffers = venus_session_set_buffers,
1643 .session_unset_buffers = venus_session_unset_buffers,
1644 .session_load_res = venus_session_load_res,
1645 .session_release_res = venus_session_release_res,
1646 .session_parse_seq_hdr = venus_session_parse_seq_hdr,
1647 .session_get_seq_hdr = venus_session_get_seq_hdr,
1648 .session_set_property = venus_session_set_property,
1649 .session_get_property = venus_session_get_property,
1651 .resume = venus_resume,
1652 .suspend = venus_suspend,
1655 .isr_thread = venus_isr_thread,
1658 void venus_hfi_destroy(struct venus_core *core)
1660 struct venus_hfi_device *hdev = to_hfi_priv(core);
1663 venus_interface_queues_release(hdev);
1664 mutex_destroy(&hdev->lock);
1669 int venus_hfi_create(struct venus_core *core)
1671 struct venus_hfi_device *hdev;
1674 hdev = kzalloc(sizeof(*hdev), GFP_KERNEL);
1678 mutex_init(&hdev->lock);
1681 hdev->suspended = true;
1683 core->ops = &venus_hfi_ops;
1685 ret = venus_interface_queues_init(hdev);
1698 void venus_hfi_queues_reinit(struct venus_core *core)
1700 struct venus_hfi_device *hdev = to_hfi_priv(core);
1701 struct hfi_queue_table_header *tbl_hdr;
1702 struct iface_queue *queue;
1703 struct hfi_sfr *sfr;
1706 mutex_lock(&hdev->lock);
1708 for (i = 0; i < IFACEQ_NUM; i++) {
1709 queue = &hdev->queues[i];
1711 IFACEQ_GET_QHDR_START_ADDR(hdev->ifaceq_table.kva, i);
1713 venus_set_qhdr_defaults(queue->qhdr);
1715 queue->qhdr->start_addr = queue->qmem.da;
1717 if (i == IFACEQ_CMD_IDX)
1718 queue->qhdr->type |= HFI_HOST_TO_CTRL_CMD_Q;
1719 else if (i == IFACEQ_MSG_IDX)
1720 queue->qhdr->type |= HFI_CTRL_TO_HOST_MSG_Q;
1721 else if (i == IFACEQ_DBG_IDX)
1722 queue->qhdr->type |= HFI_CTRL_TO_HOST_DBG_Q;
1725 tbl_hdr = hdev->ifaceq_table.kva;
1726 tbl_hdr->version = 0;
1727 tbl_hdr->size = IFACEQ_TABLE_SIZE;
1728 tbl_hdr->qhdr0_offset = sizeof(struct hfi_queue_table_header);
1729 tbl_hdr->qhdr_size = sizeof(struct hfi_queue_header);
1730 tbl_hdr->num_q = IFACEQ_NUM;
1731 tbl_hdr->num_active_q = IFACEQ_NUM;
1734 * Set receive request to zero on debug queue as there is no
1735 * need of interrupt from video hardware for debug messages
1737 queue = &hdev->queues[IFACEQ_DBG_IDX];
1738 queue->qhdr->rx_req = 0;
1740 sfr = hdev->sfr.kva;
1741 sfr->buf_size = ALIGNED_SFR_SIZE;
1743 /* ensure table and queue header structs are settled in memory */
1746 mutex_unlock(&hdev->lock);