6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
45 #include <asm/cacheflush.h>
47 #include <linux/clk.h>
48 #include <linux/clkdev.h>
49 #include <linux/delay.h>
50 #include <linux/device.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/i2c.h>
53 #include <linux/interrupt.h>
54 #include <linux/mfd/syscon.h>
55 #include <linux/module.h>
56 #include <linux/omap-iommu.h>
57 #include <linux/platform_device.h>
58 #include <linux/property.h>
59 #include <linux/regulator/consumer.h>
60 #include <linux/slab.h>
61 #include <linux/sched.h>
62 #include <linux/vmalloc.h>
64 #ifdef CONFIG_ARM_DMA_USE_IOMMU
65 #include <asm/dma-iommu.h>
68 #include <media/v4l2-common.h>
69 #include <media/v4l2-fwnode.h>
70 #include <media/v4l2-device.h>
71 #include <media/v4l2-mc.h>
76 #include "isppreview.h"
77 #include "ispresizer.h"
83 static unsigned int autoidle;
84 module_param(autoidle, int, 0444);
85 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
87 static void isp_save_ctx(struct isp_device *isp);
89 static void isp_restore_ctx(struct isp_device *isp);
91 static const struct isp_res_mapping isp_res_maps[] = {
93 .isp_rev = ISP_REVISION_2_0,
96 0x0000, /* base, len 0x0070 */
97 0x0400, /* ccp2, len 0x01f0 */
98 0x0600, /* ccdc, len 0x00a8 */
99 0x0a00, /* hist, len 0x0048 */
100 0x0c00, /* h3a, len 0x0060 */
101 0x0e00, /* preview, len 0x00a0 */
102 0x1000, /* resizer, len 0x00ac */
103 0x1200, /* sbl, len 0x00fc */
104 /* second MMIO area */
105 0x0000, /* csi2a, len 0x0170 */
106 0x0170, /* csiphy2, len 0x000c */
108 .phy_type = ISP_PHY_TYPE_3430,
111 .isp_rev = ISP_REVISION_15_0,
113 /* first MMIO area */
114 0x0000, /* base, len 0x0070 */
115 0x0400, /* ccp2, len 0x01f0 */
116 0x0600, /* ccdc, len 0x00a8 */
117 0x0a00, /* hist, len 0x0048 */
118 0x0c00, /* h3a, len 0x0060 */
119 0x0e00, /* preview, len 0x00a0 */
120 0x1000, /* resizer, len 0x00ac */
121 0x1200, /* sbl, len 0x00fc */
122 /* second MMIO area */
123 0x0000, /* csi2a, len 0x0170 (1st area) */
124 0x0170, /* csiphy2, len 0x000c */
125 0x01c0, /* csi2a, len 0x0040 (2nd area) */
126 0x0400, /* csi2c, len 0x0170 (1st area) */
127 0x0570, /* csiphy1, len 0x000c */
128 0x05c0, /* csi2c, len 0x0040 (2nd area) */
130 .phy_type = ISP_PHY_TYPE_3630,
134 /* Structure for saving/restoring ISP module registers */
135 static struct isp_reg isp_reg_list[] = {
136 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
137 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
138 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
143 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
144 * @isp: OMAP3 ISP device
146 * In order to force posting of pending writes, we need to write and
147 * readback the same register, in this case the revision register.
149 * See this link for reference:
150 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
152 void omap3isp_flush(struct isp_device *isp)
154 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
155 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
158 /* -----------------------------------------------------------------------------
162 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
164 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
168 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
169 ISPTCTRL_CTRL_DIVA_MASK,
170 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
173 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
174 ISPTCTRL_CTRL_DIVB_MASK,
175 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
180 static int isp_xclk_prepare(struct clk_hw *hw)
182 struct isp_xclk *xclk = to_isp_xclk(hw);
184 omap3isp_get(xclk->isp);
189 static void isp_xclk_unprepare(struct clk_hw *hw)
191 struct isp_xclk *xclk = to_isp_xclk(hw);
193 omap3isp_put(xclk->isp);
196 static int isp_xclk_enable(struct clk_hw *hw)
198 struct isp_xclk *xclk = to_isp_xclk(hw);
201 spin_lock_irqsave(&xclk->lock, flags);
202 isp_xclk_update(xclk, xclk->divider);
203 xclk->enabled = true;
204 spin_unlock_irqrestore(&xclk->lock, flags);
209 static void isp_xclk_disable(struct clk_hw *hw)
211 struct isp_xclk *xclk = to_isp_xclk(hw);
214 spin_lock_irqsave(&xclk->lock, flags);
215 isp_xclk_update(xclk, 0);
216 xclk->enabled = false;
217 spin_unlock_irqrestore(&xclk->lock, flags);
220 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
221 unsigned long parent_rate)
223 struct isp_xclk *xclk = to_isp_xclk(hw);
225 return parent_rate / xclk->divider;
228 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
232 if (*rate >= parent_rate) {
234 return ISPTCTRL_CTRL_DIV_BYPASS;
240 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
241 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
242 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
244 *rate = parent_rate / divider;
248 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
249 unsigned long *parent_rate)
251 isp_xclk_calc_divider(&rate, *parent_rate);
255 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
256 unsigned long parent_rate)
258 struct isp_xclk *xclk = to_isp_xclk(hw);
262 divider = isp_xclk_calc_divider(&rate, parent_rate);
264 spin_lock_irqsave(&xclk->lock, flags);
266 xclk->divider = divider;
268 isp_xclk_update(xclk, divider);
270 spin_unlock_irqrestore(&xclk->lock, flags);
272 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
273 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
277 static const struct clk_ops isp_xclk_ops = {
278 .prepare = isp_xclk_prepare,
279 .unprepare = isp_xclk_unprepare,
280 .enable = isp_xclk_enable,
281 .disable = isp_xclk_disable,
282 .recalc_rate = isp_xclk_recalc_rate,
283 .round_rate = isp_xclk_round_rate,
284 .set_rate = isp_xclk_set_rate,
287 static const char *isp_xclk_parent_name = "cam_mclk";
289 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
291 unsigned int idx = clkspec->args[0];
292 struct isp_device *isp = data;
294 if (idx >= ARRAY_SIZE(isp->xclks))
295 return ERR_PTR(-ENOENT);
297 return isp->xclks[idx].clk;
300 static int isp_xclk_init(struct isp_device *isp)
302 struct device_node *np = isp->dev->of_node;
303 struct clk_init_data init = {};
306 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
307 isp->xclks[i].clk = ERR_PTR(-EINVAL);
309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
310 struct isp_xclk *xclk = &isp->xclks[i];
313 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
315 spin_lock_init(&xclk->lock);
317 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
318 init.ops = &isp_xclk_ops;
319 init.parent_names = &isp_xclk_parent_name;
320 init.num_parents = 1;
322 xclk->hw.init = &init;
324 * The first argument is NULL in order to avoid circular
325 * reference, as this driver takes reference on the
326 * sensor subdevice modules and the sensors would take
327 * reference on this module through clk_get().
329 xclk->clk = clk_register(NULL, &xclk->hw);
330 if (IS_ERR(xclk->clk))
331 return PTR_ERR(xclk->clk);
335 of_clk_add_provider(np, isp_xclk_src_get, isp);
340 static void isp_xclk_cleanup(struct isp_device *isp)
342 struct device_node *np = isp->dev->of_node;
346 of_clk_del_provider(np);
348 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
349 struct isp_xclk *xclk = &isp->xclks[i];
351 if (!IS_ERR(xclk->clk))
352 clk_unregister(xclk->clk);
356 /* -----------------------------------------------------------------------------
361 * isp_enable_interrupts - Enable ISP interrupts.
362 * @isp: OMAP3 ISP device
364 static void isp_enable_interrupts(struct isp_device *isp)
366 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
367 | IRQ0ENABLE_CSIB_IRQ
368 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
369 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
370 | IRQ0ENABLE_CCDC_VD0_IRQ
371 | IRQ0ENABLE_CCDC_VD1_IRQ
372 | IRQ0ENABLE_HS_VS_IRQ
373 | IRQ0ENABLE_HIST_DONE_IRQ
374 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
375 | IRQ0ENABLE_H3A_AF_DONE_IRQ
376 | IRQ0ENABLE_PRV_DONE_IRQ
377 | IRQ0ENABLE_RSZ_DONE_IRQ;
379 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
380 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
384 * isp_disable_interrupts - Disable ISP interrupts.
385 * @isp: OMAP3 ISP device
387 static void isp_disable_interrupts(struct isp_device *isp)
389 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
393 * isp_core_init - ISP core settings
394 * @isp: OMAP3 ISP device
395 * @idle: Consider idle state.
397 * Set the power settings for the ISP and SBL bus and configure the HS/VS
400 * We need to configure the HS/VS interrupt source before interrupts get
401 * enabled, as the sensor might be free-running and the ISP default setting
402 * (HS edge) would put an unnecessary burden on the CPU.
404 static void isp_core_init(struct isp_device *isp, int idle)
407 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
408 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
409 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
410 ((isp->revision == ISP_REVISION_15_0) ?
411 ISP_SYSCONFIG_AUTOIDLE : 0),
412 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
415 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
416 ISPCTRL_SYNC_DETECT_VSRISE,
417 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
421 * Configure the bridge and lane shifter. Valid inputs are
423 * CCDC_INPUT_PARALLEL: Parallel interface
424 * CCDC_INPUT_CSI2A: CSI2a receiver
425 * CCDC_INPUT_CCP2B: CCP2b receiver
426 * CCDC_INPUT_CSI2C: CSI2c receiver
428 * The bridge and lane shifter are configured according to the selected input
429 * and the ISP platform data.
431 void omap3isp_configure_bridge(struct isp_device *isp,
432 enum ccdc_input_entity input,
433 const struct isp_parallel_cfg *parcfg,
434 unsigned int shift, unsigned int bridge)
438 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
439 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
440 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
441 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
442 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
443 ispctrl_val |= bridge;
446 case CCDC_INPUT_PARALLEL:
447 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
449 shift += parcfg->data_lane_shift;
452 case CCDC_INPUT_CSI2A:
453 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
456 case CCDC_INPUT_CCP2B:
457 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
460 case CCDC_INPUT_CSI2C:
461 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
468 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
470 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
473 void omap3isp_hist_dma_done(struct isp_device *isp)
475 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
476 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
477 /* Histogram cannot be enabled in this frame anymore */
478 atomic_set(&isp->isp_hist.buf_err, 1);
480 "hist: Out of synchronization with CCDC. Ignoring next buffer.\n");
484 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
486 static const char *name[] = {
505 "CCDC_LSC_PREFETCH_COMPLETED",
506 "CCDC_LSC_PREFETCH_ERROR",
522 dev_dbg(isp->dev, "ISP IRQ: ");
524 for (i = 0; i < ARRAY_SIZE(name); i++) {
525 if ((1 << i) & irqstatus)
526 printk(KERN_CONT "%s ", name[i]);
528 printk(KERN_CONT "\n");
531 static void isp_isr_sbl(struct isp_device *isp)
533 struct device *dev = isp->dev;
534 struct isp_pipeline *pipe;
538 * Handle shared buffer logic overflows for video buffers.
539 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
541 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
542 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
543 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
546 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
548 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
549 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
554 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
555 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
560 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
561 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
566 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
567 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
572 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
573 | ISPSBL_PCR_RSZ2_WBL_OVF
574 | ISPSBL_PCR_RSZ3_WBL_OVF
575 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
576 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
581 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
582 omap3isp_stat_sbl_overflow(&isp->isp_af);
584 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
585 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
589 * isp_isr - Interrupt Service Routine for Camera ISP module.
590 * @irq: Not used currently.
591 * @_isp: Pointer to the OMAP3 ISP device
593 * Handles the corresponding callback if plugged in.
595 static irqreturn_t isp_isr(int irq, void *_isp)
597 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
598 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
599 IRQ0STATUS_CCDC_VD0_IRQ |
600 IRQ0STATUS_CCDC_VD1_IRQ |
601 IRQ0STATUS_HS_VS_IRQ;
602 struct isp_device *isp = _isp;
605 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
606 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
610 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
611 omap3isp_csi2_isr(&isp->isp_csi2a);
613 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
614 omap3isp_ccp2_isr(&isp->isp_ccp2);
616 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
617 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
618 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
619 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
620 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
621 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
622 omap3isp_stat_isr_frame_sync(&isp->isp_af);
623 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
626 if (irqstatus & ccdc_events)
627 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
629 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
630 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
631 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
632 omap3isp_preview_isr(&isp->isp_prev);
635 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
636 omap3isp_resizer_isr(&isp->isp_res);
638 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
639 omap3isp_stat_isr(&isp->isp_aewb);
641 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_af);
644 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
645 omap3isp_stat_isr(&isp->isp_hist);
649 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
650 isp_isr_dbg(isp, irqstatus);
656 static const struct media_device_ops isp_media_ops = {
657 .link_notify = v4l2_pipeline_link_notify,
660 /* -----------------------------------------------------------------------------
661 * Pipeline stream management
665 * isp_pipeline_enable - Enable streaming on a pipeline
666 * @pipe: ISP pipeline
667 * @mode: Stream mode (single shot or continuous)
669 * Walk the entities chain starting at the pipeline output video node and start
670 * all modules in the chain in the given mode.
672 * Return 0 if successful, or the return value of the failed video::s_stream
673 * operation otherwise.
675 static int isp_pipeline_enable(struct isp_pipeline *pipe,
676 enum isp_pipeline_stream_state mode)
678 struct isp_device *isp = pipe->output->isp;
679 struct media_entity *entity;
680 struct media_pad *pad;
681 struct v4l2_subdev *subdev;
685 /* Refuse to start streaming if an entity included in the pipeline has
686 * crashed. This check must be performed before the loop below to avoid
687 * starting entities if the pipeline won't start anyway (those entities
688 * would then likely fail to stop, making the problem worse).
690 if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
693 spin_lock_irqsave(&pipe->lock, flags);
694 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
695 spin_unlock_irqrestore(&pipe->lock, flags);
697 pipe->do_propagation = false;
699 entity = &pipe->output->video.entity;
701 pad = &entity->pads[0];
702 if (!(pad->flags & MEDIA_PAD_FL_SINK))
705 pad = media_entity_remote_pad(pad);
706 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
709 entity = pad->entity;
710 subdev = media_entity_to_v4l2_subdev(entity);
712 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
713 if (ret < 0 && ret != -ENOIOCTLCMD)
716 if (subdev == &isp->isp_ccdc.subdev) {
717 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
719 v4l2_subdev_call(&isp->isp_af.subdev, video,
721 v4l2_subdev_call(&isp->isp_hist.subdev, video,
723 pipe->do_propagation = true;
726 /* Stop at the first external sub-device. */
727 if (subdev->dev != isp->dev)
734 static int isp_pipeline_wait_resizer(struct isp_device *isp)
736 return omap3isp_resizer_busy(&isp->isp_res);
739 static int isp_pipeline_wait_preview(struct isp_device *isp)
741 return omap3isp_preview_busy(&isp->isp_prev);
744 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
746 return omap3isp_stat_busy(&isp->isp_af)
747 || omap3isp_stat_busy(&isp->isp_aewb)
748 || omap3isp_stat_busy(&isp->isp_hist)
749 || omap3isp_ccdc_busy(&isp->isp_ccdc);
752 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
754 static int isp_pipeline_wait(struct isp_device *isp,
755 int(*busy)(struct isp_device *isp))
757 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
759 while (!time_after(jiffies, timeout)) {
768 * isp_pipeline_disable - Disable streaming on a pipeline
769 * @pipe: ISP pipeline
771 * Walk the entities chain starting at the pipeline output video node and stop
772 * all modules in the chain. Wait synchronously for the modules to be stopped if
775 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
776 * can't be stopped (in which case a software reset of the ISP is probably
779 static int isp_pipeline_disable(struct isp_pipeline *pipe)
781 struct isp_device *isp = pipe->output->isp;
782 struct media_entity *entity;
783 struct media_pad *pad;
784 struct v4l2_subdev *subdev;
789 * We need to stop all the modules after CCDC first or they'll
790 * never stop since they may not get a full frame from CCDC.
792 entity = &pipe->output->video.entity;
794 pad = &entity->pads[0];
795 if (!(pad->flags & MEDIA_PAD_FL_SINK))
798 pad = media_entity_remote_pad(pad);
799 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
802 entity = pad->entity;
803 subdev = media_entity_to_v4l2_subdev(entity);
805 if (subdev == &isp->isp_ccdc.subdev) {
806 v4l2_subdev_call(&isp->isp_aewb.subdev,
808 v4l2_subdev_call(&isp->isp_af.subdev,
810 v4l2_subdev_call(&isp->isp_hist.subdev,
814 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
816 if (subdev == &isp->isp_res.subdev)
817 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
818 else if (subdev == &isp->isp_prev.subdev)
819 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
820 else if (subdev == &isp->isp_ccdc.subdev)
821 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
823 /* Handle stop failures. An entity that fails to stop can
824 * usually just be restarted. Flag the stop failure nonetheless
825 * to trigger an ISP reset the next time the device is released,
828 * The preview engine is a special case. A failure to stop can
829 * mean a hardware crash. When that happens the preview engine
830 * won't respond to read/write operations on the L4 bus anymore,
831 * resulting in a bus fault and a kernel oops next time it gets
832 * accessed. Mark it as crashed to prevent pipelines including
833 * it from being started.
836 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
837 isp->stop_failure = true;
838 if (subdev == &isp->isp_prev.subdev)
839 media_entity_enum_set(&isp->crashed,
841 failure = -ETIMEDOUT;
844 /* Stop at the first external sub-device. */
845 if (subdev->dev != isp->dev)
853 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
854 * @pipe: ISP pipeline
855 * @state: Stream state (stopped, single shot or continuous)
857 * Set the pipeline to the given stream state. Pipelines can be started in
858 * single-shot or continuous mode.
860 * Return 0 if successful, or the return value of the failed video::s_stream
861 * operation otherwise. The pipeline state is not updated when the operation
862 * fails, except when stopping the pipeline.
864 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
865 enum isp_pipeline_stream_state state)
869 if (state == ISP_PIPELINE_STREAM_STOPPED)
870 ret = isp_pipeline_disable(pipe);
872 ret = isp_pipeline_enable(pipe, state);
874 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
875 pipe->stream_state = state;
881 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
882 * @pipe: ISP pipeline
884 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
885 * erroneous and makes sure no new buffer can be queued. This function is called
886 * when a fatal error that prevents any further operation on the pipeline
889 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
892 omap3isp_video_cancel_stream(pipe->input);
894 omap3isp_video_cancel_stream(pipe->output);
898 * isp_pipeline_resume - Resume streaming on a pipeline
899 * @pipe: ISP pipeline
901 * Resume video output and input and re-enable pipeline.
903 static void isp_pipeline_resume(struct isp_pipeline *pipe)
905 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
907 omap3isp_video_resume(pipe->output, !singleshot);
909 omap3isp_video_resume(pipe->input, 0);
910 isp_pipeline_enable(pipe, pipe->stream_state);
914 * isp_pipeline_suspend - Suspend streaming on a pipeline
915 * @pipe: ISP pipeline
919 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
921 isp_pipeline_disable(pipe);
925 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
927 * @me: ISP module's media entity
929 * Returns 1 if the entity has an enabled link to the output video node or 0
930 * otherwise. It's true only while pipeline can have no more than one output
933 static int isp_pipeline_is_last(struct media_entity *me)
935 struct isp_pipeline *pipe;
936 struct media_pad *pad;
940 pipe = to_isp_pipeline(me);
941 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
943 pad = media_entity_remote_pad(&pipe->output->pad);
944 return pad->entity == me;
948 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
949 * @me: ISP module's media entity
951 * Suspend the whole pipeline if module's entity has an enabled link to the
952 * output video node. It works only while pipeline can have no more than one
955 static void isp_suspend_module_pipeline(struct media_entity *me)
957 if (isp_pipeline_is_last(me))
958 isp_pipeline_suspend(to_isp_pipeline(me));
962 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
963 * @me: ISP module's media entity
965 * Resume the whole pipeline if module's entity has an enabled link to the
966 * output video node. It works only while pipeline can have no more than one
969 static void isp_resume_module_pipeline(struct media_entity *me)
971 if (isp_pipeline_is_last(me))
972 isp_pipeline_resume(to_isp_pipeline(me));
976 * isp_suspend_modules - Suspend ISP submodules.
977 * @isp: OMAP3 ISP device
979 * Returns 0 if suspend left in idle state all the submodules properly,
980 * or returns 1 if a general Reset is required to suspend the submodules.
982 static int __maybe_unused isp_suspend_modules(struct isp_device *isp)
984 unsigned long timeout;
986 omap3isp_stat_suspend(&isp->isp_aewb);
987 omap3isp_stat_suspend(&isp->isp_af);
988 omap3isp_stat_suspend(&isp->isp_hist);
989 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
990 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
991 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
992 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
993 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
995 timeout = jiffies + ISP_STOP_TIMEOUT;
996 while (omap3isp_stat_busy(&isp->isp_af)
997 || omap3isp_stat_busy(&isp->isp_aewb)
998 || omap3isp_stat_busy(&isp->isp_hist)
999 || omap3isp_preview_busy(&isp->isp_prev)
1000 || omap3isp_resizer_busy(&isp->isp_res)
1001 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1002 if (time_after(jiffies, timeout)) {
1003 dev_info(isp->dev, "can't stop modules.\n");
1013 * isp_resume_modules - Resume ISP submodules.
1014 * @isp: OMAP3 ISP device
1016 static void __maybe_unused isp_resume_modules(struct isp_device *isp)
1018 omap3isp_stat_resume(&isp->isp_aewb);
1019 omap3isp_stat_resume(&isp->isp_af);
1020 omap3isp_stat_resume(&isp->isp_hist);
1021 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1022 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1023 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1024 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1025 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1029 * isp_reset - Reset ISP with a timeout wait for idle.
1030 * @isp: OMAP3 ISP device
1032 static int isp_reset(struct isp_device *isp)
1034 unsigned long timeout = 0;
1037 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1038 | ISP_SYSCONFIG_SOFTRESET,
1039 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1040 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1041 ISP_SYSSTATUS) & 0x1)) {
1042 if (timeout++ > 10000) {
1043 dev_alert(isp->dev, "cannot reset ISP\n");
1049 isp->stop_failure = false;
1050 media_entity_enum_zero(&isp->crashed);
1055 * isp_save_context - Saves the values of the ISP module registers.
1056 * @isp: OMAP3 ISP device
1057 * @reg_list: Structure containing pairs of register address and value to
1061 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1063 struct isp_reg *next = reg_list;
1065 for (; next->reg != ISP_TOK_TERM; next++)
1066 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1070 * isp_restore_context - Restores the values of the ISP module registers.
1071 * @isp: OMAP3 ISP device
1072 * @reg_list: Structure containing pairs of register address and value to
1076 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1078 struct isp_reg *next = reg_list;
1080 for (; next->reg != ISP_TOK_TERM; next++)
1081 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1085 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1086 * @isp: OMAP3 ISP device
1088 * Routine for saving the context of each module in the ISP.
1089 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1091 static void isp_save_ctx(struct isp_device *isp)
1093 isp_save_context(isp, isp_reg_list);
1094 omap_iommu_save_ctx(isp->dev);
1098 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1099 * @isp: OMAP3 ISP device
1101 * Routine for restoring the context of each module in the ISP.
1102 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1104 static void isp_restore_ctx(struct isp_device *isp)
1106 isp_restore_context(isp, isp_reg_list);
1107 omap_iommu_restore_ctx(isp->dev);
1108 omap3isp_ccdc_restore_context(isp);
1109 omap3isp_preview_restore_context(isp);
1112 /* -----------------------------------------------------------------------------
1113 * SBL resources management
1115 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1116 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1117 OMAP3_ISP_SBL_PREVIEW_READ | \
1118 OMAP3_ISP_SBL_RESIZER_READ)
1119 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1120 OMAP3_ISP_SBL_CSI2A_WRITE | \
1121 OMAP3_ISP_SBL_CSI2C_WRITE | \
1122 OMAP3_ISP_SBL_CCDC_WRITE | \
1123 OMAP3_ISP_SBL_PREVIEW_WRITE)
1125 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1129 isp->sbl_resources |= res;
1131 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1132 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1134 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1135 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1137 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1138 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1140 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1141 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1143 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1144 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1146 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1147 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1149 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1152 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1156 isp->sbl_resources &= ~res;
1158 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1159 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1161 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1162 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1164 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1165 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1167 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1168 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1170 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1171 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1173 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1174 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1176 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1180 * isp_module_sync_idle - Helper to sync module with its idle state
1181 * @me: ISP submodule's media entity
1182 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1183 * @stopping: flag which tells module wants to stop
1185 * This function checks if ISP submodule needs to wait for next interrupt. If
1186 * yes, makes the caller to sleep while waiting for such event.
1188 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1191 struct isp_pipeline *pipe = to_isp_pipeline(me);
1193 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1194 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1195 !isp_pipeline_ready(pipe)))
1199 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1200 * scenario. We'll call it here to avoid race conditions.
1202 atomic_set(stopping, 1);
1206 * If module is the last one, it's writing to memory. In this case,
1207 * it's necessary to check if the module is already paused due to
1208 * DMA queue underrun or if it has to wait for next interrupt to be
1210 * If it isn't the last one, the function won't sleep but *stopping
1211 * will still be set to warn next submodule caller's interrupt the
1212 * module wants to be idle.
1214 if (isp_pipeline_is_last(me)) {
1215 struct isp_video *video = pipe->output;
1216 unsigned long flags;
1217 spin_lock_irqsave(&video->irqlock, flags);
1218 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1219 spin_unlock_irqrestore(&video->irqlock, flags);
1220 atomic_set(stopping, 0);
1224 spin_unlock_irqrestore(&video->irqlock, flags);
1225 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1226 msecs_to_jiffies(1000))) {
1227 atomic_set(stopping, 0);
1237 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1238 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1239 * @stopping: flag which tells module wants to stop
1241 * This function checks if ISP submodule was stopping. In case of yes, it
1242 * notices the caller by setting stopping to 0 and waking up the wait queue.
1243 * Returns 1 if it was stopping or 0 otherwise.
1245 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1248 if (atomic_cmpxchg(stopping, 1, 0)) {
1256 /* --------------------------------------------------------------------------
1260 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1261 ISPCTRL_HIST_CLK_EN | \
1262 ISPCTRL_RSZ_CLK_EN | \
1263 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1264 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1266 static void __isp_subclk_update(struct isp_device *isp)
1270 /* AEWB and AF share the same clock. */
1271 if (isp->subclk_resources &
1272 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1273 clk |= ISPCTRL_H3A_CLK_EN;
1275 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1276 clk |= ISPCTRL_HIST_CLK_EN;
1278 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1279 clk |= ISPCTRL_RSZ_CLK_EN;
1281 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1284 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1285 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1287 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1288 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1290 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1291 ISPCTRL_CLKS_MASK, clk);
1294 void omap3isp_subclk_enable(struct isp_device *isp,
1295 enum isp_subclk_resource res)
1297 isp->subclk_resources |= res;
1299 __isp_subclk_update(isp);
1302 void omap3isp_subclk_disable(struct isp_device *isp,
1303 enum isp_subclk_resource res)
1305 isp->subclk_resources &= ~res;
1307 __isp_subclk_update(isp);
1311 * isp_enable_clocks - Enable ISP clocks
1312 * @isp: OMAP3 ISP device
1314 * Return 0 if successful, or clk_prepare_enable return value if any of them
1317 static int isp_enable_clocks(struct isp_device *isp)
1322 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1324 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1325 goto out_clk_enable_ick;
1327 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1329 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1330 goto out_clk_enable_mclk;
1332 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1334 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1335 goto out_clk_enable_mclk;
1337 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1338 if (rate != CM_CAM_MCLK_HZ)
1339 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1341 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1342 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1344 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1345 goto out_clk_enable_csi2_fclk;
1349 out_clk_enable_csi2_fclk:
1350 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1351 out_clk_enable_mclk:
1352 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1358 * isp_disable_clocks - Disable ISP clocks
1359 * @isp: OMAP3 ISP device
1361 static void isp_disable_clocks(struct isp_device *isp)
1363 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1364 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1365 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1368 static const char *isp_clocks[] = {
1375 static int isp_get_clocks(struct isp_device *isp)
1380 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1381 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1383 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1384 return PTR_ERR(clk);
1387 isp->clock[i] = clk;
1394 * omap3isp_get - Acquire the ISP resource.
1396 * Initializes the clocks for the first acquire.
1398 * Increment the reference count on the ISP. If the first reference is taken,
1399 * enable clocks and power-up all submodules.
1401 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1403 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1405 struct isp_device *__isp = isp;
1410 mutex_lock(&isp->isp_mutex);
1411 if (isp->ref_count > 0)
1414 if (isp_enable_clocks(isp) < 0) {
1419 /* We don't want to restore context before saving it! */
1420 if (isp->has_context)
1421 isp_restore_ctx(isp);
1424 isp_enable_interrupts(isp);
1429 mutex_unlock(&isp->isp_mutex);
1434 struct isp_device *omap3isp_get(struct isp_device *isp)
1436 return __omap3isp_get(isp, true);
1440 * omap3isp_put - Release the ISP
1442 * Decrement the reference count on the ISP. If the last reference is released,
1443 * power-down all submodules, disable clocks and free temporary buffers.
1445 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1450 mutex_lock(&isp->isp_mutex);
1451 BUG_ON(isp->ref_count == 0);
1452 if (--isp->ref_count == 0) {
1453 isp_disable_interrupts(isp);
1456 isp->has_context = 1;
1458 /* Reset the ISP if an entity has failed to stop. This is the
1459 * only way to recover from such conditions.
1461 if (!media_entity_enum_empty(&isp->crashed) ||
1464 isp_disable_clocks(isp);
1466 mutex_unlock(&isp->isp_mutex);
1469 void omap3isp_put(struct isp_device *isp)
1471 __omap3isp_put(isp, true);
1474 /* --------------------------------------------------------------------------
1475 * Platform device driver
1479 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1480 * @isp: OMAP3 ISP device
1482 #define ISP_PRINT_REGISTER(isp, name)\
1483 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1484 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1485 #define SBL_PRINT_REGISTER(isp, name)\
1486 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1487 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1489 void omap3isp_print_status(struct isp_device *isp)
1491 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1493 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1494 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1495 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1496 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1497 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1498 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1499 ISP_PRINT_REGISTER(isp, CTRL);
1500 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1501 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1502 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1503 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1504 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1505 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1506 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1507 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1509 SBL_PRINT_REGISTER(isp, PCR);
1510 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1512 dev_dbg(isp->dev, "--------------------------------------------\n");
1518 * Power management support.
1520 * As the ISP can't properly handle an input video stream interruption on a non
1521 * frame boundary, the ISP pipelines need to be stopped before sensors get
1522 * suspended. However, as suspending the sensors can require a running clock,
1523 * which can be provided by the ISP, the ISP can't be completely suspended
1524 * before the sensor.
1526 * To solve this problem power management support is split into prepare/complete
1527 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1528 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1529 * resume(), and the the pipelines are restarted in complete().
1531 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1534 static int isp_pm_prepare(struct device *dev)
1536 struct isp_device *isp = dev_get_drvdata(dev);
1539 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1541 if (isp->ref_count == 0)
1544 reset = isp_suspend_modules(isp);
1545 isp_disable_interrupts(isp);
1553 static int isp_pm_suspend(struct device *dev)
1555 struct isp_device *isp = dev_get_drvdata(dev);
1557 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1560 isp_disable_clocks(isp);
1565 static int isp_pm_resume(struct device *dev)
1567 struct isp_device *isp = dev_get_drvdata(dev);
1569 if (isp->ref_count == 0)
1572 return isp_enable_clocks(isp);
1575 static void isp_pm_complete(struct device *dev)
1577 struct isp_device *isp = dev_get_drvdata(dev);
1579 if (isp->ref_count == 0)
1582 isp_restore_ctx(isp);
1583 isp_enable_interrupts(isp);
1584 isp_resume_modules(isp);
1589 #define isp_pm_prepare NULL
1590 #define isp_pm_suspend NULL
1591 #define isp_pm_resume NULL
1592 #define isp_pm_complete NULL
1594 #endif /* CONFIG_PM */
1596 static void isp_unregister_entities(struct isp_device *isp)
1598 media_device_unregister(&isp->media_dev);
1600 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1601 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1602 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1603 omap3isp_preview_unregister_entities(&isp->isp_prev);
1604 omap3isp_resizer_unregister_entities(&isp->isp_res);
1605 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1606 omap3isp_stat_unregister_entities(&isp->isp_af);
1607 omap3isp_stat_unregister_entities(&isp->isp_hist);
1609 v4l2_device_unregister(&isp->v4l2_dev);
1610 media_device_cleanup(&isp->media_dev);
1613 static int isp_link_entity(
1614 struct isp_device *isp, struct media_entity *entity,
1615 enum isp_interface_type interface)
1617 struct media_entity *input;
1622 /* Connect the sensor to the correct interface module.
1623 * Parallel sensors are connected directly to the CCDC, while
1624 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1625 * receiver through CSIPHY1 or CSIPHY2.
1627 switch (interface) {
1628 case ISP_INTERFACE_PARALLEL:
1629 input = &isp->isp_ccdc.subdev.entity;
1630 pad = CCDC_PAD_SINK;
1634 case ISP_INTERFACE_CSI2A_PHY2:
1635 input = &isp->isp_csi2a.subdev.entity;
1636 pad = CSI2_PAD_SINK;
1637 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1640 case ISP_INTERFACE_CCP2B_PHY1:
1641 case ISP_INTERFACE_CCP2B_PHY2:
1642 input = &isp->isp_ccp2.subdev.entity;
1643 pad = CCP2_PAD_SINK;
1647 case ISP_INTERFACE_CSI2C_PHY1:
1648 input = &isp->isp_csi2c.subdev.entity;
1649 pad = CSI2_PAD_SINK;
1650 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1654 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1660 * Not all interfaces are available on all revisions of the
1661 * ISP. The sub-devices of those interfaces aren't initialised
1662 * in such a case. Check this by ensuring the num_pads is
1665 if (!input->num_pads) {
1666 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1671 for (i = 0; i < entity->num_pads; i++) {
1672 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1675 if (i == entity->num_pads) {
1676 dev_err(isp->dev, "%s: no source pad in external entity %s\n",
1677 __func__, entity->name);
1681 return media_create_pad_link(entity, i, input, pad, flags);
1684 static int isp_register_entities(struct isp_device *isp)
1688 isp->media_dev.dev = isp->dev;
1689 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1690 sizeof(isp->media_dev.model));
1691 isp->media_dev.hw_revision = isp->revision;
1692 isp->media_dev.ops = &isp_media_ops;
1693 media_device_init(&isp->media_dev);
1695 isp->v4l2_dev.mdev = &isp->media_dev;
1696 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1698 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1703 /* Register internal entities */
1704 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1708 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1712 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1716 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1721 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1725 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1729 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1733 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1739 isp_unregister_entities(isp);
1745 * isp_create_links() - Create links for internal and external ISP entities
1746 * @isp : Pointer to ISP device
1748 * This function creates all links between ISP internal and external entities.
1750 * Return: A negative error code on failure or zero on success. Possible error
1751 * codes are those returned by media_create_pad_link().
1753 static int isp_create_links(struct isp_device *isp)
1757 /* Create links between entities and video nodes. */
1758 ret = media_create_pad_link(
1759 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1760 &isp->isp_csi2a.video_out.video.entity, 0, 0);
1764 ret = media_create_pad_link(
1765 &isp->isp_ccp2.video_in.video.entity, 0,
1766 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
1770 ret = media_create_pad_link(
1771 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1772 &isp->isp_ccdc.video_out.video.entity, 0, 0);
1776 ret = media_create_pad_link(
1777 &isp->isp_prev.video_in.video.entity, 0,
1778 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1782 ret = media_create_pad_link(
1783 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1784 &isp->isp_prev.video_out.video.entity, 0, 0);
1788 ret = media_create_pad_link(
1789 &isp->isp_res.video_in.video.entity, 0,
1790 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1794 ret = media_create_pad_link(
1795 &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
1796 &isp->isp_res.video_out.video.entity, 0, 0);
1801 /* Create links between entities. */
1802 ret = media_create_pad_link(
1803 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1804 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1808 ret = media_create_pad_link(
1809 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1810 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1814 ret = media_create_pad_link(
1815 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1816 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1820 ret = media_create_pad_link(
1821 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1822 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1826 ret = media_create_pad_link(
1827 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1828 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1832 ret = media_create_pad_link(
1833 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1834 &isp->isp_aewb.subdev.entity, 0,
1835 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1839 ret = media_create_pad_link(
1840 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1841 &isp->isp_af.subdev.entity, 0,
1842 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1846 ret = media_create_pad_link(
1847 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1848 &isp->isp_hist.subdev.entity, 0,
1849 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1856 static void isp_cleanup_modules(struct isp_device *isp)
1858 omap3isp_h3a_aewb_cleanup(isp);
1859 omap3isp_h3a_af_cleanup(isp);
1860 omap3isp_hist_cleanup(isp);
1861 omap3isp_resizer_cleanup(isp);
1862 omap3isp_preview_cleanup(isp);
1863 omap3isp_ccdc_cleanup(isp);
1864 omap3isp_ccp2_cleanup(isp);
1865 omap3isp_csi2_cleanup(isp);
1866 omap3isp_csiphy_cleanup(isp);
1869 static int isp_initialize_modules(struct isp_device *isp)
1873 ret = omap3isp_csiphy_init(isp);
1875 dev_err(isp->dev, "CSI PHY initialization failed\n");
1879 ret = omap3isp_csi2_init(isp);
1881 dev_err(isp->dev, "CSI2 initialization failed\n");
1885 ret = omap3isp_ccp2_init(isp);
1887 if (ret != -EPROBE_DEFER)
1888 dev_err(isp->dev, "CCP2 initialization failed\n");
1892 ret = omap3isp_ccdc_init(isp);
1894 dev_err(isp->dev, "CCDC initialization failed\n");
1898 ret = omap3isp_preview_init(isp);
1900 dev_err(isp->dev, "Preview initialization failed\n");
1904 ret = omap3isp_resizer_init(isp);
1906 dev_err(isp->dev, "Resizer initialization failed\n");
1910 ret = omap3isp_hist_init(isp);
1912 dev_err(isp->dev, "Histogram initialization failed\n");
1916 ret = omap3isp_h3a_aewb_init(isp);
1918 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1919 goto error_h3a_aewb;
1922 ret = omap3isp_h3a_af_init(isp);
1924 dev_err(isp->dev, "H3A AF initialization failed\n");
1931 omap3isp_h3a_aewb_cleanup(isp);
1933 omap3isp_hist_cleanup(isp);
1935 omap3isp_resizer_cleanup(isp);
1937 omap3isp_preview_cleanup(isp);
1939 omap3isp_ccdc_cleanup(isp);
1941 omap3isp_ccp2_cleanup(isp);
1943 omap3isp_csi2_cleanup(isp);
1945 omap3isp_csiphy_cleanup(isp);
1950 static void isp_detach_iommu(struct isp_device *isp)
1952 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1953 arm_iommu_detach_device(isp->dev);
1954 arm_iommu_release_mapping(isp->mapping);
1955 isp->mapping = NULL;
1959 static int isp_attach_iommu(struct isp_device *isp)
1961 #ifdef CONFIG_ARM_DMA_USE_IOMMU
1962 struct dma_iommu_mapping *mapping;
1966 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
1967 * VAs. This will allocate a corresponding IOMMU domain.
1969 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
1970 if (IS_ERR(mapping)) {
1971 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
1972 return PTR_ERR(mapping);
1975 isp->mapping = mapping;
1977 /* Attach the ARM VA mapping to the device. */
1978 ret = arm_iommu_attach_device(isp->dev, mapping);
1980 dev_err(isp->dev, "failed to attach device to VA mapping\n");
1987 arm_iommu_release_mapping(isp->mapping);
1988 isp->mapping = NULL;
1996 * isp_remove - Remove ISP platform device
1997 * @pdev: Pointer to ISP platform device
2001 static int isp_remove(struct platform_device *pdev)
2003 struct isp_device *isp = platform_get_drvdata(pdev);
2005 v4l2_async_notifier_unregister(&isp->notifier);
2006 isp_unregister_entities(isp);
2007 isp_cleanup_modules(isp);
2008 isp_xclk_cleanup(isp);
2010 __omap3isp_get(isp, false);
2011 isp_detach_iommu(isp);
2012 __omap3isp_put(isp, false);
2014 media_entity_enum_cleanup(&isp->crashed);
2015 v4l2_async_notifier_cleanup(&isp->notifier);
2021 ISP_OF_PHY_PARALLEL = 0,
2026 static int isp_fwnode_parse(struct device *dev,
2027 struct v4l2_fwnode_endpoint *vep,
2028 struct v4l2_async_subdev *asd)
2030 struct isp_async_subdev *isd =
2031 container_of(asd, struct isp_async_subdev, asd);
2032 struct isp_bus_cfg *buscfg = &isd->bus;
2036 dev_dbg(dev, "parsing endpoint %pOF, interface %u\n",
2037 to_of_node(vep->base.local_fwnode), vep->base.port);
2039 switch (vep->base.port) {
2040 case ISP_OF_PHY_PARALLEL:
2041 buscfg->interface = ISP_INTERFACE_PARALLEL;
2042 buscfg->bus.parallel.data_lane_shift =
2043 vep->bus.parallel.data_shift;
2044 buscfg->bus.parallel.clk_pol =
2045 !!(vep->bus.parallel.flags
2046 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2047 buscfg->bus.parallel.hs_pol =
2048 !!(vep->bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2049 buscfg->bus.parallel.vs_pol =
2050 !!(vep->bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2051 buscfg->bus.parallel.fld_pol =
2052 !!(vep->bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2053 buscfg->bus.parallel.data_pol =
2054 !!(vep->bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2055 buscfg->bus.parallel.bt656 = vep->bus_type == V4L2_MBUS_BT656;
2058 case ISP_OF_PHY_CSIPHY1:
2059 case ISP_OF_PHY_CSIPHY2:
2060 switch (vep->bus_type) {
2061 case V4L2_MBUS_CCP2:
2062 case V4L2_MBUS_CSI1:
2063 dev_dbg(dev, "CSI-1/CCP-2 configuration\n");
2066 case V4L2_MBUS_CSI2:
2067 dev_dbg(dev, "CSI-2 configuration\n");
2071 dev_err(dev, "unsupported bus type %u\n",
2076 switch (vep->base.port) {
2077 case ISP_OF_PHY_CSIPHY1:
2079 buscfg->interface = ISP_INTERFACE_CCP2B_PHY1;
2081 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2083 case ISP_OF_PHY_CSIPHY2:
2085 buscfg->interface = ISP_INTERFACE_CCP2B_PHY2;
2087 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2091 buscfg->bus.ccp2.lanecfg.clk.pos =
2092 vep->bus.mipi_csi1.clock_lane;
2093 buscfg->bus.ccp2.lanecfg.clk.pol =
2094 vep->bus.mipi_csi1.lane_polarity[0];
2095 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2096 buscfg->bus.ccp2.lanecfg.clk.pol,
2097 buscfg->bus.ccp2.lanecfg.clk.pos);
2099 buscfg->bus.ccp2.lanecfg.data[0].pos =
2100 vep->bus.mipi_csi1.data_lane;
2101 buscfg->bus.ccp2.lanecfg.data[0].pol =
2102 vep->bus.mipi_csi1.lane_polarity[1];
2104 dev_dbg(dev, "data lane polarity %u, pos %u\n",
2105 buscfg->bus.ccp2.lanecfg.data[0].pol,
2106 buscfg->bus.ccp2.lanecfg.data[0].pos);
2108 buscfg->bus.ccp2.strobe_clk_pol =
2109 vep->bus.mipi_csi1.clock_inv;
2110 buscfg->bus.ccp2.phy_layer = vep->bus.mipi_csi1.strobe;
2111 buscfg->bus.ccp2.ccp2_mode =
2112 vep->bus_type == V4L2_MBUS_CCP2;
2113 buscfg->bus.ccp2.vp_clk_pol = 1;
2115 buscfg->bus.ccp2.crc = 1;
2117 buscfg->bus.csi2.lanecfg.clk.pos =
2118 vep->bus.mipi_csi2.clock_lane;
2119 buscfg->bus.csi2.lanecfg.clk.pol =
2120 vep->bus.mipi_csi2.lane_polarities[0];
2121 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2122 buscfg->bus.csi2.lanecfg.clk.pol,
2123 buscfg->bus.csi2.lanecfg.clk.pos);
2125 buscfg->bus.csi2.num_data_lanes =
2126 vep->bus.mipi_csi2.num_data_lanes;
2128 for (i = 0; i < buscfg->bus.csi2.num_data_lanes; i++) {
2129 buscfg->bus.csi2.lanecfg.data[i].pos =
2130 vep->bus.mipi_csi2.data_lanes[i];
2131 buscfg->bus.csi2.lanecfg.data[i].pol =
2132 vep->bus.mipi_csi2.lane_polarities[i + 1];
2134 "data lane %u polarity %u, pos %u\n", i,
2135 buscfg->bus.csi2.lanecfg.data[i].pol,
2136 buscfg->bus.csi2.lanecfg.data[i].pos);
2139 * FIXME: now we assume the CRC is always there.
2140 * Implement a way to obtain this information from the
2141 * sensor. Frame descriptors, perhaps?
2143 buscfg->bus.csi2.crc = 1;
2148 dev_warn(dev, "%pOF: invalid interface %u\n",
2149 to_of_node(vep->base.local_fwnode), vep->base.port);
2156 static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2158 struct isp_device *isp = container_of(async, struct isp_device,
2160 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2161 struct v4l2_subdev *sd;
2164 ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
2168 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2169 if (sd->notifier != &isp->notifier)
2172 ret = isp_link_entity(isp, &sd->entity,
2173 v4l2_subdev_to_bus_cfg(sd)->interface);
2178 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2182 return media_device_register(&isp->media_dev);
2185 static const struct v4l2_async_notifier_operations isp_subdev_notifier_ops = {
2186 .complete = isp_subdev_notifier_complete,
2190 * isp_probe - Probe ISP platform device
2191 * @pdev: Pointer to ISP platform device
2193 * Returns 0 if successful,
2194 * -ENOMEM if no memory available,
2195 * -ENODEV if no platform device resources found
2196 * or no space for remapping registers,
2197 * -EINVAL if couldn't install ISR,
2198 * or clk_get return error value.
2200 static int isp_probe(struct platform_device *pdev)
2202 struct isp_device *isp;
2203 struct resource *mem;
2207 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2209 dev_err(&pdev->dev, "could not allocate memory\n");
2213 ret = fwnode_property_read_u32(of_fwnode_handle(pdev->dev.of_node),
2214 "ti,phy-type", &isp->phy_type);
2218 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2220 if (IS_ERR(isp->syscon))
2221 return PTR_ERR(isp->syscon);
2223 ret = of_property_read_u32_index(pdev->dev.of_node,
2224 "syscon", 1, &isp->syscon_offset);
2228 isp->autoidle = autoidle;
2230 mutex_init(&isp->isp_mutex);
2231 spin_lock_init(&isp->stat_lock);
2233 ret = v4l2_async_notifier_parse_fwnode_endpoints(
2234 &pdev->dev, &isp->notifier, sizeof(struct isp_async_subdev),
2239 isp->dev = &pdev->dev;
2242 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2246 platform_set_drvdata(pdev, isp);
2249 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2250 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2254 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2255 * manually to read the revision before calling __omap3isp_get().
2257 * Start by mapping the ISP MMIO area, which is in two pieces.
2258 * The ISP IOMMU is in between. Map both now, and fill in the
2259 * ISP revision specific portions a little later in the
2262 for (i = 0; i < 2; i++) {
2263 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2265 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2266 isp->mmio_base[map_idx] =
2267 devm_ioremap_resource(isp->dev, mem);
2268 if (IS_ERR(isp->mmio_base[map_idx])) {
2269 ret = PTR_ERR(isp->mmio_base[map_idx]);
2274 ret = isp_get_clocks(isp);
2278 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2282 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2283 dev_info(isp->dev, "Revision %d.%d found\n",
2284 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2286 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2288 if (__omap3isp_get(isp, false) == NULL) {
2293 ret = isp_reset(isp);
2297 ret = isp_xclk_init(isp);
2301 /* Memory resources */
2302 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2303 if (isp->revision == isp_res_maps[m].isp_rev)
2306 if (m == ARRAY_SIZE(isp_res_maps)) {
2307 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2308 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2313 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2315 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2317 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2319 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2320 + isp_res_maps[m].offset[i];
2322 isp->mmio_hist_base_phys =
2323 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2326 ret = isp_attach_iommu(isp);
2328 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2333 ret = platform_get_irq(pdev, 0);
2335 dev_err(isp->dev, "No IRQ resource\n");
2341 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2342 "OMAP3 ISP", isp)) {
2343 dev_err(isp->dev, "Unable to request IRQ\n");
2349 ret = isp_initialize_modules(isp);
2353 ret = isp_register_entities(isp);
2357 ret = isp_create_links(isp);
2359 goto error_register_entities;
2361 isp->notifier.ops = &isp_subdev_notifier_ops;
2363 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2365 goto error_register_entities;
2367 isp_core_init(isp, 1);
2372 error_register_entities:
2373 isp_unregister_entities(isp);
2375 isp_cleanup_modules(isp);
2377 isp_detach_iommu(isp);
2379 isp_xclk_cleanup(isp);
2380 __omap3isp_put(isp, false);
2382 v4l2_async_notifier_cleanup(&isp->notifier);
2383 mutex_destroy(&isp->isp_mutex);
2388 static const struct dev_pm_ops omap3isp_pm_ops = {
2389 .prepare = isp_pm_prepare,
2390 .suspend = isp_pm_suspend,
2391 .resume = isp_pm_resume,
2392 .complete = isp_pm_complete,
2395 static struct platform_device_id omap3isp_id_table[] = {
2399 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2401 static const struct of_device_id omap3isp_of_table[] = {
2402 { .compatible = "ti,omap3-isp" },
2405 MODULE_DEVICE_TABLE(of, omap3isp_of_table);
2407 static struct platform_driver omap3isp_driver = {
2409 .remove = isp_remove,
2410 .id_table = omap3isp_id_table,
2413 .pm = &omap3isp_pm_ops,
2414 .of_match_table = omap3isp_of_table,
2418 module_platform_driver(omap3isp_driver);
2420 MODULE_AUTHOR("Nokia Corporation");
2421 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2422 MODULE_LICENSE("GPL");
2423 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);