drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2016 MediaTek Inc.
   4  * Author: PC Chen <pc.chen@mediatek.com>
   5  *         Tiffany Lin <tiffany.lin@mediatek.com>
   6  */
   7
   8 #include <linux/slab.h>
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/module.h>
  12 #include <linux/of_device.h>
  13 #include <linux/of.h>
  14 #include <linux/pm_runtime.h>
  15 #include <media/v4l2-event.h>
  16 #include <media/v4l2-mem2mem.h>
  17 #include <media/videobuf2-dma-contig.h>
  18 #include <media/v4l2-device.h>
  19
  20 #include "mtk_vcodec_drv.h"
  21 #include "mtk_vcodec_dec.h"
  22 #include "mtk_vcodec_dec_hw.h"
  23 #include "mtk_vcodec_dec_pm.h"
  24 #include "mtk_vcodec_intr.h"
  25 #include "mtk_vcodec_util.h"
  26 #include "mtk_vcodec_fw.h"
  27
  28 static int mtk_vcodec_get_hw_count(struct mtk_vcodec_dev *dev)
  29 {
  30         switch (dev->vdec_pdata->hw_arch) {
  31         case MTK_VDEC_PURE_SINGLE_CORE:
  32                 return MTK_VDEC_ONE_CORE;
  33         case MTK_VDEC_LAT_SINGLE_CORE:
  34                 return MTK_VDEC_ONE_LAT_ONE_CORE;
  35         default:
  36                 mtk_v4l2_err("hw arch %d not supported", dev->vdec_pdata->hw_arch);
  37                 return MTK_VDEC_NO_HW;
  38         }
  39 }
  40
  41 static irqreturn_t mtk_vcodec_dec_irq_handler(int irq, void *priv)
  42 {
  43         struct mtk_vcodec_dev *dev = priv;
  44         struct mtk_vcodec_ctx *ctx;
  45         u32 cg_status = 0;
  46         unsigned int dec_done_status = 0;
  47         void __iomem *vdec_misc_addr = dev->reg_base[VDEC_MISC] +
  48                                         VDEC_IRQ_CFG_REG;
  49
  50         ctx = mtk_vcodec_get_curr_ctx(dev, MTK_VDEC_CORE);
  51
  52         /* check if HW active or not */
  53         cg_status = readl(dev->reg_base[0]);
  54         if ((cg_status & VDEC_HW_ACTIVE) != 0) {
  55                 mtk_v4l2_err("DEC ISR, VDEC active is not 0x0 (0x%08x)",
  56                              cg_status);
  57                 return IRQ_HANDLED;
  58         }
  59
  60         dec_done_status = readl(vdec_misc_addr);
  61         ctx->irq_status = dec_done_status;
  62         if ((dec_done_status & MTK_VDEC_IRQ_STATUS_DEC_SUCCESS) !=
  63                 MTK_VDEC_IRQ_STATUS_DEC_SUCCESS)
  64                 return IRQ_HANDLED;
  65
  66         /* clear interrupt */
  67         writel((readl(vdec_misc_addr) | VDEC_IRQ_CFG),
  68                 dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
  69         writel((readl(vdec_misc_addr) & ~VDEC_IRQ_CLR),
  70                 dev->reg_base[VDEC_MISC] + VDEC_IRQ_CFG_REG);
  71
  72         wake_up_ctx(ctx, MTK_INST_IRQ_RECEIVED, 0);
  73
  74         mtk_v4l2_debug(3,
  75                         "mtk_vcodec_dec_irq_handler :wake up ctx %d, dec_done_status=%x",
  76                         ctx->id, dec_done_status);
  77
  78         return IRQ_HANDLED;
  79 }
  80
  81 static int mtk_vcodec_get_reg_bases(struct mtk_vcodec_dev *dev)
  82 {
  83         struct platform_device *pdev = dev->plat_dev;
  84         int reg_num, i;
  85
  86         /* Sizeof(u32) * 4 bytes for each register base. */
  87         reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg",
  88                                                   sizeof(u32) * 4);
  89         if (reg_num <= 0 || reg_num > NUM_MAX_VDEC_REG_BASE) {
  90                 dev_err(&pdev->dev, "Invalid register property size: %d\n", reg_num);
  91                 return -EINVAL;
  92         }
  93
  94         for (i = 0; i < reg_num; i++) {
  95                 dev->reg_base[i] = devm_platform_ioremap_resource(pdev, i);
  96                 if (IS_ERR(dev->reg_base[i]))
  97                         return PTR_ERR(dev->reg_base[i]);
  98
  99                 mtk_v4l2_debug(2, "reg[%d] base=%p", i, dev->reg_base[i]);
 100         }
 101
 102         return 0;
 103 }
 104
 105 static int mtk_vcodec_init_dec_resources(struct mtk_vcodec_dev *dev)
 106 {
 107         struct platform_device *pdev = dev->plat_dev;
 108         int ret;
 109
 110         ret = mtk_vcodec_get_reg_bases(dev);
 111         if (ret)
 112                 return ret;
 113
 114         if (dev->vdec_pdata->is_subdev_supported)
 115                 return 0;
 116
 117         dev->dec_irq = platform_get_irq(pdev, 0);
 118         if (dev->dec_irq < 0)
 119                 return dev->dec_irq;
 120
 121         irq_set_status_flags(dev->dec_irq, IRQ_NOAUTOEN);
 122         ret = devm_request_irq(&pdev->dev, dev->dec_irq,
 123                                mtk_vcodec_dec_irq_handler, 0, pdev->name, dev);
 124         if (ret) {
 125                 dev_err(&pdev->dev, "failed to install dev->dec_irq %d (%d)",
 126                         dev->dec_irq, ret);
 127                 return ret;
 128         }
 129
 130         ret = mtk_vcodec_init_dec_clk(pdev, &dev->pm);
 131         if (ret < 0) {
 132                 dev_err(&pdev->dev, "failed to get mt vcodec clock source");
 133                 return ret;
 134         }
 135
 136         pm_runtime_enable(&pdev->dev);
 137         return 0;
 138 }
 139
 140 static int fops_vcodec_open(struct file *file)
 141 {
 142         struct mtk_vcodec_dev *dev = video_drvdata(file);
 143         struct mtk_vcodec_ctx *ctx = NULL;
 144         int ret = 0, i, hw_count;
 145         struct vb2_queue *src_vq;
 146
 147         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 148         if (!ctx)
 149                 return -ENOMEM;
 150
 151         mutex_lock(&dev->dev_mutex);
 152         ctx->id = dev->id_counter++;
 153         v4l2_fh_init(&ctx->fh, video_devdata(file));
 154         file->private_data = &ctx->fh;
 155         v4l2_fh_add(&ctx->fh);
 156         INIT_LIST_HEAD(&ctx->list);
 157         ctx->dev = dev;
 158         if (ctx->dev->vdec_pdata->is_subdev_supported) {
 159                 hw_count = mtk_vcodec_get_hw_count(dev);
 160                 if (!hw_count || !dev->subdev_prob_done) {
 161                         ret = -EINVAL;
 162                         goto err_ctrls_setup;
 163                 }
 164
 165                 ret = dev->subdev_prob_done(dev);
 166                 if (ret)
 167                         goto err_ctrls_setup;
 168
 169                 for (i = 0; i < hw_count; i++)
 170                         init_waitqueue_head(&ctx->queue[i]);
 171         } else {
 172                 init_waitqueue_head(&ctx->queue[0]);
 173         }
 174         mutex_init(&ctx->lock);
 175
 176         ctx->type = MTK_INST_DECODER;
 177         ret = dev->vdec_pdata->ctrls_setup(ctx);
 178         if (ret) {
 179                 mtk_v4l2_err("Failed to setup mt vcodec controls");
 180                 goto err_ctrls_setup;
 181         }
 182         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev_dec, ctx,
 183                 &mtk_vcodec_dec_queue_init);
 184         if (IS_ERR((__force void *)ctx->m2m_ctx)) {
 185                 ret = PTR_ERR((__force void *)ctx->m2m_ctx);
 186                 mtk_v4l2_err("Failed to v4l2_m2m_ctx_init() (%d)",
 187                         ret);
 188                 goto err_m2m_ctx_init;
 189         }
 190         src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx,
 191                                 V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE);
 192         ctx->empty_flush_buf.vb.vb2_buf.vb2_queue = src_vq;
 193         mtk_vcodec_dec_set_default_params(ctx);
 194
 195         if (v4l2_fh_is_singular(&ctx->fh)) {
 196                 /*
 197                  * Does nothing if firmware was already loaded.
 198                  */
 199                 ret = mtk_vcodec_fw_load_firmware(dev->fw_handler);
 200                 if (ret < 0) {
 201                         /*
 202                          * Return 0 if downloading firmware successfully,
 203                          * otherwise it is failed
 204                          */
 205                         mtk_v4l2_err("failed to load firmware!");
 206                         goto err_load_fw;
 207                 }
 208
 209                 dev->dec_capability =
 210                         mtk_vcodec_fw_get_vdec_capa(dev->fw_handler);
 211                 mtk_v4l2_debug(0, "decoder capability %x", dev->dec_capability);
 212         }
 213
 214         list_add(&ctx->list, &dev->ctx_list);
 215
 216         mutex_unlock(&dev->dev_mutex);
 217         mtk_v4l2_debug(0, "%s decoder [%d]", dev_name(&dev->plat_dev->dev),
 218                         ctx->id);
 219         return ret;
 220
 221         /* Deinit when failure occurred */
 222 err_load_fw:
 223         v4l2_m2m_ctx_release(ctx->m2m_ctx);
 224 err_m2m_ctx_init:
 225         v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
 226 err_ctrls_setup:
 227         v4l2_fh_del(&ctx->fh);
 228         v4l2_fh_exit(&ctx->fh);
 229         kfree(ctx);
 230         mutex_unlock(&dev->dev_mutex);
 231
 232         return ret;
 233 }
 234
 235 static int fops_vcodec_release(struct file *file)
 236 {
 237         struct mtk_vcodec_dev *dev = video_drvdata(file);
 238         struct mtk_vcodec_ctx *ctx = fh_to_ctx(file->private_data);
 239
 240         mtk_v4l2_debug(0, "[%d] decoder", ctx->id);
 241         mutex_lock(&dev->dev_mutex);
 242
 243         /*
 244          * Call v4l2_m2m_ctx_release before mtk_vcodec_dec_release. First, it
 245          * makes sure the worker thread is not running after vdec_if_deinit.
 246          * Second, the decoder will be flushed and all the buffers will be
 247          * returned in stop_streaming.
 248          */
 249         v4l2_m2m_ctx_release(ctx->m2m_ctx);
 250         mtk_vcodec_dec_release(ctx);
 251
 252         v4l2_fh_del(&ctx->fh);
 253         v4l2_fh_exit(&ctx->fh);
 254         v4l2_ctrl_handler_free(&ctx->ctrl_hdl);
 255
 256         list_del_init(&ctx->list);
 257         kfree(ctx);
 258         mutex_unlock(&dev->dev_mutex);
 259         return 0;
 260 }
 261
 262 static const struct v4l2_file_operations mtk_vcodec_fops = {
 263         .owner          = THIS_MODULE,
 264         .open           = fops_vcodec_open,
 265         .release        = fops_vcodec_release,
 266         .poll           = v4l2_m2m_fop_poll,
 267         .unlocked_ioctl = video_ioctl2,
 268         .mmap           = v4l2_m2m_fop_mmap,
 269 };
 270
 271 static int mtk_vcodec_probe(struct platform_device *pdev)
 272 {
 273         struct mtk_vcodec_dev *dev;
 274         struct video_device *vfd_dec;
 275         phandle rproc_phandle;
 276         enum mtk_vcodec_fw_type fw_type;
 277         int i, ret;
 278
 279         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 280         if (!dev)
 281                 return -ENOMEM;
 282
 283         INIT_LIST_HEAD(&dev->ctx_list);
 284         dev->plat_dev = pdev;
 285
 286         dev->vdec_pdata = of_device_get_match_data(&pdev->dev);
 287         if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu",
 288                                   &rproc_phandle)) {
 289                 fw_type = VPU;
 290         } else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp",
 291                                          &rproc_phandle)) {
 292                 fw_type = SCP;
 293         } else {
 294                 mtk_v4l2_err("Could not get vdec IPI device");
 295                 return -ENODEV;
 296         }
 297         dma_set_max_seg_size(&pdev->dev, UINT_MAX);
 298
 299         dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER);
 300         if (IS_ERR(dev->fw_handler))
 301                 return PTR_ERR(dev->fw_handler);
 302
 303         ret = mtk_vcodec_init_dec_resources(dev);
 304         if (ret) {
 305                 dev_err(&pdev->dev, "Failed to init dec resources");
 306                 goto err_dec_pm;
 307         }
 308
 309         if (IS_VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch)) {
 310                 vdec_msg_queue_init_ctx(&dev->msg_queue_core_ctx, MTK_VDEC_CORE);
 311                 dev->core_workqueue =
 312                         alloc_ordered_workqueue("core-decoder",
 313                                                 WQ_MEM_RECLAIM | WQ_FREEZABLE);
 314                 if (!dev->core_workqueue) {
 315                         mtk_v4l2_err("Failed to create core workqueue");
 316                         ret = -EINVAL;
 317                         goto err_res;
 318                 }
 319         }
 320
 321         if (of_get_property(pdev->dev.of_node, "dma-ranges", NULL)) {
 322                 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(34));
 323                 if (ret) {
 324                         mtk_v4l2_err("Failed to set mask");
 325                         goto err_core_workq;
 326                 }
 327         }
 328
 329         for (i = 0; i < MTK_VDEC_HW_MAX; i++)
 330                 mutex_init(&dev->dec_mutex[i]);
 331         mutex_init(&dev->dev_mutex);
 332         spin_lock_init(&dev->irqlock);
 333
 334         snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s",
 335                 "[/MTK_V4L2_VDEC]");
 336
 337         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
 338         if (ret) {
 339                 mtk_v4l2_err("v4l2_device_register err=%d", ret);
 340                 goto err_core_workq;
 341         }
 342
 343         init_waitqueue_head(&dev->queue);
 344
 345         vfd_dec = video_device_alloc();
 346         if (!vfd_dec) {
 347                 mtk_v4l2_err("Failed to allocate video device");
 348                 ret = -ENOMEM;
 349                 goto err_dec_alloc;
 350         }
 351         vfd_dec->fops           = &mtk_vcodec_fops;
 352         vfd_dec->ioctl_ops      = &mtk_vdec_ioctl_ops;
 353         vfd_dec->release        = video_device_release;
 354         vfd_dec->lock           = &dev->dev_mutex;
 355         vfd_dec->v4l2_dev       = &dev->v4l2_dev;
 356         vfd_dec->vfl_dir        = VFL_DIR_M2M;
 357         vfd_dec->device_caps    = V4L2_CAP_VIDEO_M2M_MPLANE |
 358                         V4L2_CAP_STREAMING;
 359
 360         snprintf(vfd_dec->name, sizeof(vfd_dec->name), "%s",
 361                 MTK_VCODEC_DEC_NAME);
 362         video_set_drvdata(vfd_dec, dev);
 363         dev->vfd_dec = vfd_dec;
 364         platform_set_drvdata(pdev, dev);
 365
 366         dev->m2m_dev_dec = v4l2_m2m_init(&mtk_vdec_m2m_ops);
 367         if (IS_ERR((__force void *)dev->m2m_dev_dec)) {
 368                 mtk_v4l2_err("Failed to init mem2mem dec device");
 369                 ret = PTR_ERR((__force void *)dev->m2m_dev_dec);
 370                 goto err_dec_alloc;
 371         }
 372
 373         dev->decode_workqueue =
 374                 alloc_ordered_workqueue(MTK_VCODEC_DEC_NAME,
 375                         WQ_MEM_RECLAIM | WQ_FREEZABLE);
 376         if (!dev->decode_workqueue) {
 377                 mtk_v4l2_err("Failed to create decode workqueue");
 378                 ret = -EINVAL;
 379                 goto err_event_workq;
 380         }
 381
 382         if (dev->vdec_pdata->is_subdev_supported) {
 383                 ret = of_platform_populate(pdev->dev.of_node, NULL, NULL,
 384                                            &pdev->dev);
 385                 if (ret) {
 386                         mtk_v4l2_err("Main device of_platform_populate failed.");
 387                         goto err_reg_cont;
 388                 }
 389         }
 390
 391         ret = video_register_device(vfd_dec, VFL_TYPE_VIDEO, -1);
 392         if (ret) {
 393                 mtk_v4l2_err("Failed to register video device");
 394                 goto err_reg_cont;
 395         }
 396
 397         if (dev->vdec_pdata->uses_stateless_api) {
 398                 v4l2_disable_ioctl(vfd_dec, VIDIOC_DECODER_CMD);
 399                 v4l2_disable_ioctl(vfd_dec, VIDIOC_TRY_DECODER_CMD);
 400
 401                 dev->mdev_dec.dev = &pdev->dev;
 402                 strscpy(dev->mdev_dec.model, MTK_VCODEC_DEC_NAME,
 403                         sizeof(dev->mdev_dec.model));
 404
 405                 media_device_init(&dev->mdev_dec);
 406                 dev->mdev_dec.ops = &mtk_vcodec_media_ops;
 407                 dev->v4l2_dev.mdev = &dev->mdev_dec;
 408
 409                 ret = v4l2_m2m_register_media_controller(dev->m2m_dev_dec, dev->vfd_dec,
 410                                                          MEDIA_ENT_F_PROC_VIDEO_DECODER);
 411                 if (ret) {
 412                         mtk_v4l2_err("Failed to register media controller");
 413                         goto err_dec_mem_init;
 414                 }
 415
 416                 ret = media_device_register(&dev->mdev_dec);
 417                 if (ret) {
 418                         mtk_v4l2_err("Failed to register media device");
 419                         goto err_media_reg;
 420                 }
 421
 422                 mtk_v4l2_debug(0, "media registered as /dev/media%d", vfd_dec->minor);
 423         }
 424
 425         mtk_v4l2_debug(0, "decoder registered as /dev/video%d", vfd_dec->minor);
 426
 427         return 0;
 428
 429 err_media_reg:
 430         v4l2_m2m_unregister_media_controller(dev->m2m_dev_dec);
 431 err_dec_mem_init:
 432         video_unregister_device(vfd_dec);
 433 err_reg_cont:
 434         if (dev->vdec_pdata->uses_stateless_api)
 435                 media_device_cleanup(&dev->mdev_dec);
 436         destroy_workqueue(dev->decode_workqueue);
 437 err_event_workq:
 438         v4l2_m2m_release(dev->m2m_dev_dec);
 439 err_dec_alloc:
 440         v4l2_device_unregister(&dev->v4l2_dev);
 441 err_core_workq:
 442         if (IS_VDEC_LAT_ARCH(dev->vdec_pdata->hw_arch))
 443                 destroy_workqueue(dev->core_workqueue);
 444 err_res:
 445         pm_runtime_disable(dev->pm.dev);
 446 err_dec_pm:
 447         mtk_vcodec_fw_release(dev->fw_handler);
 448         return ret;
 449 }
 450
 451 static const struct of_device_id mtk_vcodec_match[] = {
 452         {
 453                 .compatible = "mediatek,mt8173-vcodec-dec",
 454                 .data = &mtk_vdec_8173_pdata,
 455         },
 456         {
 457                 .compatible = "mediatek,mt8183-vcodec-dec",
 458                 .data = &mtk_vdec_8183_pdata,
 459         },
 460         {
 461                 .compatible = "mediatek,mt8192-vcodec-dec",
 462                 .data = &mtk_lat_sig_core_pdata,
 463         },
 464         {
 465                 .compatible = "mediatek,mt8186-vcodec-dec",
 466                 .data = &mtk_vdec_single_core_pdata,
 467         },
 468         {},
 469 };
 470
 471 MODULE_DEVICE_TABLE(of, mtk_vcodec_match);
 472
 473 static int mtk_vcodec_dec_remove(struct platform_device *pdev)
 474 {
 475         struct mtk_vcodec_dev *dev = platform_get_drvdata(pdev);
 476
 477         destroy_workqueue(dev->decode_workqueue);
 478
 479         if (media_devnode_is_registered(dev->mdev_dec.devnode)) {
 480                 media_device_unregister(&dev->mdev_dec);
 481                 v4l2_m2m_unregister_media_controller(dev->m2m_dev_dec);
 482                 media_device_cleanup(&dev->mdev_dec);
 483         }
 484
 485         if (dev->m2m_dev_dec)
 486                 v4l2_m2m_release(dev->m2m_dev_dec);
 487
 488         if (dev->vfd_dec)
 489                 video_unregister_device(dev->vfd_dec);
 490
 491         v4l2_device_unregister(&dev->v4l2_dev);
 492         if (!dev->vdec_pdata->is_subdev_supported)
 493                 pm_runtime_disable(dev->pm.dev);
 494         mtk_vcodec_fw_release(dev->fw_handler);
 495         return 0;
 496 }
 497
 498 static struct platform_driver mtk_vcodec_dec_driver = {
 499         .probe  = mtk_vcodec_probe,
 500         .remove = mtk_vcodec_dec_remove,
 501         .driver = {
 502                 .name   = MTK_VCODEC_DEC_NAME,
 503                 .of_match_table = mtk_vcodec_match,
 504         },
 505 };
 506
 507 module_platform_driver(mtk_vcodec_dec_driver);
 508
 509 MODULE_LICENSE("GPL v2");
 510 MODULE_DESCRIPTION("Mediatek video codec V4L2 decoder driver");