1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2023 MediaTek Inc.
4 * Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
7 #include "mtk-img-ipi.h"
8 #include "mtk-mdp3-cfg.h"
9 #include "mtk-mdp3-core.h"
10 #include "mtk-mdp3-comp.h"
11 #include "mtk-mdp3-regs.h"
13 enum mt8183_mdp_comp_id {
15 MT8183_MDP_COMP_WPEI = 0,
16 MT8183_MDP_COMP_WPEO, /* 1 */
17 MT8183_MDP_COMP_WPEI2, /* 2 */
18 MT8183_MDP_COMP_WPEO2, /* 3 */
19 MT8183_MDP_COMP_ISP_IMGI, /* 4 */
20 MT8183_MDP_COMP_ISP_IMGO, /* 5 */
21 MT8183_MDP_COMP_ISP_IMG2O, /* 6 */
24 MT8183_MDP_COMP_IPUI, /* 7 */
25 MT8183_MDP_COMP_IPUO, /* 8 */
28 MT8183_MDP_COMP_CAMIN, /* 9 */
29 MT8183_MDP_COMP_CAMIN2, /* 10 */
30 MT8183_MDP_COMP_RDMA0, /* 11 */
31 MT8183_MDP_COMP_AAL0, /* 12 */
32 MT8183_MDP_COMP_CCORR0, /* 13 */
33 MT8183_MDP_COMP_RSZ0, /* 14 */
34 MT8183_MDP_COMP_RSZ1, /* 15 */
35 MT8183_MDP_COMP_TDSHP0, /* 16 */
36 MT8183_MDP_COMP_COLOR0, /* 17 */
37 MT8183_MDP_COMP_PATH0_SOUT, /* 18 */
38 MT8183_MDP_COMP_PATH1_SOUT, /* 19 */
39 MT8183_MDP_COMP_WROT0, /* 20 */
40 MT8183_MDP_COMP_WDMA, /* 21 */
43 MT8183_MDP_COMP_RDMA1, /* 22 */
44 MT8183_MDP_COMP_RSZ2, /* 23 */
45 MT8183_MDP_COMP_TDSHP1, /* 24 */
46 MT8183_MDP_COMP_WROT1, /* 25 */
49 static const struct of_device_id mt8183_mdp_probe_infra[MDP_INFRA_MAX] = {
50 [MDP_INFRA_MMSYS] = { .compatible = "mediatek,mt8183-mmsys" },
51 [MDP_INFRA_MUTEX] = { .compatible = "mediatek,mt8183-disp-mutex" },
52 [MDP_INFRA_SCP] = { .compatible = "mediatek,mt8183-scp" }
55 static const struct mdp_platform_config mt8183_plat_cfg = {
56 .rdma_support_10bit = true,
57 .rdma_rsz1_sram_sharing = true,
58 .rdma_upsample_repeat_only = true,
59 .rsz_disable_dcm_small_sample = false,
60 .wrot_filter_constraint = false,
63 static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = {
64 [MDP_COMP_RDMA0] = MUTEX_MOD_IDX_MDP_RDMA0,
65 [MDP_COMP_RSZ0] = MUTEX_MOD_IDX_MDP_RSZ0,
66 [MDP_COMP_RSZ1] = MUTEX_MOD_IDX_MDP_RSZ1,
67 [MDP_COMP_TDSHP0] = MUTEX_MOD_IDX_MDP_TDSHP0,
68 [MDP_COMP_WROT0] = MUTEX_MOD_IDX_MDP_WROT0,
69 [MDP_COMP_WDMA] = MUTEX_MOD_IDX_MDP_WDMA,
70 [MDP_COMP_AAL0] = MUTEX_MOD_IDX_MDP_AAL0,
71 [MDP_COMP_CCORR0] = MUTEX_MOD_IDX_MDP_CCORR0,
74 static const struct mdp_comp_data mt8183_mdp_comp_data[MDP_MAX_COMP_COUNT] = {
76 {MDP_COMP_TYPE_WPEI, 0, MT8183_MDP_COMP_WPEI},
80 {MDP_COMP_TYPE_EXTO, 2, MT8183_MDP_COMP_WPEO},
84 {MDP_COMP_TYPE_WPEI, 1, MT8183_MDP_COMP_WPEI2},
88 {MDP_COMP_TYPE_EXTO, 3, MT8183_MDP_COMP_WPEO2},
91 [MDP_COMP_ISP_IMGI] = {
92 {MDP_COMP_TYPE_IMGI, 0, MT8183_MDP_COMP_ISP_IMGI},
95 [MDP_COMP_ISP_IMGO] = {
96 {MDP_COMP_TYPE_EXTO, 0, MT8183_MDP_COMP_ISP_IMGO},
99 [MDP_COMP_ISP_IMG2O] = {
100 {MDP_COMP_TYPE_EXTO, 1, MT8183_MDP_COMP_ISP_IMG2O},
104 {MDP_COMP_TYPE_DL_PATH, 0, MT8183_MDP_COMP_CAMIN},
107 [MDP_COMP_CAMIN2] = {
108 {MDP_COMP_TYPE_DL_PATH, 1, MT8183_MDP_COMP_CAMIN2},
112 {MDP_COMP_TYPE_RDMA, 0, MT8183_MDP_COMP_RDMA0},
115 [MDP_COMP_CCORR0] = {
116 {MDP_COMP_TYPE_CCORR, 0, MT8183_MDP_COMP_CCORR0},
120 {MDP_COMP_TYPE_RSZ, 0, MT8183_MDP_COMP_RSZ0},
124 {MDP_COMP_TYPE_RSZ, 1, MT8183_MDP_COMP_RSZ1},
127 [MDP_COMP_TDSHP0] = {
128 {MDP_COMP_TYPE_TDSHP, 0, MT8183_MDP_COMP_TDSHP0},
131 [MDP_COMP_PATH0_SOUT] = {
132 {MDP_COMP_TYPE_PATH, 0, MT8183_MDP_COMP_PATH0_SOUT},
135 [MDP_COMP_PATH1_SOUT] = {
136 {MDP_COMP_TYPE_PATH, 1, MT8183_MDP_COMP_PATH1_SOUT},
140 {MDP_COMP_TYPE_WROT, 0, MT8183_MDP_COMP_WROT0},
144 {MDP_COMP_TYPE_WDMA, 0, MT8183_MDP_COMP_WDMA},
149 static const struct of_device_id mt8183_sub_comp_dt_ids[] = {
151 .compatible = "mediatek,mt8183-mdp3-wdma",
152 .data = (void *)MDP_COMP_TYPE_PATH,
154 .compatible = "mediatek,mt8183-mdp3-wrot",
155 .data = (void *)MDP_COMP_TYPE_PATH,
161 * All 10-bit related formats are not added in the basic format list,
162 * please add the corresponding format settings before use.
164 static const struct mdp_format mt8183_formats[] = {
166 .pixelformat = V4L2_PIX_FMT_GREY,
167 .mdp_color = MDP_COLOR_GREY,
171 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
173 .pixelformat = V4L2_PIX_FMT_RGB565X,
174 .mdp_color = MDP_COLOR_BGR565,
178 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
180 .pixelformat = V4L2_PIX_FMT_RGB565,
181 .mdp_color = MDP_COLOR_RGB565,
185 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
187 .pixelformat = V4L2_PIX_FMT_RGB24,
188 .mdp_color = MDP_COLOR_RGB888,
192 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
194 .pixelformat = V4L2_PIX_FMT_BGR24,
195 .mdp_color = MDP_COLOR_BGR888,
199 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
201 .pixelformat = V4L2_PIX_FMT_ABGR32,
202 .mdp_color = MDP_COLOR_BGRA8888,
206 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
208 .pixelformat = V4L2_PIX_FMT_ARGB32,
209 .mdp_color = MDP_COLOR_ARGB8888,
213 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
215 .pixelformat = V4L2_PIX_FMT_UYVY,
216 .mdp_color = MDP_COLOR_UYVY,
221 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
223 .pixelformat = V4L2_PIX_FMT_VYUY,
224 .mdp_color = MDP_COLOR_VYUY,
229 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
231 .pixelformat = V4L2_PIX_FMT_YUYV,
232 .mdp_color = MDP_COLOR_YUYV,
237 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
239 .pixelformat = V4L2_PIX_FMT_YVYU,
240 .mdp_color = MDP_COLOR_YVYU,
245 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
247 .pixelformat = V4L2_PIX_FMT_YUV420,
248 .mdp_color = MDP_COLOR_I420,
254 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
256 .pixelformat = V4L2_PIX_FMT_YVU420,
257 .mdp_color = MDP_COLOR_YV12,
263 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
265 .pixelformat = V4L2_PIX_FMT_NV12,
266 .mdp_color = MDP_COLOR_NV12,
272 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
274 .pixelformat = V4L2_PIX_FMT_NV21,
275 .mdp_color = MDP_COLOR_NV21,
281 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
283 .pixelformat = V4L2_PIX_FMT_NV16,
284 .mdp_color = MDP_COLOR_NV16,
289 .flags = MDP_FMT_FLAG_OUTPUT,
291 .pixelformat = V4L2_PIX_FMT_NV61,
292 .mdp_color = MDP_COLOR_NV61,
297 .flags = MDP_FMT_FLAG_OUTPUT,
299 .pixelformat = V4L2_PIX_FMT_NV24,
300 .mdp_color = MDP_COLOR_NV24,
304 .flags = MDP_FMT_FLAG_OUTPUT,
306 .pixelformat = V4L2_PIX_FMT_NV42,
307 .mdp_color = MDP_COLOR_NV42,
311 .flags = MDP_FMT_FLAG_OUTPUT,
313 .pixelformat = V4L2_PIX_FMT_MT21C,
314 .mdp_color = MDP_COLOR_420_BLK_UFO,
316 .row_depth = { 8, 8 },
320 .flags = MDP_FMT_FLAG_OUTPUT,
322 .pixelformat = V4L2_PIX_FMT_MM21,
323 .mdp_color = MDP_COLOR_420_BLK,
325 .row_depth = { 8, 8 },
329 .flags = MDP_FMT_FLAG_OUTPUT,
331 .pixelformat = V4L2_PIX_FMT_NV12M,
332 .mdp_color = MDP_COLOR_NV12,
334 .row_depth = { 8, 8 },
338 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
340 .pixelformat = V4L2_PIX_FMT_NV21M,
341 .mdp_color = MDP_COLOR_NV21,
343 .row_depth = { 8, 8 },
347 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
349 .pixelformat = V4L2_PIX_FMT_NV16M,
350 .mdp_color = MDP_COLOR_NV16,
352 .row_depth = { 8, 8 },
355 .flags = MDP_FMT_FLAG_OUTPUT,
357 .pixelformat = V4L2_PIX_FMT_NV61M,
358 .mdp_color = MDP_COLOR_NV61,
360 .row_depth = { 8, 8 },
363 .flags = MDP_FMT_FLAG_OUTPUT,
365 .pixelformat = V4L2_PIX_FMT_YUV420M,
366 .mdp_color = MDP_COLOR_I420,
367 .depth = { 8, 2, 2 },
368 .row_depth = { 8, 4, 4 },
372 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
374 .pixelformat = V4L2_PIX_FMT_YVU420M,
375 .mdp_color = MDP_COLOR_YV12,
376 .depth = { 8, 2, 2 },
377 .row_depth = { 8, 4, 4 },
381 .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE,
385 static const struct mdp_limit mt8183_mdp_def_limit = {
398 .h_scale_up_max = 32,
399 .v_scale_up_max = 32,
400 .h_scale_down_max = 20,
401 .v_scale_down_max = 128,
404 static const struct mdp_pipe_info mt8183_pipe_info[] = {
405 [MDP_PIPE_WPEI] = {MDP_PIPE_WPEI, 0},
406 [MDP_PIPE_WPEI2] = {MDP_PIPE_WPEI2, 1},
407 [MDP_PIPE_IMGI] = {MDP_PIPE_IMGI, 2},
408 [MDP_PIPE_RDMA0] = {MDP_PIPE_RDMA0, 3}
411 const struct mtk_mdp_driver_data mt8183_mdp_driver_data = {
412 .mdp_plat_id = MT8183,
413 .mdp_probe_infra = mt8183_mdp_probe_infra,
414 .mdp_cfg = &mt8183_plat_cfg,
415 .mdp_mutex_table_idx = mt8183_mutex_idx,
416 .comp_data = mt8183_mdp_comp_data,
417 .comp_data_len = ARRAY_SIZE(mt8183_mdp_comp_data),
418 .mdp_sub_comp_dt_ids = mt8183_sub_comp_dt_ids,
419 .format = mt8183_formats,
420 .format_len = ARRAY_SIZE(mt8183_formats),
421 .def_limit = &mt8183_mdp_def_limit,
422 .pipe_info = mt8183_pipe_info,
423 .pipe_info_len = ARRAY_SIZE(mt8183_pipe_info),
426 s32 mdp_cfg_get_id_inner(struct mdp_dev *mdp_dev, enum mtk_mdp_comp_id id)
429 return MDP_COMP_NONE;
430 if (id <= MDP_COMP_NONE || id >= MDP_MAX_COMP_COUNT)
431 return MDP_COMP_NONE;
433 return mdp_dev->mdp_data->comp_data[id].match.inner_id;
436 enum mtk_mdp_comp_id mdp_cfg_get_id_public(struct mdp_dev *mdp_dev, s32 inner_id)
438 enum mtk_mdp_comp_id public_id = MDP_COMP_NONE;
441 if (IS_ERR(mdp_dev) || !inner_id)
444 for (i = 0; i < MDP_MAX_COMP_COUNT; i++) {
445 if (mdp_dev->mdp_data->comp_data[i].match.inner_id == inner_id) {