2 * vpif - Video Port Interface driver
3 * VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
4 * that receiving video byte stream and two channels(2, 3) for video output.
5 * The hardware supports SDTV, HDTV formats, raw data capture.
6 * Currently, the driver supports NTSC and PAL standards.
8 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation version 2.
14 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/err.h>
21 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/spinlock.h>
28 #include <linux/v4l2-dv-timings.h>
29 #include <linux/of_graph.h>
33 MODULE_DESCRIPTION("TI DaVinci Video Port Interface driver");
34 MODULE_LICENSE("GPL");
36 #define VPIF_DRIVER_NAME "vpif"
37 MODULE_ALIAS("platform:" VPIF_DRIVER_NAME);
39 #define VPIF_CH0_MAX_MODES 22
40 #define VPIF_CH1_MAX_MODES 2
41 #define VPIF_CH2_MAX_MODES 15
42 #define VPIF_CH3_MAX_MODES 2
45 EXPORT_SYMBOL_GPL(vpif_lock);
47 void __iomem *vpif_base;
48 EXPORT_SYMBOL_GPL(vpif_base);
51 * vpif_ch_params: video standard configuration parameters for vpif
53 * The table must include all presets from supported subdevices.
55 const struct vpif_channel_config_params vpif_ch_params[] = {
72 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
89 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
106 .dv_timings = V4L2_DV_BT_CEA_1280X720P50,
123 .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
143 .dv_timings = V4L2_DV_BT_CEA_1920X1080I50,
163 .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
180 .dv_timings = V4L2_DV_BT_CEA_1920X1080P60,
202 .stdid = V4L2_STD_525_60,
205 .name = "PAL_BDGHIK",
222 .stdid = V4L2_STD_625_50,
225 EXPORT_SYMBOL_GPL(vpif_ch_params);
227 const unsigned int vpif_ch_params_count = ARRAY_SIZE(vpif_ch_params);
228 EXPORT_SYMBOL_GPL(vpif_ch_params_count);
230 static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
233 vpif_set_bit(reg, bit);
235 vpif_clr_bit(reg, bit);
238 /* This structure is used to keep track of VPIF size register's offsets */
239 struct vpif_registers {
240 u32 h_cfg, v_cfg_00, v_cfg_01, v_cfg_02, v_cfg, ch_ctrl;
241 u32 line_offset, vanc0_strt, vanc0_size, vanc1_strt;
242 u32 vanc1_size, width_mask, len_mask;
246 static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {
249 VPIF_CH0_H_CFG, VPIF_CH0_V_CFG_00, VPIF_CH0_V_CFG_01,
250 VPIF_CH0_V_CFG_02, VPIF_CH0_V_CFG_03, VPIF_CH0_CTRL,
251 VPIF_CH0_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
256 VPIF_CH1_H_CFG, VPIF_CH1_V_CFG_00, VPIF_CH1_V_CFG_01,
257 VPIF_CH1_V_CFG_02, VPIF_CH1_V_CFG_03, VPIF_CH1_CTRL,
258 VPIF_CH1_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
263 VPIF_CH2_H_CFG, VPIF_CH2_V_CFG_00, VPIF_CH2_V_CFG_01,
264 VPIF_CH2_V_CFG_02, VPIF_CH2_V_CFG_03, VPIF_CH2_CTRL,
265 VPIF_CH2_IMG_ADD_OFST, VPIF_CH2_VANC0_STRT, VPIF_CH2_VANC0_SIZE,
266 VPIF_CH2_VANC1_STRT, VPIF_CH2_VANC1_SIZE, 0x7FF, 0x7FF,
271 VPIF_CH3_H_CFG, VPIF_CH3_V_CFG_00, VPIF_CH3_V_CFG_01,
272 VPIF_CH3_V_CFG_02, VPIF_CH3_V_CFG_03, VPIF_CH3_CTRL,
273 VPIF_CH3_IMG_ADD_OFST, VPIF_CH3_VANC0_STRT, VPIF_CH3_VANC0_SIZE,
274 VPIF_CH3_VANC1_STRT, VPIF_CH3_VANC1_SIZE, 0x7FF, 0x7FF,
279 /* vpif_set_mode_info:
280 * This function is used to set horizontal and vertical config parameters
281 * As per the standard in the channel, configure the values of L1, L3,
282 * L5, L7 L9, L11 in VPIF Register , also write width and height
284 static void vpif_set_mode_info(const struct vpif_channel_config_params *config,
285 u8 channel_id, u8 config_channel_id)
289 value = (config->eav2sav & vpifregs[config_channel_id].width_mask);
290 value <<= VPIF_CH_LEN_SHIFT;
291 value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);
292 regw(value, vpifregs[channel_id].h_cfg);
294 value = (config->l1 & vpifregs[config_channel_id].len_mask);
295 value <<= VPIF_CH_LEN_SHIFT;
296 value |= (config->l3 & vpifregs[config_channel_id].len_mask);
297 regw(value, vpifregs[channel_id].v_cfg_00);
299 value = (config->l5 & vpifregs[config_channel_id].len_mask);
300 value <<= VPIF_CH_LEN_SHIFT;
301 value |= (config->l7 & vpifregs[config_channel_id].len_mask);
302 regw(value, vpifregs[channel_id].v_cfg_01);
304 value = (config->l9 & vpifregs[config_channel_id].len_mask);
305 value <<= VPIF_CH_LEN_SHIFT;
306 value |= (config->l11 & vpifregs[config_channel_id].len_mask);
307 regw(value, vpifregs[channel_id].v_cfg_02);
309 value = (config->vsize & vpifregs[config_channel_id].len_mask);
310 regw(value, vpifregs[channel_id].v_cfg);
313 /* config_vpif_params
314 * Function to set the parameters of a channel
315 * Mainly modifies the channel ciontrol register
316 * It sets frame format, yc mux mode
318 static void config_vpif_params(struct vpif_params *vpifparams,
319 u8 channel_id, u8 found)
321 const struct vpif_channel_config_params *config = &vpifparams->std_info;
322 u32 value, ch_nip, reg;
327 end = channel_id + found;
329 for (i = start; i < end; i++) {
330 reg = vpifregs[i].ch_ctrl;
332 ch_nip = VPIF_CAPTURE_CH_NIP;
334 ch_nip = VPIF_DISPLAY_CH_NIP;
336 vpif_wr_bit(reg, ch_nip, config->frm_fmt);
337 vpif_wr_bit(reg, VPIF_CH_YC_MUX_BIT, config->ycmux_mode);
338 vpif_wr_bit(reg, VPIF_CH_INPUT_FIELD_FRAME_BIT,
339 vpifparams->video_params.storage_mode);
341 /* Set raster scanning SDR Format */
342 vpif_clr_bit(reg, VPIF_CH_SDR_FMT_BIT);
343 vpif_wr_bit(reg, VPIF_CH_DATA_MODE_BIT, config->capture_format);
345 if (channel_id > 1) /* Set the Pixel enable bit */
346 vpif_set_bit(reg, VPIF_DISPLAY_PIX_EN_BIT);
347 else if (config->capture_format) {
348 /* Set the polarity of various pins */
349 vpif_wr_bit(reg, VPIF_CH_FID_POLARITY_BIT,
350 vpifparams->iface.fid_pol);
351 vpif_wr_bit(reg, VPIF_CH_V_VALID_POLARITY_BIT,
352 vpifparams->iface.vd_pol);
353 vpif_wr_bit(reg, VPIF_CH_H_VALID_POLARITY_BIT,
354 vpifparams->iface.hd_pol);
359 VPIF_CH_DATA_WIDTH_BIT);
360 value |= ((vpifparams->params.data_sz) <<
361 VPIF_CH_DATA_WIDTH_BIT);
365 /* Write the pitch in the driver */
366 regw((vpifparams->video_params.hpitch),
367 vpifregs[i].line_offset);
371 /* vpif_set_video_params
372 * This function is used to set video parameters in VPIF register
374 int vpif_set_video_params(struct vpif_params *vpifparams, u8 channel_id)
376 const struct vpif_channel_config_params *config = &vpifparams->std_info;
379 vpif_set_mode_info(config, channel_id, channel_id);
380 if (!config->ycmux_mode) {
381 /* YC are on separate channels (HDTV formats) */
382 vpif_set_mode_info(config, channel_id + 1, channel_id);
386 config_vpif_params(vpifparams, channel_id, found);
388 regw(0x80, VPIF_REQ_SIZE);
389 regw(0x01, VPIF_EMULATION_CTRL);
393 EXPORT_SYMBOL(vpif_set_video_params);
395 void vpif_set_vbi_display_params(struct vpif_vbi_params *vbiparams,
400 value = 0x3F8 & (vbiparams->hstart0);
401 value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);
402 regw(value, vpifregs[channel_id].vanc0_strt);
404 value = 0x3F8 & (vbiparams->hstart1);
405 value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);
406 regw(value, vpifregs[channel_id].vanc1_strt);
408 value = 0x3F8 & (vbiparams->hsize0);
409 value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);
410 regw(value, vpifregs[channel_id].vanc0_size);
412 value = 0x3F8 & (vbiparams->hsize1);
413 value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);
414 regw(value, vpifregs[channel_id].vanc1_size);
417 EXPORT_SYMBOL(vpif_set_vbi_display_params);
419 int vpif_channel_getfid(u8 channel_id)
421 return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)
422 >> VPIF_CH_FID_SHIFT;
424 EXPORT_SYMBOL(vpif_channel_getfid);
426 static int vpif_probe(struct platform_device *pdev)
428 static struct resource *res, *res_irq;
429 struct platform_device *pdev_capture, *pdev_display;
430 struct device_node *endpoint = NULL;
433 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
434 vpif_base = devm_ioremap_resource(&pdev->dev, res);
435 if (IS_ERR(vpif_base))
436 return PTR_ERR(vpif_base);
438 pm_runtime_enable(&pdev->dev);
439 pm_runtime_get(&pdev->dev);
441 spin_lock_init(&vpif_lock);
442 dev_info(&pdev->dev, "vpif probe success\n");
445 * If VPIF Node has endpoints, assume "new" DT support,
446 * where capture and display drivers don't have DT nodes
447 * so their devices need to be registered manually here
448 * for their legacy platform_drivers to work.
450 endpoint = of_graph_get_next_endpoint(pdev->dev.of_node,
456 * For DT platforms, manually create platform_devices for
457 * capture/display drivers.
459 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
461 dev_warn(&pdev->dev, "Missing IRQ resource.\n");
466 pdev_capture = devm_kzalloc(&pdev->dev, sizeof(*pdev_capture),
469 pdev_capture->name = "vpif_capture";
470 pdev_capture->id = -1;
471 pdev_capture->resource = res_irq;
472 pdev_capture->num_resources = 1;
473 pdev_capture->dev.dma_mask = pdev->dev.dma_mask;
474 pdev_capture->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
475 pdev_capture->dev.parent = &pdev->dev;
476 platform_device_register(pdev_capture);
478 dev_warn(&pdev->dev, "Unable to allocate memory for pdev_capture.\n");
481 pdev_display = devm_kzalloc(&pdev->dev, sizeof(*pdev_display),
484 pdev_display->name = "vpif_display";
485 pdev_display->id = -1;
486 pdev_display->resource = res_irq;
487 pdev_display->num_resources = 1;
488 pdev_display->dev.dma_mask = pdev->dev.dma_mask;
489 pdev_display->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
490 pdev_display->dev.parent = &pdev->dev;
491 platform_device_register(pdev_display);
493 dev_warn(&pdev->dev, "Unable to allocate memory for pdev_display.\n");
499 pm_runtime_put(&pdev->dev);
500 pm_runtime_disable(&pdev->dev);
505 static int vpif_remove(struct platform_device *pdev)
507 pm_runtime_put(&pdev->dev);
508 pm_runtime_disable(&pdev->dev);
513 static int vpif_suspend(struct device *dev)
519 static int vpif_resume(struct device *dev)
525 static const struct dev_pm_ops vpif_pm = {
526 .suspend = vpif_suspend,
527 .resume = vpif_resume,
530 #define vpif_pm_ops (&vpif_pm)
532 #define vpif_pm_ops NULL
535 #if IS_ENABLED(CONFIG_OF)
536 static const struct of_device_id vpif_of_match[] = {
537 { .compatible = "ti,da850-vpif", },
540 MODULE_DEVICE_TABLE(of, vpif_of_match);
543 static struct platform_driver vpif_driver = {
545 .of_match_table = of_match_ptr(vpif_of_match),
546 .name = VPIF_DRIVER_NAME,
549 .remove = vpif_remove,
553 static void vpif_exit(void)
555 platform_driver_unregister(&vpif_driver);
558 static int __init vpif_init(void)
560 return platform_driver_register(&vpif_driver);
562 subsys_initcall(vpif_init);
563 module_exit(vpif_exit);