2 * vpif - Video Port Interface driver
3 * VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
4 * that receiveing video byte stream and two channels(2, 3) for video output.
5 * The hardware supports SDTV, HDTV formats, raw data capture.
6 * Currently, the driver supports NTSC and PAL standards.
8 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation version 2.
14 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
15 * kind, whether express or implied; without even the implied warranty
16 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/err.h>
21 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/spinlock.h>
28 #include <linux/v4l2-dv-timings.h>
29 #include <linux/of_graph.h>
33 MODULE_DESCRIPTION("TI DaVinci Video Port Interface driver");
34 MODULE_LICENSE("GPL");
36 #define VPIF_DRIVER_NAME "vpif"
37 MODULE_ALIAS("platform:" VPIF_DRIVER_NAME);
39 #define VPIF_CH0_MAX_MODES 22
40 #define VPIF_CH1_MAX_MODES 2
41 #define VPIF_CH2_MAX_MODES 15
42 #define VPIF_CH3_MAX_MODES 2
45 EXPORT_SYMBOL_GPL(vpif_lock);
47 void __iomem *vpif_base;
48 EXPORT_SYMBOL_GPL(vpif_base);
51 * vpif_ch_params: video standard configuration parameters for vpif
52 * The table must include all presets from supported subdevices.
54 const struct vpif_channel_config_params vpif_ch_params[] = {
71 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
88 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
105 .dv_timings = V4L2_DV_BT_CEA_1280X720P50,
122 .dv_timings = V4L2_DV_BT_CEA_1280X720P60,
142 .dv_timings = V4L2_DV_BT_CEA_1920X1080I50,
162 .dv_timings = V4L2_DV_BT_CEA_1920X1080I60,
179 .dv_timings = V4L2_DV_BT_CEA_1920X1080P60,
201 .stdid = V4L2_STD_525_60,
204 .name = "PAL_BDGHIK",
221 .stdid = V4L2_STD_625_50,
224 EXPORT_SYMBOL_GPL(vpif_ch_params);
226 const unsigned int vpif_ch_params_count = ARRAY_SIZE(vpif_ch_params);
227 EXPORT_SYMBOL_GPL(vpif_ch_params_count);
229 static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
232 vpif_set_bit(reg, bit);
234 vpif_clr_bit(reg, bit);
237 /* This structure is used to keep track of VPIF size register's offsets */
238 struct vpif_registers {
239 u32 h_cfg, v_cfg_00, v_cfg_01, v_cfg_02, v_cfg, ch_ctrl;
240 u32 line_offset, vanc0_strt, vanc0_size, vanc1_strt;
241 u32 vanc1_size, width_mask, len_mask;
245 static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {
248 VPIF_CH0_H_CFG, VPIF_CH0_V_CFG_00, VPIF_CH0_V_CFG_01,
249 VPIF_CH0_V_CFG_02, VPIF_CH0_V_CFG_03, VPIF_CH0_CTRL,
250 VPIF_CH0_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
255 VPIF_CH1_H_CFG, VPIF_CH1_V_CFG_00, VPIF_CH1_V_CFG_01,
256 VPIF_CH1_V_CFG_02, VPIF_CH1_V_CFG_03, VPIF_CH1_CTRL,
257 VPIF_CH1_IMG_ADD_OFST, 0, 0, 0, 0, 0x1FFF, 0xFFF,
262 VPIF_CH2_H_CFG, VPIF_CH2_V_CFG_00, VPIF_CH2_V_CFG_01,
263 VPIF_CH2_V_CFG_02, VPIF_CH2_V_CFG_03, VPIF_CH2_CTRL,
264 VPIF_CH2_IMG_ADD_OFST, VPIF_CH2_VANC0_STRT, VPIF_CH2_VANC0_SIZE,
265 VPIF_CH2_VANC1_STRT, VPIF_CH2_VANC1_SIZE, 0x7FF, 0x7FF,
270 VPIF_CH3_H_CFG, VPIF_CH3_V_CFG_00, VPIF_CH3_V_CFG_01,
271 VPIF_CH3_V_CFG_02, VPIF_CH3_V_CFG_03, VPIF_CH3_CTRL,
272 VPIF_CH3_IMG_ADD_OFST, VPIF_CH3_VANC0_STRT, VPIF_CH3_VANC0_SIZE,
273 VPIF_CH3_VANC1_STRT, VPIF_CH3_VANC1_SIZE, 0x7FF, 0x7FF,
278 /* vpif_set_mode_info:
279 * This function is used to set horizontal and vertical config parameters
280 * As per the standard in the channel, configure the values of L1, L3,
281 * L5, L7 L9, L11 in VPIF Register , also write width and height
283 static void vpif_set_mode_info(const struct vpif_channel_config_params *config,
284 u8 channel_id, u8 config_channel_id)
288 value = (config->eav2sav & vpifregs[config_channel_id].width_mask);
289 value <<= VPIF_CH_LEN_SHIFT;
290 value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);
291 regw(value, vpifregs[channel_id].h_cfg);
293 value = (config->l1 & vpifregs[config_channel_id].len_mask);
294 value <<= VPIF_CH_LEN_SHIFT;
295 value |= (config->l3 & vpifregs[config_channel_id].len_mask);
296 regw(value, vpifregs[channel_id].v_cfg_00);
298 value = (config->l5 & vpifregs[config_channel_id].len_mask);
299 value <<= VPIF_CH_LEN_SHIFT;
300 value |= (config->l7 & vpifregs[config_channel_id].len_mask);
301 regw(value, vpifregs[channel_id].v_cfg_01);
303 value = (config->l9 & vpifregs[config_channel_id].len_mask);
304 value <<= VPIF_CH_LEN_SHIFT;
305 value |= (config->l11 & vpifregs[config_channel_id].len_mask);
306 regw(value, vpifregs[channel_id].v_cfg_02);
308 value = (config->vsize & vpifregs[config_channel_id].len_mask);
309 regw(value, vpifregs[channel_id].v_cfg);
312 /* config_vpif_params
313 * Function to set the parameters of a channel
314 * Mainly modifies the channel ciontrol register
315 * It sets frame format, yc mux mode
317 static void config_vpif_params(struct vpif_params *vpifparams,
318 u8 channel_id, u8 found)
320 const struct vpif_channel_config_params *config = &vpifparams->std_info;
321 u32 value, ch_nip, reg;
326 end = channel_id + found;
328 for (i = start; i < end; i++) {
329 reg = vpifregs[i].ch_ctrl;
331 ch_nip = VPIF_CAPTURE_CH_NIP;
333 ch_nip = VPIF_DISPLAY_CH_NIP;
335 vpif_wr_bit(reg, ch_nip, config->frm_fmt);
336 vpif_wr_bit(reg, VPIF_CH_YC_MUX_BIT, config->ycmux_mode);
337 vpif_wr_bit(reg, VPIF_CH_INPUT_FIELD_FRAME_BIT,
338 vpifparams->video_params.storage_mode);
340 /* Set raster scanning SDR Format */
341 vpif_clr_bit(reg, VPIF_CH_SDR_FMT_BIT);
342 vpif_wr_bit(reg, VPIF_CH_DATA_MODE_BIT, config->capture_format);
344 if (channel_id > 1) /* Set the Pixel enable bit */
345 vpif_set_bit(reg, VPIF_DISPLAY_PIX_EN_BIT);
346 else if (config->capture_format) {
347 /* Set the polarity of various pins */
348 vpif_wr_bit(reg, VPIF_CH_FID_POLARITY_BIT,
349 vpifparams->iface.fid_pol);
350 vpif_wr_bit(reg, VPIF_CH_V_VALID_POLARITY_BIT,
351 vpifparams->iface.vd_pol);
352 vpif_wr_bit(reg, VPIF_CH_H_VALID_POLARITY_BIT,
353 vpifparams->iface.hd_pol);
358 VPIF_CH_DATA_WIDTH_BIT);
359 value |= ((vpifparams->params.data_sz) <<
360 VPIF_CH_DATA_WIDTH_BIT);
364 /* Write the pitch in the driver */
365 regw((vpifparams->video_params.hpitch),
366 vpifregs[i].line_offset);
370 /* vpif_set_video_params
371 * This function is used to set video parameters in VPIF register
373 int vpif_set_video_params(struct vpif_params *vpifparams, u8 channel_id)
375 const struct vpif_channel_config_params *config = &vpifparams->std_info;
378 vpif_set_mode_info(config, channel_id, channel_id);
379 if (!config->ycmux_mode) {
380 /* YC are on separate channels (HDTV formats) */
381 vpif_set_mode_info(config, channel_id + 1, channel_id);
385 config_vpif_params(vpifparams, channel_id, found);
387 regw(0x80, VPIF_REQ_SIZE);
388 regw(0x01, VPIF_EMULATION_CTRL);
392 EXPORT_SYMBOL(vpif_set_video_params);
394 void vpif_set_vbi_display_params(struct vpif_vbi_params *vbiparams,
399 value = 0x3F8 & (vbiparams->hstart0);
400 value |= 0x3FFFFFF & ((vbiparams->vstart0) << 16);
401 regw(value, vpifregs[channel_id].vanc0_strt);
403 value = 0x3F8 & (vbiparams->hstart1);
404 value |= 0x3FFFFFF & ((vbiparams->vstart1) << 16);
405 regw(value, vpifregs[channel_id].vanc1_strt);
407 value = 0x3F8 & (vbiparams->hsize0);
408 value |= 0x3FFFFFF & ((vbiparams->vsize0) << 16);
409 regw(value, vpifregs[channel_id].vanc0_size);
411 value = 0x3F8 & (vbiparams->hsize1);
412 value |= 0x3FFFFFF & ((vbiparams->vsize1) << 16);
413 regw(value, vpifregs[channel_id].vanc1_size);
416 EXPORT_SYMBOL(vpif_set_vbi_display_params);
418 int vpif_channel_getfid(u8 channel_id)
420 return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)
421 >> VPIF_CH_FID_SHIFT;
423 EXPORT_SYMBOL(vpif_channel_getfid);
425 static int vpif_probe(struct platform_device *pdev)
427 static struct resource *res, *res_irq;
428 struct platform_device *pdev_capture, *pdev_display;
429 struct device_node *endpoint = NULL;
431 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
432 vpif_base = devm_ioremap_resource(&pdev->dev, res);
433 if (IS_ERR(vpif_base))
434 return PTR_ERR(vpif_base);
436 pm_runtime_enable(&pdev->dev);
437 pm_runtime_get(&pdev->dev);
439 spin_lock_init(&vpif_lock);
440 dev_info(&pdev->dev, "vpif probe success\n");
443 * If VPIF Node has endpoints, assume "new" DT support,
444 * where capture and display drivers don't have DT nodes
445 * so their devices need to be registered manually here
446 * for their legacy platform_drivers to work.
448 endpoint = of_graph_get_next_endpoint(pdev->dev.of_node,
454 * For DT platforms, manually create platform_devices for
455 * capture/display drivers.
457 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
459 dev_warn(&pdev->dev, "Missing IRQ resource.\n");
463 pdev_capture = devm_kzalloc(&pdev->dev, sizeof(*pdev_capture),
466 pdev_capture->name = "vpif_capture";
467 pdev_capture->id = -1;
468 pdev_capture->resource = res_irq;
469 pdev_capture->num_resources = 1;
470 pdev_capture->dev.dma_mask = pdev->dev.dma_mask;
471 pdev_capture->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
472 pdev_capture->dev.parent = &pdev->dev;
473 platform_device_register(pdev_capture);
475 dev_warn(&pdev->dev, "Unable to allocate memory for pdev_capture.\n");
478 pdev_display = devm_kzalloc(&pdev->dev, sizeof(*pdev_display),
481 pdev_display->name = "vpif_display";
482 pdev_display->id = -1;
483 pdev_display->resource = res_irq;
484 pdev_display->num_resources = 1;
485 pdev_display->dev.dma_mask = pdev->dev.dma_mask;
486 pdev_display->dev.coherent_dma_mask = pdev->dev.coherent_dma_mask;
487 pdev_display->dev.parent = &pdev->dev;
488 platform_device_register(pdev_display);
490 dev_warn(&pdev->dev, "Unable to allocate memory for pdev_display.\n");
496 static int vpif_remove(struct platform_device *pdev)
498 pm_runtime_disable(&pdev->dev);
503 static int vpif_suspend(struct device *dev)
509 static int vpif_resume(struct device *dev)
515 static const struct dev_pm_ops vpif_pm = {
516 .suspend = vpif_suspend,
517 .resume = vpif_resume,
520 #define vpif_pm_ops (&vpif_pm)
522 #define vpif_pm_ops NULL
525 #if IS_ENABLED(CONFIG_OF)
526 static const struct of_device_id vpif_of_match[] = {
527 { .compatible = "ti,da850-vpif", },
530 MODULE_DEVICE_TABLE(of, vpif_of_match);
533 static struct platform_driver vpif_driver = {
535 .of_match_table = of_match_ptr(vpif_of_match),
536 .name = VPIF_DRIVER_NAME,
539 .remove = vpif_remove,
543 static void vpif_exit(void)
545 platform_driver_unregister(&vpif_driver);
548 static int __init vpif_init(void)
550 return platform_driver_register(&vpif_driver);
552 subsys_initcall(vpif_init);
553 module_exit(vpif_exit);