1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2010 Texas Instruments Inc
5 #include <linux/module.h>
6 #include <linux/mod_devicetable.h>
7 #include <linux/kernel.h>
8 #include <linux/init.h>
9 #include <linux/ctype.h>
10 #include <linux/delay.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/platform_device.h>
14 #include <linux/videodev2.h>
15 #include <linux/slab.h>
17 #include <linux/platform_data/i2c-davinci.h>
21 #include <media/davinci/vpbe_types.h>
22 #include <media/davinci/vpbe_venc.h>
23 #include <media/davinci/vpss.h>
24 #include <media/v4l2-device.h>
26 #include "vpbe_venc_regs.h"
28 #define MODULE_NAME "davinci-vpbe-venc"
30 static const struct platform_device_id vpbe_venc_devtype[] = {
32 .name = DM644X_VPBE_VENC_SUBDEV_NAME,
33 .driver_data = VPBE_VERSION_1,
35 .name = DM365_VPBE_VENC_SUBDEV_NAME,
36 .driver_data = VPBE_VERSION_2,
38 .name = DM355_VPBE_VENC_SUBDEV_NAME,
39 .driver_data = VPBE_VERSION_3,
46 MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
49 module_param(debug, int, 0644);
50 MODULE_PARM_DESC(debug, "Debug level 0-2");
53 struct v4l2_subdev sd;
54 struct venc_callback *callback;
55 struct venc_platform_data *pdata;
60 void __iomem *venc_base;
61 void __iomem *vdaccfg_reg;
62 enum vpbe_version venc_type;
65 static inline struct venc_state *to_state(struct v4l2_subdev *sd)
67 return container_of(sd, struct venc_state, sd);
70 static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
72 struct venc_state *venc = to_state(sd);
74 return readl(venc->venc_base + offset);
77 static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
79 struct venc_state *venc = to_state(sd);
81 writel(val, (venc->venc_base + offset));
86 static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
89 u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
91 venc_write(sd, offset, new_val);
96 static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
98 struct venc_state *venc = to_state(sd);
100 writel(val, venc->vdaccfg_reg);
102 val = readl(venc->vdaccfg_reg);
107 #define VDAC_COMPONENT 0x543
108 #define VDAC_S_VIDEO 0x210
109 /* This function sets the dac of the VPBE for various outputs
111 static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
115 v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
116 venc_write(sd, VENC_DACSEL, 0);
119 v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
120 venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
123 v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
124 venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
133 static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
135 struct venc_state *venc = to_state(sd);
137 v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
140 venc_write(sd, VENC_VMOD, 0);
141 venc_write(sd, VENC_CVBS, 0);
142 venc_write(sd, VENC_LCDOUT, 0);
143 venc_write(sd, VENC_HSPLS, 0);
144 venc_write(sd, VENC_HSTART, 0);
145 venc_write(sd, VENC_HVALID, 0);
146 venc_write(sd, VENC_HINT, 0);
147 venc_write(sd, VENC_VSPLS, 0);
148 venc_write(sd, VENC_VSTART, 0);
149 venc_write(sd, VENC_VVALID, 0);
150 venc_write(sd, VENC_VINT, 0);
151 venc_write(sd, VENC_YCCCTL, 0);
152 venc_write(sd, VENC_DACSEL, 0);
155 venc_write(sd, VENC_VMOD, 0);
156 /* disable VCLK output pin enable */
157 venc_write(sd, VENC_VIDCTL, 0x141);
159 /* Disable output sync pins */
160 venc_write(sd, VENC_SYNCCTL, 0);
163 venc_write(sd, VENC_DCLKCTL, 0);
164 venc_write(sd, VENC_DRGBX1, 0x0000057C);
166 /* Disable LCD output control (accepting default polarity) */
167 venc_write(sd, VENC_LCDOUT, 0);
168 if (venc->venc_type != VPBE_VERSION_3)
169 venc_write(sd, VENC_CMPNT, 0x100);
170 venc_write(sd, VENC_HSPLS, 0);
171 venc_write(sd, VENC_HINT, 0);
172 venc_write(sd, VENC_HSTART, 0);
173 venc_write(sd, VENC_HVALID, 0);
175 venc_write(sd, VENC_VSPLS, 0);
176 venc_write(sd, VENC_VINT, 0);
177 venc_write(sd, VENC_VSTART, 0);
178 venc_write(sd, VENC_VVALID, 0);
180 venc_write(sd, VENC_HSDLY, 0);
181 venc_write(sd, VENC_VSDLY, 0);
183 venc_write(sd, VENC_YCCCTL, 0);
184 venc_write(sd, VENC_VSTARTA, 0);
186 /* Set OSD clock and OSD Sync Adavance registers */
187 venc_write(sd, VENC_OSDCLK0, 1);
188 venc_write(sd, VENC_OSDCLK1, 2);
193 venc_enable_vpss_clock(int venc_type,
194 enum vpbe_enc_timings_type type,
197 if (venc_type == VPBE_VERSION_1)
200 if (venc_type == VPBE_VERSION_2 && (type == VPBE_ENC_STD || (type ==
201 VPBE_ENC_DV_TIMINGS && pclock <= 27000000))) {
202 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
203 vpss_enable_clock(VPSS_VPBE_CLOCK, 1);
207 if (venc_type == VPBE_VERSION_3 && type == VPBE_ENC_STD)
208 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 0);
211 #define VDAC_CONFIG_SD_V3 0x0E21A6B6
212 #define VDAC_CONFIG_SD_V2 0x081141CF
216 static int venc_set_ntsc(struct v4l2_subdev *sd)
218 struct venc_state *venc = to_state(sd);
219 struct venc_platform_data *pdata = venc->pdata;
221 v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
223 /* Setup clock at VPSS & VENC for SD */
224 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
225 if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
228 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_525_60);
229 venc_enabledigitaloutput(sd, 0);
231 if (venc->venc_type == VPBE_VERSION_3) {
232 venc_write(sd, VENC_CLKCTL, 0x01);
233 venc_write(sd, VENC_VIDCTL, 0);
234 vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
235 } else if (venc->venc_type == VPBE_VERSION_2) {
236 venc_write(sd, VENC_CLKCTL, 0x01);
237 venc_write(sd, VENC_VIDCTL, 0);
238 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
240 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
241 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
242 /* Set REC656 Mode */
243 venc_write(sd, VENC_YCCCTL, 0x1);
244 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
245 venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
248 venc_write(sd, VENC_VMOD, 0);
249 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
251 venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
252 venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
254 venc_write(sd, VENC_DACTST, 0x0);
255 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
263 static int venc_set_pal(struct v4l2_subdev *sd)
265 struct venc_state *venc = to_state(sd);
267 v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
269 /* Setup clock at VPSS & VENC for SD */
270 vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
271 if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
274 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_625_50);
275 venc_enabledigitaloutput(sd, 0);
277 if (venc->venc_type == VPBE_VERSION_3) {
278 venc_write(sd, VENC_CLKCTL, 0x1);
279 venc_write(sd, VENC_VIDCTL, 0);
280 vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
281 } else if (venc->venc_type == VPBE_VERSION_2) {
282 venc_write(sd, VENC_CLKCTL, 0x1);
283 venc_write(sd, VENC_VIDCTL, 0);
284 vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
286 /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
287 venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
288 /* Set REC656 Mode */
289 venc_write(sd, VENC_YCCCTL, 0x1);
292 venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
294 venc_write(sd, VENC_VMOD, 0);
295 venc_modify(sd, VENC_VMOD,
296 (1 << VENC_VMOD_VIE_SHIFT),
298 venc_modify(sd, VENC_VMOD,
299 (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
300 venc_modify(sd, VENC_VMOD,
301 (1 << VENC_VMOD_TVTYP_SHIFT),
303 venc_write(sd, VENC_DACTST, 0x0);
304 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
309 #define VDAC_CONFIG_HD_V2 0x081141EF
313 * This function configures the video encoder to EDTV(525p) component setting.
315 static int venc_set_480p59_94(struct v4l2_subdev *sd)
317 struct venc_state *venc = to_state(sd);
318 struct venc_platform_data *pdata = venc->pdata;
320 v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
321 if (venc->venc_type != VPBE_VERSION_1 &&
322 venc->venc_type != VPBE_VERSION_2)
325 /* Setup clock at VPSS & VENC for SD */
326 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
329 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
330 venc_enabledigitaloutput(sd, 0);
332 if (venc->venc_type == VPBE_VERSION_2)
333 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
334 venc_write(sd, VENC_OSDCLK0, 0);
335 venc_write(sd, VENC_OSDCLK1, 1);
337 if (venc->venc_type == VPBE_VERSION_1) {
338 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
340 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
344 venc_write(sd, VENC_VMOD, 0);
345 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
347 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
348 venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
350 venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
351 VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
353 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
361 * This function configures the video encoder to HDTV(625p) component setting
363 static int venc_set_576p50(struct v4l2_subdev *sd)
365 struct venc_state *venc = to_state(sd);
366 struct venc_platform_data *pdata = venc->pdata;
368 v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
370 if (venc->venc_type != VPBE_VERSION_1 &&
371 venc->venc_type != VPBE_VERSION_2)
373 /* Setup clock at VPSS & VENC for SD */
374 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
377 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
378 venc_enabledigitaloutput(sd, 0);
380 if (venc->venc_type == VPBE_VERSION_2)
381 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
383 venc_write(sd, VENC_OSDCLK0, 0);
384 venc_write(sd, VENC_OSDCLK1, 1);
386 if (venc->venc_type == VPBE_VERSION_1) {
387 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
389 venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
393 venc_write(sd, VENC_VMOD, 0);
394 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
396 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
397 venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
400 venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
401 VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
402 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
408 * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
410 static int venc_set_720p60_internal(struct v4l2_subdev *sd)
412 struct venc_state *venc = to_state(sd);
413 struct venc_platform_data *pdata = venc->pdata;
415 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
418 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
419 venc_enabledigitaloutput(sd, 0);
421 venc_write(sd, VENC_OSDCLK0, 0);
422 venc_write(sd, VENC_OSDCLK1, 1);
424 venc_write(sd, VENC_VMOD, 0);
425 /* DM365 component HD mode */
426 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
428 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
429 venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
431 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
432 venc_write(sd, VENC_XHINTVL, 0);
437 * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
439 static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
441 struct venc_state *venc = to_state(sd);
442 struct venc_platform_data *pdata = venc->pdata;
444 if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
447 venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
448 venc_enabledigitaloutput(sd, 0);
450 venc_write(sd, VENC_OSDCLK0, 0);
451 venc_write(sd, VENC_OSDCLK1, 1);
454 venc_write(sd, VENC_VMOD, 0);
455 /* DM365 component HD mode */
456 venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
458 venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
459 venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
461 venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
462 venc_write(sd, VENC_XHINTVL, 0);
466 static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
468 v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
470 if (norm & V4L2_STD_525_60)
471 return venc_set_ntsc(sd);
472 else if (norm & V4L2_STD_625_50)
473 return venc_set_pal(sd);
478 static int venc_s_dv_timings(struct v4l2_subdev *sd,
479 struct v4l2_dv_timings *dv_timings)
481 struct venc_state *venc = to_state(sd);
482 u32 height = dv_timings->bt.height;
485 v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
488 return venc_set_576p50(sd);
489 else if (height == 480)
490 return venc_set_480p59_94(sd);
491 else if ((height == 720) &&
492 (venc->venc_type == VPBE_VERSION_2)) {
493 /* TBD setup internal 720p mode here */
494 ret = venc_set_720p60_internal(sd);
495 /* for DM365 VPBE, there is DAC inside */
496 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
498 } else if ((height == 1080) &&
499 (venc->venc_type == VPBE_VERSION_2)) {
500 /* TBD setup internal 1080i mode here */
501 ret = venc_set_1080i30_internal(sd);
502 /* for DM365 VPBE, there is DAC inside */
503 vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
509 static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
512 struct venc_state *venc = to_state(sd);
515 v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
517 ret = venc_set_dac(sd, output);
519 venc->output = output;
524 static long venc_command(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
530 val = venc_read(sd, VENC_VSTAT);
531 *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
535 v4l2_err(sd, "Wrong IOCTL cmd\n");
542 static const struct v4l2_subdev_core_ops venc_core_ops = {
543 .command = venc_command,
546 static const struct v4l2_subdev_video_ops venc_video_ops = {
547 .s_routing = venc_s_routing,
548 .s_std_output = venc_s_std_output,
549 .s_dv_timings = venc_s_dv_timings,
552 static const struct v4l2_subdev_ops venc_ops = {
553 .core = &venc_core_ops,
554 .video = &venc_video_ops,
557 static int venc_initialize(struct v4l2_subdev *sd)
559 struct venc_state *venc = to_state(sd);
562 /* Set default to output to composite and std to NTSC */
564 venc->std = V4L2_STD_525_60;
566 ret = venc_s_routing(sd, 0, venc->output, 0);
568 v4l2_err(sd, "Error setting output during init\n");
572 ret = venc_s_std_output(sd, venc->std);
574 v4l2_err(sd, "Error setting std during init\n");
581 static int venc_device_get(struct device *dev, void *data)
583 struct platform_device *pdev = to_platform_device(dev);
584 struct venc_state **venc = data;
586 if (strstr(pdev->name, "vpbe-venc") != NULL)
587 *venc = platform_get_drvdata(pdev);
592 struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
593 const char *venc_name)
595 struct venc_state *venc = NULL;
597 bus_for_each_dev(&platform_bus_type, NULL, &venc,
602 v4l2_subdev_init(&venc->sd, &venc_ops);
604 strscpy(venc->sd.name, venc_name, sizeof(venc->sd.name));
605 if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
607 "vpbe unable to register venc sub device\n");
610 if (venc_initialize(&venc->sd)) {
612 "vpbe venc initialization failed\n");
618 EXPORT_SYMBOL(venc_sub_dev_init);
620 static int venc_probe(struct platform_device *pdev)
622 const struct platform_device_id *pdev_id;
623 struct venc_state *venc;
624 struct resource *res;
626 if (!pdev->dev.platform_data) {
627 dev_err(&pdev->dev, "No platform data for VENC sub device");
631 pdev_id = platform_get_device_id(pdev);
635 venc = devm_kzalloc(&pdev->dev, sizeof(struct venc_state), GFP_KERNEL);
639 venc->venc_type = pdev_id->driver_data;
640 venc->pdev = &pdev->dev;
641 venc->pdata = pdev->dev.platform_data;
643 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
645 venc->venc_base = devm_ioremap_resource(&pdev->dev, res);
646 if (IS_ERR(venc->venc_base))
647 return PTR_ERR(venc->venc_base);
649 if (venc->venc_type != VPBE_VERSION_1) {
650 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
652 venc->vdaccfg_reg = devm_ioremap_resource(&pdev->dev, res);
653 if (IS_ERR(venc->vdaccfg_reg))
654 return PTR_ERR(venc->vdaccfg_reg);
656 spin_lock_init(&venc->lock);
657 platform_set_drvdata(pdev, venc);
658 dev_notice(venc->pdev, "VENC sub device probe success\n");
663 static int venc_remove(struct platform_device *pdev)
668 static struct platform_driver venc_driver = {
670 .remove = venc_remove,
674 .id_table = vpbe_venc_devtype
677 module_platform_driver(venc_driver);
679 MODULE_LICENSE("GPL");
680 MODULE_DESCRIPTION("VPBE VENC Driver");
681 MODULE_AUTHOR("Texas Instruments");