2 * Copyright (C) 2008-2009 Texas Instruments Inc
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * Image Sensor Interface (ISIF) driver
16 * This driver is for configuring the ISIF IP available on DM365 or any other
17 * TI SoCs. This is used for capturing yuv or bayer video or image data
18 * from a decoder or sensor. This IP is similar to the CCDC IP on DM355
19 * and DM6446, but with enhanced or additional ip blocks. The driver
20 * configures the ISIF upon commands from the vpfe bridge driver through
21 * ccdc_hw_device interface.
23 * TODO: 1) Raw bayer parameter settings and bayer capture
24 * 2) Add support for control ioctl
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/uaccess.h>
30 #include <linux/videodev2.h>
31 #include <linux/err.h>
32 #include <linux/module.h>
34 #include <media/davinci/isif.h>
35 #include <media/davinci/vpss.h>
37 #include "isif_regs.h"
38 #include "ccdc_hw_device.h"
40 /* Defaults for module configuration parameters */
41 static struct isif_config_params_raw isif_config_defaults = {
44 .corr_shft = ISIF_NO_SHIFT,
77 /* ISIF operation configuration */
78 static struct isif_oper_config {
80 enum vpfe_hw_if_type if_type;
81 struct isif_ycbcr_config ycbcr;
82 struct isif_params_raw bayer;
83 enum isif_data_pack data_pack;
84 /* ISIF base address */
85 void __iomem *base_addr;
86 /* ISIF Linear Table 0 */
87 void __iomem *linear_tbl0_addr;
88 /* ISIF Linear Table 1 */
89 void __iomem *linear_tbl1_addr;
92 .pix_fmt = CCDC_PIXFMT_YCBCR_8BIT,
93 .frm_fmt = CCDC_FRMFMT_INTERLACED,
95 .fid_pol = VPFE_PINPOL_POSITIVE,
96 .vd_pol = VPFE_PINPOL_POSITIVE,
97 .hd_pol = VPFE_PINPOL_POSITIVE,
98 .pix_order = CCDC_PIXORDER_CBYCRY,
99 .buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED,
102 .pix_fmt = CCDC_PIXFMT_RAW,
103 .frm_fmt = CCDC_FRMFMT_PROGRESSIVE,
105 .fid_pol = VPFE_PINPOL_POSITIVE,
106 .vd_pol = VPFE_PINPOL_POSITIVE,
107 .hd_pol = VPFE_PINPOL_POSITIVE,
114 .cfa_pat = ISIF_CFA_PAT_MOSAIC,
115 .data_msb = ISIF_BIT_MSB_11,
117 .data_shift = ISIF_NO_SHIFT,
119 .olop = ISIF_GREEN_BLUE,
122 .elep = ISIF_GREEN_RED,
125 .olop = ISIF_GREEN_BLUE,
128 .elep = ISIF_GREEN_RED,
133 .data_pack = ISIF_DATA_PACK8,
136 /* Raw Bayer formats */
137 static const u32 isif_raw_bayer_pix_formats[] = {
138 V4L2_PIX_FMT_SBGGR8, V4L2_PIX_FMT_SBGGR16};
140 /* Raw YUV formats */
141 static const u32 isif_raw_yuv_pix_formats[] = {
142 V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_YUYV};
144 /* register access routines */
145 static inline u32 regr(u32 offset)
147 return __raw_readl(isif_cfg.base_addr + offset);
150 static inline void regw(u32 val, u32 offset)
152 __raw_writel(val, isif_cfg.base_addr + offset);
155 /* reg_modify() - read, modify and write register */
156 static inline u32 reg_modify(u32 mask, u32 val, u32 offset)
158 u32 new_val = (regr(offset) & ~mask) | (val & mask);
160 regw(new_val, offset);
164 static inline void regw_lin_tbl(u32 val, u32 offset, int i)
167 __raw_writel(val, isif_cfg.linear_tbl0_addr + offset);
169 __raw_writel(val, isif_cfg.linear_tbl1_addr + offset);
172 static void isif_disable_all_modules(void)
180 /* disable linearization */
182 /* disable other modules here as they are supported */
185 static void isif_enable(int en)
188 /* Before disable isif, disable all ISIF modules */
189 isif_disable_all_modules();
191 * wait for next VD. Assume lowest scan rate is 12 Hz. So
192 * 100 msec delay is good enough
196 reg_modify(ISIF_SYNCEN_VDHDEN_MASK, en, SYNCEN);
199 static void isif_enable_output_to_sdram(int en)
201 reg_modify(ISIF_SYNCEN_WEN_MASK, en << ISIF_SYNCEN_WEN_SHIFT, SYNCEN);
204 static void isif_config_culling(struct isif_cul *cul)
208 /* Horizontal pattern */
209 val = (cul->hcpat_even << CULL_PAT_EVEN_LINE_SHIFT) | cul->hcpat_odd;
212 /* vertical pattern */
213 regw(cul->vcpat, CULV);
216 reg_modify(ISIF_LPF_MASK << ISIF_LPF_SHIFT,
217 cul->en_lpf << ISIF_LPF_SHIFT, MODESET);
220 static void isif_config_gain_offset(void)
222 struct isif_gain_offsets_adj *gain_off_p =
223 &isif_cfg.bayer.config_params.gain_offset;
226 val = (!!gain_off_p->gain_sdram_en << GAIN_SDRAM_EN_SHIFT) |
227 (!!gain_off_p->gain_ipipe_en << GAIN_IPIPE_EN_SHIFT) |
228 (!!gain_off_p->gain_h3a_en << GAIN_H3A_EN_SHIFT) |
229 (!!gain_off_p->offset_sdram_en << OFST_SDRAM_EN_SHIFT) |
230 (!!gain_off_p->offset_ipipe_en << OFST_IPIPE_EN_SHIFT) |
231 (!!gain_off_p->offset_h3a_en << OFST_H3A_EN_SHIFT);
233 reg_modify(GAIN_OFFSET_EN_MASK, val, CGAMMAWD);
235 val = (gain_off_p->gain.r_ye.integer << GAIN_INTEGER_SHIFT) |
236 gain_off_p->gain.r_ye.decimal;
239 val = (gain_off_p->gain.gr_cy.integer << GAIN_INTEGER_SHIFT) |
240 gain_off_p->gain.gr_cy.decimal;
243 val = (gain_off_p->gain.gb_g.integer << GAIN_INTEGER_SHIFT) |
244 gain_off_p->gain.gb_g.decimal;
247 val = (gain_off_p->gain.b_mg.integer << GAIN_INTEGER_SHIFT) |
248 gain_off_p->gain.b_mg.decimal;
251 regw(gain_off_p->offset, COFSTA);
254 static void isif_restore_defaults(void)
256 enum vpss_ccdc_source_sel source = VPSS_CCDCIN;
258 dev_dbg(isif_cfg.dev, "\nstarting isif_restore_defaults...");
259 isif_cfg.bayer.config_params = isif_config_defaults;
260 /* Enable clock to ISIF, IPIPEIF and BL */
261 vpss_enable_clock(VPSS_CCDC_CLOCK, 1);
262 vpss_enable_clock(VPSS_IPIPEIF_CLOCK, 1);
263 vpss_enable_clock(VPSS_BL_CLOCK, 1);
264 /* Set default offset and gain */
265 isif_config_gain_offset();
266 vpss_select_ccdc_source(source);
267 dev_dbg(isif_cfg.dev, "\nEnd of isif_restore_defaults...");
270 static int isif_open(struct device *device)
272 isif_restore_defaults();
276 /* This function will configure the window size to be capture in ISIF reg */
277 static void isif_setwin(struct v4l2_rect *image_win,
278 enum ccdc_frmfmt frm_fmt, int ppc)
280 int horz_start, horz_nr_pixels;
281 int vert_start, vert_nr_lines;
284 dev_dbg(isif_cfg.dev, "\nStarting isif_setwin...");
286 * ppc - per pixel count. indicates how many pixels per cell
287 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
288 * raw capture this is 1
290 horz_start = image_win->left << (ppc - 1);
291 horz_nr_pixels = ((image_win->width) << (ppc - 1)) - 1;
293 /* Writing the horizontal info into the registers */
294 regw(horz_start & START_PX_HOR_MASK, SPH);
295 regw(horz_nr_pixels & NUM_PX_HOR_MASK, LNH);
296 vert_start = image_win->top;
298 if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
299 vert_nr_lines = (image_win->height >> 1) - 1;
301 /* To account for VD since line 0 doesn't have any data */
304 /* To account for VD since line 0 doesn't have any data */
306 vert_nr_lines = image_win->height - 1;
307 /* configure VDINT0 and VDINT1 */
308 mid_img = vert_start + (image_win->height / 2);
309 regw(mid_img, VDINT1);
313 regw(vert_start & START_VER_ONE_MASK, SLV0);
314 regw(vert_start & START_VER_TWO_MASK, SLV1);
315 regw(vert_nr_lines & NUM_LINES_VER, LNV);
318 static void isif_config_bclamp(struct isif_black_clamp *bc)
323 * DC Offset is always added to image data irrespective of bc enable
326 regw(bc->dc_offset, CLDCOFST);
329 val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT;
331 /* Enable BC and horizontal clamp caculation paramaters */
332 val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT);
336 if (bc->horz.mode != ISIF_HORZ_BC_DISABLE) {
338 * Window count for calculation
339 * Base window selection
341 * Horizontal size of window
342 * vertical size of the window
343 * Horizontal start position of the window
344 * Vertical start position of the window
346 val = bc->horz.win_count_calc |
347 ((!!bc->horz.base_win_sel_calc) <<
348 ISIF_HORZ_BC_WIN_SEL_SHIFT) |
349 ((!!bc->horz.clamp_pix_limit) <<
350 ISIF_HORZ_BC_PIX_LIMIT_SHIFT) |
351 (bc->horz.win_h_sz_calc <<
352 ISIF_HORZ_BC_WIN_H_SIZE_SHIFT) |
353 (bc->horz.win_v_sz_calc <<
354 ISIF_HORZ_BC_WIN_V_SIZE_SHIFT);
357 regw(bc->horz.win_start_h_calc, CLHWIN1);
358 regw(bc->horz.win_start_v_calc, CLHWIN2);
361 /* vertical clamp caculation paramaters */
363 /* Reset clamp value sel for previous line */
365 (bc->vert.reset_val_sel << ISIF_VERT_BC_RST_VAL_SEL_SHIFT) |
366 (bc->vert.line_ave_coef << ISIF_VERT_BC_LINE_AVE_COEF_SHIFT);
369 /* Optical Black horizontal start position */
370 regw(bc->vert.ob_start_h, CLVWIN1);
371 /* Optical Black vertical start position */
372 regw(bc->vert.ob_start_v, CLVWIN2);
373 /* Optical Black vertical size for calculation */
374 regw(bc->vert.ob_v_sz_calc, CLVWIN3);
375 /* Vertical start position for BC subtraction */
376 regw(bc->vert_start_sub, CLSV);
380 static void isif_config_linearization(struct isif_linearize *linearize)
384 if (!linearize->en) {
389 /* shift value for correction & enable linearization (set lsb) */
390 val = (linearize->corr_shft << ISIF_LIN_CORRSFT_SHIFT) | 1;
394 val = ((!!linearize->scale_fact.integer) <<
395 ISIF_LIN_SCALE_FACT_INTEG_SHIFT) |
396 linearize->scale_fact.decimal;
399 for (i = 0; i < ISIF_LINEAR_TAB_SIZE; i++) {
401 regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 1);
403 regw_lin_tbl(linearize->table[i], ((i >> 1) << 2), 0);
407 static int isif_config_dfc(struct isif_dfc *vdfc)
409 /* initialize retries to loop for max ~ 250 usec */
410 u32 val, count, retries = loops_per_jiffy / (4000/HZ);
416 /* Correction mode */
417 val = (vdfc->corr_mode << ISIF_VDFC_CORR_MOD_SHIFT);
419 /* Correct whole line or partial */
420 if (vdfc->corr_whole_line)
421 val |= 1 << ISIF_VDFC_CORR_WHOLE_LN_SHIFT;
423 /* level shift value */
424 val |= vdfc->def_level_shift << ISIF_VDFC_LEVEL_SHFT_SHIFT;
428 /* Defect saturation level */
429 regw(vdfc->def_sat_level, VDFSATLV);
431 regw(vdfc->table[0].pos_vert, DFCMEM0);
432 regw(vdfc->table[0].pos_horz, DFCMEM1);
433 if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
434 vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
435 regw(vdfc->table[0].level_at_pos, DFCMEM2);
436 regw(vdfc->table[0].level_up_pixels, DFCMEM3);
437 regw(vdfc->table[0].level_low_pixels, DFCMEM4);
440 /* set DFCMARST and set DFCMWR */
441 val = regr(DFCMEMCTL) | (1 << ISIF_DFCMEMCTL_DFCMARST_SHIFT) | 1;
442 regw(val, DFCMEMCTL);
445 while (count && (regr(DFCMEMCTL) & 0x1))
449 dev_dbg(isif_cfg.dev, "defect table write timeout !!!\n");
453 for (i = 1; i < vdfc->num_vdefects; i++) {
454 regw(vdfc->table[i].pos_vert, DFCMEM0);
455 regw(vdfc->table[i].pos_horz, DFCMEM1);
456 if (vdfc->corr_mode == ISIF_VDFC_NORMAL ||
457 vdfc->corr_mode == ISIF_VDFC_HORZ_INTERPOL_IF_SAT) {
458 regw(vdfc->table[i].level_at_pos, DFCMEM2);
459 regw(vdfc->table[i].level_up_pixels, DFCMEM3);
460 regw(vdfc->table[i].level_low_pixels, DFCMEM4);
462 val = regr(DFCMEMCTL);
463 /* clear DFCMARST and set DFCMWR */
464 val &= ~BIT(ISIF_DFCMEMCTL_DFCMARST_SHIFT);
466 regw(val, DFCMEMCTL);
469 while (count && (regr(DFCMEMCTL) & 0x1))
473 dev_err(isif_cfg.dev,
474 "defect table write timeout !!!\n");
478 if (vdfc->num_vdefects < ISIF_VDFC_TABLE_SIZE) {
479 /* Extra cycle needed */
481 regw(0x1FFF, DFCMEM1);
486 reg_modify((1 << ISIF_VDFC_EN_SHIFT), (1 << ISIF_VDFC_EN_SHIFT),
491 static void isif_config_csc(struct isif_df_csc *df_csc)
493 u32 val1 = 0, val2 = 0, i;
495 if (!df_csc->csc.en) {
499 for (i = 0; i < ISIF_CSC_NUM_COEFF; i++) {
502 val1 = (df_csc->csc.coeff[i].integer <<
503 ISIF_CSC_COEF_INTEG_SHIFT) |
504 df_csc->csc.coeff[i].decimal;
508 val2 = (df_csc->csc.coeff[i].integer <<
509 ISIF_CSC_COEF_INTEG_SHIFT) |
510 df_csc->csc.coeff[i].decimal;
511 val2 <<= ISIF_CSCM_MSB_SHIFT;
513 regw(val2, (CSCM0 + ((i - 1) << 1)));
517 /* program the active area */
518 regw(df_csc->start_pix, FMTSPH);
520 * one extra pixel as required for CSC. Actually number of
521 * pixel - 1 should be configured in this register. So we
522 * need to subtract 1 before writing to FMTSPH, but we will
523 * not do this since csc requires one extra pixel
525 regw(df_csc->num_pixels, FMTLNH);
526 regw(df_csc->start_line, FMTSLV);
528 * one extra line as required for CSC. See reason documented for
531 regw(df_csc->num_lines, FMTLNV);
537 static int isif_config_raw(void)
539 struct isif_params_raw *params = &isif_cfg.bayer;
540 struct isif_config_params_raw *module_params =
541 &isif_cfg.bayer.config_params;
542 struct vpss_pg_frame_size frame_size;
543 struct vpss_sync_pol sync;
546 dev_dbg(isif_cfg.dev, "\nStarting isif_config_raw..\n");
549 * Configure CCDCFG register:-
550 * Set CCD Not to swap input since input is RAW data
551 * Set FID detection function to Latch at V-Sync
552 * Set WENLOG - isif valid area
555 * Packed to 8 or 16 bits
558 val = ISIF_YCINSWP_RAW | ISIF_CCDCFG_FIDMD_LATCH_VSYNC |
559 ISIF_CCDCFG_WENLOG_AND | ISIF_CCDCFG_TRGSEL_WEN |
560 ISIF_CCDCFG_EXTRG_DISABLE | isif_cfg.data_pack;
562 dev_dbg(isif_cfg.dev, "Writing 0x%x to ...CCDCFG \n", val);
566 * Configure the vertical sync polarity(MODESET.VDPOL)
567 * Configure the horizontal sync polarity (MODESET.HDPOL)
568 * Configure frame id polarity (MODESET.FLDPOL)
569 * Configure data polarity
570 * Configure External WEN Selection
571 * Configure frame format(progressive or interlace)
572 * Configure pixel format (Input mode)
573 * Configure the data shift
576 val = ISIF_VDHDOUT_INPUT | (params->vd_pol << ISIF_VD_POL_SHIFT) |
577 (params->hd_pol << ISIF_HD_POL_SHIFT) |
578 (params->fid_pol << ISIF_FID_POL_SHIFT) |
579 (ISIF_DATAPOL_NORMAL << ISIF_DATAPOL_SHIFT) |
580 (ISIF_EXWEN_DISABLE << ISIF_EXWEN_SHIFT) |
581 (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
582 (params->pix_fmt << ISIF_INPUT_SHIFT) |
583 (params->config_params.data_shift << ISIF_DATASFT_SHIFT);
586 dev_dbg(isif_cfg.dev, "Writing 0x%x to MODESET...\n", val);
589 * Configure GAMMAWD register
590 * CFA pattern setting
592 val = params->cfa_pat << ISIF_GAMMAWD_CFA_SHIFT;
595 if (module_params->compress.alg == ISIF_ALAW)
596 val |= ISIF_ALAW_ENABLE;
598 val |= (params->data_msb << ISIF_ALAW_GAMMA_WD_SHIFT);
601 /* Configure DPCM compression settings */
602 if (module_params->compress.alg == ISIF_DPCM) {
603 val = BIT(ISIF_DPCM_EN_SHIFT) |
604 (module_params->compress.pred <<
605 ISIF_DPCM_PREDICTOR_SHIFT);
610 /* Configure Gain & Offset */
611 isif_config_gain_offset();
613 /* Configure Color pattern */
614 val = (params->config_params.col_pat_field0.olop) |
615 (params->config_params.col_pat_field0.olep << 2) |
616 (params->config_params.col_pat_field0.elop << 4) |
617 (params->config_params.col_pat_field0.elep << 6) |
618 (params->config_params.col_pat_field1.olop << 8) |
619 (params->config_params.col_pat_field1.olep << 10) |
620 (params->config_params.col_pat_field1.elop << 12) |
621 (params->config_params.col_pat_field1.elep << 14);
623 dev_dbg(isif_cfg.dev, "Writing %x to CCOLP ...\n", val);
625 /* Configure HSIZE register */
626 val = (!!params->horz_flip_en) << ISIF_HSIZE_FLIP_SHIFT;
628 /* calculate line offset in 32 bytes based on pack value */
629 if (isif_cfg.data_pack == ISIF_PACK_8BIT)
630 val |= ((params->win.width + 31) >> 5);
631 else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
632 val |= (((params->win.width +
633 (params->win.width >> 2)) + 31) >> 5);
635 val |= (((params->win.width * 2) + 31) >> 5);
638 /* Configure SDOFST register */
639 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
640 if (params->image_invert_en) {
641 /* For interlace inverse mode */
642 regw(0x4B6D, SDOFST);
643 dev_dbg(isif_cfg.dev, "Writing 0x4B6D to SDOFST...\n");
645 /* For interlace non inverse mode */
646 regw(0x0B6D, SDOFST);
647 dev_dbg(isif_cfg.dev, "Writing 0x0B6D to SDOFST...\n");
649 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
650 if (params->image_invert_en) {
651 /* For progressive inverse mode */
652 regw(0x4000, SDOFST);
653 dev_dbg(isif_cfg.dev, "Writing 0x4000 to SDOFST...\n");
655 /* For progressive non inverse mode */
656 regw(0x0000, SDOFST);
657 dev_dbg(isif_cfg.dev, "Writing 0x0000 to SDOFST...\n");
661 /* Configure video window */
662 isif_setwin(¶ms->win, params->frm_fmt, 1);
664 /* Configure Black Clamp */
665 isif_config_bclamp(&module_params->bclamp);
667 /* Configure Vertical Defection Pixel Correction */
668 if (isif_config_dfc(&module_params->dfc) < 0)
671 if (!module_params->df_csc.df_or_csc)
672 /* Configure Color Space Conversion */
673 isif_config_csc(&module_params->df_csc);
675 isif_config_linearization(&module_params->linearize);
677 /* Configure Culling */
678 isif_config_culling(&module_params->culling);
680 /* Configure horizontal and vertical offsets(DFC,LSC,Gain) */
681 regw(module_params->horz_offset, DATAHOFST);
682 regw(module_params->vert_offset, DATAVOFST);
684 /* Setup test pattern if enabled */
685 if (params->config_params.test_pat_gen) {
686 /* Use the HD/VD pol settings from user */
687 sync.ccdpg_hdpol = params->hd_pol;
688 sync.ccdpg_vdpol = params->vd_pol;
689 dm365_vpss_set_sync_pol(sync);
690 frame_size.hlpfr = isif_cfg.bayer.win.width;
691 frame_size.pplen = isif_cfg.bayer.win.height;
692 dm365_vpss_set_pg_frame_size(frame_size);
693 vpss_select_ccdc_source(VPSS_PGLPBK);
696 dev_dbg(isif_cfg.dev, "\nEnd of isif_config_ycbcr...\n");
700 static int isif_set_buftype(enum ccdc_buftype buf_type)
702 if (isif_cfg.if_type == VPFE_RAW_BAYER)
703 isif_cfg.bayer.buf_type = buf_type;
705 isif_cfg.ycbcr.buf_type = buf_type;
710 static enum ccdc_buftype isif_get_buftype(void)
712 if (isif_cfg.if_type == VPFE_RAW_BAYER)
713 return isif_cfg.bayer.buf_type;
715 return isif_cfg.ycbcr.buf_type;
718 static int isif_enum_pix(u32 *pix, int i)
722 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
723 if (i < ARRAY_SIZE(isif_raw_bayer_pix_formats)) {
724 *pix = isif_raw_bayer_pix_formats[i];
728 if (i < ARRAY_SIZE(isif_raw_yuv_pix_formats)) {
729 *pix = isif_raw_yuv_pix_formats[i];
737 static int isif_set_pixel_format(unsigned int pixfmt)
739 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
740 if (pixfmt == V4L2_PIX_FMT_SBGGR8) {
741 if ((isif_cfg.bayer.config_params.compress.alg !=
743 (isif_cfg.bayer.config_params.compress.alg !=
745 dev_dbg(isif_cfg.dev,
746 "Either configure A-Law or DPCM\n");
749 isif_cfg.data_pack = ISIF_PACK_8BIT;
750 } else if (pixfmt == V4L2_PIX_FMT_SBGGR16) {
751 isif_cfg.bayer.config_params.compress.alg =
753 isif_cfg.data_pack = ISIF_PACK_16BIT;
756 isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
758 if (pixfmt == V4L2_PIX_FMT_YUYV)
759 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
760 else if (pixfmt == V4L2_PIX_FMT_UYVY)
761 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
764 isif_cfg.data_pack = ISIF_PACK_8BIT;
769 static u32 isif_get_pixel_format(void)
773 if (isif_cfg.if_type == VPFE_RAW_BAYER)
774 if (isif_cfg.bayer.config_params.compress.alg == ISIF_ALAW ||
775 isif_cfg.bayer.config_params.compress.alg == ISIF_DPCM)
776 pixfmt = V4L2_PIX_FMT_SBGGR8;
778 pixfmt = V4L2_PIX_FMT_SBGGR16;
780 if (isif_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
781 pixfmt = V4L2_PIX_FMT_YUYV;
783 pixfmt = V4L2_PIX_FMT_UYVY;
788 static int isif_set_image_window(struct v4l2_rect *win)
790 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
791 isif_cfg.bayer.win.top = win->top;
792 isif_cfg.bayer.win.left = win->left;
793 isif_cfg.bayer.win.width = win->width;
794 isif_cfg.bayer.win.height = win->height;
796 isif_cfg.ycbcr.win.top = win->top;
797 isif_cfg.ycbcr.win.left = win->left;
798 isif_cfg.ycbcr.win.width = win->width;
799 isif_cfg.ycbcr.win.height = win->height;
804 static void isif_get_image_window(struct v4l2_rect *win)
806 if (isif_cfg.if_type == VPFE_RAW_BAYER)
807 *win = isif_cfg.bayer.win;
809 *win = isif_cfg.ycbcr.win;
812 static unsigned int isif_get_line_length(void)
816 if (isif_cfg.if_type == VPFE_RAW_BAYER) {
817 if (isif_cfg.data_pack == ISIF_PACK_8BIT)
818 len = ((isif_cfg.bayer.win.width));
819 else if (isif_cfg.data_pack == ISIF_PACK_12BIT)
820 len = (((isif_cfg.bayer.win.width * 2) +
821 (isif_cfg.bayer.win.width >> 2)));
823 len = (((isif_cfg.bayer.win.width * 2)));
825 len = (((isif_cfg.ycbcr.win.width * 2)));
826 return ALIGN(len, 32);
829 static int isif_set_frame_format(enum ccdc_frmfmt frm_fmt)
831 if (isif_cfg.if_type == VPFE_RAW_BAYER)
832 isif_cfg.bayer.frm_fmt = frm_fmt;
834 isif_cfg.ycbcr.frm_fmt = frm_fmt;
837 static enum ccdc_frmfmt isif_get_frame_format(void)
839 if (isif_cfg.if_type == VPFE_RAW_BAYER)
840 return isif_cfg.bayer.frm_fmt;
841 return isif_cfg.ycbcr.frm_fmt;
844 static int isif_getfid(void)
846 return (regr(MODESET) >> 15) & 0x1;
849 /* misc operations */
850 static void isif_setfbaddr(unsigned long addr)
852 regw((addr >> 21) & 0x07ff, CADU);
853 regw((addr >> 5) & 0x0ffff, CADL);
856 static int isif_set_hw_if_params(struct vpfe_hw_if_param *params)
858 isif_cfg.if_type = params->if_type;
860 switch (params->if_type) {
862 case VPFE_BT656_10BIT:
863 case VPFE_YCBCR_SYNC_8:
864 isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
865 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
868 case VPFE_YCBCR_SYNC_16:
869 isif_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
870 isif_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
873 isif_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
876 dev_dbg(isif_cfg.dev, "Invalid interface type\n");
883 /* This function will configure ISIF for YCbCr parameters. */
884 static int isif_config_ycbcr(void)
886 struct isif_ycbcr_config *params = &isif_cfg.ycbcr;
887 u32 modeset = 0, ccdcfg = 0;
889 dev_dbg(isif_cfg.dev, "\nStarting isif_config_ycbcr...");
891 /* configure pixel format or input mode */
892 modeset = modeset | (params->pix_fmt << ISIF_INPUT_SHIFT) |
893 (params->frm_fmt << ISIF_FRM_FMT_SHIFT) |
894 (params->fid_pol << ISIF_FID_POL_SHIFT) |
895 (params->hd_pol << ISIF_HD_POL_SHIFT) |
896 (params->vd_pol << ISIF_VD_POL_SHIFT);
898 /* pack the data to 8-bit ISIFCFG */
899 switch (isif_cfg.if_type) {
901 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
902 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
905 modeset |= (VPFE_PINPOL_NEGATIVE << ISIF_VD_POL_SHIFT);
907 ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR;
909 case VPFE_BT656_10BIT:
910 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
911 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
914 /* setup BT.656, embedded sync */
916 /* enable 10 bit mode in ccdcfg */
917 ccdcfg = ccdcfg | ISIF_DATA_PACK8 | ISIF_YCINSWP_YCBCR |
921 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
922 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
928 case VPFE_YCBCR_SYNC_8:
929 ccdcfg |= ISIF_DATA_PACK8;
930 ccdcfg |= ISIF_YCINSWP_YCBCR;
931 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_8BIT) {
932 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
936 case VPFE_YCBCR_SYNC_16:
937 if (params->pix_fmt != CCDC_PIXFMT_YCBCR_16BIT) {
938 dev_dbg(isif_cfg.dev, "Invalid pix_fmt(input mode)\n");
943 /* should never come here */
944 dev_dbg(isif_cfg.dev, "Invalid interface type\n");
948 regw(modeset, MODESET);
950 /* Set up pix order */
951 ccdcfg |= params->pix_order << ISIF_PIX_ORDER_SHIFT;
953 regw(ccdcfg, CCDCFG);
955 /* configure video window */
956 if ((isif_cfg.if_type == VPFE_BT1120) ||
957 (isif_cfg.if_type == VPFE_YCBCR_SYNC_16))
958 isif_setwin(¶ms->win, params->frm_fmt, 1);
960 isif_setwin(¶ms->win, params->frm_fmt, 2);
963 * configure the horizontal line offset
964 * this is done by rounding up width to a multiple of 16 pixels
965 * and multiply by two to account for y:cb:cr 4:2:2 data
967 regw(((((params->win.width * 2) + 31) & 0xffffffe0) >> 5), HSIZE);
969 /* configure the memory line offset */
970 if ((params->frm_fmt == CCDC_FRMFMT_INTERLACED) &&
971 (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED))
972 /* two fields are interleaved in memory */
973 regw(0x00000249, SDOFST);
978 static int isif_configure(void)
980 if (isif_cfg.if_type == VPFE_RAW_BAYER)
981 return isif_config_raw();
982 return isif_config_ycbcr();
985 static int isif_close(struct device *device)
987 /* copy defaults to module params */
988 isif_cfg.bayer.config_params = isif_config_defaults;
992 static const struct ccdc_hw_device isif_hw_dev = {
994 .owner = THIS_MODULE,
998 .enable = isif_enable,
999 .enable_out_to_sdram = isif_enable_output_to_sdram,
1000 .set_hw_if_params = isif_set_hw_if_params,
1001 .configure = isif_configure,
1002 .set_buftype = isif_set_buftype,
1003 .get_buftype = isif_get_buftype,
1004 .enum_pix = isif_enum_pix,
1005 .set_pixel_format = isif_set_pixel_format,
1006 .get_pixel_format = isif_get_pixel_format,
1007 .set_frame_format = isif_set_frame_format,
1008 .get_frame_format = isif_get_frame_format,
1009 .set_image_window = isif_set_image_window,
1010 .get_image_window = isif_get_image_window,
1011 .get_line_length = isif_get_line_length,
1012 .setfbaddr = isif_setfbaddr,
1013 .getfid = isif_getfid,
1017 static int isif_probe(struct platform_device *pdev)
1019 void (*setup_pinmux)(void);
1020 struct resource *res;
1024 /* Platform data holds setup_pinmux function ptr */
1025 if (!pdev->dev.platform_data)
1029 * first try to register with vpfe. If not correct platform, then we
1030 * don't have to iomap
1032 status = vpfe_register_ccdc_device(&isif_hw_dev);
1036 setup_pinmux = pdev->dev.platform_data;
1038 * setup Mux configuration for ccdc which may be different for
1039 * different SoCs using this CCDC
1044 /* Get the ISIF base address, linearization table0 and table1 addr. */
1046 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1049 goto fail_nobase_res;
1051 res = request_mem_region(res->start, resource_size(res),
1055 goto fail_nobase_res;
1057 addr = ioremap_nocache(res->start, resource_size(res));
1060 goto fail_base_iomap;
1064 /* ISIF base address */
1065 isif_cfg.base_addr = addr;
1068 /* ISIF linear tbl0 address */
1069 isif_cfg.linear_tbl0_addr = addr;
1072 /* ISIF linear tbl0 address */
1073 isif_cfg.linear_tbl1_addr = addr;
1078 isif_cfg.dev = &pdev->dev;
1080 printk(KERN_NOTICE "%s is registered with vpfe.\n",
1084 release_mem_region(res->start, resource_size(res));
1087 if (isif_cfg.base_addr)
1088 iounmap(isif_cfg.base_addr);
1089 if (isif_cfg.linear_tbl0_addr)
1090 iounmap(isif_cfg.linear_tbl0_addr);
1093 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1095 release_mem_region(res->start, resource_size(res));
1098 vpfe_unregister_ccdc_device(&isif_hw_dev);
1102 static int isif_remove(struct platform_device *pdev)
1104 struct resource *res;
1107 iounmap(isif_cfg.base_addr);
1108 iounmap(isif_cfg.linear_tbl0_addr);
1109 iounmap(isif_cfg.linear_tbl1_addr);
1111 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1113 release_mem_region(res->start, resource_size(res));
1116 vpfe_unregister_ccdc_device(&isif_hw_dev);
1120 static struct platform_driver isif_driver = {
1124 .remove = isif_remove,
1125 .probe = isif_probe,
1128 module_platform_driver(isif_driver);
1130 MODULE_LICENSE("GPL");