drivers/media/platform/aspeed-video.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 // Copyright 2020 IBM Corp.
   3 // Copyright (c) 2019-2020 Intel Corporation
   4
   5 #include <linux/atomic.h>
   6 #include <linux/bitfield.h>
   7 #include <linux/clk.h>
   8 #include <linux/delay.h>
   9 #include <linux/device.h>
  10 #include <linux/dma-mapping.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/module.h>
  14 #include <linux/mutex.h>
  15 #include <linux/of.h>
  16 #include <linux/of_irq.h>
  17 #include <linux/of_reserved_mem.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/sched.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/string.h>
  22 #include <linux/v4l2-controls.h>
  23 #include <linux/videodev2.h>
  24 #include <linux/wait.h>
  25 #include <linux/workqueue.h>
  26 #include <media/v4l2-ctrls.h>
  27 #include <media/v4l2-dev.h>
  28 #include <media/v4l2-device.h>
  29 #include <media/v4l2-dv-timings.h>
  30 #include <media/v4l2-event.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/videobuf2-dma-contig.h>
  33
  34 #define DEVICE_NAME                     "aspeed-video"
  35
  36 #define ASPEED_VIDEO_JPEG_NUM_QUALITIES 12
  37 #define ASPEED_VIDEO_JPEG_HEADER_SIZE   10
  38 #define ASPEED_VIDEO_JPEG_QUANT_SIZE    116
  39 #define ASPEED_VIDEO_JPEG_DCT_SIZE      34
  40
  41 #define MAX_FRAME_RATE                  60
  42 #define MAX_HEIGHT                      1200
  43 #define MAX_WIDTH                       1920
  44 #define MIN_HEIGHT                      480
  45 #define MIN_WIDTH                       640
  46
  47 #define NUM_POLARITY_CHECKS             10
  48 #define INVALID_RESOLUTION_RETRIES      2
  49 #define INVALID_RESOLUTION_DELAY        msecs_to_jiffies(250)
  50 #define RESOLUTION_CHANGE_DELAY         msecs_to_jiffies(500)
  51 #define MODE_DETECT_TIMEOUT             msecs_to_jiffies(500)
  52 #define STOP_TIMEOUT                    msecs_to_jiffies(1000)
  53 #define DIRECT_FETCH_THRESHOLD          0x0c0000 /* 1024 * 768 */
  54
  55 #define VE_MAX_SRC_BUFFER_SIZE          0x8ca000 /* 1920 * 1200, 32bpp */
  56 #define VE_JPEG_HEADER_SIZE             0x006000 /* 512 * 12 * 4 */
  57
  58 #define VE_PROTECTION_KEY               0x000
  59 #define  VE_PROTECTION_KEY_UNLOCK       0x1a038aa8
  60
  61 #define VE_SEQ_CTRL                     0x004
  62 #define  VE_SEQ_CTRL_TRIG_MODE_DET      BIT(0)
  63 #define  VE_SEQ_CTRL_TRIG_CAPTURE       BIT(1)
  64 #define  VE_SEQ_CTRL_FORCE_IDLE         BIT(2)
  65 #define  VE_SEQ_CTRL_MULT_FRAME         BIT(3)
  66 #define  VE_SEQ_CTRL_TRIG_COMP          BIT(4)
  67 #define  VE_SEQ_CTRL_AUTO_COMP          BIT(5)
  68 #define  VE_SEQ_CTRL_EN_WATCHDOG        BIT(7)
  69 #define  VE_SEQ_CTRL_YUV420             BIT(10)
  70 #define  VE_SEQ_CTRL_COMP_FMT           GENMASK(11, 10)
  71 #define  VE_SEQ_CTRL_HALT               BIT(12)
  72 #define  VE_SEQ_CTRL_EN_WATCHDOG_COMP   BIT(14)
  73 #define  VE_SEQ_CTRL_TRIG_JPG           BIT(15)
  74 #define  VE_SEQ_CTRL_CAP_BUSY           BIT(16)
  75 #define  VE_SEQ_CTRL_COMP_BUSY          BIT(18)
  76
  77 #define AST2500_VE_SEQ_CTRL_JPEG_MODE   BIT(13)
  78 #define AST2400_VE_SEQ_CTRL_JPEG_MODE   BIT(8)
  79
  80 #define VE_CTRL                         0x008
  81 #define  VE_CTRL_HSYNC_POL              BIT(0)
  82 #define  VE_CTRL_VSYNC_POL              BIT(1)
  83 #define  VE_CTRL_SOURCE                 BIT(2)
  84 #define  VE_CTRL_INT_DE                 BIT(4)
  85 #define  VE_CTRL_DIRECT_FETCH           BIT(5)
  86 #define  VE_CTRL_YUV                    BIT(6)
  87 #define  VE_CTRL_RGB                    BIT(7)
  88 #define  VE_CTRL_CAPTURE_FMT            GENMASK(7, 6)
  89 #define  VE_CTRL_AUTO_OR_CURSOR         BIT(8)
  90 #define  VE_CTRL_CLK_INVERSE            BIT(11)
  91 #define  VE_CTRL_CLK_DELAY              GENMASK(11, 9)
  92 #define  VE_CTRL_INTERLACE              BIT(14)
  93 #define  VE_CTRL_HSYNC_POL_CTRL         BIT(15)
  94 #define  VE_CTRL_FRC                    GENMASK(23, 16)
  95
  96 #define VE_TGS_0                        0x00c
  97 #define VE_TGS_1                        0x010
  98 #define  VE_TGS_FIRST                   GENMASK(28, 16)
  99 #define  VE_TGS_LAST                    GENMASK(12, 0)
 100
 101 #define VE_SCALING_FACTOR               0x014
 102 #define VE_SCALING_FILTER0              0x018
 103 #define VE_SCALING_FILTER1              0x01c
 104 #define VE_SCALING_FILTER2              0x020
 105 #define VE_SCALING_FILTER3              0x024
 106
 107 #define VE_CAP_WINDOW                   0x030
 108 #define VE_COMP_WINDOW                  0x034
 109 #define VE_COMP_PROC_OFFSET             0x038
 110 #define VE_COMP_OFFSET                  0x03c
 111 #define VE_JPEG_ADDR                    0x040
 112 #define VE_SRC0_ADDR                    0x044
 113 #define VE_SRC_SCANLINE_OFFSET          0x048
 114 #define VE_SRC1_ADDR                    0x04c
 115 #define VE_COMP_ADDR                    0x054
 116
 117 #define VE_STREAM_BUF_SIZE              0x058
 118 #define  VE_STREAM_BUF_SIZE_N_PACKETS   GENMASK(5, 3)
 119 #define  VE_STREAM_BUF_SIZE_P_SIZE      GENMASK(2, 0)
 120
 121 #define VE_COMP_CTRL                    0x060
 122 #define  VE_COMP_CTRL_VQ_DCT_ONLY       BIT(0)
 123 #define  VE_COMP_CTRL_VQ_4COLOR         BIT(1)
 124 #define  VE_COMP_CTRL_QUANTIZE          BIT(2)
 125 #define  VE_COMP_CTRL_EN_BQ             BIT(4)
 126 #define  VE_COMP_CTRL_EN_CRYPTO         BIT(5)
 127 #define  VE_COMP_CTRL_DCT_CHR           GENMASK(10, 6)
 128 #define  VE_COMP_CTRL_DCT_LUM           GENMASK(15, 11)
 129 #define  VE_COMP_CTRL_EN_HQ             BIT(16)
 130 #define  VE_COMP_CTRL_RSVD              BIT(19)
 131 #define  VE_COMP_CTRL_ENCODE            GENMASK(21, 20)
 132 #define  VE_COMP_CTRL_HQ_DCT_CHR        GENMASK(26, 22)
 133 #define  VE_COMP_CTRL_HQ_DCT_LUM        GENMASK(31, 27)
 134
 135 #define AST2400_VE_COMP_SIZE_READ_BACK  0x078
 136 #define AST2600_VE_COMP_SIZE_READ_BACK  0x084
 137
 138 #define VE_SRC_LR_EDGE_DET              0x090
 139 #define  VE_SRC_LR_EDGE_DET_LEFT        GENMASK(11, 0)
 140 #define  VE_SRC_LR_EDGE_DET_NO_V        BIT(12)
 141 #define  VE_SRC_LR_EDGE_DET_NO_H        BIT(13)
 142 #define  VE_SRC_LR_EDGE_DET_NO_DISP     BIT(14)
 143 #define  VE_SRC_LR_EDGE_DET_NO_CLK      BIT(15)
 144 #define  VE_SRC_LR_EDGE_DET_RT_SHF      16
 145 #define  VE_SRC_LR_EDGE_DET_RT          GENMASK(27, VE_SRC_LR_EDGE_DET_RT_SHF)
 146 #define  VE_SRC_LR_EDGE_DET_INTERLACE   BIT(31)
 147
 148 #define VE_SRC_TB_EDGE_DET              0x094
 149 #define  VE_SRC_TB_EDGE_DET_TOP         GENMASK(12, 0)
 150 #define  VE_SRC_TB_EDGE_DET_BOT_SHF     16
 151 #define  VE_SRC_TB_EDGE_DET_BOT         GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF)
 152
 153 #define VE_MODE_DETECT_STATUS           0x098
 154 #define  VE_MODE_DETECT_H_PERIOD        GENMASK(11, 0)
 155 #define  VE_MODE_DETECT_V_LINES_SHF     16
 156 #define  VE_MODE_DETECT_V_LINES         GENMASK(27, VE_MODE_DETECT_V_LINES_SHF)
 157 #define  VE_MODE_DETECT_STATUS_VSYNC    BIT(28)
 158 #define  VE_MODE_DETECT_STATUS_HSYNC    BIT(29)
 159
 160 #define VE_SYNC_STATUS                  0x09c
 161 #define  VE_SYNC_STATUS_HSYNC           GENMASK(11, 0)
 162 #define  VE_SYNC_STATUS_VSYNC_SHF       16
 163 #define  VE_SYNC_STATUS_VSYNC           GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF)
 164
 165 #define VE_H_TOTAL_PIXELS               0x0A0
 166
 167 #define VE_INTERRUPT_CTRL               0x304
 168 #define VE_INTERRUPT_STATUS             0x308
 169 #define  VE_INTERRUPT_MODE_DETECT_WD    BIT(0)
 170 #define  VE_INTERRUPT_CAPTURE_COMPLETE  BIT(1)
 171 #define  VE_INTERRUPT_COMP_READY        BIT(2)
 172 #define  VE_INTERRUPT_COMP_COMPLETE     BIT(3)
 173 #define  VE_INTERRUPT_MODE_DETECT       BIT(4)
 174 #define  VE_INTERRUPT_FRAME_COMPLETE    BIT(5)
 175 #define  VE_INTERRUPT_DECODE_ERR        BIT(6)
 176 #define  VE_INTERRUPT_HALT_READY        BIT(8)
 177 #define  VE_INTERRUPT_HANG_WD           BIT(9)
 178 #define  VE_INTERRUPT_STREAM_DESC       BIT(10)
 179 #define  VE_INTERRUPT_VSYNC_DESC        BIT(11)
 180
 181 #define VE_MODE_DETECT                  0x30c
 182 #define VE_MEM_RESTRICT_START           0x310
 183 #define VE_MEM_RESTRICT_END             0x314
 184
 185 enum {
 186         VIDEO_MODE_DETECT_DONE,
 187         VIDEO_RES_CHANGE,
 188         VIDEO_RES_DETECT,
 189         VIDEO_STREAMING,
 190         VIDEO_FRAME_INPRG,
 191         VIDEO_STOPPED,
 192         VIDEO_CLOCKS_ON,
 193 };
 194
 195 struct aspeed_video_addr {
 196         unsigned int size;
 197         dma_addr_t dma;
 198         void *virt;
 199 };
 200
 201 struct aspeed_video_buffer {
 202         struct vb2_v4l2_buffer vb;
 203         struct list_head link;
 204 };
 205
 206 #define to_aspeed_video_buffer(x) \
 207         container_of((x), struct aspeed_video_buffer, vb)
 208
 209 struct aspeed_video {
 210         void __iomem *base;
 211         struct clk *eclk;
 212         struct clk *vclk;
 213
 214         struct device *dev;
 215         struct v4l2_ctrl_handler ctrl_handler;
 216         struct v4l2_device v4l2_dev;
 217         struct v4l2_pix_format pix_fmt;
 218         struct v4l2_bt_timings active_timings;
 219         struct v4l2_bt_timings detected_timings;
 220         u32 v4l2_input_status;
 221         struct vb2_queue queue;
 222         struct video_device vdev;
 223         struct mutex video_lock;        /* v4l2 and videobuf2 lock */
 224
 225         u32 jpeg_mode;
 226         u32 comp_size_read;
 227
 228         wait_queue_head_t wait;
 229         spinlock_t lock;                /* buffer list lock */
 230         struct delayed_work res_work;
 231         struct list_head buffers;
 232         unsigned long flags;
 233         unsigned int sequence;
 234
 235         unsigned int max_compressed_size;
 236         struct aspeed_video_addr srcs[2];
 237         struct aspeed_video_addr jpeg;
 238
 239         bool yuv420;
 240         unsigned int frame_rate;
 241         unsigned int jpeg_quality;
 242
 243         unsigned int frame_bottom;
 244         unsigned int frame_left;
 245         unsigned int frame_right;
 246         unsigned int frame_top;
 247 };
 248
 249 #define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev)
 250
 251 struct aspeed_video_config {
 252         u32 jpeg_mode;
 253         u32 comp_size_read;
 254 };
 255
 256 static const struct aspeed_video_config ast2400_config = {
 257         .jpeg_mode = AST2400_VE_SEQ_CTRL_JPEG_MODE,
 258         .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
 259 };
 260
 261 static const struct aspeed_video_config ast2500_config = {
 262         .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
 263         .comp_size_read = AST2400_VE_COMP_SIZE_READ_BACK,
 264 };
 265
 266 static const struct aspeed_video_config ast2600_config = {
 267         .jpeg_mode = AST2500_VE_SEQ_CTRL_JPEG_MODE,
 268         .comp_size_read = AST2600_VE_COMP_SIZE_READ_BACK,
 269 };
 270
 271 static const u32 aspeed_video_jpeg_header[ASPEED_VIDEO_JPEG_HEADER_SIZE] = {
 272         0xe0ffd8ff, 0x464a1000, 0x01004649, 0x60000101, 0x00006000, 0x0f00feff,
 273         0x00002d05, 0x00000000, 0x00000000, 0x00dbff00
 274 };
 275
 276 static const u32 aspeed_video_jpeg_quant[ASPEED_VIDEO_JPEG_QUANT_SIZE] = {
 277         0x081100c0, 0x00000000, 0x00110103, 0x03011102, 0xc4ff0111, 0x00001f00,
 278         0x01010501, 0x01010101, 0x00000000, 0x00000000, 0x04030201, 0x08070605,
 279         0xff0b0a09, 0x10b500c4, 0x03010200, 0x03040203, 0x04040505, 0x7d010000,
 280         0x00030201, 0x12051104, 0x06413121, 0x07615113, 0x32147122, 0x08a19181,
 281         0xc1b14223, 0xf0d15215, 0x72623324, 0x160a0982, 0x1a191817, 0x28272625,
 282         0x35342a29, 0x39383736, 0x4544433a, 0x49484746, 0x5554534a, 0x59585756,
 283         0x6564635a, 0x69686766, 0x7574736a, 0x79787776, 0x8584837a, 0x89888786,
 284         0x9493928a, 0x98979695, 0xa3a29a99, 0xa7a6a5a4, 0xb2aaa9a8, 0xb6b5b4b3,
 285         0xbab9b8b7, 0xc5c4c3c2, 0xc9c8c7c6, 0xd4d3d2ca, 0xd8d7d6d5, 0xe2e1dad9,
 286         0xe6e5e4e3, 0xeae9e8e7, 0xf4f3f2f1, 0xf8f7f6f5, 0xc4fffaf9, 0x00011f00,
 287         0x01010103, 0x01010101, 0x00000101, 0x00000000, 0x04030201, 0x08070605,
 288         0xff0b0a09, 0x11b500c4, 0x02010200, 0x04030404, 0x04040507, 0x77020100,
 289         0x03020100, 0x21050411, 0x41120631, 0x71610751, 0x81322213, 0x91421408,
 290         0x09c1b1a1, 0xf0523323, 0xd1726215, 0x3424160a, 0x17f125e1, 0x261a1918,
 291         0x2a292827, 0x38373635, 0x44433a39, 0x48474645, 0x54534a49, 0x58575655,
 292         0x64635a59, 0x68676665, 0x74736a69, 0x78777675, 0x83827a79, 0x87868584,
 293         0x928a8988, 0x96959493, 0x9a999897, 0xa5a4a3a2, 0xa9a8a7a6, 0xb4b3b2aa,
 294         0xb8b7b6b5, 0xc3c2bab9, 0xc7c6c5c4, 0xd2cac9c8, 0xd6d5d4d3, 0xdad9d8d7,
 295         0xe5e4e3e2, 0xe9e8e7e6, 0xf4f3f2ea, 0xf8f7f6f5, 0xdafffaf9, 0x01030c00,
 296         0x03110200, 0x003f0011
 297 };
 298
 299 static const u32 aspeed_video_jpeg_dct[ASPEED_VIDEO_JPEG_NUM_QUALITIES]
 300                                       [ASPEED_VIDEO_JPEG_DCT_SIZE] = {
 301         { 0x0d140043, 0x0c0f110f, 0x11101114, 0x17141516, 0x1e20321e,
 302           0x3d1e1b1b, 0x32242e2b, 0x4b4c3f48, 0x44463f47, 0x61735a50,
 303           0x566c5550, 0x88644644, 0x7a766c65, 0x4d808280, 0x8c978d60,
 304           0x7e73967d, 0xdbff7b80, 0x1f014300, 0x272d2121, 0x3030582d,
 305           0x697bb958, 0xb8b9b97b, 0xb9b8a6a6, 0xb9b9b9b9, 0xb9b9b9b9,
 306           0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9,
 307           0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xffb9b9b9 },
 308         { 0x0c110043, 0x0a0d0f0d, 0x0f0e0f11, 0x14111213, 0x1a1c2b1a,
 309           0x351a1818, 0x2b1f2826, 0x4142373f, 0x3c3d373e, 0x55644e46,
 310           0x4b5f4a46, 0x77573d3c, 0x6b675f58, 0x43707170, 0x7a847b54,
 311           0x6e64836d, 0xdbff6c70, 0x1b014300, 0x22271d1d, 0x2a2a4c27,
 312           0x5b6ba04c, 0xa0a0a06b, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
 313           0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
 314           0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xffa0a0a0 },
 315         { 0x090e0043, 0x090a0c0a, 0x0c0b0c0e, 0x110e0f10, 0x15172415,
 316           0x2c151313, 0x241a211f, 0x36372e34, 0x31322e33, 0x4653413a,
 317           0x3e4e3d3a, 0x62483231, 0x58564e49, 0x385d5e5d, 0x656d6645,
 318           0x5b536c5a, 0xdbff595d, 0x16014300, 0x1c201818, 0x22223f20,
 319           0x4b58853f, 0x85858558, 0x85858585, 0x85858585, 0x85858585,
 320           0x85858585, 0x85858585, 0x85858585, 0x85858585, 0x85858585,
 321           0x85858585, 0x85858585, 0x85858585, 0xff858585 },
 322         { 0x070b0043, 0x07080a08, 0x0a090a0b, 0x0d0b0c0c, 0x11121c11,
 323           0x23110f0f, 0x1c141a19, 0x2b2b2429, 0x27282428, 0x3842332e,
 324           0x313e302e, 0x4e392827, 0x46443e3a, 0x2c4a4a4a, 0x50565137,
 325           0x48425647, 0xdbff474a, 0x12014300, 0x161a1313, 0x1c1c331a,
 326           0x3d486c33, 0x6c6c6c48, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
 327           0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
 328           0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0xff6c6c6c },
 329         { 0x06090043, 0x05060706, 0x07070709, 0x0a09090a, 0x0d0e160d,
 330           0x1b0d0c0c, 0x16101413, 0x21221c20, 0x1e1f1c20, 0x2b332824,
 331           0x26302624, 0x3d2d1f1e, 0x3735302d, 0x22393a39, 0x3f443f2b,
 332           0x38334338, 0xdbff3739, 0x0d014300, 0x11130e0e, 0x15152613,
 333           0x2d355026, 0x50505035, 0x50505050, 0x50505050, 0x50505050,
 334           0x50505050, 0x50505050, 0x50505050, 0x50505050, 0x50505050,
 335           0x50505050, 0x50505050, 0x50505050, 0xff505050 },
 336         { 0x04060043, 0x03040504, 0x05040506, 0x07060606, 0x09090f09,
 337           0x12090808, 0x0f0a0d0d, 0x16161315, 0x14151315, 0x1d221b18,
 338           0x19201918, 0x281e1514, 0x2423201e, 0x17262726, 0x2a2d2a1c,
 339           0x25222d25, 0xdbff2526, 0x09014300, 0x0b0d0a0a, 0x0e0e1a0d,
 340           0x1f25371a, 0x37373725, 0x37373737, 0x37373737, 0x37373737,
 341           0x37373737, 0x37373737, 0x37373737, 0x37373737, 0x37373737,
 342           0x37373737, 0x37373737, 0x37373737, 0xff373737 },
 343         { 0x02030043, 0x01020202, 0x02020203, 0x03030303, 0x04040704,
 344           0x09040404, 0x07050606, 0x0b0b090a, 0x0a0a090a, 0x0e110d0c,
 345           0x0c100c0c, 0x140f0a0a, 0x1211100f, 0x0b131313, 0x1516150e,
 346           0x12111612, 0xdbff1213, 0x04014300, 0x05060505, 0x07070d06,
 347           0x0f121b0d, 0x1b1b1b12, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
 348           0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
 349           0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0xff1b1b1b },
 350         { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
 351           0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
 352           0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
 353           0x0c0b0f0c, 0xdbff0c0c, 0x03014300, 0x03040303, 0x04040804,
 354           0x0a0c1208, 0x1212120c, 0x12121212, 0x12121212, 0x12121212,
 355           0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212,
 356           0x12121212, 0x12121212, 0x12121212, 0xff121212 },
 357         { 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
 358           0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
 359           0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
 360           0x0c0b0f0c, 0xdbff0c0c, 0x02014300, 0x03030202, 0x04040703,
 361           0x080a0f07, 0x0f0f0f0a, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
 362           0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
 363           0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0xff0f0f0f },
 364         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x02020302,
 365           0x04020202, 0x03020303, 0x05050405, 0x05050405, 0x07080606,
 366           0x06080606, 0x0a070505, 0x09080807, 0x05090909, 0x0a0b0a07,
 367           0x09080b09, 0xdbff0909, 0x02014300, 0x02030202, 0x03030503,
 368           0x07080c05, 0x0c0c0c08, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
 369           0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
 370           0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0xff0c0c0c },
 371         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010201,
 372           0x03010101, 0x02010202, 0x03030303, 0x03030303, 0x04050404,
 373           0x04050404, 0x06050303, 0x06050505, 0x03060606, 0x07070704,
 374           0x06050706, 0xdbff0606, 0x01014300, 0x01020101, 0x02020402,
 375           0x05060904, 0x09090906, 0x09090909, 0x09090909, 0x09090909,
 376           0x09090909, 0x09090909, 0x09090909, 0x09090909, 0x09090909,
 377           0x09090909, 0x09090909, 0x09090909, 0xff090909 },
 378         { 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010101,
 379           0x01010101, 0x01010101, 0x01010101, 0x01010101, 0x02020202,
 380           0x02020202, 0x03020101, 0x03020202, 0x01030303, 0x03030302,
 381           0x03020303, 0xdbff0403, 0x01014300, 0x01010101, 0x01010201,
 382           0x03040602, 0x06060604, 0x06060606, 0x06060606, 0x06060606,
 383           0x06060606, 0x06060606, 0x06060606, 0x06060606, 0x06060606,
 384           0x06060606, 0x06060606, 0x06060606, 0xff060606 }
 385 };
 386
 387 static const struct v4l2_dv_timings_cap aspeed_video_timings_cap = {
 388         .type = V4L2_DV_BT_656_1120,
 389         .bt = {
 390                 .min_width = MIN_WIDTH,
 391                 .max_width = MAX_WIDTH,
 392                 .min_height = MIN_HEIGHT,
 393                 .max_height = MAX_HEIGHT,
 394                 .min_pixelclock = 6574080, /* 640 x 480 x 24Hz */
 395                 .max_pixelclock = 138240000, /* 1920 x 1200 x 60Hz */
 396                 .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
 397                         V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
 398                 .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
 399                         V4L2_DV_BT_CAP_REDUCED_BLANKING |
 400                         V4L2_DV_BT_CAP_CUSTOM,
 401         },
 402 };
 403
 404 static void aspeed_video_init_jpeg_table(u32 *table, bool yuv420)
 405 {
 406         int i;
 407         unsigned int base;
 408
 409         for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
 410                 base = 256 * i; /* AST HW requires this header spacing */
 411                 memcpy(&table[base], aspeed_video_jpeg_header,
 412                        sizeof(aspeed_video_jpeg_header));
 413
 414                 base += ASPEED_VIDEO_JPEG_HEADER_SIZE;
 415                 memcpy(&table[base], aspeed_video_jpeg_dct[i],
 416                        sizeof(aspeed_video_jpeg_dct[i]));
 417
 418                 base += ASPEED_VIDEO_JPEG_DCT_SIZE;
 419                 memcpy(&table[base], aspeed_video_jpeg_quant,
 420                        sizeof(aspeed_video_jpeg_quant));
 421
 422                 if (yuv420)
 423                         table[base + 2] = 0x00220103;
 424         }
 425 }
 426
 427 static void aspeed_video_update(struct aspeed_video *video, u32 reg, u32 clear,
 428                                 u32 bits)
 429 {
 430         u32 t = readl(video->base + reg);
 431         u32 before = t;
 432
 433         t &= ~clear;
 434         t |= bits;
 435         writel(t, video->base + reg);
 436         dev_dbg(video->dev, "update %03x[%08x -> %08x]\n", reg, before,
 437                 readl(video->base + reg));
 438 }
 439
 440 static u32 aspeed_video_read(struct aspeed_video *video, u32 reg)
 441 {
 442         u32 t = readl(video->base + reg);
 443
 444         dev_dbg(video->dev, "read %03x[%08x]\n", reg, t);
 445         return t;
 446 }
 447
 448 static void aspeed_video_write(struct aspeed_video *video, u32 reg, u32 val)
 449 {
 450         writel(val, video->base + reg);
 451         dev_dbg(video->dev, "write %03x[%08x]\n", reg,
 452                 readl(video->base + reg));
 453 }
 454
 455 static int aspeed_video_start_frame(struct aspeed_video *video)
 456 {
 457         dma_addr_t addr;
 458         unsigned long flags;
 459         struct aspeed_video_buffer *buf;
 460         u32 seq_ctrl = aspeed_video_read(video, VE_SEQ_CTRL);
 461
 462         if (video->v4l2_input_status) {
 463                 dev_dbg(video->dev, "No signal; don't start frame\n");
 464                 return 0;
 465         }
 466
 467         if (!(seq_ctrl & VE_SEQ_CTRL_COMP_BUSY) ||
 468             !(seq_ctrl & VE_SEQ_CTRL_CAP_BUSY)) {
 469                 dev_dbg(video->dev, "Engine busy; don't start frame\n");
 470                 return -EBUSY;
 471         }
 472
 473         spin_lock_irqsave(&video->lock, flags);
 474         buf = list_first_entry_or_null(&video->buffers,
 475                                        struct aspeed_video_buffer, link);
 476         if (!buf) {
 477                 spin_unlock_irqrestore(&video->lock, flags);
 478                 dev_dbg(video->dev, "No buffers; don't start frame\n");
 479                 return -EPROTO;
 480         }
 481
 482         set_bit(VIDEO_FRAME_INPRG, &video->flags);
 483         addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
 484         spin_unlock_irqrestore(&video->lock, flags);
 485
 486         aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
 487         aspeed_video_write(video, VE_COMP_OFFSET, 0);
 488         aspeed_video_write(video, VE_COMP_ADDR, addr);
 489
 490         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 491                             VE_INTERRUPT_COMP_COMPLETE);
 492
 493         aspeed_video_update(video, VE_SEQ_CTRL, 0,
 494                             VE_SEQ_CTRL_TRIG_CAPTURE | VE_SEQ_CTRL_TRIG_COMP);
 495
 496         return 0;
 497 }
 498
 499 static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
 500 {
 501         /* Enable mode detect interrupts */
 502         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 503                             VE_INTERRUPT_MODE_DETECT);
 504
 505         /* Disable mode detect in order to re-trigger */
 506         aspeed_video_update(video, VE_SEQ_CTRL,
 507                             VE_SEQ_CTRL_TRIG_MODE_DET, 0);
 508
 509         /* Trigger mode detect */
 510         aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_TRIG_MODE_DET);
 511 }
 512
 513 static void aspeed_video_off(struct aspeed_video *video)
 514 {
 515         if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
 516                 return;
 517
 518         /* Disable interrupts */
 519         aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
 520         aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
 521
 522         /* Turn off the relevant clocks */
 523         clk_disable(video->eclk);
 524         clk_disable(video->vclk);
 525
 526         clear_bit(VIDEO_CLOCKS_ON, &video->flags);
 527 }
 528
 529 static void aspeed_video_on(struct aspeed_video *video)
 530 {
 531         if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
 532                 return;
 533
 534         /* Turn on the relevant clocks */
 535         clk_enable(video->vclk);
 536         clk_enable(video->eclk);
 537
 538         set_bit(VIDEO_CLOCKS_ON, &video->flags);
 539 }
 540
 541 static void aspeed_video_bufs_done(struct aspeed_video *video,
 542                                    enum vb2_buffer_state state)
 543 {
 544         unsigned long flags;
 545         struct aspeed_video_buffer *buf;
 546
 547         spin_lock_irqsave(&video->lock, flags);
 548         list_for_each_entry(buf, &video->buffers, link)
 549                 vb2_buffer_done(&buf->vb.vb2_buf, state);
 550         INIT_LIST_HEAD(&video->buffers);
 551         spin_unlock_irqrestore(&video->lock, flags);
 552 }
 553
 554 static void aspeed_video_irq_res_change(struct aspeed_video *video, ulong delay)
 555 {
 556         dev_dbg(video->dev, "Resolution changed; resetting\n");
 557
 558         set_bit(VIDEO_RES_CHANGE, &video->flags);
 559         clear_bit(VIDEO_FRAME_INPRG, &video->flags);
 560
 561         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
 562
 563         aspeed_video_off(video);
 564         aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
 565
 566         schedule_delayed_work(&video->res_work, delay);
 567 }
 568
 569 static irqreturn_t aspeed_video_irq(int irq, void *arg)
 570 {
 571         struct aspeed_video *video = arg;
 572         u32 sts = aspeed_video_read(video, VE_INTERRUPT_STATUS);
 573
 574         /*
 575          * Resolution changed or signal was lost; reset the engine and
 576          * re-initialize
 577          */
 578         if (sts & VE_INTERRUPT_MODE_DETECT_WD) {
 579                 aspeed_video_irq_res_change(video, 0);
 580                 return IRQ_HANDLED;
 581         }
 582
 583         if (sts & VE_INTERRUPT_MODE_DETECT) {
 584                 if (test_bit(VIDEO_RES_DETECT, &video->flags)) {
 585                         aspeed_video_update(video, VE_INTERRUPT_CTRL,
 586                                             VE_INTERRUPT_MODE_DETECT, 0);
 587                         aspeed_video_write(video, VE_INTERRUPT_STATUS,
 588                                            VE_INTERRUPT_MODE_DETECT);
 589                         sts &= ~VE_INTERRUPT_MODE_DETECT;
 590                         set_bit(VIDEO_MODE_DETECT_DONE, &video->flags);
 591                         wake_up_interruptible_all(&video->wait);
 592                 } else {
 593                         /*
 594                          * Signal acquired while NOT doing resolution
 595                          * detection; reset the engine and re-initialize
 596                          */
 597                         aspeed_video_irq_res_change(video,
 598                                                     RESOLUTION_CHANGE_DELAY);
 599                         return IRQ_HANDLED;
 600                 }
 601         }
 602
 603         if (sts & VE_INTERRUPT_COMP_COMPLETE) {
 604                 struct aspeed_video_buffer *buf;
 605                 u32 frame_size = aspeed_video_read(video,
 606                                                    video->comp_size_read);
 607
 608                 spin_lock(&video->lock);
 609                 clear_bit(VIDEO_FRAME_INPRG, &video->flags);
 610                 buf = list_first_entry_or_null(&video->buffers,
 611                                                struct aspeed_video_buffer,
 612                                                link);
 613                 if (buf) {
 614                         vb2_set_plane_payload(&buf->vb.vb2_buf, 0, frame_size);
 615
 616                         if (!list_is_last(&buf->link, &video->buffers)) {
 617                                 buf->vb.vb2_buf.timestamp = ktime_get_ns();
 618                                 buf->vb.sequence = video->sequence++;
 619                                 buf->vb.field = V4L2_FIELD_NONE;
 620                                 vb2_buffer_done(&buf->vb.vb2_buf,
 621                                                 VB2_BUF_STATE_DONE);
 622                                 list_del(&buf->link);
 623                         }
 624                 }
 625                 spin_unlock(&video->lock);
 626
 627                 aspeed_video_update(video, VE_SEQ_CTRL,
 628                                     VE_SEQ_CTRL_TRIG_CAPTURE |
 629                                     VE_SEQ_CTRL_FORCE_IDLE |
 630                                     VE_SEQ_CTRL_TRIG_COMP, 0);
 631                 aspeed_video_update(video, VE_INTERRUPT_CTRL,
 632                                     VE_INTERRUPT_COMP_COMPLETE, 0);
 633                 aspeed_video_write(video, VE_INTERRUPT_STATUS,
 634                                    VE_INTERRUPT_COMP_COMPLETE);
 635                 sts &= ~VE_INTERRUPT_COMP_COMPLETE;
 636                 if (test_bit(VIDEO_STREAMING, &video->flags) && buf)
 637                         aspeed_video_start_frame(video);
 638         }
 639
 640         /*
 641          * CAPTURE_COMPLETE and FRAME_COMPLETE interrupts come even when these
 642          * are disabled in the VE_INTERRUPT_CTRL register so clear them to
 643          * prevent unnecessary interrupt calls.
 644          */
 645         if (sts & VE_INTERRUPT_CAPTURE_COMPLETE)
 646                 sts &= ~VE_INTERRUPT_CAPTURE_COMPLETE;
 647         if (sts & VE_INTERRUPT_FRAME_COMPLETE)
 648                 sts &= ~VE_INTERRUPT_FRAME_COMPLETE;
 649
 650         return sts ? IRQ_NONE : IRQ_HANDLED;
 651 }
 652
 653 static void aspeed_video_check_and_set_polarity(struct aspeed_video *video)
 654 {
 655         int i;
 656         int hsync_counter = 0;
 657         int vsync_counter = 0;
 658         u32 sts, ctrl;
 659
 660         for (i = 0; i < NUM_POLARITY_CHECKS; ++i) {
 661                 sts = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
 662                 if (sts & VE_MODE_DETECT_STATUS_VSYNC)
 663                         vsync_counter--;
 664                 else
 665                         vsync_counter++;
 666
 667                 if (sts & VE_MODE_DETECT_STATUS_HSYNC)
 668                         hsync_counter--;
 669                 else
 670                         hsync_counter++;
 671         }
 672
 673         ctrl = aspeed_video_read(video, VE_CTRL);
 674
 675         if (hsync_counter < 0) {
 676                 ctrl |= VE_CTRL_HSYNC_POL;
 677                 video->detected_timings.polarities &=
 678                         ~V4L2_DV_HSYNC_POS_POL;
 679         } else {
 680                 ctrl &= ~VE_CTRL_HSYNC_POL;
 681                 video->detected_timings.polarities |=
 682                         V4L2_DV_HSYNC_POS_POL;
 683         }
 684
 685         if (vsync_counter < 0) {
 686                 ctrl |= VE_CTRL_VSYNC_POL;
 687                 video->detected_timings.polarities &=
 688                         ~V4L2_DV_VSYNC_POS_POL;
 689         } else {
 690                 ctrl &= ~VE_CTRL_VSYNC_POL;
 691                 video->detected_timings.polarities |=
 692                         V4L2_DV_VSYNC_POS_POL;
 693         }
 694
 695         aspeed_video_write(video, VE_CTRL, ctrl);
 696 }
 697
 698 static bool aspeed_video_alloc_buf(struct aspeed_video *video,
 699                                    struct aspeed_video_addr *addr,
 700                                    unsigned int size)
 701 {
 702         addr->virt = dma_alloc_coherent(video->dev, size, &addr->dma,
 703                                         GFP_KERNEL);
 704         if (!addr->virt)
 705                 return false;
 706
 707         addr->size = size;
 708         return true;
 709 }
 710
 711 static void aspeed_video_free_buf(struct aspeed_video *video,
 712                                   struct aspeed_video_addr *addr)
 713 {
 714         dma_free_coherent(video->dev, addr->size, addr->virt, addr->dma);
 715         addr->size = 0;
 716         addr->dma = 0ULL;
 717         addr->virt = NULL;
 718 }
 719
 720 /*
 721  * Get the minimum HW-supported compression buffer size for the frame size.
 722  * Assume worst-case JPEG compression size is 1/8 raw size. This should be
 723  * plenty even for maximum quality; any worse and the engine will simply return
 724  * incomplete JPEGs.
 725  */
 726 static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
 727                                               unsigned int frame_size)
 728 {
 729         int i, j;
 730         u32 compression_buffer_size_reg = 0;
 731         unsigned int size;
 732         const unsigned int num_compression_packets = 4;
 733         const unsigned int compression_packet_size = 1024;
 734         const unsigned int max_compressed_size = frame_size / 2; /* 4bpp / 8 */
 735
 736         video->max_compressed_size = UINT_MAX;
 737
 738         for (i = 0; i < 6; ++i) {
 739                 for (j = 0; j < 8; ++j) {
 740                         size = (num_compression_packets << i) *
 741                                 (compression_packet_size << j);
 742                         if (size < max_compressed_size)
 743                                 continue;
 744
 745                         if (size < video->max_compressed_size) {
 746                                 compression_buffer_size_reg = (i << 3) | j;
 747                                 video->max_compressed_size = size;
 748                         }
 749                 }
 750         }
 751
 752         aspeed_video_write(video, VE_STREAM_BUF_SIZE,
 753                            compression_buffer_size_reg);
 754
 755         dev_dbg(video->dev, "Max compressed size: %x\n",
 756                 video->max_compressed_size);
 757 }
 758
 759 #define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
 760
 761 static void aspeed_video_get_resolution(struct aspeed_video *video)
 762 {
 763         bool invalid_resolution = true;
 764         int rc;
 765         int tries = 0;
 766         u32 mds;
 767         u32 src_lr_edge;
 768         u32 src_tb_edge;
 769         u32 sync;
 770         u32 htotal;
 771         struct v4l2_bt_timings *det = &video->detected_timings;
 772
 773         det->width = MIN_WIDTH;
 774         det->height = MIN_HEIGHT;
 775         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
 776
 777         do {
 778                 if (tries) {
 779                         set_current_state(TASK_INTERRUPTIBLE);
 780                         if (schedule_timeout(INVALID_RESOLUTION_DELAY))
 781                                 return;
 782                 }
 783
 784                 set_bit(VIDEO_RES_DETECT, &video->flags);
 785                 aspeed_video_update(video, VE_CTRL,
 786                                     VE_CTRL_VSYNC_POL | VE_CTRL_HSYNC_POL, 0);
 787                 aspeed_video_enable_mode_detect(video);
 788
 789                 rc = wait_event_interruptible_timeout(video->wait,
 790                                                       res_check(video),
 791                                                       MODE_DETECT_TIMEOUT);
 792                 if (!rc) {
 793                         dev_dbg(video->dev, "Timed out; first mode detect\n");
 794                         clear_bit(VIDEO_RES_DETECT, &video->flags);
 795                         return;
 796                 }
 797
 798                 aspeed_video_check_and_set_polarity(video);
 799
 800                 aspeed_video_enable_mode_detect(video);
 801
 802                 rc = wait_event_interruptible_timeout(video->wait,
 803                                                       res_check(video),
 804                                                       MODE_DETECT_TIMEOUT);
 805                 clear_bit(VIDEO_RES_DETECT, &video->flags);
 806                 if (!rc) {
 807                         dev_dbg(video->dev, "Timed out; second mode detect\n");
 808                         return;
 809                 }
 810
 811                 src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
 812                 src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
 813                 mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
 814                 sync = aspeed_video_read(video, VE_SYNC_STATUS);
 815                 htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS);
 816
 817                 video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >>
 818                         VE_SRC_TB_EDGE_DET_BOT_SHF;
 819                 video->frame_top = src_tb_edge & VE_SRC_TB_EDGE_DET_TOP;
 820                 det->vfrontporch = video->frame_top;
 821                 det->vbackporch = ((mds & VE_MODE_DETECT_V_LINES) >>
 822                         VE_MODE_DETECT_V_LINES_SHF) - video->frame_bottom;
 823                 det->vsync = (sync & VE_SYNC_STATUS_VSYNC) >>
 824                         VE_SYNC_STATUS_VSYNC_SHF;
 825                 if (video->frame_top > video->frame_bottom)
 826                         continue;
 827
 828                 video->frame_right = (src_lr_edge & VE_SRC_LR_EDGE_DET_RT) >>
 829                         VE_SRC_LR_EDGE_DET_RT_SHF;
 830                 video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT;
 831                 det->hfrontporch = video->frame_left;
 832                 det->hbackporch = htotal - video->frame_right;
 833                 det->hsync = sync & VE_SYNC_STATUS_HSYNC;
 834                 if (video->frame_left > video->frame_right)
 835                         continue;
 836
 837                 invalid_resolution = false;
 838         } while (invalid_resolution && (tries++ < INVALID_RESOLUTION_RETRIES));
 839
 840         if (invalid_resolution) {
 841                 dev_dbg(video->dev, "Invalid resolution detected\n");
 842                 return;
 843         }
 844
 845         det->height = (video->frame_bottom - video->frame_top) + 1;
 846         det->width = (video->frame_right - video->frame_left) + 1;
 847         video->v4l2_input_status = 0;
 848
 849         /*
 850          * Enable mode-detect watchdog, resolution-change watchdog and
 851          * automatic compression after frame capture.
 852          */
 853         aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
 854                             VE_INTERRUPT_MODE_DETECT_WD);
 855         aspeed_video_update(video, VE_SEQ_CTRL, 0,
 856                             VE_SEQ_CTRL_AUTO_COMP | VE_SEQ_CTRL_EN_WATCHDOG);
 857
 858         dev_dbg(video->dev, "Got resolution: %dx%d\n", det->width,
 859                 det->height);
 860 }
 861
 862 static void aspeed_video_set_resolution(struct aspeed_video *video)
 863 {
 864         struct v4l2_bt_timings *act = &video->active_timings;
 865         unsigned int size = act->width * act->height;
 866
 867         /* Set capture/compression frame sizes */
 868         aspeed_video_calc_compressed_size(video, size);
 869
 870         if (video->active_timings.width == 1680) {
 871                 /*
 872                  * This is a workaround to fix a silicon bug on A1 and A2
 873                  * revisions. Since it doesn't break capturing operation of
 874                  * other revisions, use it for all revisions without checking
 875                  * the revision ID. It picked 1728 which is a very next
 876                  * 64-pixels aligned value to 1680 to minimize memory bandwidth
 877                  * and to get better access speed from video engine.
 878                  */
 879                 aspeed_video_write(video, VE_CAP_WINDOW,
 880                                    1728 << 16 | act->height);
 881                 size += (1728 - 1680) * video->active_timings.height;
 882         } else {
 883                 aspeed_video_write(video, VE_CAP_WINDOW,
 884                                    act->width << 16 | act->height);
 885         }
 886         aspeed_video_write(video, VE_COMP_WINDOW,
 887                            act->width << 16 | act->height);
 888         aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4);
 889
 890         /* Don't use direct mode below 1024 x 768 (irqs don't fire) */
 891         if (size < DIRECT_FETCH_THRESHOLD) {
 892                 aspeed_video_write(video, VE_TGS_0,
 893                                    FIELD_PREP(VE_TGS_FIRST,
 894                                               video->frame_left - 1) |
 895                                    FIELD_PREP(VE_TGS_LAST,
 896                                               video->frame_right));
 897                 aspeed_video_write(video, VE_TGS_1,
 898                                    FIELD_PREP(VE_TGS_FIRST, video->frame_top) |
 899                                    FIELD_PREP(VE_TGS_LAST,
 900                                               video->frame_bottom + 1));
 901                 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_INT_DE);
 902         } else {
 903                 aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH);
 904         }
 905
 906         size *= 4;
 907
 908         if (size != video->srcs[0].size) {
 909                 if (video->srcs[0].size)
 910                         aspeed_video_free_buf(video, &video->srcs[0]);
 911                 if (video->srcs[1].size)
 912                         aspeed_video_free_buf(video, &video->srcs[1]);
 913
 914                 if (!aspeed_video_alloc_buf(video, &video->srcs[0], size))
 915                         goto err_mem;
 916                 if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
 917                         goto err_mem;
 918
 919                 aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
 920                 aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
 921         }
 922
 923         return;
 924
 925 err_mem:
 926         dev_err(video->dev, "Failed to allocate source buffers\n");
 927
 928         if (video->srcs[0].size)
 929                 aspeed_video_free_buf(video, &video->srcs[0]);
 930 }
 931
 932 static void aspeed_video_init_regs(struct aspeed_video *video)
 933 {
 934         u32 comp_ctrl = VE_COMP_CTRL_RSVD |
 935                 FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
 936                 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
 937         u32 ctrl = VE_CTRL_AUTO_OR_CURSOR;
 938         u32 seq_ctrl = video->jpeg_mode;
 939
 940         if (video->frame_rate)
 941                 ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);
 942
 943         if (video->yuv420)
 944                 seq_ctrl |= VE_SEQ_CTRL_YUV420;
 945
 946         /* Unlock VE registers */
 947         aspeed_video_write(video, VE_PROTECTION_KEY, VE_PROTECTION_KEY_UNLOCK);
 948
 949         /* Disable interrupts */
 950         aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
 951         aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
 952
 953         /* Clear the offset */
 954         aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
 955         aspeed_video_write(video, VE_COMP_OFFSET, 0);
 956
 957         aspeed_video_write(video, VE_JPEG_ADDR, video->jpeg.dma);
 958
 959         /* Set control registers */
 960         aspeed_video_write(video, VE_SEQ_CTRL, seq_ctrl);
 961         aspeed_video_write(video, VE_CTRL, ctrl);
 962         aspeed_video_write(video, VE_COMP_CTRL, comp_ctrl);
 963
 964         /* Don't downscale */
 965         aspeed_video_write(video, VE_SCALING_FACTOR, 0x10001000);
 966         aspeed_video_write(video, VE_SCALING_FILTER0, 0x00200000);
 967         aspeed_video_write(video, VE_SCALING_FILTER1, 0x00200000);
 968         aspeed_video_write(video, VE_SCALING_FILTER2, 0x00200000);
 969         aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
 970
 971         /* Set mode detection defaults */
 972         aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
 973 }
 974
 975 static void aspeed_video_start(struct aspeed_video *video)
 976 {
 977         aspeed_video_on(video);
 978
 979         aspeed_video_init_regs(video);
 980
 981         /* Resolution set to 640x480 if no signal found */
 982         aspeed_video_get_resolution(video);
 983
 984         /* Set timings since the device is being opened for the first time */
 985         video->active_timings = video->detected_timings;
 986         aspeed_video_set_resolution(video);
 987
 988         video->pix_fmt.width = video->active_timings.width;
 989         video->pix_fmt.height = video->active_timings.height;
 990         video->pix_fmt.sizeimage = video->max_compressed_size;
 991 }
 992
 993 static void aspeed_video_stop(struct aspeed_video *video)
 994 {
 995         set_bit(VIDEO_STOPPED, &video->flags);
 996         cancel_delayed_work_sync(&video->res_work);
 997
 998         aspeed_video_off(video);
 999
1000         if (video->srcs[0].size)
1001                 aspeed_video_free_buf(video, &video->srcs[0]);
1002
1003         if (video->srcs[1].size)
1004                 aspeed_video_free_buf(video, &video->srcs[1]);
1005
1006         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
1007         video->flags = 0;
1008 }
1009
1010 static int aspeed_video_querycap(struct file *file, void *fh,
1011                                  struct v4l2_capability *cap)
1012 {
1013         strscpy(cap->driver, DEVICE_NAME, sizeof(cap->driver));
1014         strscpy(cap->card, "Aspeed Video Engine", sizeof(cap->card));
1015         snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
1016                  DEVICE_NAME);
1017
1018         return 0;
1019 }
1020
1021 static int aspeed_video_enum_format(struct file *file, void *fh,
1022                                     struct v4l2_fmtdesc *f)
1023 {
1024         if (f->index)
1025                 return -EINVAL;
1026
1027         f->pixelformat = V4L2_PIX_FMT_JPEG;
1028
1029         return 0;
1030 }
1031
1032 static int aspeed_video_get_format(struct file *file, void *fh,
1033                                    struct v4l2_format *f)
1034 {
1035         struct aspeed_video *video = video_drvdata(file);
1036
1037         f->fmt.pix = video->pix_fmt;
1038
1039         return 0;
1040 }
1041
1042 static int aspeed_video_enum_input(struct file *file, void *fh,
1043                                    struct v4l2_input *inp)
1044 {
1045         struct aspeed_video *video = video_drvdata(file);
1046
1047         if (inp->index)
1048                 return -EINVAL;
1049
1050         strscpy(inp->name, "Host VGA capture", sizeof(inp->name));
1051         inp->type = V4L2_INPUT_TYPE_CAMERA;
1052         inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
1053         inp->status = video->v4l2_input_status;
1054
1055         return 0;
1056 }
1057
1058 static int aspeed_video_get_input(struct file *file, void *fh, unsigned int *i)
1059 {
1060         *i = 0;
1061
1062         return 0;
1063 }
1064
1065 static int aspeed_video_set_input(struct file *file, void *fh, unsigned int i)
1066 {
1067         if (i)
1068                 return -EINVAL;
1069
1070         return 0;
1071 }
1072
1073 static int aspeed_video_get_parm(struct file *file, void *fh,
1074                                  struct v4l2_streamparm *a)
1075 {
1076         struct aspeed_video *video = video_drvdata(file);
1077
1078         a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1079         a->parm.capture.readbuffers = 3;
1080         a->parm.capture.timeperframe.numerator = 1;
1081         if (!video->frame_rate)
1082                 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1083         else
1084                 a->parm.capture.timeperframe.denominator = video->frame_rate;
1085
1086         return 0;
1087 }
1088
1089 static int aspeed_video_set_parm(struct file *file, void *fh,
1090                                  struct v4l2_streamparm *a)
1091 {
1092         unsigned int frame_rate = 0;
1093         struct aspeed_video *video = video_drvdata(file);
1094
1095         a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
1096         a->parm.capture.readbuffers = 3;
1097
1098         if (a->parm.capture.timeperframe.numerator)
1099                 frame_rate = a->parm.capture.timeperframe.denominator /
1100                         a->parm.capture.timeperframe.numerator;
1101
1102         if (!frame_rate || frame_rate > MAX_FRAME_RATE) {
1103                 frame_rate = 0;
1104                 a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
1105                 a->parm.capture.timeperframe.numerator = 1;
1106         }
1107
1108         if (video->frame_rate != frame_rate) {
1109                 video->frame_rate = frame_rate;
1110                 aspeed_video_update(video, VE_CTRL, VE_CTRL_FRC,
1111                                     FIELD_PREP(VE_CTRL_FRC, frame_rate));
1112         }
1113
1114         return 0;
1115 }
1116
1117 static int aspeed_video_enum_framesizes(struct file *file, void *fh,
1118                                         struct v4l2_frmsizeenum *fsize)
1119 {
1120         struct aspeed_video *video = video_drvdata(file);
1121
1122         if (fsize->index)
1123                 return -EINVAL;
1124
1125         if (fsize->pixel_format != V4L2_PIX_FMT_JPEG)
1126                 return -EINVAL;
1127
1128         fsize->discrete.width = video->pix_fmt.width;
1129         fsize->discrete.height = video->pix_fmt.height;
1130         fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1131
1132         return 0;
1133 }
1134
1135 static int aspeed_video_enum_frameintervals(struct file *file, void *fh,
1136                                             struct v4l2_frmivalenum *fival)
1137 {
1138         struct aspeed_video *video = video_drvdata(file);
1139
1140         if (fival->index)
1141                 return -EINVAL;
1142
1143         if (fival->width != video->detected_timings.width ||
1144             fival->height != video->detected_timings.height)
1145                 return -EINVAL;
1146
1147         if (fival->pixel_format != V4L2_PIX_FMT_JPEG)
1148                 return -EINVAL;
1149
1150         fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
1151
1152         fival->stepwise.min.denominator = MAX_FRAME_RATE;
1153         fival->stepwise.min.numerator = 1;
1154         fival->stepwise.max.denominator = 1;
1155         fival->stepwise.max.numerator = 1;
1156         fival->stepwise.step = fival->stepwise.max;
1157
1158         return 0;
1159 }
1160
1161 static int aspeed_video_set_dv_timings(struct file *file, void *fh,
1162                                        struct v4l2_dv_timings *timings)
1163 {
1164         struct aspeed_video *video = video_drvdata(file);
1165
1166         if (timings->bt.width == video->active_timings.width &&
1167             timings->bt.height == video->active_timings.height)
1168                 return 0;
1169
1170         if (vb2_is_busy(&video->queue))
1171                 return -EBUSY;
1172
1173         video->active_timings = timings->bt;
1174
1175         aspeed_video_set_resolution(video);
1176
1177         video->pix_fmt.width = timings->bt.width;
1178         video->pix_fmt.height = timings->bt.height;
1179         video->pix_fmt.sizeimage = video->max_compressed_size;
1180
1181         timings->type = V4L2_DV_BT_656_1120;
1182
1183         return 0;
1184 }
1185
1186 static int aspeed_video_get_dv_timings(struct file *file, void *fh,
1187                                        struct v4l2_dv_timings *timings)
1188 {
1189         struct aspeed_video *video = video_drvdata(file);
1190
1191         timings->type = V4L2_DV_BT_656_1120;
1192         timings->bt = video->active_timings;
1193
1194         return 0;
1195 }
1196
1197 static int aspeed_video_query_dv_timings(struct file *file, void *fh,
1198                                          struct v4l2_dv_timings *timings)
1199 {
1200         int rc;
1201         struct aspeed_video *video = video_drvdata(file);
1202
1203         /*
1204          * This blocks only if the driver is currently in the process of
1205          * detecting a new resolution; in the event of no signal or timeout
1206          * this function is woken up.
1207          */
1208         if (file->f_flags & O_NONBLOCK) {
1209                 if (test_bit(VIDEO_RES_CHANGE, &video->flags))
1210                         return -EAGAIN;
1211         } else {
1212                 rc = wait_event_interruptible(video->wait,
1213                                               !test_bit(VIDEO_RES_CHANGE,
1214                                                         &video->flags));
1215                 if (rc)
1216                         return -EINTR;
1217         }
1218
1219         timings->type = V4L2_DV_BT_656_1120;
1220         timings->bt = video->detected_timings;
1221
1222         return video->v4l2_input_status ? -ENOLINK : 0;
1223 }
1224
1225 static int aspeed_video_enum_dv_timings(struct file *file, void *fh,
1226                                         struct v4l2_enum_dv_timings *timings)
1227 {
1228         return v4l2_enum_dv_timings_cap(timings, &aspeed_video_timings_cap,
1229                                         NULL, NULL);
1230 }
1231
1232 static int aspeed_video_dv_timings_cap(struct file *file, void *fh,
1233                                        struct v4l2_dv_timings_cap *cap)
1234 {
1235         *cap = aspeed_video_timings_cap;
1236
1237         return 0;
1238 }
1239
1240 static int aspeed_video_sub_event(struct v4l2_fh *fh,
1241                                   const struct v4l2_event_subscription *sub)
1242 {
1243         switch (sub->type) {
1244         case V4L2_EVENT_SOURCE_CHANGE:
1245                 return v4l2_src_change_event_subscribe(fh, sub);
1246         }
1247
1248         return v4l2_ctrl_subscribe_event(fh, sub);
1249 }
1250
1251 static const struct v4l2_ioctl_ops aspeed_video_ioctl_ops = {
1252         .vidioc_querycap = aspeed_video_querycap,
1253
1254         .vidioc_enum_fmt_vid_cap = aspeed_video_enum_format,
1255         .vidioc_g_fmt_vid_cap = aspeed_video_get_format,
1256         .vidioc_s_fmt_vid_cap = aspeed_video_get_format,
1257         .vidioc_try_fmt_vid_cap = aspeed_video_get_format,
1258
1259         .vidioc_reqbufs = vb2_ioctl_reqbufs,
1260         .vidioc_querybuf = vb2_ioctl_querybuf,
1261         .vidioc_qbuf = vb2_ioctl_qbuf,
1262         .vidioc_expbuf = vb2_ioctl_expbuf,
1263         .vidioc_dqbuf = vb2_ioctl_dqbuf,
1264         .vidioc_create_bufs = vb2_ioctl_create_bufs,
1265         .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1266         .vidioc_streamon = vb2_ioctl_streamon,
1267         .vidioc_streamoff = vb2_ioctl_streamoff,
1268
1269         .vidioc_enum_input = aspeed_video_enum_input,
1270         .vidioc_g_input = aspeed_video_get_input,
1271         .vidioc_s_input = aspeed_video_set_input,
1272
1273         .vidioc_g_parm = aspeed_video_get_parm,
1274         .vidioc_s_parm = aspeed_video_set_parm,
1275         .vidioc_enum_framesizes = aspeed_video_enum_framesizes,
1276         .vidioc_enum_frameintervals = aspeed_video_enum_frameintervals,
1277
1278         .vidioc_s_dv_timings = aspeed_video_set_dv_timings,
1279         .vidioc_g_dv_timings = aspeed_video_get_dv_timings,
1280         .vidioc_query_dv_timings = aspeed_video_query_dv_timings,
1281         .vidioc_enum_dv_timings = aspeed_video_enum_dv_timings,
1282         .vidioc_dv_timings_cap = aspeed_video_dv_timings_cap,
1283
1284         .vidioc_subscribe_event = aspeed_video_sub_event,
1285         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1286 };
1287
1288 static void aspeed_video_update_jpeg_quality(struct aspeed_video *video)
1289 {
1290         u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
1291                 FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
1292
1293         aspeed_video_update(video, VE_COMP_CTRL,
1294                             VE_COMP_CTRL_DCT_LUM | VE_COMP_CTRL_DCT_CHR,
1295                             comp_ctrl);
1296 }
1297
1298 static void aspeed_video_update_subsampling(struct aspeed_video *video)
1299 {
1300         if (video->jpeg.virt)
1301                 aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1302
1303         if (video->yuv420)
1304                 aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_YUV420);
1305         else
1306                 aspeed_video_update(video, VE_SEQ_CTRL, VE_SEQ_CTRL_YUV420, 0);
1307 }
1308
1309 static int aspeed_video_set_ctrl(struct v4l2_ctrl *ctrl)
1310 {
1311         struct aspeed_video *video = container_of(ctrl->handler,
1312                                                   struct aspeed_video,
1313                                                   ctrl_handler);
1314
1315         switch (ctrl->id) {
1316         case V4L2_CID_JPEG_COMPRESSION_QUALITY:
1317                 video->jpeg_quality = ctrl->val;
1318                 aspeed_video_update_jpeg_quality(video);
1319                 break;
1320         case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
1321                 if (ctrl->val == V4L2_JPEG_CHROMA_SUBSAMPLING_420) {
1322                         video->yuv420 = true;
1323                         aspeed_video_update_subsampling(video);
1324                 } else {
1325                         video->yuv420 = false;
1326                         aspeed_video_update_subsampling(video);
1327                 }
1328                 break;
1329         default:
1330                 return -EINVAL;
1331         }
1332
1333         return 0;
1334 }
1335
1336 static const struct v4l2_ctrl_ops aspeed_video_ctrl_ops = {
1337         .s_ctrl = aspeed_video_set_ctrl,
1338 };
1339
1340 static void aspeed_video_resolution_work(struct work_struct *work)
1341 {
1342         struct delayed_work *dwork = to_delayed_work(work);
1343         struct aspeed_video *video = container_of(dwork, struct aspeed_video,
1344                                                   res_work);
1345
1346         aspeed_video_on(video);
1347
1348         /* Exit early in case no clients remain */
1349         if (test_bit(VIDEO_STOPPED, &video->flags))
1350                 goto done;
1351
1352         aspeed_video_init_regs(video);
1353
1354         aspeed_video_get_resolution(video);
1355
1356         if (video->detected_timings.width != video->active_timings.width ||
1357             video->detected_timings.height != video->active_timings.height) {
1358                 static const struct v4l2_event ev = {
1359                         .type = V4L2_EVENT_SOURCE_CHANGE,
1360                         .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
1361                 };
1362
1363                 v4l2_event_queue(&video->vdev, &ev);
1364         } else if (test_bit(VIDEO_STREAMING, &video->flags)) {
1365                 /* No resolution change so just restart streaming */
1366                 aspeed_video_start_frame(video);
1367         }
1368
1369 done:
1370         clear_bit(VIDEO_RES_CHANGE, &video->flags);
1371         wake_up_interruptible_all(&video->wait);
1372 }
1373
1374 static int aspeed_video_open(struct file *file)
1375 {
1376         int rc;
1377         struct aspeed_video *video = video_drvdata(file);
1378
1379         mutex_lock(&video->video_lock);
1380
1381         rc = v4l2_fh_open(file);
1382         if (rc) {
1383                 mutex_unlock(&video->video_lock);
1384                 return rc;
1385         }
1386
1387         if (v4l2_fh_is_singular_file(file))
1388                 aspeed_video_start(video);
1389
1390         mutex_unlock(&video->video_lock);
1391
1392         return 0;
1393 }
1394
1395 static int aspeed_video_release(struct file *file)
1396 {
1397         int rc;
1398         struct aspeed_video *video = video_drvdata(file);
1399
1400         mutex_lock(&video->video_lock);
1401
1402         if (v4l2_fh_is_singular_file(file))
1403                 aspeed_video_stop(video);
1404
1405         rc = _vb2_fop_release(file, NULL);
1406
1407         mutex_unlock(&video->video_lock);
1408
1409         return rc;
1410 }
1411
1412 static const struct v4l2_file_operations aspeed_video_v4l2_fops = {
1413         .owner = THIS_MODULE,
1414         .read = vb2_fop_read,
1415         .poll = vb2_fop_poll,
1416         .unlocked_ioctl = video_ioctl2,
1417         .mmap = vb2_fop_mmap,
1418         .open = aspeed_video_open,
1419         .release = aspeed_video_release,
1420 };
1421
1422 static int aspeed_video_queue_setup(struct vb2_queue *q,
1423                                     unsigned int *num_buffers,
1424                                     unsigned int *num_planes,
1425                                     unsigned int sizes[],
1426                                     struct device *alloc_devs[])
1427 {
1428         struct aspeed_video *video = vb2_get_drv_priv(q);
1429
1430         if (*num_planes) {
1431                 if (sizes[0] < video->max_compressed_size)
1432                         return -EINVAL;
1433
1434                 return 0;
1435         }
1436
1437         *num_planes = 1;
1438         sizes[0] = video->max_compressed_size;
1439
1440         return 0;
1441 }
1442
1443 static int aspeed_video_buf_prepare(struct vb2_buffer *vb)
1444 {
1445         struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1446
1447         if (vb2_plane_size(vb, 0) < video->max_compressed_size)
1448                 return -EINVAL;
1449
1450         return 0;
1451 }
1452
1453 static int aspeed_video_start_streaming(struct vb2_queue *q,
1454                                         unsigned int count)
1455 {
1456         int rc;
1457         struct aspeed_video *video = vb2_get_drv_priv(q);
1458
1459         video->sequence = 0;
1460
1461         rc = aspeed_video_start_frame(video);
1462         if (rc) {
1463                 aspeed_video_bufs_done(video, VB2_BUF_STATE_QUEUED);
1464                 return rc;
1465         }
1466
1467         set_bit(VIDEO_STREAMING, &video->flags);
1468         return 0;
1469 }
1470
1471 static void aspeed_video_stop_streaming(struct vb2_queue *q)
1472 {
1473         int rc;
1474         struct aspeed_video *video = vb2_get_drv_priv(q);
1475
1476         clear_bit(VIDEO_STREAMING, &video->flags);
1477
1478         rc = wait_event_timeout(video->wait,
1479                                 !test_bit(VIDEO_FRAME_INPRG, &video->flags),
1480                                 STOP_TIMEOUT);
1481         if (!rc) {
1482                 dev_dbg(video->dev, "Timed out when stopping streaming\n");
1483
1484                 /*
1485                  * Need to force stop any DMA and try and get HW into a good
1486                  * state for future calls to start streaming again.
1487                  */
1488                 aspeed_video_off(video);
1489                 aspeed_video_on(video);
1490
1491                 aspeed_video_init_regs(video);
1492
1493                 aspeed_video_get_resolution(video);
1494         }
1495
1496         aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
1497 }
1498
1499 static void aspeed_video_buf_queue(struct vb2_buffer *vb)
1500 {
1501         bool empty;
1502         struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
1503         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1504         struct aspeed_video_buffer *avb = to_aspeed_video_buffer(vbuf);
1505         unsigned long flags;
1506
1507         spin_lock_irqsave(&video->lock, flags);
1508         empty = list_empty(&video->buffers);
1509         list_add_tail(&avb->link, &video->buffers);
1510         spin_unlock_irqrestore(&video->lock, flags);
1511
1512         if (test_bit(VIDEO_STREAMING, &video->flags) &&
1513             !test_bit(VIDEO_FRAME_INPRG, &video->flags) && empty)
1514                 aspeed_video_start_frame(video);
1515 }
1516
1517 static const struct vb2_ops aspeed_video_vb2_ops = {
1518         .queue_setup = aspeed_video_queue_setup,
1519         .wait_prepare = vb2_ops_wait_prepare,
1520         .wait_finish = vb2_ops_wait_finish,
1521         .buf_prepare = aspeed_video_buf_prepare,
1522         .start_streaming = aspeed_video_start_streaming,
1523         .stop_streaming = aspeed_video_stop_streaming,
1524         .buf_queue =  aspeed_video_buf_queue,
1525 };
1526
1527 static int aspeed_video_setup_video(struct aspeed_video *video)
1528 {
1529         const u64 mask = ~(BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_444) |
1530                            BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_420));
1531         struct v4l2_device *v4l2_dev = &video->v4l2_dev;
1532         struct vb2_queue *vbq = &video->queue;
1533         struct video_device *vdev = &video->vdev;
1534         int rc;
1535
1536         video->pix_fmt.pixelformat = V4L2_PIX_FMT_JPEG;
1537         video->pix_fmt.field = V4L2_FIELD_NONE;
1538         video->pix_fmt.colorspace = V4L2_COLORSPACE_SRGB;
1539         video->pix_fmt.quantization = V4L2_QUANTIZATION_FULL_RANGE;
1540         video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
1541
1542         rc = v4l2_device_register(video->dev, v4l2_dev);
1543         if (rc) {
1544                 dev_err(video->dev, "Failed to register v4l2 device\n");
1545                 return rc;
1546         }
1547
1548         v4l2_ctrl_handler_init(&video->ctrl_handler, 2);
1549         v4l2_ctrl_new_std(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1550                           V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
1551                           ASPEED_VIDEO_JPEG_NUM_QUALITIES - 1, 1, 0);
1552         v4l2_ctrl_new_std_menu(&video->ctrl_handler, &aspeed_video_ctrl_ops,
1553                                V4L2_CID_JPEG_CHROMA_SUBSAMPLING,
1554                                V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask,
1555                                V4L2_JPEG_CHROMA_SUBSAMPLING_444);
1556
1557         rc = video->ctrl_handler.error;
1558         if (rc) {
1559                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1560                 v4l2_device_unregister(v4l2_dev);
1561
1562                 dev_err(video->dev, "Failed to init controls: %d\n", rc);
1563                 return rc;
1564         }
1565
1566         v4l2_dev->ctrl_handler = &video->ctrl_handler;
1567
1568         vbq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1569         vbq->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
1570         vbq->dev = v4l2_dev->dev;
1571         vbq->lock = &video->video_lock;
1572         vbq->ops = &aspeed_video_vb2_ops;
1573         vbq->mem_ops = &vb2_dma_contig_memops;
1574         vbq->drv_priv = video;
1575         vbq->buf_struct_size = sizeof(struct aspeed_video_buffer);
1576         vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1577         vbq->min_buffers_needed = 3;
1578
1579         rc = vb2_queue_init(vbq);
1580         if (rc) {
1581                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1582                 v4l2_device_unregister(v4l2_dev);
1583
1584                 dev_err(video->dev, "Failed to init vb2 queue\n");
1585                 return rc;
1586         }
1587
1588         vdev->queue = vbq;
1589         vdev->fops = &aspeed_video_v4l2_fops;
1590         vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
1591                 V4L2_CAP_STREAMING;
1592         vdev->v4l2_dev = v4l2_dev;
1593         strscpy(vdev->name, DEVICE_NAME, sizeof(vdev->name));
1594         vdev->vfl_type = VFL_TYPE_VIDEO;
1595         vdev->vfl_dir = VFL_DIR_RX;
1596         vdev->release = video_device_release_empty;
1597         vdev->ioctl_ops = &aspeed_video_ioctl_ops;
1598         vdev->lock = &video->video_lock;
1599
1600         video_set_drvdata(vdev, video);
1601         rc = video_register_device(vdev, VFL_TYPE_VIDEO, 0);
1602         if (rc) {
1603                 v4l2_ctrl_handler_free(&video->ctrl_handler);
1604                 v4l2_device_unregister(v4l2_dev);
1605
1606                 dev_err(video->dev, "Failed to register video device\n");
1607                 return rc;
1608         }
1609
1610         return 0;
1611 }
1612
1613 static int aspeed_video_init(struct aspeed_video *video)
1614 {
1615         int irq;
1616         int rc;
1617         struct device *dev = video->dev;
1618
1619         irq = irq_of_parse_and_map(dev->of_node, 0);
1620         if (!irq) {
1621                 dev_err(dev, "Unable to find IRQ\n");
1622                 return -ENODEV;
1623         }
1624
1625         rc = devm_request_threaded_irq(dev, irq, NULL, aspeed_video_irq,
1626                                        IRQF_ONESHOT, DEVICE_NAME, video);
1627         if (rc < 0) {
1628                 dev_err(dev, "Unable to request IRQ %d\n", irq);
1629                 return rc;
1630         }
1631
1632         video->eclk = devm_clk_get(dev, "eclk");
1633         if (IS_ERR(video->eclk)) {
1634                 dev_err(dev, "Unable to get ECLK\n");
1635                 return PTR_ERR(video->eclk);
1636         }
1637
1638         rc = clk_prepare(video->eclk);
1639         if (rc)
1640                 return rc;
1641
1642         video->vclk = devm_clk_get(dev, "vclk");
1643         if (IS_ERR(video->vclk)) {
1644                 dev_err(dev, "Unable to get VCLK\n");
1645                 rc = PTR_ERR(video->vclk);
1646                 goto err_unprepare_eclk;
1647         }
1648
1649         rc = clk_prepare(video->vclk);
1650         if (rc)
1651                 goto err_unprepare_eclk;
1652
1653         of_reserved_mem_device_init(dev);
1654
1655         rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
1656         if (rc) {
1657                 dev_err(dev, "Failed to set DMA mask\n");
1658                 goto err_release_reserved_mem;
1659         }
1660
1661         if (!aspeed_video_alloc_buf(video, &video->jpeg,
1662                                     VE_JPEG_HEADER_SIZE)) {
1663                 dev_err(dev, "Failed to allocate DMA for JPEG header\n");
1664                 rc = -ENOMEM;
1665                 goto err_release_reserved_mem;
1666         }
1667
1668         aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
1669
1670         return 0;
1671
1672 err_release_reserved_mem:
1673         of_reserved_mem_device_release(dev);
1674         clk_unprepare(video->vclk);
1675 err_unprepare_eclk:
1676         clk_unprepare(video->eclk);
1677
1678         return rc;
1679 }
1680
1681 static const struct of_device_id aspeed_video_of_match[] = {
1682         { .compatible = "aspeed,ast2400-video-engine", .data = &ast2400_config },
1683         { .compatible = "aspeed,ast2500-video-engine", .data = &ast2500_config },
1684         { .compatible = "aspeed,ast2600-video-engine", .data = &ast2600_config },
1685         {}
1686 };
1687 MODULE_DEVICE_TABLE(of, aspeed_video_of_match);
1688
1689 static int aspeed_video_probe(struct platform_device *pdev)
1690 {
1691         const struct aspeed_video_config *config;
1692         const struct of_device_id *match;
1693         struct aspeed_video *video;
1694         int rc;
1695
1696         video = devm_kzalloc(&pdev->dev, sizeof(*video), GFP_KERNEL);
1697         if (!video)
1698                 return -ENOMEM;
1699
1700         video->base = devm_platform_ioremap_resource(pdev, 0);
1701         if (IS_ERR(video->base))
1702                 return PTR_ERR(video->base);
1703
1704         match = of_match_node(aspeed_video_of_match, pdev->dev.of_node);
1705         if (!match)
1706                 return -EINVAL;
1707
1708         config = match->data;
1709         video->jpeg_mode = config->jpeg_mode;
1710         video->comp_size_read = config->comp_size_read;
1711
1712         video->frame_rate = 30;
1713         video->dev = &pdev->dev;
1714         spin_lock_init(&video->lock);
1715         mutex_init(&video->video_lock);
1716         init_waitqueue_head(&video->wait);
1717         INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
1718         INIT_LIST_HEAD(&video->buffers);
1719
1720         rc = aspeed_video_init(video);
1721         if (rc)
1722                 return rc;
1723
1724         rc = aspeed_video_setup_video(video);
1725         if (rc) {
1726                 aspeed_video_free_buf(video, &video->jpeg);
1727                 clk_unprepare(video->vclk);
1728                 clk_unprepare(video->eclk);
1729                 return rc;
1730         }
1731
1732         return 0;
1733 }
1734
1735 static int aspeed_video_remove(struct platform_device *pdev)
1736 {
1737         struct device *dev = &pdev->dev;
1738         struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
1739         struct aspeed_video *video = to_aspeed_video(v4l2_dev);
1740
1741         aspeed_video_off(video);
1742
1743         clk_unprepare(video->vclk);
1744         clk_unprepare(video->eclk);
1745
1746         vb2_video_unregister_device(&video->vdev);
1747
1748         v4l2_ctrl_handler_free(&video->ctrl_handler);
1749
1750         v4l2_device_unregister(v4l2_dev);
1751
1752         aspeed_video_free_buf(video, &video->jpeg);
1753
1754         of_reserved_mem_device_release(dev);
1755
1756         return 0;
1757 }
1758
1759 static struct platform_driver aspeed_video_driver = {
1760         .driver = {
1761                 .name = DEVICE_NAME,
1762                 .of_match_table = aspeed_video_of_match,
1763         },
1764         .probe = aspeed_video_probe,
1765         .remove = aspeed_video_remove,
1766 };
1767
1768 module_platform_driver(aspeed_video_driver);
1769
1770 MODULE_DESCRIPTION("ASPEED Video Engine Driver");
1771 MODULE_AUTHOR("Eddie James");
1772 MODULE_LICENSE("GPL v2");