1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2020-2021 NXP
6 #ifndef _AMPHION_VPU_DEFS_H
7 #define _AMPHION_VPU_DEFS_H
18 VPU_IRQ_CODE_BOOT_DONE = 0x55,
19 VPU_IRQ_CODE_SNAPSHOT_DONE = 0xa5,
20 VPU_IRQ_CODE_SYNC = 0xaa,
24 VPU_CMD_ID_NOOP = 0x0,
25 VPU_CMD_ID_CONFIGURE_CODEC,
31 VPU_CMD_ID_FIRM_RESET,
32 VPU_CMD_ID_UPDATE_PARAMETER,
33 VPU_CMD_ID_FRAME_ENCODE,
35 VPU_CMD_ID_PARSE_NEXT_SEQ,
36 VPU_CMD_ID_PARSE_NEXT_I,
37 VPU_CMD_ID_PARSE_NEXT_IP,
38 VPU_CMD_ID_PARSE_NEXT_ANY,
41 VPU_CMD_ID_FS_RELEASE,
47 VPU_MSG_ID_NOOP = 0x100,
48 VPU_MSG_ID_RESET_DONE,
49 VPU_MSG_ID_START_DONE,
51 VPU_MSG_ID_ABORT_DONE,
53 VPU_MSG_ID_MEM_REQUEST,
54 VPU_MSG_ID_PARAM_UPD_DONE,
55 VPU_MSG_ID_FRAME_INPUT_DONE,
59 VPU_MSG_ID_FRAME_RELEASE,
60 VPU_MSG_ID_SEQ_HDR_FOUND,
61 VPU_MSG_ID_RES_CHANGE,
62 VPU_MSG_ID_PIC_HDR_FOUND,
63 VPU_MSG_ID_PIC_DECODED,
67 VPU_MSG_ID_FIFO_EMPTY,
70 VPU_MSG_ID_UNSUPPORTED,
71 VPU_MSG_ID_TIMESTAMP_INFO,
72 VPU_MSG_ID_FIRMWARE_XCPT,
73 VPU_MSG_ID_PIC_SKIPPED,
76 enum VPU_ENC_MEMORY_RESOURSE {
82 enum VPU_DEC_MEMORY_RESOURCE {
89 SCODE_PADDING_EOS = 1,
90 SCODE_PADDING_BUFFLUSH = 2,
91 SCODE_PADDING_ABORT = 3,
92 SCODE_SEQUENCE = 0x31,
97 struct vpu_pkt_mem_req_data {
106 struct vpu_enc_pic_info {
118 struct vpu_dec_codec_info {
133 struct v4l2_fract frame_rate;
137 u32 bit_depth_chroma;
143 u32 sizeimage[VIDEO_MAX_PLANES];
144 u32 bytesperline[VIDEO_MAX_PLANES];
150 struct vpu_dec_pic_info {
181 #define BITRATE_STEP (1024)
182 #define BITRATE_MIN (16 * BITRATE_STEP)
183 #define BITRATE_MAX (240 * 1024 * BITRATE_STEP)
184 #define BITRATE_DEFAULT (2 * 1024 * BITRATE_STEP)
185 #define BITRATE_DEFAULT_PEAK (BITRATE_DEFAULT * 2)