2 * driver for Earthsoft PT1/PT2
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/sched/signal.h>
23 #include <linux/hrtimer.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/pci.h>
29 #include <linux/kthread.h>
30 #include <linux/freezer.h>
31 #include <linux/ratelimit.h>
32 #include <linux/string.h>
33 #include <linux/i2c.h>
35 #include <media/dvbdev.h>
36 #include <media/dvb_demux.h>
37 #include <media/dmxdev.h>
38 #include <media/dvb_net.h>
39 #include <media/dvb_frontend.h>
42 #include "qm1d1b0004.h"
45 #define DRIVER_NAME "earth-pt1"
47 #define PT1_PAGE_SHIFT 12
48 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
49 #define PT1_NR_UPACKETS 1024
50 #define PT1_NR_BUFS 511
52 struct pt1_buffer_page {
53 __le32 upackets[PT1_NR_UPACKETS];
56 struct pt1_table_page {
58 __le32 buf_pfns[PT1_NR_BUFS];
62 struct pt1_buffer_page *page;
67 struct pt1_table_page *page;
69 struct pt1_buffer bufs[PT1_NR_BUFS];
73 PT1_FE_CLK_20MHZ, /* PT1 */
74 PT1_FE_CLK_25MHZ, /* PT2 */
77 #define PT1_NR_ADAPS 4
84 struct i2c_adapter i2c_adap;
86 struct pt1_adapter *adaps[PT1_NR_ADAPS];
87 struct pt1_table *tables;
88 struct task_struct *kthread;
96 enum pt1_fe_clk fe_clk;
108 struct dvb_adapter adap;
109 struct dvb_demux demux;
111 struct dmxdev dmxdev;
112 struct dvb_frontend *fe;
113 struct i2c_client *demod_i2c_client;
114 struct i2c_client *tuner_i2c_client;
115 int (*orig_set_voltage)(struct dvb_frontend *fe,
116 enum fe_sec_voltage voltage);
117 int (*orig_sleep)(struct dvb_frontend *fe);
118 int (*orig_init)(struct dvb_frontend *fe);
120 enum fe_sec_voltage voltage;
124 union pt1_tuner_config {
125 struct qm1d1b0004_config qm1d1b0004;
126 struct dvb_pll_config tda6651;
130 struct i2c_board_info demod_info;
131 struct tc90522_config demod_cfg;
133 struct i2c_board_info tuner_info;
134 union pt1_tuner_config tuner_cfg;
137 static const struct pt1_config pt1_configs[PT1_NR_ADAPS] = {
140 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x1b),
143 I2C_BOARD_INFO("qm1d1b0004", 0x60),
148 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x1a),
151 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
156 I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x19),
159 I2C_BOARD_INFO("qm1d1b0004", 0x60),
164 I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x18),
167 I2C_BOARD_INFO("tda665x_earthpt1", 0x61),
172 static const u8 va1j5jf8007s_20mhz_configs[][2] = {
173 {0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
174 {0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
175 {0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
176 {0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
179 static const u8 va1j5jf8007s_25mhz_configs[][2] = {
180 {0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
181 {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
182 {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
183 {0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
186 static const u8 va1j5jf8007t_20mhz_configs[][2] = {
187 {0x03, 0x90}, {0x14, 0x8f}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2},
188 {0x22, 0x83}, {0x31, 0x0d}, {0x32, 0xe0}, {0x39, 0xd3}, {0x3a, 0x00},
189 {0x3b, 0x11}, {0x3c, 0x3f},
190 {0x5c, 0x40}, {0x5f, 0x80}, {0x75, 0x02}, {0x76, 0x4e}, {0x77, 0x03},
194 static const u8 va1j5jf8007t_25mhz_configs[][2] = {
195 {0x03, 0x90}, {0x1c, 0x2a}, {0x1d, 0xa8}, {0x1e, 0xa2}, {0x22, 0x83},
196 {0x3a, 0x04}, {0x3b, 0x11}, {0x3c, 0x3f}, {0x5c, 0x40}, {0x5f, 0x80},
197 {0x75, 0x0a}, {0x76, 0x4c}, {0x77, 0x03}, {0xef, 0x01}
200 static int config_demod(struct i2c_client *cl, enum pt1_fe_clk clk)
204 const u8 (*cfg_data)[2];
207 is_sat = !strncmp(cl->name, TC90522_I2C_DEV_SAT,
208 strlen(TC90522_I2C_DEV_SAT));
210 struct i2c_msg msg[2];
214 msg[0].addr = cl->addr;
219 msg[1].addr = cl->addr;
220 msg[1].flags = I2C_M_RD;
223 ret = i2c_transfer(cl->adapter, msg, 2);
231 if (clk == PT1_FE_CLK_20MHZ) {
233 cfg_data = va1j5jf8007s_20mhz_configs;
234 len = ARRAY_SIZE(va1j5jf8007s_20mhz_configs);
236 cfg_data = va1j5jf8007t_20mhz_configs;
237 len = ARRAY_SIZE(va1j5jf8007t_20mhz_configs);
241 cfg_data = va1j5jf8007s_25mhz_configs;
242 len = ARRAY_SIZE(va1j5jf8007s_25mhz_configs);
244 cfg_data = va1j5jf8007t_25mhz_configs;
245 len = ARRAY_SIZE(va1j5jf8007t_25mhz_configs);
249 for (i = 0; i < len; i++) {
250 ret = i2c_master_send(cl, cfg_data[i], 2);
258 * Init registers for (each pair of) terrestrial/satellite block in demod.
259 * Note that resetting terr. block also resets its peer sat. block as well.
260 * This function must be called before configuring any demod block
261 * (before pt1_wakeup(), fe->ops.init()).
263 static int pt1_demod_block_init(struct pt1 *pt1)
265 struct i2c_client *cl;
266 u8 buf[2] = {0x01, 0x80};
270 /* reset all terr. & sat. pairs first */
271 for (i = 0; i < PT1_NR_ADAPS; i++) {
272 cl = pt1->adaps[i]->demod_i2c_client;
273 if (strncmp(cl->name, TC90522_I2C_DEV_TER,
274 strlen(TC90522_I2C_DEV_TER)))
277 ret = i2c_master_send(cl, buf, 2);
280 usleep_range(30000, 50000);
283 for (i = 0; i < PT1_NR_ADAPS; i++) {
284 cl = pt1->adaps[i]->demod_i2c_client;
285 if (strncmp(cl->name, TC90522_I2C_DEV_SAT,
286 strlen(TC90522_I2C_DEV_SAT)))
289 ret = i2c_master_send(cl, buf, 2);
292 usleep_range(30000, 50000);
297 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
299 writel(data, pt1->regs + reg * 4);
302 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
304 return readl(pt1->regs + reg * 4);
307 static unsigned int pt1_nr_tables = 8;
308 module_param_named(nr_tables, pt1_nr_tables, uint, 0);
310 static void pt1_increment_table_count(struct pt1 *pt1)
312 pt1_write_reg(pt1, 0, 0x00000020);
315 static void pt1_init_table_count(struct pt1 *pt1)
317 pt1_write_reg(pt1, 0, 0x00000010);
320 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
322 pt1_write_reg(pt1, 5, first_pfn);
323 pt1_write_reg(pt1, 0, 0x0c000040);
326 static void pt1_unregister_tables(struct pt1 *pt1)
328 pt1_write_reg(pt1, 0, 0x08080000);
331 static int pt1_sync(struct pt1 *pt1)
334 for (i = 0; i < 57; i++) {
335 if (pt1_read_reg(pt1, 0) & 0x20000000)
337 pt1_write_reg(pt1, 0, 0x00000008);
339 dev_err(&pt1->pdev->dev, "could not sync\n");
343 static u64 pt1_identify(struct pt1 *pt1)
348 for (i = 0; i < 57; i++) {
349 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
350 pt1_write_reg(pt1, 0, 0x00000008);
355 static int pt1_unlock(struct pt1 *pt1)
358 pt1_write_reg(pt1, 0, 0x00000008);
359 for (i = 0; i < 3; i++) {
360 if (pt1_read_reg(pt1, 0) & 0x80000000)
362 usleep_range(1000, 2000);
364 dev_err(&pt1->pdev->dev, "could not unlock\n");
368 static int pt1_reset_pci(struct pt1 *pt1)
371 pt1_write_reg(pt1, 0, 0x01010000);
372 pt1_write_reg(pt1, 0, 0x01000000);
373 for (i = 0; i < 10; i++) {
374 if (pt1_read_reg(pt1, 0) & 0x00000001)
376 usleep_range(1000, 2000);
378 dev_err(&pt1->pdev->dev, "could not reset PCI\n");
382 static int pt1_reset_ram(struct pt1 *pt1)
385 pt1_write_reg(pt1, 0, 0x02020000);
386 pt1_write_reg(pt1, 0, 0x02000000);
387 for (i = 0; i < 10; i++) {
388 if (pt1_read_reg(pt1, 0) & 0x00000002)
390 usleep_range(1000, 2000);
392 dev_err(&pt1->pdev->dev, "could not reset RAM\n");
396 static int pt1_do_enable_ram(struct pt1 *pt1)
400 status = pt1_read_reg(pt1, 0) & 0x00000004;
401 pt1_write_reg(pt1, 0, 0x00000002);
402 for (i = 0; i < 10; i++) {
403 for (j = 0; j < 1024; j++) {
404 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
407 usleep_range(1000, 2000);
409 dev_err(&pt1->pdev->dev, "could not enable RAM\n");
413 static int pt1_enable_ram(struct pt1 *pt1)
417 usleep_range(1000, 2000);
418 phase = pt1->pdev->device == 0x211a ? 128 : 166;
419 for (i = 0; i < phase; i++) {
420 ret = pt1_do_enable_ram(pt1);
427 static void pt1_disable_ram(struct pt1 *pt1)
429 pt1_write_reg(pt1, 0, 0x0b0b0000);
432 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
434 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
437 static void pt1_init_streams(struct pt1 *pt1)
440 for (i = 0; i < PT1_NR_ADAPS; i++)
441 pt1_set_stream(pt1, i, 0);
444 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
449 struct pt1_adapter *adap;
454 if (!page->upackets[PT1_NR_UPACKETS - 1])
457 for (i = 0; i < PT1_NR_UPACKETS; i++) {
458 upacket = le32_to_cpu(page->upackets[i]);
459 index = (upacket >> 29) - 1;
460 if (index < 0 || index >= PT1_NR_ADAPS)
463 adap = pt1->adaps[index];
464 if (upacket >> 25 & 1)
465 adap->upacket_count = 0;
466 else if (!adap->upacket_count)
469 if (upacket >> 24 & 1)
470 printk_ratelimited(KERN_INFO "earth-pt1: device buffer overflowing. table[%d] buf[%d]\n",
471 pt1->table_index, pt1->buf_index);
472 sc = upacket >> 26 & 0x7;
473 if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
474 printk_ratelimited(KERN_INFO "earth-pt1: data loss in streamID(adapter)[%d]\n",
479 offset = adap->packet_count * 188 + adap->upacket_count * 3;
480 buf[offset] = upacket >> 16;
481 buf[offset + 1] = upacket >> 8;
482 if (adap->upacket_count != 62)
483 buf[offset + 2] = upacket;
485 if (++adap->upacket_count >= 63) {
486 adap->upacket_count = 0;
487 if (++adap->packet_count >= 21) {
488 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
489 adap->packet_count = 0;
494 page->upackets[PT1_NR_UPACKETS - 1] = 0;
498 static int pt1_thread(void *data)
501 struct pt1_buffer_page *page;
504 #define PT1_FETCH_DELAY 10
505 #define PT1_FETCH_DELAY_DELTA 2
510 while (!kthread_freezable_should_stop(&was_frozen)) {
514 for (i = 0; i < PT1_NR_ADAPS; i++)
515 pt1_set_stream(pt1, i, !!pt1->adaps[i]->users);
518 page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
519 if (!pt1_filter(pt1, page)) {
522 delay = ktime_set(0, PT1_FETCH_DELAY * NSEC_PER_MSEC);
523 set_current_state(TASK_INTERRUPTIBLE);
524 schedule_hrtimeout_range(&delay,
525 PT1_FETCH_DELAY_DELTA * NSEC_PER_MSEC,
530 if (++pt1->buf_index >= PT1_NR_BUFS) {
531 pt1_increment_table_count(pt1);
533 if (++pt1->table_index >= pt1_nr_tables)
534 pt1->table_index = 0;
541 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
543 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
546 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
551 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
556 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
557 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
560 *pfnp = addr >> PT1_PAGE_SHIFT;
564 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
566 pt1_free_page(pt1, buf->page, buf->addr);
570 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
572 struct pt1_buffer_page *page;
575 page = pt1_alloc_page(pt1, &addr, pfnp);
579 page->upackets[PT1_NR_UPACKETS - 1] = 0;
586 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
590 for (i = 0; i < PT1_NR_BUFS; i++)
591 pt1_cleanup_buffer(pt1, &table->bufs[i]);
593 pt1_free_page(pt1, table->page, table->addr);
597 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
599 struct pt1_table_page *page;
604 page = pt1_alloc_page(pt1, &addr, pfnp);
608 for (i = 0; i < PT1_NR_BUFS; i++) {
609 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
613 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
616 pt1_increment_table_count(pt1);
623 pt1_cleanup_buffer(pt1, &table->bufs[i]);
625 pt1_free_page(pt1, page, addr);
629 static void pt1_cleanup_tables(struct pt1 *pt1)
631 struct pt1_table *tables;
634 tables = pt1->tables;
635 pt1_unregister_tables(pt1);
637 for (i = 0; i < pt1_nr_tables; i++)
638 pt1_cleanup_table(pt1, &tables[i]);
643 static int pt1_init_tables(struct pt1 *pt1)
645 struct pt1_table *tables;
652 tables = vmalloc(array_size(pt1_nr_tables, sizeof(struct pt1_table)));
656 pt1_init_table_count(pt1);
659 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
664 while (i < pt1_nr_tables) {
665 ret = pt1_init_table(pt1, &tables[i], &pfn);
668 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
672 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
674 pt1_register_tables(pt1, first_pfn);
675 pt1->tables = tables;
680 pt1_cleanup_table(pt1, &tables[i]);
686 static int pt1_start_polling(struct pt1 *pt1)
690 mutex_lock(&pt1->lock);
692 pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
693 if (IS_ERR(pt1->kthread)) {
694 ret = PTR_ERR(pt1->kthread);
698 mutex_unlock(&pt1->lock);
702 static int pt1_start_feed(struct dvb_demux_feed *feed)
704 struct pt1_adapter *adap;
705 adap = container_of(feed->demux, struct pt1_adapter, demux);
706 if (!adap->users++) {
709 ret = pt1_start_polling(adap->pt1);
712 pt1_set_stream(adap->pt1, adap->index, 1);
717 static void pt1_stop_polling(struct pt1 *pt1)
721 mutex_lock(&pt1->lock);
722 for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
723 count += pt1->adaps[i]->users;
725 if (count == 0 && pt1->kthread) {
726 kthread_stop(pt1->kthread);
729 mutex_unlock(&pt1->lock);
732 static int pt1_stop_feed(struct dvb_demux_feed *feed)
734 struct pt1_adapter *adap;
735 adap = container_of(feed->demux, struct pt1_adapter, demux);
736 if (!--adap->users) {
737 pt1_set_stream(adap->pt1, adap->index, 0);
738 pt1_stop_polling(adap->pt1);
744 pt1_update_power(struct pt1 *pt1)
748 struct pt1_adapter *adap;
749 static const int sleep_bits[] = {
756 bits = pt1->power | !pt1->reset << 3;
757 mutex_lock(&pt1->lock);
758 for (i = 0; i < PT1_NR_ADAPS; i++) {
759 adap = pt1->adaps[i];
760 switch (adap->voltage) {
761 case SEC_VOLTAGE_13: /* actually 11V */
764 case SEC_VOLTAGE_18: /* actually 15V */
765 bits |= 1 << 1 | 1 << 2;
771 /* XXX: The bits should be changed depending on adap->sleep. */
772 bits |= sleep_bits[i];
774 pt1_write_reg(pt1, 1, bits);
775 mutex_unlock(&pt1->lock);
778 static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
780 struct pt1_adapter *adap;
782 adap = container_of(fe->dvb, struct pt1_adapter, adap);
783 adap->voltage = voltage;
784 pt1_update_power(adap->pt1);
786 if (adap->orig_set_voltage)
787 return adap->orig_set_voltage(fe, voltage);
792 static int pt1_sleep(struct dvb_frontend *fe)
794 struct pt1_adapter *adap;
797 adap = container_of(fe->dvb, struct pt1_adapter, adap);
800 if (adap->orig_sleep)
801 ret = adap->orig_sleep(fe);
804 pt1_update_power(adap->pt1);
808 static int pt1_wakeup(struct dvb_frontend *fe)
810 struct pt1_adapter *adap;
813 adap = container_of(fe->dvb, struct pt1_adapter, adap);
815 pt1_update_power(adap->pt1);
816 usleep_range(1000, 2000);
818 ret = config_demod(adap->demod_i2c_client, adap->pt1->fe_clk);
819 if (ret == 0 && adap->orig_init)
820 ret = adap->orig_init(fe);
824 static void pt1_free_adapter(struct pt1_adapter *adap)
826 adap->demux.dmx.close(&adap->demux.dmx);
827 dvb_dmxdev_release(&adap->dmxdev);
828 dvb_dmx_release(&adap->demux);
829 dvb_unregister_adapter(&adap->adap);
830 free_page((unsigned long)adap->buf);
834 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
836 static struct pt1_adapter *
837 pt1_alloc_adapter(struct pt1 *pt1)
839 struct pt1_adapter *adap;
841 struct dvb_adapter *dvb_adap;
842 struct dvb_demux *demux;
843 struct dmxdev *dmxdev;
846 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
854 adap->voltage = SEC_VOLTAGE_OFF;
857 buf = (u8 *)__get_free_page(GFP_KERNEL);
864 adap->upacket_count = 0;
865 adap->packet_count = 0;
868 dvb_adap = &adap->adap;
869 dvb_adap->priv = adap;
870 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
871 &pt1->pdev->dev, adapter_nr);
875 demux = &adap->demux;
876 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
878 demux->feednum = 256;
879 demux->filternum = 256;
880 demux->start_feed = pt1_start_feed;
881 demux->stop_feed = pt1_stop_feed;
882 demux->write_to_decoder = NULL;
883 ret = dvb_dmx_init(demux);
885 goto err_unregister_adapter;
887 dmxdev = &adap->dmxdev;
888 dmxdev->filternum = 256;
889 dmxdev->demux = &demux->dmx;
890 dmxdev->capabilities = 0;
891 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
893 goto err_dmx_release;
898 dvb_dmx_release(demux);
899 err_unregister_adapter:
900 dvb_unregister_adapter(dvb_adap);
902 free_page((unsigned long)buf);
909 static void pt1_cleanup_adapters(struct pt1 *pt1)
912 for (i = 0; i < PT1_NR_ADAPS; i++)
913 pt1_free_adapter(pt1->adaps[i]);
916 static int pt1_init_adapters(struct pt1 *pt1)
919 struct pt1_adapter *adap;
922 for (i = 0; i < PT1_NR_ADAPS; i++) {
923 adap = pt1_alloc_adapter(pt1);
930 pt1->adaps[i] = adap;
936 pt1_free_adapter(pt1->adaps[i]);
941 static void pt1_cleanup_frontend(struct pt1_adapter *adap)
943 dvb_unregister_frontend(adap->fe);
944 dvb_module_release(adap->tuner_i2c_client);
945 dvb_module_release(adap->demod_i2c_client);
948 static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
952 adap->orig_set_voltage = fe->ops.set_voltage;
953 adap->orig_sleep = fe->ops.sleep;
954 adap->orig_init = fe->ops.init;
955 fe->ops.set_voltage = pt1_set_voltage;
956 fe->ops.sleep = pt1_sleep;
957 fe->ops.init = pt1_wakeup;
959 ret = dvb_register_frontend(&adap->adap, fe);
967 static void pt1_cleanup_frontends(struct pt1 *pt1)
970 for (i = 0; i < PT1_NR_ADAPS; i++)
971 pt1_cleanup_frontend(pt1->adaps[i]);
974 static int pt1_init_frontends(struct pt1 *pt1)
979 for (i = 0; i < ARRAY_SIZE(pt1_configs); i++) {
980 const struct i2c_board_info *info;
981 struct tc90522_config dcfg;
982 struct i2c_client *cl;
984 info = &pt1_configs[i].demod_info;
985 dcfg = pt1_configs[i].demod_cfg;
986 dcfg.tuner_i2c = NULL;
989 cl = dvb_module_probe("tc90522", info->type, &pt1->i2c_adap,
993 pt1->adaps[i]->demod_i2c_client = cl;
995 if (!strncmp(cl->name, TC90522_I2C_DEV_SAT,
996 strlen(TC90522_I2C_DEV_SAT))) {
997 struct qm1d1b0004_config tcfg;
999 info = &pt1_configs[i].tuner_info;
1000 tcfg = pt1_configs[i].tuner_cfg.qm1d1b0004;
1002 cl = dvb_module_probe("qm1d1b0004",
1003 info->type, dcfg.tuner_i2c,
1006 struct dvb_pll_config tcfg;
1008 info = &pt1_configs[i].tuner_info;
1009 tcfg = pt1_configs[i].tuner_cfg.tda6651;
1011 cl = dvb_module_probe("dvb_pll",
1012 info->type, dcfg.tuner_i2c,
1017 pt1->adaps[i]->tuner_i2c_client = cl;
1019 ret = pt1_init_frontend(pt1->adaps[i], dcfg.fe);
1024 ret = pt1_demod_block_init(pt1);
1031 dvb_module_release(pt1->adaps[i]->tuner_i2c_client);
1033 dvb_module_release(pt1->adaps[i]->demod_i2c_client);
1035 dev_warn(&pt1->pdev->dev, "failed to init FE(%d).\n", i);
1037 for (; i >= 0; i--) {
1038 dvb_unregister_frontend(pt1->adaps[i]->fe);
1039 dvb_module_release(pt1->adaps[i]->tuner_i2c_client);
1040 dvb_module_release(pt1->adaps[i]->demod_i2c_client);
1045 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
1046 int clock, int data, int next_addr)
1048 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
1049 !clock << 11 | !data << 10 | next_addr);
1052 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
1054 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
1055 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
1056 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
1060 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
1062 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
1063 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
1064 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
1065 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
1069 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
1072 for (i = 0; i < 8; i++)
1073 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
1074 pt1_i2c_write_bit(pt1, addr, &addr, 1);
1078 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
1081 for (i = 0; i < 8; i++)
1082 pt1_i2c_read_bit(pt1, addr, &addr);
1083 pt1_i2c_write_bit(pt1, addr, &addr, last);
1087 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
1089 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
1090 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1091 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
1096 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
1099 pt1_i2c_prepare(pt1, addr, &addr);
1100 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
1101 for (i = 0; i < msg->len; i++)
1102 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
1107 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
1110 pt1_i2c_prepare(pt1, addr, &addr);
1111 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
1112 for (i = 0; i < msg->len; i++)
1113 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
1117 static int pt1_i2c_end(struct pt1 *pt1, int addr)
1119 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
1120 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1121 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
1123 pt1_write_reg(pt1, 0, 0x00000004);
1125 if (signal_pending(current))
1127 usleep_range(1000, 2000);
1128 } while (pt1_read_reg(pt1, 0) & 0x00000080);
1132 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
1137 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
1140 if (!pt1->i2c_running) {
1141 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
1142 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
1144 pt1->i2c_running = 1;
1149 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
1153 struct i2c_msg *msg, *next_msg;
1158 pt1 = i2c_get_adapdata(adap);
1160 for (i = 0; i < num; i++) {
1162 if (msg->flags & I2C_M_RD)
1166 next_msg = &msgs[i + 1];
1170 if (next_msg && next_msg->flags & I2C_M_RD) {
1173 len = next_msg->len;
1177 pt1_i2c_begin(pt1, &addr);
1178 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1179 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
1180 ret = pt1_i2c_end(pt1, addr);
1184 word = pt1_read_reg(pt1, 2);
1186 next_msg->buf[len] = word;
1190 pt1_i2c_begin(pt1, &addr);
1191 pt1_i2c_write_msg(pt1, addr, &addr, msg);
1192 ret = pt1_i2c_end(pt1, addr);
1201 static u32 pt1_i2c_func(struct i2c_adapter *adap)
1203 return I2C_FUNC_I2C;
1206 static const struct i2c_algorithm pt1_i2c_algo = {
1207 .master_xfer = pt1_i2c_xfer,
1208 .functionality = pt1_i2c_func,
1211 static void pt1_i2c_wait(struct pt1 *pt1)
1214 for (i = 0; i < 128; i++)
1215 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
1218 static void pt1_i2c_init(struct pt1 *pt1)
1221 for (i = 0; i < 1024; i++)
1222 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
1225 #ifdef CONFIG_PM_SLEEP
1227 static int pt1_suspend(struct device *dev)
1229 struct pci_dev *pdev = to_pci_dev(dev);
1230 struct pt1 *pt1 = pci_get_drvdata(pdev);
1232 pt1_init_streams(pt1);
1233 pt1_disable_ram(pt1);
1236 pt1_update_power(pt1);
1240 static int pt1_resume(struct device *dev)
1242 struct pci_dev *pdev = to_pci_dev(dev);
1243 struct pt1 *pt1 = pci_get_drvdata(pdev);
1249 pt1_update_power(pt1);
1254 ret = pt1_sync(pt1);
1260 ret = pt1_unlock(pt1);
1264 ret = pt1_reset_pci(pt1);
1268 ret = pt1_reset_ram(pt1);
1272 ret = pt1_enable_ram(pt1);
1276 pt1_init_streams(pt1);
1279 pt1_update_power(pt1);
1283 pt1_update_power(pt1);
1284 usleep_range(1000, 2000);
1286 ret = pt1_demod_block_init(pt1);
1290 for (i = 0; i < PT1_NR_ADAPS; i++)
1291 dvb_frontend_reinitialise(pt1->adaps[i]->fe);
1293 pt1_init_table_count(pt1);
1294 for (i = 0; i < pt1_nr_tables; i++) {
1297 for (j = 0; j < PT1_NR_BUFS; j++)
1298 pt1->tables[i].bufs[j].page->upackets[PT1_NR_UPACKETS-1]
1300 pt1_increment_table_count(pt1);
1302 pt1_register_tables(pt1, pt1->tables[0].addr >> PT1_PAGE_SHIFT);
1304 pt1->table_index = 0;
1306 for (i = 0; i < PT1_NR_ADAPS; i++) {
1307 pt1->adaps[i]->upacket_count = 0;
1308 pt1->adaps[i]->packet_count = 0;
1309 pt1->adaps[i]->st_count = -1;
1315 dev_info(&pt1->pdev->dev, "failed to resume PT1/PT2.");
1316 return 0; /* resume anyway */
1319 #endif /* CONFIG_PM_SLEEP */
1321 static void pt1_remove(struct pci_dev *pdev)
1326 pt1 = pci_get_drvdata(pdev);
1330 kthread_stop(pt1->kthread);
1331 pt1_cleanup_tables(pt1);
1332 pt1_cleanup_frontends(pt1);
1333 pt1_disable_ram(pt1);
1336 pt1_update_power(pt1);
1337 pt1_cleanup_adapters(pt1);
1338 i2c_del_adapter(&pt1->i2c_adap);
1340 pci_iounmap(pdev, regs);
1341 pci_release_regions(pdev);
1342 pci_disable_device(pdev);
1345 static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1350 struct i2c_adapter *i2c_adap;
1352 ret = pci_enable_device(pdev);
1356 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1358 goto err_pci_disable_device;
1360 pci_set_master(pdev);
1362 ret = pci_request_regions(pdev, DRIVER_NAME);
1364 goto err_pci_disable_device;
1366 regs = pci_iomap(pdev, 0, 0);
1369 goto err_pci_release_regions;
1372 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
1375 goto err_pci_iounmap;
1378 mutex_init(&pt1->lock);
1381 pt1->fe_clk = (pdev->device == 0x211a) ?
1382 PT1_FE_CLK_20MHZ : PT1_FE_CLK_25MHZ;
1383 pci_set_drvdata(pdev, pt1);
1385 ret = pt1_init_adapters(pt1);
1389 mutex_init(&pt1->lock);
1393 pt1_update_power(pt1);
1395 i2c_adap = &pt1->i2c_adap;
1396 i2c_adap->algo = &pt1_i2c_algo;
1397 i2c_adap->algo_data = NULL;
1398 i2c_adap->dev.parent = &pdev->dev;
1399 strcpy(i2c_adap->name, DRIVER_NAME);
1400 i2c_set_adapdata(i2c_adap, pt1);
1401 ret = i2c_add_adapter(i2c_adap);
1403 goto err_pt1_cleanup_adapters;
1408 ret = pt1_sync(pt1);
1410 goto err_i2c_del_adapter;
1414 ret = pt1_unlock(pt1);
1416 goto err_i2c_del_adapter;
1418 ret = pt1_reset_pci(pt1);
1420 goto err_i2c_del_adapter;
1422 ret = pt1_reset_ram(pt1);
1424 goto err_i2c_del_adapter;
1426 ret = pt1_enable_ram(pt1);
1428 goto err_i2c_del_adapter;
1430 pt1_init_streams(pt1);
1433 pt1_update_power(pt1);
1437 pt1_update_power(pt1);
1438 usleep_range(1000, 2000);
1440 ret = pt1_init_frontends(pt1);
1442 goto err_pt1_disable_ram;
1444 ret = pt1_init_tables(pt1);
1446 goto err_pt1_cleanup_frontends;
1450 err_pt1_cleanup_frontends:
1451 pt1_cleanup_frontends(pt1);
1452 err_pt1_disable_ram:
1453 pt1_disable_ram(pt1);
1456 pt1_update_power(pt1);
1457 err_i2c_del_adapter:
1458 i2c_del_adapter(i2c_adap);
1459 err_pt1_cleanup_adapters:
1460 pt1_cleanup_adapters(pt1);
1464 pci_iounmap(pdev, regs);
1465 err_pci_release_regions:
1466 pci_release_regions(pdev);
1467 err_pci_disable_device:
1468 pci_disable_device(pdev);
1474 static const struct pci_device_id pt1_id_table[] = {
1475 { PCI_DEVICE(0x10ee, 0x211a) },
1476 { PCI_DEVICE(0x10ee, 0x222a) },
1479 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1481 static SIMPLE_DEV_PM_OPS(pt1_pm_ops, pt1_suspend, pt1_resume);
1483 static struct pci_driver pt1_driver = {
1484 .name = DRIVER_NAME,
1486 .remove = pt1_remove,
1487 .id_table = pt1_id_table,
1488 .driver.pm = &pt1_pm_ops,
1491 module_pci_driver(pt1_driver);
1493 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1494 MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
1495 MODULE_LICENSE("GPL");