drivers/media/pci/cx88/cx88-video.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  * device driver for Conexant 2388x based TV cards
   5  * video4linux video interface
   6  *
   7  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   8  *
   9  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
  10  *      - Multituner support
  11  *      - video_ioctl2 conversion
  12  *      - PAL/M fixes
  13  */
  14
  15 #include "cx88.h"
  16
  17 #include <linux/init.h>
  18 #include <linux/list.h>
  19 #include <linux/module.h>
  20 #include <linux/kmod.h>
  21 #include <linux/kernel.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/delay.h>
  26 #include <linux/kthread.h>
  27 #include <asm/div64.h>
  28
  29 #include <media/v4l2-common.h>
  30 #include <media/v4l2-ioctl.h>
  31 #include <media/v4l2-event.h>
  32 #include <media/i2c/wm8775.h>
  33
  34 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  35 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  36 MODULE_LICENSE("GPL v2");
  37 MODULE_VERSION(CX88_VERSION);
  38
  39 /* ------------------------------------------------------------------ */
  40
  41 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  42 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  43 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  44
  45 module_param_array(video_nr, int, NULL, 0444);
  46 module_param_array(vbi_nr,   int, NULL, 0444);
  47 module_param_array(radio_nr, int, NULL, 0444);
  48
  49 MODULE_PARM_DESC(video_nr, "video device numbers");
  50 MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
  51 MODULE_PARM_DESC(radio_nr, "radio device numbers");
  52
  53 static unsigned int video_debug;
  54 module_param(video_debug, int, 0644);
  55 MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
  56
  57 static unsigned int irq_debug;
  58 module_param(irq_debug, int, 0644);
  59 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
  60
  61 #define dprintk(level, fmt, arg...) do {                        \
  62         if (video_debug >= level)                               \
  63                 printk(KERN_DEBUG pr_fmt("%s: video:" fmt),     \
  64                         __func__, ##arg);                       \
  65 } while (0)
  66
  67 /* ------------------------------------------------------------------- */
  68 /* static data                                                         */
  69
  70 static const struct cx8800_fmt formats[] = {
  71         {
  72                 .fourcc   = V4L2_PIX_FMT_GREY,
  73                 .cxformat = ColorFormatY8,
  74                 .depth    = 8,
  75                 .flags    = FORMAT_FLAGS_PACKED,
  76         }, {
  77                 .fourcc   = V4L2_PIX_FMT_RGB555,
  78                 .cxformat = ColorFormatRGB15,
  79                 .depth    = 16,
  80                 .flags    = FORMAT_FLAGS_PACKED,
  81         }, {
  82                 .fourcc   = V4L2_PIX_FMT_RGB555X,
  83                 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  84                 .depth    = 16,
  85                 .flags    = FORMAT_FLAGS_PACKED,
  86         }, {
  87                 .fourcc   = V4L2_PIX_FMT_RGB565,
  88                 .cxformat = ColorFormatRGB16,
  89                 .depth    = 16,
  90                 .flags    = FORMAT_FLAGS_PACKED,
  91         }, {
  92                 .fourcc   = V4L2_PIX_FMT_RGB565X,
  93                 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  94                 .depth    = 16,
  95                 .flags    = FORMAT_FLAGS_PACKED,
  96         }, {
  97                 .fourcc   = V4L2_PIX_FMT_BGR24,
  98                 .cxformat = ColorFormatRGB24,
  99                 .depth    = 24,
 100                 .flags    = FORMAT_FLAGS_PACKED,
 101         }, {
 102                 .fourcc   = V4L2_PIX_FMT_BGR32,
 103                 .cxformat = ColorFormatRGB32,
 104                 .depth    = 32,
 105                 .flags    = FORMAT_FLAGS_PACKED,
 106         }, {
 107                 .fourcc   = V4L2_PIX_FMT_RGB32,
 108                 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
 109                             ColorFormatWSWAP,
 110                 .depth    = 32,
 111                 .flags    = FORMAT_FLAGS_PACKED,
 112         }, {
 113                 .fourcc   = V4L2_PIX_FMT_YUYV,
 114                 .cxformat = ColorFormatYUY2,
 115                 .depth    = 16,
 116                 .flags    = FORMAT_FLAGS_PACKED,
 117         }, {
 118                 .fourcc   = V4L2_PIX_FMT_UYVY,
 119                 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
 120                 .depth    = 16,
 121                 .flags    = FORMAT_FLAGS_PACKED,
 122         },
 123 };
 124
 125 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
 126 {
 127         unsigned int i;
 128
 129         for (i = 0; i < ARRAY_SIZE(formats); i++)
 130                 if (formats[i].fourcc == fourcc)
 131                         return formats + i;
 132         return NULL;
 133 }
 134
 135 /* ------------------------------------------------------------------- */
 136
 137 struct cx88_ctrl {
 138         /* control information */
 139         u32 id;
 140         s32 minimum;
 141         s32 maximum;
 142         u32 step;
 143         s32 default_value;
 144
 145         /* control register information */
 146         u32 off;
 147         u32 reg;
 148         u32 sreg;
 149         u32 mask;
 150         u32 shift;
 151 };
 152
 153 static const struct cx88_ctrl cx8800_vid_ctls[] = {
 154         /* --- video --- */
 155         {
 156                 .id            = V4L2_CID_BRIGHTNESS,
 157                 .minimum       = 0x00,
 158                 .maximum       = 0xff,
 159                 .step          = 1,
 160                 .default_value = 0x7f,
 161                 .off           = 128,
 162                 .reg           = MO_CONTR_BRIGHT,
 163                 .mask          = 0x00ff,
 164                 .shift         = 0,
 165         }, {
 166                 .id            = V4L2_CID_CONTRAST,
 167                 .minimum       = 0,
 168                 .maximum       = 0xff,
 169                 .step          = 1,
 170                 .default_value = 0x3f,
 171                 .off           = 0,
 172                 .reg           = MO_CONTR_BRIGHT,
 173                 .mask          = 0xff00,
 174                 .shift         = 8,
 175         }, {
 176                 .id            = V4L2_CID_HUE,
 177                 .minimum       = 0,
 178                 .maximum       = 0xff,
 179                 .step          = 1,
 180                 .default_value = 0x7f,
 181                 .off           = 128,
 182                 .reg           = MO_HUE,
 183                 .mask          = 0x00ff,
 184                 .shift         = 0,
 185         }, {
 186                 /* strictly, this only describes only U saturation.
 187                  * V saturation is handled specially through code.
 188                  */
 189                 .id            = V4L2_CID_SATURATION,
 190                 .minimum       = 0,
 191                 .maximum       = 0xff,
 192                 .step          = 1,
 193                 .default_value = 0x7f,
 194                 .off           = 0,
 195                 .reg           = MO_UV_SATURATION,
 196                 .mask          = 0x00ff,
 197                 .shift         = 0,
 198         }, {
 199                 .id            = V4L2_CID_SHARPNESS,
 200                 .minimum       = 0,
 201                 .maximum       = 4,
 202                 .step          = 1,
 203                 .default_value = 0x0,
 204                 .off           = 0,
 205                 /*
 206                  * NOTE: the value is converted and written to both even
 207                  * and odd registers in the code
 208                  */
 209                 .reg           = MO_FILTER_ODD,
 210                 .mask          = 7 << 7,
 211                 .shift         = 7,
 212         }, {
 213                 .id            = V4L2_CID_CHROMA_AGC,
 214                 .minimum       = 0,
 215                 .maximum       = 1,
 216                 .default_value = 0x1,
 217                 .reg           = MO_INPUT_FORMAT,
 218                 .mask          = 1 << 10,
 219                 .shift         = 10,
 220         }, {
 221                 .id            = V4L2_CID_COLOR_KILLER,
 222                 .minimum       = 0,
 223                 .maximum       = 1,
 224                 .default_value = 0x1,
 225                 .reg           = MO_INPUT_FORMAT,
 226                 .mask          = 1 << 9,
 227                 .shift         = 9,
 228         }, {
 229                 .id            = V4L2_CID_BAND_STOP_FILTER,
 230                 .minimum       = 0,
 231                 .maximum       = 1,
 232                 .step          = 1,
 233                 .default_value = 0x0,
 234                 .off           = 0,
 235                 .reg           = MO_HTOTAL,
 236                 .mask          = 3 << 11,
 237                 .shift         = 11,
 238         }
 239 };
 240
 241 static const struct cx88_ctrl cx8800_aud_ctls[] = {
 242         {
 243                 /* --- audio --- */
 244                 .id            = V4L2_CID_AUDIO_MUTE,
 245                 .minimum       = 0,
 246                 .maximum       = 1,
 247                 .default_value = 1,
 248                 .reg           = AUD_VOL_CTL,
 249                 .sreg          = SHADOW_AUD_VOL_CTL,
 250                 .mask          = (1 << 6),
 251                 .shift         = 6,
 252         }, {
 253                 .id            = V4L2_CID_AUDIO_VOLUME,
 254                 .minimum       = 0,
 255                 .maximum       = 0x3f,
 256                 .step          = 1,
 257                 .default_value = 0x3f,
 258                 .reg           = AUD_VOL_CTL,
 259                 .sreg          = SHADOW_AUD_VOL_CTL,
 260                 .mask          = 0x3f,
 261                 .shift         = 0,
 262         }, {
 263                 .id            = V4L2_CID_AUDIO_BALANCE,
 264                 .minimum       = 0,
 265                 .maximum       = 0x7f,
 266                 .step          = 1,
 267                 .default_value = 0x40,
 268                 .reg           = AUD_BAL_CTL,
 269                 .sreg          = SHADOW_AUD_BAL_CTL,
 270                 .mask          = 0x7f,
 271                 .shift         = 0,
 272         }
 273 };
 274
 275 enum {
 276         CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
 277         CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
 278 };
 279
 280 /* ------------------------------------------------------------------ */
 281
 282 int cx88_video_mux(struct cx88_core *core, unsigned int input)
 283 {
 284         /* struct cx88_core *core = dev->core; */
 285
 286         dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
 287                 input, INPUT(input).vmux,
 288                 INPUT(input).gpio0, INPUT(input).gpio1,
 289                 INPUT(input).gpio2, INPUT(input).gpio3);
 290         core->input = input;
 291         cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
 292         cx_write(MO_GP3_IO, INPUT(input).gpio3);
 293         cx_write(MO_GP0_IO, INPUT(input).gpio0);
 294         cx_write(MO_GP1_IO, INPUT(input).gpio1);
 295         cx_write(MO_GP2_IO, INPUT(input).gpio2);
 296
 297         switch (INPUT(input).type) {
 298         case CX88_VMUX_SVIDEO:
 299                 cx_set(MO_AFECFG_IO,    0x00000001);
 300                 cx_set(MO_INPUT_FORMAT, 0x00010010);
 301                 cx_set(MO_FILTER_EVEN,  0x00002020);
 302                 cx_set(MO_FILTER_ODD,   0x00002020);
 303                 break;
 304         default:
 305                 cx_clear(MO_AFECFG_IO,    0x00000001);
 306                 cx_clear(MO_INPUT_FORMAT, 0x00010010);
 307                 cx_clear(MO_FILTER_EVEN,  0x00002020);
 308                 cx_clear(MO_FILTER_ODD,   0x00002020);
 309                 break;
 310         }
 311
 312         /*
 313          * if there are audioroutes defined, we have an external
 314          * ADC to deal with audio
 315          */
 316         if (INPUT(input).audioroute) {
 317                 /*
 318                  * The wm8775 module has the "2" route hardwired into
 319                  * the initialization. Some boards may use different
 320                  * routes for different inputs. HVR-1300 surely does
 321                  */
 322                 if (core->sd_wm8775) {
 323                         call_all(core, audio, s_routing,
 324                                  INPUT(input).audioroute, 0, 0);
 325                 }
 326                 /*
 327                  * cx2388's C-ADC is connected to the tuner only.
 328                  * When used with S-Video, that ADC is busy dealing with
 329                  * chroma, so an external must be used for baseband audio
 330                  */
 331                 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
 332                     INPUT(input).type != CX88_VMUX_CABLE) {
 333                         /* "I2S ADC mode" */
 334                         core->tvaudio = WW_I2SADC;
 335                         cx88_set_tvaudio(core);
 336                 } else {
 337                         /* Normal mode */
 338                         cx_write(AUD_I2SCNTL, 0x0);
 339                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
 340                 }
 341         }
 342
 343         return 0;
 344 }
 345 EXPORT_SYMBOL(cx88_video_mux);
 346
 347 /* ------------------------------------------------------------------ */
 348
 349 static int start_video_dma(struct cx8800_dev    *dev,
 350                            struct cx88_dmaqueue *q,
 351                            struct cx88_buffer   *buf)
 352 {
 353         struct cx88_core *core = dev->core;
 354
 355         /* setup fifo + format */
 356         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
 357                                 buf->bpl, buf->risc.dma);
 358         cx88_set_scale(core, core->width, core->height, core->field);
 359         cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
 360
 361         /* reset counter */
 362         cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
 363         q->count = 0;
 364
 365         /* enable irqs */
 366         cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
 367
 368         /*
 369          * Enables corresponding bits at PCI_INT_STAT:
 370          *      bits 0 to 4: video, audio, transport stream, VIP, Host
 371          *      bit 7: timer
 372          *      bits 8 and 9: DMA complete for: SRC, DST
 373          *      bits 10 and 11: BERR signal asserted for RISC: RD, WR
 374          *      bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
 375          */
 376         cx_set(MO_VID_INTMSK, 0x0f0011);
 377
 378         /* enable capture */
 379         cx_set(VID_CAPTURE_CONTROL, 0x06);
 380
 381         /* start dma */
 382         cx_set(MO_DEV_CNTRL2, (1 << 5));
 383         cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
 384
 385         return 0;
 386 }
 387
 388 static int __maybe_unused stop_video_dma(struct cx8800_dev    *dev)
 389 {
 390         struct cx88_core *core = dev->core;
 391
 392         /* stop dma */
 393         cx_clear(MO_VID_DMACNTRL, 0x11);
 394
 395         /* disable capture */
 396         cx_clear(VID_CAPTURE_CONTROL, 0x06);
 397
 398         /* disable irqs */
 399         cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
 400         cx_clear(MO_VID_INTMSK, 0x0f0011);
 401         return 0;
 402 }
 403
 404 static int __maybe_unused restart_video_queue(struct cx8800_dev *dev,
 405                                               struct cx88_dmaqueue *q)
 406 {
 407         struct cx88_buffer *buf;
 408
 409         if (!list_empty(&q->active)) {
 410                 buf = list_entry(q->active.next, struct cx88_buffer, list);
 411                 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
 412                         buf, buf->vb.vb2_buf.index);
 413                 start_video_dma(dev, q, buf);
 414         }
 415         return 0;
 416 }
 417
 418 /* ------------------------------------------------------------------ */
 419
 420 static int queue_setup(struct vb2_queue *q,
 421                        unsigned int *num_buffers, unsigned int *num_planes,
 422                        unsigned int sizes[], struct device *alloc_devs[])
 423 {
 424         struct cx8800_dev *dev = q->drv_priv;
 425         struct cx88_core *core = dev->core;
 426
 427         *num_planes = 1;
 428         sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
 429         return 0;
 430 }
 431
 432 static int buffer_prepare(struct vb2_buffer *vb)
 433 {
 434         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 435         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 436         struct cx88_core *core = dev->core;
 437         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 438         struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
 439
 440         buf->bpl = core->width * dev->fmt->depth >> 3;
 441
 442         if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
 443                 return -EINVAL;
 444         vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
 445
 446         switch (core->field) {
 447         case V4L2_FIELD_TOP:
 448                 cx88_risc_buffer(dev->pci, &buf->risc,
 449                                  sgt->sgl, 0, UNSET,
 450                                  buf->bpl, 0, core->height);
 451                 break;
 452         case V4L2_FIELD_BOTTOM:
 453                 cx88_risc_buffer(dev->pci, &buf->risc,
 454                                  sgt->sgl, UNSET, 0,
 455                                  buf->bpl, 0, core->height);
 456                 break;
 457         case V4L2_FIELD_SEQ_TB:
 458                 cx88_risc_buffer(dev->pci, &buf->risc,
 459                                  sgt->sgl,
 460                                  0, buf->bpl * (core->height >> 1),
 461                                  buf->bpl, 0,
 462                                  core->height >> 1);
 463                 break;
 464         case V4L2_FIELD_SEQ_BT:
 465                 cx88_risc_buffer(dev->pci, &buf->risc,
 466                                  sgt->sgl,
 467                                  buf->bpl * (core->height >> 1), 0,
 468                                  buf->bpl, 0,
 469                                  core->height >> 1);
 470                 break;
 471         case V4L2_FIELD_INTERLACED:
 472         default:
 473                 cx88_risc_buffer(dev->pci, &buf->risc,
 474                                  sgt->sgl, 0, buf->bpl,
 475                                  buf->bpl, buf->bpl,
 476                                  core->height >> 1);
 477                 break;
 478         }
 479         dprintk(2,
 480                 "[%p/%d] %s - %dx%d %dbpp 0x%08x - dma=0x%08lx\n",
 481                 buf, buf->vb.vb2_buf.index, __func__,
 482                 core->width, core->height, dev->fmt->depth, dev->fmt->fourcc,
 483                 (unsigned long)buf->risc.dma);
 484         return 0;
 485 }
 486
 487 static void buffer_finish(struct vb2_buffer *vb)
 488 {
 489         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 490         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 491         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 492         struct cx88_riscmem *risc = &buf->risc;
 493
 494         if (risc->cpu)
 495                 dma_free_coherent(&dev->pci->dev, risc->size, risc->cpu,
 496                                   risc->dma);
 497         memset(risc, 0, sizeof(*risc));
 498 }
 499
 500 static void buffer_queue(struct vb2_buffer *vb)
 501 {
 502         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 503         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 504         struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
 505         struct cx88_buffer    *prev;
 506         struct cx88_dmaqueue  *q    = &dev->vidq;
 507
 508         /* add jump to start */
 509         buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
 510         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
 511         buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
 512
 513         if (list_empty(&q->active)) {
 514                 list_add_tail(&buf->list, &q->active);
 515                 dprintk(2, "[%p/%d] buffer_queue - first active\n",
 516                         buf, buf->vb.vb2_buf.index);
 517
 518         } else {
 519                 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
 520                 prev = list_entry(q->active.prev, struct cx88_buffer, list);
 521                 list_add_tail(&buf->list, &q->active);
 522                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 523                 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
 524                         buf, buf->vb.vb2_buf.index);
 525         }
 526 }
 527
 528 static int start_streaming(struct vb2_queue *q, unsigned int count)
 529 {
 530         struct cx8800_dev *dev = q->drv_priv;
 531         struct cx88_dmaqueue *dmaq = &dev->vidq;
 532         struct cx88_buffer *buf = list_entry(dmaq->active.next,
 533                         struct cx88_buffer, list);
 534
 535         start_video_dma(dev, dmaq, buf);
 536         return 0;
 537 }
 538
 539 static void stop_streaming(struct vb2_queue *q)
 540 {
 541         struct cx8800_dev *dev = q->drv_priv;
 542         struct cx88_core *core = dev->core;
 543         struct cx88_dmaqueue *dmaq = &dev->vidq;
 544         unsigned long flags;
 545
 546         cx_clear(MO_VID_DMACNTRL, 0x11);
 547         cx_clear(VID_CAPTURE_CONTROL, 0x06);
 548         spin_lock_irqsave(&dev->slock, flags);
 549         while (!list_empty(&dmaq->active)) {
 550                 struct cx88_buffer *buf = list_entry(dmaq->active.next,
 551                         struct cx88_buffer, list);
 552
 553                 list_del(&buf->list);
 554                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 555         }
 556         spin_unlock_irqrestore(&dev->slock, flags);
 557 }
 558
 559 static const struct vb2_ops cx8800_video_qops = {
 560         .queue_setup    = queue_setup,
 561         .buf_prepare  = buffer_prepare,
 562         .buf_finish = buffer_finish,
 563         .buf_queue    = buffer_queue,
 564         .wait_prepare = vb2_ops_wait_prepare,
 565         .wait_finish = vb2_ops_wait_finish,
 566         .start_streaming = start_streaming,
 567         .stop_streaming = stop_streaming,
 568 };
 569
 570 /* ------------------------------------------------------------------ */
 571
 572 static int radio_open(struct file *file)
 573 {
 574         struct cx8800_dev *dev = video_drvdata(file);
 575         struct cx88_core *core = dev->core;
 576         int ret = v4l2_fh_open(file);
 577
 578         if (ret)
 579                 return ret;
 580
 581         cx_write(MO_GP3_IO, core->board.radio.gpio3);
 582         cx_write(MO_GP0_IO, core->board.radio.gpio0);
 583         cx_write(MO_GP1_IO, core->board.radio.gpio1);
 584         cx_write(MO_GP2_IO, core->board.radio.gpio2);
 585         if (core->board.radio.audioroute) {
 586                 if (core->sd_wm8775) {
 587                         call_all(core, audio, s_routing,
 588                                  core->board.radio.audioroute, 0, 0);
 589                 }
 590                 /* "I2S ADC mode" */
 591                 core->tvaudio = WW_I2SADC;
 592                 cx88_set_tvaudio(core);
 593         } else {
 594                 /* FM Mode */
 595                 core->tvaudio = WW_FM;
 596                 cx88_set_tvaudio(core);
 597                 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
 598         }
 599         call_all(core, tuner, s_radio);
 600         return 0;
 601 }
 602
 603 /* ------------------------------------------------------------------ */
 604 /* VIDEO CTRL IOCTLS                                                  */
 605
 606 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
 607 {
 608         struct cx88_core *core =
 609                 container_of(ctrl->handler, struct cx88_core, video_hdl);
 610         const struct cx88_ctrl *cc = ctrl->priv;
 611         u32 value, mask;
 612
 613         mask = cc->mask;
 614         switch (ctrl->id) {
 615         case V4L2_CID_SATURATION:
 616                 /* special v_sat handling */
 617
 618                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 619
 620                 if (core->tvnorm & V4L2_STD_SECAM) {
 621                         /* For SECAM, both U and V sat should be equal */
 622                         value = value << 8 | value;
 623                 } else {
 624                         /* Keeps U Saturation proportional to V Sat */
 625                         value = (value * 0x5a) / 0x7f << 8 | value;
 626                 }
 627                 mask = 0xffff;
 628                 break;
 629         case V4L2_CID_SHARPNESS:
 630                 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
 631                 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
 632                 /* needs to be set for both fields */
 633                 cx_andor(MO_FILTER_EVEN, mask, value);
 634                 break;
 635         case V4L2_CID_CHROMA_AGC:
 636                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 637                 break;
 638         default:
 639                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 640                 break;
 641         }
 642         dprintk(1,
 643                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 644                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 645                 mask, cc->sreg ? " [shadowed]" : "");
 646         if (cc->sreg)
 647                 cx_sandor(cc->sreg, cc->reg, mask, value);
 648         else
 649                 cx_andor(cc->reg, mask, value);
 650         return 0;
 651 }
 652
 653 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
 654 {
 655         struct cx88_core *core =
 656                 container_of(ctrl->handler, struct cx88_core, audio_hdl);
 657         const struct cx88_ctrl *cc = ctrl->priv;
 658         u32 value, mask;
 659
 660         /* Pass changes onto any WM8775 */
 661         if (core->sd_wm8775) {
 662                 switch (ctrl->id) {
 663                 case V4L2_CID_AUDIO_MUTE:
 664                         wm8775_s_ctrl(core, ctrl->id, ctrl->val);
 665                         break;
 666                 case V4L2_CID_AUDIO_VOLUME:
 667                         wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
 668                                                 (0x90 + ctrl->val) << 8 : 0);
 669                         break;
 670                 case V4L2_CID_AUDIO_BALANCE:
 671                         wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
 672                         break;
 673                 default:
 674                         break;
 675                 }
 676         }
 677
 678         mask = cc->mask;
 679         switch (ctrl->id) {
 680         case V4L2_CID_AUDIO_BALANCE:
 681                 value = (ctrl->val < 0x40) ?
 682                         (0x7f - ctrl->val) : (ctrl->val - 0x40);
 683                 break;
 684         case V4L2_CID_AUDIO_VOLUME:
 685                 value = 0x3f - (ctrl->val & 0x3f);
 686                 break;
 687         default:
 688                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 689                 break;
 690         }
 691         dprintk(1,
 692                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 693                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 694                 mask, cc->sreg ? " [shadowed]" : "");
 695         if (cc->sreg)
 696                 cx_sandor(cc->sreg, cc->reg, mask, value);
 697         else
 698                 cx_andor(cc->reg, mask, value);
 699         return 0;
 700 }
 701
 702 /* ------------------------------------------------------------------ */
 703 /* VIDEO IOCTLS                                                       */
 704
 705 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
 706                                 struct v4l2_format *f)
 707 {
 708         struct cx8800_dev *dev = video_drvdata(file);
 709         struct cx88_core *core = dev->core;
 710
 711         f->fmt.pix.width        = core->width;
 712         f->fmt.pix.height       = core->height;
 713         f->fmt.pix.field        = core->field;
 714         f->fmt.pix.pixelformat  = dev->fmt->fourcc;
 715         f->fmt.pix.bytesperline =
 716                 (f->fmt.pix.width * dev->fmt->depth) >> 3;
 717         f->fmt.pix.sizeimage =
 718                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 719         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 720         return 0;
 721 }
 722
 723 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 724                                   struct v4l2_format *f)
 725 {
 726         struct cx8800_dev *dev = video_drvdata(file);
 727         struct cx88_core *core = dev->core;
 728         const struct cx8800_fmt *fmt;
 729         enum v4l2_field   field;
 730         unsigned int      maxw, maxh;
 731
 732         fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 733         if (!fmt)
 734                 return -EINVAL;
 735
 736         maxw = norm_maxw(core->tvnorm);
 737         maxh = norm_maxh(core->tvnorm);
 738
 739         field = f->fmt.pix.field;
 740
 741         switch (field) {
 742         case V4L2_FIELD_TOP:
 743         case V4L2_FIELD_BOTTOM:
 744         case V4L2_FIELD_INTERLACED:
 745         case V4L2_FIELD_SEQ_BT:
 746         case V4L2_FIELD_SEQ_TB:
 747                 break;
 748         default:
 749                 field = (f->fmt.pix.height > maxh / 2)
 750                         ? V4L2_FIELD_INTERLACED
 751                         : V4L2_FIELD_BOTTOM;
 752                 break;
 753         }
 754         if (V4L2_FIELD_HAS_T_OR_B(field))
 755                 maxh /= 2;
 756
 757         v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
 758                               &f->fmt.pix.height, 32, maxh, 0, 0);
 759         f->fmt.pix.field = field;
 760         f->fmt.pix.bytesperline =
 761                 (f->fmt.pix.width * fmt->depth) >> 3;
 762         f->fmt.pix.sizeimage =
 763                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 764         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 765
 766         return 0;
 767 }
 768
 769 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 770                                 struct v4l2_format *f)
 771 {
 772         struct cx8800_dev *dev = video_drvdata(file);
 773         struct cx88_core *core = dev->core;
 774         int err = vidioc_try_fmt_vid_cap(file, priv, f);
 775
 776         if (err != 0)
 777                 return err;
 778         if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
 779                 return -EBUSY;
 780         if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
 781                 return -EBUSY;
 782         dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 783         core->width = f->fmt.pix.width;
 784         core->height = f->fmt.pix.height;
 785         core->field = f->fmt.pix.field;
 786         return 0;
 787 }
 788
 789 int cx88_querycap(struct file *file, struct cx88_core *core,
 790                   struct v4l2_capability *cap)
 791 {
 792         strscpy(cap->card, core->board.name, sizeof(cap->card));
 793         cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
 794                             V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE |
 795                             V4L2_CAP_DEVICE_CAPS;
 796         if (core->board.tuner_type != UNSET)
 797                 cap->capabilities |= V4L2_CAP_TUNER;
 798         if (core->board.radio.type == CX88_RADIO)
 799                 cap->capabilities |= V4L2_CAP_RADIO;
 800         return 0;
 801 }
 802 EXPORT_SYMBOL(cx88_querycap);
 803
 804 static int vidioc_querycap(struct file *file, void  *priv,
 805                            struct v4l2_capability *cap)
 806 {
 807         struct cx8800_dev *dev = video_drvdata(file);
 808         struct cx88_core *core = dev->core;
 809
 810         strscpy(cap->driver, "cx8800", sizeof(cap->driver));
 811         return cx88_querycap(file, core, cap);
 812 }
 813
 814 static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
 815                                    struct v4l2_fmtdesc *f)
 816 {
 817         if (unlikely(f->index >= ARRAY_SIZE(formats)))
 818                 return -EINVAL;
 819
 820         f->pixelformat = formats[f->index].fourcc;
 821
 822         return 0;
 823 }
 824
 825 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
 826 {
 827         struct cx8800_dev *dev = video_drvdata(file);
 828         struct cx88_core *core = dev->core;
 829
 830         *tvnorm = core->tvnorm;
 831         return 0;
 832 }
 833
 834 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
 835 {
 836         struct cx8800_dev *dev = video_drvdata(file);
 837         struct cx88_core *core = dev->core;
 838
 839         return cx88_set_tvnorm(core, tvnorms);
 840 }
 841
 842 /* only one input in this sample driver */
 843 int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
 844 {
 845         static const char * const iname[] = {
 846                 [CX88_VMUX_COMPOSITE1] = "Composite1",
 847                 [CX88_VMUX_COMPOSITE2] = "Composite2",
 848                 [CX88_VMUX_COMPOSITE3] = "Composite3",
 849                 [CX88_VMUX_COMPOSITE4] = "Composite4",
 850                 [CX88_VMUX_SVIDEO] = "S-Video",
 851                 [CX88_VMUX_TELEVISION] = "Television",
 852                 [CX88_VMUX_CABLE] = "Cable TV",
 853                 [CX88_VMUX_DVB] = "DVB",
 854                 [CX88_VMUX_DEBUG] = "for debug only",
 855         };
 856         unsigned int n = i->index;
 857
 858         if (n >= 4)
 859                 return -EINVAL;
 860         if (!INPUT(n).type)
 861                 return -EINVAL;
 862         i->type  = V4L2_INPUT_TYPE_CAMERA;
 863         strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
 864         if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
 865             (INPUT(n).type == CX88_VMUX_CABLE))
 866                 i->type = V4L2_INPUT_TYPE_TUNER;
 867
 868         i->std = CX88_NORMS;
 869         return 0;
 870 }
 871 EXPORT_SYMBOL(cx88_enum_input);
 872
 873 static int vidioc_enum_input(struct file *file, void *priv,
 874                              struct v4l2_input *i)
 875 {
 876         struct cx8800_dev *dev = video_drvdata(file);
 877         struct cx88_core *core = dev->core;
 878
 879         return cx88_enum_input(core, i);
 880 }
 881
 882 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
 883 {
 884         struct cx8800_dev *dev = video_drvdata(file);
 885         struct cx88_core *core = dev->core;
 886
 887         *i = core->input;
 888         return 0;
 889 }
 890
 891 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
 892 {
 893         struct cx8800_dev *dev = video_drvdata(file);
 894         struct cx88_core *core = dev->core;
 895
 896         if (i >= 4)
 897                 return -EINVAL;
 898         if (!INPUT(i).type)
 899                 return -EINVAL;
 900
 901         cx88_newstation(core);
 902         cx88_video_mux(core, i);
 903         return 0;
 904 }
 905
 906 static int vidioc_g_tuner(struct file *file, void *priv,
 907                           struct v4l2_tuner *t)
 908 {
 909         struct cx8800_dev *dev = video_drvdata(file);
 910         struct cx88_core *core = dev->core;
 911         u32 reg;
 912
 913         if (unlikely(core->board.tuner_type == UNSET))
 914                 return -EINVAL;
 915         if (t->index != 0)
 916                 return -EINVAL;
 917
 918         strscpy(t->name, "Television", sizeof(t->name));
 919         t->capability = V4L2_TUNER_CAP_NORM;
 920         t->rangehigh  = 0xffffffffUL;
 921         call_all(core, tuner, g_tuner, t);
 922
 923         cx88_get_stereo(core, t);
 924         reg = cx_read(MO_DEVICE_STATUS);
 925         t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
 926         return 0;
 927 }
 928
 929 static int vidioc_s_tuner(struct file *file, void *priv,
 930                           const struct v4l2_tuner *t)
 931 {
 932         struct cx8800_dev *dev = video_drvdata(file);
 933         struct cx88_core *core = dev->core;
 934
 935         if (core->board.tuner_type == UNSET)
 936                 return -EINVAL;
 937         if (t->index != 0)
 938                 return -EINVAL;
 939
 940         cx88_set_stereo(core, t->audmode, 1);
 941         return 0;
 942 }
 943
 944 static int vidioc_g_frequency(struct file *file, void *priv,
 945                               struct v4l2_frequency *f)
 946 {
 947         struct cx8800_dev *dev = video_drvdata(file);
 948         struct cx88_core *core = dev->core;
 949
 950         if (unlikely(core->board.tuner_type == UNSET))
 951                 return -EINVAL;
 952         if (f->tuner)
 953                 return -EINVAL;
 954
 955         f->frequency = core->freq;
 956
 957         call_all(core, tuner, g_frequency, f);
 958
 959         return 0;
 960 }
 961
 962 int cx88_set_freq(struct cx88_core  *core,
 963                   const struct v4l2_frequency *f)
 964 {
 965         struct v4l2_frequency new_freq = *f;
 966
 967         if (unlikely(core->board.tuner_type == UNSET))
 968                 return -EINVAL;
 969         if (unlikely(f->tuner != 0))
 970                 return -EINVAL;
 971
 972         cx88_newstation(core);
 973         call_all(core, tuner, s_frequency, f);
 974         call_all(core, tuner, g_frequency, &new_freq);
 975         core->freq = new_freq.frequency;
 976
 977         /* When changing channels it is required to reset TVAUDIO */
 978         usleep_range(10000, 20000);
 979         cx88_set_tvaudio(core);
 980
 981         return 0;
 982 }
 983 EXPORT_SYMBOL(cx88_set_freq);
 984
 985 static int vidioc_s_frequency(struct file *file, void *priv,
 986                               const struct v4l2_frequency *f)
 987 {
 988         struct cx8800_dev *dev = video_drvdata(file);
 989         struct cx88_core *core = dev->core;
 990
 991         return cx88_set_freq(core, f);
 992 }
 993
 994 #ifdef CONFIG_VIDEO_ADV_DEBUG
 995 static int vidioc_g_register(struct file *file, void *fh,
 996                              struct v4l2_dbg_register *reg)
 997 {
 998         struct cx8800_dev *dev = video_drvdata(file);
 999         struct cx88_core *core = dev->core;
1000
1001         /* cx2388x has a 24-bit register space */
1002         reg->val = cx_read(reg->reg & 0xfffffc);
1003         reg->size = 4;
1004         return 0;
1005 }
1006
1007 static int vidioc_s_register(struct file *file, void *fh,
1008                              const struct v4l2_dbg_register *reg)
1009 {
1010         struct cx8800_dev *dev = video_drvdata(file);
1011         struct cx88_core *core = dev->core;
1012
1013         cx_write(reg->reg & 0xfffffc, reg->val);
1014         return 0;
1015 }
1016 #endif
1017
1018 /* ----------------------------------------------------------- */
1019 /* RADIO ESPECIFIC IOCTLS                                      */
1020 /* ----------------------------------------------------------- */
1021
1022 static int radio_g_tuner(struct file *file, void *priv,
1023                          struct v4l2_tuner *t)
1024 {
1025         struct cx8800_dev *dev = video_drvdata(file);
1026         struct cx88_core *core = dev->core;
1027
1028         if (unlikely(t->index > 0))
1029                 return -EINVAL;
1030
1031         strscpy(t->name, "Radio", sizeof(t->name));
1032
1033         call_all(core, tuner, g_tuner, t);
1034         return 0;
1035 }
1036
1037 static int radio_s_tuner(struct file *file, void *priv,
1038                          const struct v4l2_tuner *t)
1039 {
1040         struct cx8800_dev *dev = video_drvdata(file);
1041         struct cx88_core *core = dev->core;
1042
1043         if (t->index != 0)
1044                 return -EINVAL;
1045
1046         call_all(core, tuner, s_tuner, t);
1047         return 0;
1048 }
1049
1050 /* ----------------------------------------------------------- */
1051
1052 static const char *cx88_vid_irqs[32] = {
1053         "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1054         "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1055         "y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1056         "y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1057         "opc_err",  "par_err",  "rip_err",  "pci_abort",
1058 };
1059
1060 static void cx8800_vid_irq(struct cx8800_dev *dev)
1061 {
1062         struct cx88_core *core = dev->core;
1063         u32 status, mask, count;
1064
1065         status = cx_read(MO_VID_INTSTAT);
1066         mask   = cx_read(MO_VID_INTMSK);
1067         if (0 == (status & mask))
1068                 return;
1069         cx_write(MO_VID_INTSTAT, status);
1070         if (irq_debug  ||  (status & mask & ~0xff))
1071                 cx88_print_irqbits("irq vid",
1072                                    cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1073                                    status, mask);
1074
1075         /* risc op code error */
1076         if (status & (1 << 16)) {
1077                 pr_warn("video risc op code error\n");
1078                 cx_clear(MO_VID_DMACNTRL, 0x11);
1079                 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1080                 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1081         }
1082
1083         /* risc1 y */
1084         if (status & 0x01) {
1085                 spin_lock(&dev->slock);
1086                 count = cx_read(MO_VIDY_GPCNT);
1087                 cx88_wakeup(core, &dev->vidq, count);
1088                 spin_unlock(&dev->slock);
1089         }
1090
1091         /* risc1 vbi */
1092         if (status & 0x08) {
1093                 spin_lock(&dev->slock);
1094                 count = cx_read(MO_VBI_GPCNT);
1095                 cx88_wakeup(core, &dev->vbiq, count);
1096                 spin_unlock(&dev->slock);
1097         }
1098 }
1099
1100 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1101 {
1102         struct cx8800_dev *dev = dev_id;
1103         struct cx88_core *core = dev->core;
1104         u32 status;
1105         int loop, handled = 0;
1106
1107         for (loop = 0; loop < 10; loop++) {
1108                 status = cx_read(MO_PCI_INTSTAT) &
1109                         (core->pci_irqmask | PCI_INT_VIDINT);
1110                 if (status == 0)
1111                         goto out;
1112                 cx_write(MO_PCI_INTSTAT, status);
1113                 handled = 1;
1114
1115                 if (status & core->pci_irqmask)
1116                         cx88_core_irq(core, status);
1117                 if (status & PCI_INT_VIDINT)
1118                         cx8800_vid_irq(dev);
1119         }
1120         if (loop == 10) {
1121                 pr_warn("irq loop -- clearing mask\n");
1122                 cx_write(MO_PCI_INTMSK, 0);
1123         }
1124
1125  out:
1126         return IRQ_RETVAL(handled);
1127 }
1128
1129 /* ----------------------------------------------------------- */
1130 /* exported stuff                                              */
1131
1132 static const struct v4l2_file_operations video_fops = {
1133         .owner         = THIS_MODULE,
1134         .open          = v4l2_fh_open,
1135         .release       = vb2_fop_release,
1136         .read          = vb2_fop_read,
1137         .poll          = vb2_fop_poll,
1138         .mmap          = vb2_fop_mmap,
1139         .unlocked_ioctl = video_ioctl2,
1140 };
1141
1142 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1143         .vidioc_querycap      = vidioc_querycap,
1144         .vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1145         .vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1146         .vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1147         .vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1148         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1149         .vidioc_querybuf      = vb2_ioctl_querybuf,
1150         .vidioc_qbuf          = vb2_ioctl_qbuf,
1151         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1152         .vidioc_g_std         = vidioc_g_std,
1153         .vidioc_s_std         = vidioc_s_std,
1154         .vidioc_enum_input    = vidioc_enum_input,
1155         .vidioc_g_input       = vidioc_g_input,
1156         .vidioc_s_input       = vidioc_s_input,
1157         .vidioc_streamon      = vb2_ioctl_streamon,
1158         .vidioc_streamoff     = vb2_ioctl_streamoff,
1159         .vidioc_g_tuner       = vidioc_g_tuner,
1160         .vidioc_s_tuner       = vidioc_s_tuner,
1161         .vidioc_g_frequency   = vidioc_g_frequency,
1162         .vidioc_s_frequency   = vidioc_s_frequency,
1163         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1164         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1165 #ifdef CONFIG_VIDEO_ADV_DEBUG
1166         .vidioc_g_register    = vidioc_g_register,
1167         .vidioc_s_register    = vidioc_s_register,
1168 #endif
1169 };
1170
1171 static const struct video_device cx8800_video_template = {
1172         .name                 = "cx8800-video",
1173         .fops                 = &video_fops,
1174         .ioctl_ops            = &video_ioctl_ops,
1175         .tvnorms              = CX88_NORMS,
1176 };
1177
1178 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1179         .vidioc_querycap      = vidioc_querycap,
1180         .vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1181         .vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1182         .vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1183         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1184         .vidioc_querybuf      = vb2_ioctl_querybuf,
1185         .vidioc_qbuf          = vb2_ioctl_qbuf,
1186         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1187         .vidioc_g_std         = vidioc_g_std,
1188         .vidioc_s_std         = vidioc_s_std,
1189         .vidioc_enum_input    = vidioc_enum_input,
1190         .vidioc_g_input       = vidioc_g_input,
1191         .vidioc_s_input       = vidioc_s_input,
1192         .vidioc_streamon      = vb2_ioctl_streamon,
1193         .vidioc_streamoff     = vb2_ioctl_streamoff,
1194         .vidioc_g_tuner       = vidioc_g_tuner,
1195         .vidioc_s_tuner       = vidioc_s_tuner,
1196         .vidioc_g_frequency   = vidioc_g_frequency,
1197         .vidioc_s_frequency   = vidioc_s_frequency,
1198 #ifdef CONFIG_VIDEO_ADV_DEBUG
1199         .vidioc_g_register    = vidioc_g_register,
1200         .vidioc_s_register    = vidioc_s_register,
1201 #endif
1202 };
1203
1204 static const struct video_device cx8800_vbi_template = {
1205         .name                 = "cx8800-vbi",
1206         .fops                 = &video_fops,
1207         .ioctl_ops            = &vbi_ioctl_ops,
1208         .tvnorms              = CX88_NORMS,
1209 };
1210
1211 static const struct v4l2_file_operations radio_fops = {
1212         .owner         = THIS_MODULE,
1213         .open          = radio_open,
1214         .poll          = v4l2_ctrl_poll,
1215         .release       = v4l2_fh_release,
1216         .unlocked_ioctl = video_ioctl2,
1217 };
1218
1219 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1220         .vidioc_querycap      = vidioc_querycap,
1221         .vidioc_g_tuner       = radio_g_tuner,
1222         .vidioc_s_tuner       = radio_s_tuner,
1223         .vidioc_g_frequency   = vidioc_g_frequency,
1224         .vidioc_s_frequency   = vidioc_s_frequency,
1225         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1226         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1227 #ifdef CONFIG_VIDEO_ADV_DEBUG
1228         .vidioc_g_register    = vidioc_g_register,
1229         .vidioc_s_register    = vidioc_s_register,
1230 #endif
1231 };
1232
1233 static const struct video_device cx8800_radio_template = {
1234         .name                 = "cx8800-radio",
1235         .fops                 = &radio_fops,
1236         .ioctl_ops            = &radio_ioctl_ops,
1237 };
1238
1239 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1240         .s_ctrl = cx8800_s_vid_ctrl,
1241 };
1242
1243 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1244         .s_ctrl = cx8800_s_aud_ctrl,
1245 };
1246
1247 /* ----------------------------------------------------------- */
1248
1249 static void cx8800_unregister_video(struct cx8800_dev *dev)
1250 {
1251         video_unregister_device(&dev->radio_dev);
1252         video_unregister_device(&dev->vbi_dev);
1253         video_unregister_device(&dev->video_dev);
1254 }
1255
1256 static int cx8800_initdev(struct pci_dev *pci_dev,
1257                           const struct pci_device_id *pci_id)
1258 {
1259         struct cx8800_dev *dev;
1260         struct cx88_core *core;
1261         struct vb2_queue *q;
1262         int err;
1263         int i;
1264
1265         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1266         if (!dev)
1267                 return -ENOMEM;
1268
1269         /* pci init */
1270         dev->pci = pci_dev;
1271         if (pci_enable_device(pci_dev)) {
1272                 err = -EIO;
1273                 goto fail_free;
1274         }
1275         core = cx88_core_get(dev->pci);
1276         if (!core) {
1277                 err = -EINVAL;
1278                 goto fail_disable;
1279         }
1280         dev->core = core;
1281
1282         /* print pci info */
1283         dev->pci_rev = pci_dev->revision;
1284         pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1285         pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1286                 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1287                 dev->pci_lat,
1288                 (unsigned long long)pci_resource_start(pci_dev, 0));
1289
1290         pci_set_master(pci_dev);
1291         err = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
1292         if (err) {
1293                 pr_err("Oops: no 32bit PCI DMA ???\n");
1294                 goto fail_core;
1295         }
1296
1297         /* initialize driver struct */
1298         spin_lock_init(&dev->slock);
1299
1300         /* init video dma queues */
1301         INIT_LIST_HEAD(&dev->vidq.active);
1302
1303         /* init vbi dma queues */
1304         INIT_LIST_HEAD(&dev->vbiq.active);
1305
1306         /* get irq */
1307         err = request_irq(pci_dev->irq, cx8800_irq,
1308                           IRQF_SHARED, core->name, dev);
1309         if (err < 0) {
1310                 pr_err("can't get IRQ %d\n", pci_dev->irq);
1311                 goto fail_core;
1312         }
1313         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1314
1315         for (i = 0; i < CX8800_AUD_CTLS; i++) {
1316                 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1317                 struct v4l2_ctrl *vc;
1318
1319                 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1320                                        cc->id, cc->minimum, cc->maximum,
1321                                        cc->step, cc->default_value);
1322                 if (!vc) {
1323                         err = core->audio_hdl.error;
1324                         goto fail_irq;
1325                 }
1326                 vc->priv = (void *)cc;
1327         }
1328
1329         for (i = 0; i < CX8800_VID_CTLS; i++) {
1330                 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1331                 struct v4l2_ctrl *vc;
1332
1333                 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1334                                        cc->id, cc->minimum, cc->maximum,
1335                                        cc->step, cc->default_value);
1336                 if (!vc) {
1337                         err = core->video_hdl.error;
1338                         goto fail_irq;
1339                 }
1340                 vc->priv = (void *)cc;
1341                 if (vc->id == V4L2_CID_CHROMA_AGC)
1342                         core->chroma_agc = vc;
1343         }
1344         v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1345
1346         /* load and configure helper modules */
1347
1348         if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1349                 struct i2c_board_info wm8775_info = {
1350                         .type = "wm8775",
1351                         .addr = 0x36 >> 1,
1352                         .platform_data = &core->wm8775_data,
1353                 };
1354                 struct v4l2_subdev *sd;
1355
1356                 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1357                         core->wm8775_data.is_nova_s = true;
1358                 else
1359                         core->wm8775_data.is_nova_s = false;
1360
1361                 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1362                                                &wm8775_info, NULL);
1363                 if (sd) {
1364                         core->sd_wm8775 = sd;
1365                         sd->grp_id = WM8775_GID;
1366                 }
1367         }
1368
1369         if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1370                 /*
1371                  * This probes for a tda9874 as is used on some
1372                  * Pixelview Ultra boards.
1373                  */
1374                 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1375                                     "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1376         }
1377
1378         switch (core->boardnr) {
1379         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1380         case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1381                 static const struct i2c_board_info rtc_info = {
1382                         I2C_BOARD_INFO("isl1208", 0x6f)
1383                 };
1384
1385                 request_module("rtc-isl1208");
1386                 core->i2c_rtc = i2c_new_client_device(&core->i2c_adap, &rtc_info);
1387         }
1388                 fallthrough;
1389         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1390                 request_module("ir-kbd-i2c");
1391         }
1392
1393         /* Sets device info at pci_dev */
1394         pci_set_drvdata(pci_dev, dev);
1395
1396         dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1397
1398         /* Maintain a reference so cx88-blackbird can query the 8800 device. */
1399         core->v4ldev = dev;
1400
1401         /* initial device configuration */
1402         mutex_lock(&core->lock);
1403         cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1404         v4l2_ctrl_handler_setup(&core->video_hdl);
1405         v4l2_ctrl_handler_setup(&core->audio_hdl);
1406         cx88_video_mux(core, 0);
1407
1408         q = &dev->vb2_vidq;
1409         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1410         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1411         q->gfp_flags = GFP_DMA32;
1412         q->min_buffers_needed = 2;
1413         q->drv_priv = dev;
1414         q->buf_struct_size = sizeof(struct cx88_buffer);
1415         q->ops = &cx8800_video_qops;
1416         q->mem_ops = &vb2_dma_sg_memops;
1417         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1418         q->lock = &core->lock;
1419         q->dev = &dev->pci->dev;
1420
1421         err = vb2_queue_init(q);
1422         if (err < 0)
1423                 goto fail_unreg;
1424
1425         q = &dev->vb2_vbiq;
1426         q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1427         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1428         q->gfp_flags = GFP_DMA32;
1429         q->min_buffers_needed = 2;
1430         q->drv_priv = dev;
1431         q->buf_struct_size = sizeof(struct cx88_buffer);
1432         q->ops = &cx8800_vbi_qops;
1433         q->mem_ops = &vb2_dma_sg_memops;
1434         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1435         q->lock = &core->lock;
1436         q->dev = &dev->pci->dev;
1437
1438         err = vb2_queue_init(q);
1439         if (err < 0)
1440                 goto fail_unreg;
1441
1442         /* register v4l devices */
1443         cx88_vdev_init(core, dev->pci, &dev->video_dev,
1444                        &cx8800_video_template, "video");
1445         video_set_drvdata(&dev->video_dev, dev);
1446         dev->video_dev.ctrl_handler = &core->video_hdl;
1447         dev->video_dev.queue = &dev->vb2_vidq;
1448         dev->video_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1449                                      V4L2_CAP_VIDEO_CAPTURE;
1450         if (core->board.tuner_type != UNSET)
1451                 dev->video_dev.device_caps |= V4L2_CAP_TUNER;
1452         err = video_register_device(&dev->video_dev, VFL_TYPE_VIDEO,
1453                                     video_nr[core->nr]);
1454         if (err < 0) {
1455                 pr_err("can't register video device\n");
1456                 goto fail_unreg;
1457         }
1458         pr_info("registered device %s [v4l2]\n",
1459                 video_device_node_name(&dev->video_dev));
1460
1461         cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1462                        &cx8800_vbi_template, "vbi");
1463         video_set_drvdata(&dev->vbi_dev, dev);
1464         dev->vbi_dev.queue = &dev->vb2_vbiq;
1465         dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1466                                    V4L2_CAP_VBI_CAPTURE;
1467         if (core->board.tuner_type != UNSET)
1468                 dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
1469         err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1470                                     vbi_nr[core->nr]);
1471         if (err < 0) {
1472                 pr_err("can't register vbi device\n");
1473                 goto fail_unreg;
1474         }
1475         pr_info("registered device %s\n",
1476                 video_device_node_name(&dev->vbi_dev));
1477
1478         if (core->board.radio.type == CX88_RADIO) {
1479                 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1480                                &cx8800_radio_template, "radio");
1481                 video_set_drvdata(&dev->radio_dev, dev);
1482                 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1483                 dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
1484                 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1485                                             radio_nr[core->nr]);
1486                 if (err < 0) {
1487                         pr_err("can't register radio device\n");
1488                         goto fail_unreg;
1489                 }
1490                 pr_info("registered device %s\n",
1491                         video_device_node_name(&dev->radio_dev));
1492         }
1493
1494         /* start tvaudio thread */
1495         if (core->board.tuner_type != UNSET) {
1496                 core->kthread = kthread_run(cx88_audio_thread,
1497                                             core, "cx88 tvaudio");
1498                 if (IS_ERR(core->kthread)) {
1499                         err = PTR_ERR(core->kthread);
1500                         pr_err("failed to create cx88 audio thread, err=%d\n",
1501                                err);
1502                 }
1503         }
1504         mutex_unlock(&core->lock);
1505
1506         return 0;
1507
1508 fail_unreg:
1509         cx8800_unregister_video(dev);
1510         mutex_unlock(&core->lock);
1511 fail_irq:
1512         free_irq(pci_dev->irq, dev);
1513 fail_core:
1514         core->v4ldev = NULL;
1515         cx88_core_put(core, dev->pci);
1516 fail_disable:
1517         pci_disable_device(pci_dev);
1518 fail_free:
1519         kfree(dev);
1520         return err;
1521 }
1522
1523 static void cx8800_finidev(struct pci_dev *pci_dev)
1524 {
1525         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1526         struct cx88_core *core = dev->core;
1527
1528         /* stop thread */
1529         if (core->kthread) {
1530                 kthread_stop(core->kthread);
1531                 core->kthread = NULL;
1532         }
1533
1534         if (core->ir)
1535                 cx88_ir_stop(core);
1536
1537         cx88_shutdown(core); /* FIXME */
1538
1539         /* unregister stuff */
1540
1541         free_irq(pci_dev->irq, dev);
1542         cx8800_unregister_video(dev);
1543         pci_disable_device(pci_dev);
1544
1545         core->v4ldev = NULL;
1546
1547         /* free memory */
1548         cx88_core_put(core, dev->pci);
1549         kfree(dev);
1550 }
1551
1552 static int __maybe_unused cx8800_suspend(struct device *dev_d)
1553 {
1554         struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1555         struct cx88_core *core = dev->core;
1556         unsigned long flags;
1557
1558         /* stop video+vbi capture */
1559         spin_lock_irqsave(&dev->slock, flags);
1560         if (!list_empty(&dev->vidq.active)) {
1561                 pr_info("suspend video\n");
1562                 stop_video_dma(dev);
1563         }
1564         if (!list_empty(&dev->vbiq.active)) {
1565                 pr_info("suspend vbi\n");
1566                 cx8800_stop_vbi_dma(dev);
1567         }
1568         spin_unlock_irqrestore(&dev->slock, flags);
1569
1570         if (core->ir)
1571                 cx88_ir_stop(core);
1572         /* FIXME -- shutdown device */
1573         cx88_shutdown(core);
1574
1575         dev->state.disabled = 1;
1576         return 0;
1577 }
1578
1579 static int __maybe_unused cx8800_resume(struct device *dev_d)
1580 {
1581         struct cx8800_dev *dev = dev_get_drvdata(dev_d);
1582         struct cx88_core *core = dev->core;
1583         unsigned long flags;
1584
1585         dev->state.disabled = 0;
1586
1587         /* FIXME: re-initialize hardware */
1588         cx88_reset(core);
1589         if (core->ir)
1590                 cx88_ir_start(core);
1591
1592         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1593
1594         /* restart video+vbi capture */
1595         spin_lock_irqsave(&dev->slock, flags);
1596         if (!list_empty(&dev->vidq.active)) {
1597                 pr_info("resume video\n");
1598                 restart_video_queue(dev, &dev->vidq);
1599         }
1600         if (!list_empty(&dev->vbiq.active)) {
1601                 pr_info("resume vbi\n");
1602                 cx8800_restart_vbi_queue(dev, &dev->vbiq);
1603         }
1604         spin_unlock_irqrestore(&dev->slock, flags);
1605
1606         return 0;
1607 }
1608
1609 /* ----------------------------------------------------------- */
1610
1611 static const struct pci_device_id cx8800_pci_tbl[] = {
1612         {
1613                 .vendor       = 0x14f1,
1614                 .device       = 0x8800,
1615                 .subvendor    = PCI_ANY_ID,
1616                 .subdevice    = PCI_ANY_ID,
1617         }, {
1618                 /* --- end of list --- */
1619         }
1620 };
1621 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1622
1623 static SIMPLE_DEV_PM_OPS(cx8800_pm_ops, cx8800_suspend, cx8800_resume);
1624
1625 static struct pci_driver cx8800_pci_driver = {
1626         .name      = "cx8800",
1627         .id_table  = cx8800_pci_tbl,
1628         .probe     = cx8800_initdev,
1629         .remove    = cx8800_finidev,
1630         .driver.pm = &cx8800_pm_ops,
1631 };
1632
1633 module_pci_driver(cx8800_pci_driver);