drivers/media/pci/cx88/cx88-video.c

   1 /*
   2  *
   3  * device driver for Conexant 2388x based TV cards
   4  * video4linux video interface
   5  *
   6  * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
   7  *
   8  * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
   9  *      - Multituner support
  10  *      - video_ioctl2 conversion
  11  *      - PAL/M fixes
  12  *
  13  *  This program is free software; you can redistribute it and/or modify
  14  *  it under the terms of the GNU General Public License as published by
  15  *  the Free Software Foundation; either version 2 of the License, or
  16  *  (at your option) any later version.
  17  *
  18  *  This program is distributed in the hope that it will be useful,
  19  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  *  GNU General Public License for more details.
  22  */
  23
  24 #include "cx88.h"
  25
  26 #include <linux/init.h>
  27 #include <linux/list.h>
  28 #include <linux/module.h>
  29 #include <linux/kmod.h>
  30 #include <linux/kernel.h>
  31 #include <linux/slab.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/dma-mapping.h>
  34 #include <linux/delay.h>
  35 #include <linux/kthread.h>
  36 #include <asm/div64.h>
  37
  38 #include <media/v4l2-common.h>
  39 #include <media/v4l2-ioctl.h>
  40 #include <media/v4l2-event.h>
  41 #include <media/i2c/wm8775.h>
  42
  43 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  44 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45 MODULE_LICENSE("GPL");
  46 MODULE_VERSION(CX88_VERSION);
  47
  48 /* ------------------------------------------------------------------ */
  49
  50 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  51 static unsigned int vbi_nr[]   = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  52 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  53
  54 module_param_array(video_nr, int, NULL, 0444);
  55 module_param_array(vbi_nr,   int, NULL, 0444);
  56 module_param_array(radio_nr, int, NULL, 0444);
  57
  58 MODULE_PARM_DESC(video_nr, "video device numbers");
  59 MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
  60 MODULE_PARM_DESC(radio_nr, "radio device numbers");
  61
  62 static unsigned int video_debug;
  63 module_param(video_debug, int, 0644);
  64 MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
  65
  66 static unsigned int irq_debug;
  67 module_param(irq_debug, int, 0644);
  68 MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
  69
  70 #define dprintk(level, fmt, arg...) do {                        \
  71         if (video_debug >= level)                               \
  72                 printk(KERN_DEBUG pr_fmt("%s: video:" fmt),     \
  73                         __func__, ##arg);                       \
  74 } while (0)
  75
  76 /* ------------------------------------------------------------------- */
  77 /* static data                                                         */
  78
  79 static const struct cx8800_fmt formats[] = {
  80         {
  81                 .name     = "8 bpp, gray",
  82                 .fourcc   = V4L2_PIX_FMT_GREY,
  83                 .cxformat = ColorFormatY8,
  84                 .depth    = 8,
  85                 .flags    = FORMAT_FLAGS_PACKED,
  86         }, {
  87                 .name     = "15 bpp RGB, le",
  88                 .fourcc   = V4L2_PIX_FMT_RGB555,
  89                 .cxformat = ColorFormatRGB15,
  90                 .depth    = 16,
  91                 .flags    = FORMAT_FLAGS_PACKED,
  92         }, {
  93                 .name     = "15 bpp RGB, be",
  94                 .fourcc   = V4L2_PIX_FMT_RGB555X,
  95                 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  96                 .depth    = 16,
  97                 .flags    = FORMAT_FLAGS_PACKED,
  98         }, {
  99                 .name     = "16 bpp RGB, le",
 100                 .fourcc   = V4L2_PIX_FMT_RGB565,
 101                 .cxformat = ColorFormatRGB16,
 102                 .depth    = 16,
 103                 .flags    = FORMAT_FLAGS_PACKED,
 104         }, {
 105                 .name     = "16 bpp RGB, be",
 106                 .fourcc   = V4L2_PIX_FMT_RGB565X,
 107                 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
 108                 .depth    = 16,
 109                 .flags    = FORMAT_FLAGS_PACKED,
 110         }, {
 111                 .name     = "24 bpp RGB, le",
 112                 .fourcc   = V4L2_PIX_FMT_BGR24,
 113                 .cxformat = ColorFormatRGB24,
 114                 .depth    = 24,
 115                 .flags    = FORMAT_FLAGS_PACKED,
 116         }, {
 117                 .name     = "32 bpp RGB, le",
 118                 .fourcc   = V4L2_PIX_FMT_BGR32,
 119                 .cxformat = ColorFormatRGB32,
 120                 .depth    = 32,
 121                 .flags    = FORMAT_FLAGS_PACKED,
 122         }, {
 123                 .name     = "32 bpp RGB, be",
 124                 .fourcc   = V4L2_PIX_FMT_RGB32,
 125                 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
 126                             ColorFormatWSWAP,
 127                 .depth    = 32,
 128                 .flags    = FORMAT_FLAGS_PACKED,
 129         }, {
 130                 .name     = "4:2:2, packed, YUYV",
 131                 .fourcc   = V4L2_PIX_FMT_YUYV,
 132                 .cxformat = ColorFormatYUY2,
 133                 .depth    = 16,
 134                 .flags    = FORMAT_FLAGS_PACKED,
 135         }, {
 136                 .name     = "4:2:2, packed, UYVY",
 137                 .fourcc   = V4L2_PIX_FMT_UYVY,
 138                 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
 139                 .depth    = 16,
 140                 .flags    = FORMAT_FLAGS_PACKED,
 141         },
 142 };
 143
 144 static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
 145 {
 146         unsigned int i;
 147
 148         for (i = 0; i < ARRAY_SIZE(formats); i++)
 149                 if (formats[i].fourcc == fourcc)
 150                         return formats + i;
 151         return NULL;
 152 }
 153
 154 /* ------------------------------------------------------------------- */
 155
 156 struct cx88_ctrl {
 157         /* control information */
 158         u32 id;
 159         s32 minimum;
 160         s32 maximum;
 161         u32 step;
 162         s32 default_value;
 163
 164         /* control register information */
 165         u32 off;
 166         u32 reg;
 167         u32 sreg;
 168         u32 mask;
 169         u32 shift;
 170 };
 171
 172 static const struct cx88_ctrl cx8800_vid_ctls[] = {
 173         /* --- video --- */
 174         {
 175                 .id            = V4L2_CID_BRIGHTNESS,
 176                 .minimum       = 0x00,
 177                 .maximum       = 0xff,
 178                 .step          = 1,
 179                 .default_value = 0x7f,
 180                 .off           = 128,
 181                 .reg           = MO_CONTR_BRIGHT,
 182                 .mask          = 0x00ff,
 183                 .shift         = 0,
 184         }, {
 185                 .id            = V4L2_CID_CONTRAST,
 186                 .minimum       = 0,
 187                 .maximum       = 0xff,
 188                 .step          = 1,
 189                 .default_value = 0x3f,
 190                 .off           = 0,
 191                 .reg           = MO_CONTR_BRIGHT,
 192                 .mask          = 0xff00,
 193                 .shift         = 8,
 194         }, {
 195                 .id            = V4L2_CID_HUE,
 196                 .minimum       = 0,
 197                 .maximum       = 0xff,
 198                 .step          = 1,
 199                 .default_value = 0x7f,
 200                 .off           = 128,
 201                 .reg           = MO_HUE,
 202                 .mask          = 0x00ff,
 203                 .shift         = 0,
 204         }, {
 205                 /* strictly, this only describes only U saturation.
 206                  * V saturation is handled specially through code.
 207                  */
 208                 .id            = V4L2_CID_SATURATION,
 209                 .minimum       = 0,
 210                 .maximum       = 0xff,
 211                 .step          = 1,
 212                 .default_value = 0x7f,
 213                 .off           = 0,
 214                 .reg           = MO_UV_SATURATION,
 215                 .mask          = 0x00ff,
 216                 .shift         = 0,
 217         }, {
 218                 .id            = V4L2_CID_SHARPNESS,
 219                 .minimum       = 0,
 220                 .maximum       = 4,
 221                 .step          = 1,
 222                 .default_value = 0x0,
 223                 .off           = 0,
 224                 /*
 225                  * NOTE: the value is converted and written to both even
 226                  * and odd registers in the code
 227                  */
 228                 .reg           = MO_FILTER_ODD,
 229                 .mask          = 7 << 7,
 230                 .shift         = 7,
 231         }, {
 232                 .id            = V4L2_CID_CHROMA_AGC,
 233                 .minimum       = 0,
 234                 .maximum       = 1,
 235                 .default_value = 0x1,
 236                 .reg           = MO_INPUT_FORMAT,
 237                 .mask          = 1 << 10,
 238                 .shift         = 10,
 239         }, {
 240                 .id            = V4L2_CID_COLOR_KILLER,
 241                 .minimum       = 0,
 242                 .maximum       = 1,
 243                 .default_value = 0x1,
 244                 .reg           = MO_INPUT_FORMAT,
 245                 .mask          = 1 << 9,
 246                 .shift         = 9,
 247         }, {
 248                 .id            = V4L2_CID_BAND_STOP_FILTER,
 249                 .minimum       = 0,
 250                 .maximum       = 1,
 251                 .step          = 1,
 252                 .default_value = 0x0,
 253                 .off           = 0,
 254                 .reg           = MO_HTOTAL,
 255                 .mask          = 3 << 11,
 256                 .shift         = 11,
 257         }
 258 };
 259
 260 static const struct cx88_ctrl cx8800_aud_ctls[] = {
 261         {
 262                 /* --- audio --- */
 263                 .id            = V4L2_CID_AUDIO_MUTE,
 264                 .minimum       = 0,
 265                 .maximum       = 1,
 266                 .default_value = 1,
 267                 .reg           = AUD_VOL_CTL,
 268                 .sreg          = SHADOW_AUD_VOL_CTL,
 269                 .mask          = (1 << 6),
 270                 .shift         = 6,
 271         }, {
 272                 .id            = V4L2_CID_AUDIO_VOLUME,
 273                 .minimum       = 0,
 274                 .maximum       = 0x3f,
 275                 .step          = 1,
 276                 .default_value = 0x3f,
 277                 .reg           = AUD_VOL_CTL,
 278                 .sreg          = SHADOW_AUD_VOL_CTL,
 279                 .mask          = 0x3f,
 280                 .shift         = 0,
 281         }, {
 282                 .id            = V4L2_CID_AUDIO_BALANCE,
 283                 .minimum       = 0,
 284                 .maximum       = 0x7f,
 285                 .step          = 1,
 286                 .default_value = 0x40,
 287                 .reg           = AUD_BAL_CTL,
 288                 .sreg          = SHADOW_AUD_BAL_CTL,
 289                 .mask          = 0x7f,
 290                 .shift         = 0,
 291         }
 292 };
 293
 294 enum {
 295         CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
 296         CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
 297 };
 298
 299 /* ------------------------------------------------------------------ */
 300
 301 int cx88_video_mux(struct cx88_core *core, unsigned int input)
 302 {
 303         /* struct cx88_core *core = dev->core; */
 304
 305         dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
 306                 input, INPUT(input).vmux,
 307                 INPUT(input).gpio0, INPUT(input).gpio1,
 308                 INPUT(input).gpio2, INPUT(input).gpio3);
 309         core->input = input;
 310         cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
 311         cx_write(MO_GP3_IO, INPUT(input).gpio3);
 312         cx_write(MO_GP0_IO, INPUT(input).gpio0);
 313         cx_write(MO_GP1_IO, INPUT(input).gpio1);
 314         cx_write(MO_GP2_IO, INPUT(input).gpio2);
 315
 316         switch (INPUT(input).type) {
 317         case CX88_VMUX_SVIDEO:
 318                 cx_set(MO_AFECFG_IO,    0x00000001);
 319                 cx_set(MO_INPUT_FORMAT, 0x00010010);
 320                 cx_set(MO_FILTER_EVEN,  0x00002020);
 321                 cx_set(MO_FILTER_ODD,   0x00002020);
 322                 break;
 323         default:
 324                 cx_clear(MO_AFECFG_IO,    0x00000001);
 325                 cx_clear(MO_INPUT_FORMAT, 0x00010010);
 326                 cx_clear(MO_FILTER_EVEN,  0x00002020);
 327                 cx_clear(MO_FILTER_ODD,   0x00002020);
 328                 break;
 329         }
 330
 331         /*
 332          * if there are audioroutes defined, we have an external
 333          * ADC to deal with audio
 334          */
 335         if (INPUT(input).audioroute) {
 336                 /*
 337                  * The wm8775 module has the "2" route hardwired into
 338                  * the initialization. Some boards may use different
 339                  * routes for different inputs. HVR-1300 surely does
 340                  */
 341                 if (core->sd_wm8775) {
 342                         call_all(core, audio, s_routing,
 343                                  INPUT(input).audioroute, 0, 0);
 344                 }
 345                 /*
 346                  * cx2388's C-ADC is connected to the tuner only.
 347                  * When used with S-Video, that ADC is busy dealing with
 348                  * chroma, so an external must be used for baseband audio
 349                  */
 350                 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
 351                     INPUT(input).type != CX88_VMUX_CABLE) {
 352                         /* "I2S ADC mode" */
 353                         core->tvaudio = WW_I2SADC;
 354                         cx88_set_tvaudio(core);
 355                 } else {
 356                         /* Normal mode */
 357                         cx_write(AUD_I2SCNTL, 0x0);
 358                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
 359                 }
 360         }
 361
 362         return 0;
 363 }
 364 EXPORT_SYMBOL(cx88_video_mux);
 365
 366 /* ------------------------------------------------------------------ */
 367
 368 static int start_video_dma(struct cx8800_dev    *dev,
 369                            struct cx88_dmaqueue *q,
 370                            struct cx88_buffer   *buf)
 371 {
 372         struct cx88_core *core = dev->core;
 373
 374         /* setup fifo + format */
 375         cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
 376                                 buf->bpl, buf->risc.dma);
 377         cx88_set_scale(core, core->width, core->height, core->field);
 378         cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
 379
 380         /* reset counter */
 381         cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
 382         q->count = 0;
 383
 384         /* enable irqs */
 385         cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
 386
 387         /*
 388          * Enables corresponding bits at PCI_INT_STAT:
 389          *      bits 0 to 4: video, audio, transport stream, VIP, Host
 390          *      bit 7: timer
 391          *      bits 8 and 9: DMA complete for: SRC, DST
 392          *      bits 10 and 11: BERR signal asserted for RISC: RD, WR
 393          *      bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
 394          */
 395         cx_set(MO_VID_INTMSK, 0x0f0011);
 396
 397         /* enable capture */
 398         cx_set(VID_CAPTURE_CONTROL, 0x06);
 399
 400         /* start dma */
 401         cx_set(MO_DEV_CNTRL2, (1 << 5));
 402         cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
 403
 404         return 0;
 405 }
 406
 407 #ifdef CONFIG_PM
 408 static int stop_video_dma(struct cx8800_dev    *dev)
 409 {
 410         struct cx88_core *core = dev->core;
 411
 412         /* stop dma */
 413         cx_clear(MO_VID_DMACNTRL, 0x11);
 414
 415         /* disable capture */
 416         cx_clear(VID_CAPTURE_CONTROL, 0x06);
 417
 418         /* disable irqs */
 419         cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
 420         cx_clear(MO_VID_INTMSK, 0x0f0011);
 421         return 0;
 422 }
 423
 424 static int restart_video_queue(struct cx8800_dev    *dev,
 425                                struct cx88_dmaqueue *q)
 426 {
 427         struct cx88_buffer *buf;
 428
 429         if (!list_empty(&q->active)) {
 430                 buf = list_entry(q->active.next, struct cx88_buffer, list);
 431                 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
 432                         buf, buf->vb.vb2_buf.index);
 433                 start_video_dma(dev, q, buf);
 434         }
 435         return 0;
 436 }
 437 #endif
 438
 439 /* ------------------------------------------------------------------ */
 440
 441 static int queue_setup(struct vb2_queue *q,
 442                        unsigned int *num_buffers, unsigned int *num_planes,
 443                        unsigned int sizes[], struct device *alloc_devs[])
 444 {
 445         struct cx8800_dev *dev = q->drv_priv;
 446         struct cx88_core *core = dev->core;
 447
 448         *num_planes = 1;
 449         sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
 450         return 0;
 451 }
 452
 453 static int buffer_prepare(struct vb2_buffer *vb)
 454 {
 455         int ret;
 456         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 457         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 458         struct cx88_core *core = dev->core;
 459         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 460         struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
 461
 462         buf->bpl = core->width * dev->fmt->depth >> 3;
 463
 464         if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
 465                 return -EINVAL;
 466         vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
 467
 468         switch (core->field) {
 469         case V4L2_FIELD_TOP:
 470                 ret = cx88_risc_buffer(dev->pci, &buf->risc,
 471                                        sgt->sgl, 0, UNSET,
 472                                        buf->bpl, 0, core->height);
 473                 break;
 474         case V4L2_FIELD_BOTTOM:
 475                 ret = cx88_risc_buffer(dev->pci, &buf->risc,
 476                                        sgt->sgl, UNSET, 0,
 477                                        buf->bpl, 0, core->height);
 478                 break;
 479         case V4L2_FIELD_SEQ_TB:
 480                 ret = cx88_risc_buffer(dev->pci, &buf->risc,
 481                                        sgt->sgl,
 482                                        0, buf->bpl * (core->height >> 1),
 483                                        buf->bpl, 0,
 484                                        core->height >> 1);
 485                 break;
 486         case V4L2_FIELD_SEQ_BT:
 487                 ret = cx88_risc_buffer(dev->pci, &buf->risc,
 488                                        sgt->sgl,
 489                                        buf->bpl * (core->height >> 1), 0,
 490                                        buf->bpl, 0,
 491                                        core->height >> 1);
 492                 break;
 493         case V4L2_FIELD_INTERLACED:
 494         default:
 495                 ret = cx88_risc_buffer(dev->pci, &buf->risc,
 496                                        sgt->sgl, 0, buf->bpl,
 497                                        buf->bpl, buf->bpl,
 498                                        core->height >> 1);
 499                 break;
 500         }
 501         dprintk(2,
 502                 "[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
 503                 buf, buf->vb.vb2_buf.index,
 504                 core->width, core->height, dev->fmt->depth, dev->fmt->name,
 505                 (unsigned long)buf->risc.dma);
 506         return ret;
 507 }
 508
 509 static void buffer_finish(struct vb2_buffer *vb)
 510 {
 511         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 512         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 513         struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
 514         struct cx88_riscmem *risc = &buf->risc;
 515
 516         if (risc->cpu)
 517                 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
 518         memset(risc, 0, sizeof(*risc));
 519 }
 520
 521 static void buffer_queue(struct vb2_buffer *vb)
 522 {
 523         struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
 524         struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
 525         struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
 526         struct cx88_buffer    *prev;
 527         struct cx88_dmaqueue  *q    = &dev->vidq;
 528
 529         /* add jump to start */
 530         buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
 531         buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
 532         buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
 533
 534         if (list_empty(&q->active)) {
 535                 list_add_tail(&buf->list, &q->active);
 536                 dprintk(2, "[%p/%d] buffer_queue - first active\n",
 537                         buf, buf->vb.vb2_buf.index);
 538
 539         } else {
 540                 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
 541                 prev = list_entry(q->active.prev, struct cx88_buffer, list);
 542                 list_add_tail(&buf->list, &q->active);
 543                 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
 544                 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
 545                         buf, buf->vb.vb2_buf.index);
 546         }
 547 }
 548
 549 static int start_streaming(struct vb2_queue *q, unsigned int count)
 550 {
 551         struct cx8800_dev *dev = q->drv_priv;
 552         struct cx88_dmaqueue *dmaq = &dev->vidq;
 553         struct cx88_buffer *buf = list_entry(dmaq->active.next,
 554                         struct cx88_buffer, list);
 555
 556         start_video_dma(dev, dmaq, buf);
 557         return 0;
 558 }
 559
 560 static void stop_streaming(struct vb2_queue *q)
 561 {
 562         struct cx8800_dev *dev = q->drv_priv;
 563         struct cx88_core *core = dev->core;
 564         struct cx88_dmaqueue *dmaq = &dev->vidq;
 565         unsigned long flags;
 566
 567         cx_clear(MO_VID_DMACNTRL, 0x11);
 568         cx_clear(VID_CAPTURE_CONTROL, 0x06);
 569         spin_lock_irqsave(&dev->slock, flags);
 570         while (!list_empty(&dmaq->active)) {
 571                 struct cx88_buffer *buf = list_entry(dmaq->active.next,
 572                         struct cx88_buffer, list);
 573
 574                 list_del(&buf->list);
 575                 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
 576         }
 577         spin_unlock_irqrestore(&dev->slock, flags);
 578 }
 579
 580 static const struct vb2_ops cx8800_video_qops = {
 581         .queue_setup    = queue_setup,
 582         .buf_prepare  = buffer_prepare,
 583         .buf_finish = buffer_finish,
 584         .buf_queue    = buffer_queue,
 585         .wait_prepare = vb2_ops_wait_prepare,
 586         .wait_finish = vb2_ops_wait_finish,
 587         .start_streaming = start_streaming,
 588         .stop_streaming = stop_streaming,
 589 };
 590
 591 /* ------------------------------------------------------------------ */
 592
 593 static int radio_open(struct file *file)
 594 {
 595         struct cx8800_dev *dev = video_drvdata(file);
 596         struct cx88_core *core = dev->core;
 597         int ret = v4l2_fh_open(file);
 598
 599         if (ret)
 600                 return ret;
 601
 602         cx_write(MO_GP3_IO, core->board.radio.gpio3);
 603         cx_write(MO_GP0_IO, core->board.radio.gpio0);
 604         cx_write(MO_GP1_IO, core->board.radio.gpio1);
 605         cx_write(MO_GP2_IO, core->board.radio.gpio2);
 606         if (core->board.radio.audioroute) {
 607                 if (core->sd_wm8775) {
 608                         call_all(core, audio, s_routing,
 609                                  core->board.radio.audioroute, 0, 0);
 610                 }
 611                 /* "I2S ADC mode" */
 612                 core->tvaudio = WW_I2SADC;
 613                 cx88_set_tvaudio(core);
 614         } else {
 615                 /* FM Mode */
 616                 core->tvaudio = WW_FM;
 617                 cx88_set_tvaudio(core);
 618                 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
 619         }
 620         call_all(core, tuner, s_radio);
 621         return 0;
 622 }
 623
 624 /* ------------------------------------------------------------------ */
 625 /* VIDEO CTRL IOCTLS                                                  */
 626
 627 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
 628 {
 629         struct cx88_core *core =
 630                 container_of(ctrl->handler, struct cx88_core, video_hdl);
 631         const struct cx88_ctrl *cc = ctrl->priv;
 632         u32 value, mask;
 633
 634         mask = cc->mask;
 635         switch (ctrl->id) {
 636         case V4L2_CID_SATURATION:
 637                 /* special v_sat handling */
 638
 639                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 640
 641                 if (core->tvnorm & V4L2_STD_SECAM) {
 642                         /* For SECAM, both U and V sat should be equal */
 643                         value = value << 8 | value;
 644                 } else {
 645                         /* Keeps U Saturation proportional to V Sat */
 646                         value = (value * 0x5a) / 0x7f << 8 | value;
 647                 }
 648                 mask = 0xffff;
 649                 break;
 650         case V4L2_CID_SHARPNESS:
 651                 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
 652                 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
 653                 /* needs to be set for both fields */
 654                 cx_andor(MO_FILTER_EVEN, mask, value);
 655                 break;
 656         case V4L2_CID_CHROMA_AGC:
 657                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 658                 break;
 659         default:
 660                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 661                 break;
 662         }
 663         dprintk(1,
 664                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 665                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 666                 mask, cc->sreg ? " [shadowed]" : "");
 667         if (cc->sreg)
 668                 cx_sandor(cc->sreg, cc->reg, mask, value);
 669         else
 670                 cx_andor(cc->reg, mask, value);
 671         return 0;
 672 }
 673
 674 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
 675 {
 676         struct cx88_core *core =
 677                 container_of(ctrl->handler, struct cx88_core, audio_hdl);
 678         const struct cx88_ctrl *cc = ctrl->priv;
 679         u32 value, mask;
 680
 681         /* Pass changes onto any WM8775 */
 682         if (core->sd_wm8775) {
 683                 switch (ctrl->id) {
 684                 case V4L2_CID_AUDIO_MUTE:
 685                         wm8775_s_ctrl(core, ctrl->id, ctrl->val);
 686                         break;
 687                 case V4L2_CID_AUDIO_VOLUME:
 688                         wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
 689                                                 (0x90 + ctrl->val) << 8 : 0);
 690                         break;
 691                 case V4L2_CID_AUDIO_BALANCE:
 692                         wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
 693                         break;
 694                 default:
 695                         break;
 696                 }
 697         }
 698
 699         mask = cc->mask;
 700         switch (ctrl->id) {
 701         case V4L2_CID_AUDIO_BALANCE:
 702                 value = (ctrl->val < 0x40) ?
 703                         (0x7f - ctrl->val) : (ctrl->val - 0x40);
 704                 break;
 705         case V4L2_CID_AUDIO_VOLUME:
 706                 value = 0x3f - (ctrl->val & 0x3f);
 707                 break;
 708         default:
 709                 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
 710                 break;
 711         }
 712         dprintk(1,
 713                 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
 714                 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
 715                 mask, cc->sreg ? " [shadowed]" : "");
 716         if (cc->sreg)
 717                 cx_sandor(cc->sreg, cc->reg, mask, value);
 718         else
 719                 cx_andor(cc->reg, mask, value);
 720         return 0;
 721 }
 722
 723 /* ------------------------------------------------------------------ */
 724 /* VIDEO IOCTLS                                                       */
 725
 726 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
 727                                 struct v4l2_format *f)
 728 {
 729         struct cx8800_dev *dev = video_drvdata(file);
 730         struct cx88_core *core = dev->core;
 731
 732         f->fmt.pix.width        = core->width;
 733         f->fmt.pix.height       = core->height;
 734         f->fmt.pix.field        = core->field;
 735         f->fmt.pix.pixelformat  = dev->fmt->fourcc;
 736         f->fmt.pix.bytesperline =
 737                 (f->fmt.pix.width * dev->fmt->depth) >> 3;
 738         f->fmt.pix.sizeimage =
 739                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 740         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 741         return 0;
 742 }
 743
 744 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 745                                   struct v4l2_format *f)
 746 {
 747         struct cx8800_dev *dev = video_drvdata(file);
 748         struct cx88_core *core = dev->core;
 749         const struct cx8800_fmt *fmt;
 750         enum v4l2_field   field;
 751         unsigned int      maxw, maxh;
 752
 753         fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 754         if (!fmt)
 755                 return -EINVAL;
 756
 757         maxw = norm_maxw(core->tvnorm);
 758         maxh = norm_maxh(core->tvnorm);
 759
 760         field = f->fmt.pix.field;
 761
 762         switch (field) {
 763         case V4L2_FIELD_TOP:
 764         case V4L2_FIELD_BOTTOM:
 765         case V4L2_FIELD_INTERLACED:
 766         case V4L2_FIELD_SEQ_BT:
 767         case V4L2_FIELD_SEQ_TB:
 768                 break;
 769         default:
 770                 field = (f->fmt.pix.height > maxh / 2)
 771                         ? V4L2_FIELD_INTERLACED
 772                         : V4L2_FIELD_BOTTOM;
 773                 break;
 774         }
 775         if (V4L2_FIELD_HAS_T_OR_B(field))
 776                 maxh /= 2;
 777
 778         v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
 779                               &f->fmt.pix.height, 32, maxh, 0, 0);
 780         f->fmt.pix.field = field;
 781         f->fmt.pix.bytesperline =
 782                 (f->fmt.pix.width * fmt->depth) >> 3;
 783         f->fmt.pix.sizeimage =
 784                 f->fmt.pix.height * f->fmt.pix.bytesperline;
 785         f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
 786
 787         return 0;
 788 }
 789
 790 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 791                                 struct v4l2_format *f)
 792 {
 793         struct cx8800_dev *dev = video_drvdata(file);
 794         struct cx88_core *core = dev->core;
 795         int err = vidioc_try_fmt_vid_cap(file, priv, f);
 796
 797         if (err != 0)
 798                 return err;
 799         if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
 800                 return -EBUSY;
 801         if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
 802                 return -EBUSY;
 803         dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
 804         core->width = f->fmt.pix.width;
 805         core->height = f->fmt.pix.height;
 806         core->field = f->fmt.pix.field;
 807         return 0;
 808 }
 809
 810 void cx88_querycap(struct file *file, struct cx88_core *core,
 811                    struct v4l2_capability *cap)
 812 {
 813         struct video_device *vdev = video_devdata(file);
 814
 815         strlcpy(cap->card, core->board.name, sizeof(cap->card));
 816         cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
 817         if (core->board.tuner_type != UNSET)
 818                 cap->device_caps |= V4L2_CAP_TUNER;
 819         switch (vdev->vfl_type) {
 820         case VFL_TYPE_RADIO:
 821                 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
 822                 break;
 823         case VFL_TYPE_GRABBER:
 824                 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
 825                 break;
 826         case VFL_TYPE_VBI:
 827                 cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
 828                 break;
 829         }
 830         cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
 831                 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
 832         if (core->board.radio.type == CX88_RADIO)
 833                 cap->capabilities |= V4L2_CAP_RADIO;
 834 }
 835 EXPORT_SYMBOL(cx88_querycap);
 836
 837 static int vidioc_querycap(struct file *file, void  *priv,
 838                            struct v4l2_capability *cap)
 839 {
 840         struct cx8800_dev *dev = video_drvdata(file);
 841         struct cx88_core *core = dev->core;
 842
 843         strcpy(cap->driver, "cx8800");
 844         sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
 845         cx88_querycap(file, core, cap);
 846         return 0;
 847 }
 848
 849 static int vidioc_enum_fmt_vid_cap(struct file *file, void  *priv,
 850                                    struct v4l2_fmtdesc *f)
 851 {
 852         if (unlikely(f->index >= ARRAY_SIZE(formats)))
 853                 return -EINVAL;
 854
 855         strlcpy(f->description, formats[f->index].name, sizeof(f->description));
 856         f->pixelformat = formats[f->index].fourcc;
 857
 858         return 0;
 859 }
 860
 861 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
 862 {
 863         struct cx8800_dev *dev = video_drvdata(file);
 864         struct cx88_core *core = dev->core;
 865
 866         *tvnorm = core->tvnorm;
 867         return 0;
 868 }
 869
 870 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
 871 {
 872         struct cx8800_dev *dev = video_drvdata(file);
 873         struct cx88_core *core = dev->core;
 874
 875         return cx88_set_tvnorm(core, tvnorms);
 876 }
 877
 878 /* only one input in this sample driver */
 879 int cx88_enum_input(struct cx88_core  *core, struct v4l2_input *i)
 880 {
 881         static const char * const iname[] = {
 882                 [CX88_VMUX_COMPOSITE1] = "Composite1",
 883                 [CX88_VMUX_COMPOSITE2] = "Composite2",
 884                 [CX88_VMUX_COMPOSITE3] = "Composite3",
 885                 [CX88_VMUX_COMPOSITE4] = "Composite4",
 886                 [CX88_VMUX_SVIDEO] = "S-Video",
 887                 [CX88_VMUX_TELEVISION] = "Television",
 888                 [CX88_VMUX_CABLE] = "Cable TV",
 889                 [CX88_VMUX_DVB] = "DVB",
 890                 [CX88_VMUX_DEBUG] = "for debug only",
 891         };
 892         unsigned int n = i->index;
 893
 894         if (n >= 4)
 895                 return -EINVAL;
 896         if (!INPUT(n).type)
 897                 return -EINVAL;
 898         i->type  = V4L2_INPUT_TYPE_CAMERA;
 899         strcpy(i->name, iname[INPUT(n).type]);
 900         if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
 901             (INPUT(n).type == CX88_VMUX_CABLE))
 902                 i->type = V4L2_INPUT_TYPE_TUNER;
 903
 904         i->std = CX88_NORMS;
 905         return 0;
 906 }
 907 EXPORT_SYMBOL(cx88_enum_input);
 908
 909 static int vidioc_enum_input(struct file *file, void *priv,
 910                              struct v4l2_input *i)
 911 {
 912         struct cx8800_dev *dev = video_drvdata(file);
 913         struct cx88_core *core = dev->core;
 914
 915         return cx88_enum_input(core, i);
 916 }
 917
 918 static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
 919 {
 920         struct cx8800_dev *dev = video_drvdata(file);
 921         struct cx88_core *core = dev->core;
 922
 923         *i = core->input;
 924         return 0;
 925 }
 926
 927 static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
 928 {
 929         struct cx8800_dev *dev = video_drvdata(file);
 930         struct cx88_core *core = dev->core;
 931
 932         if (i >= 4)
 933                 return -EINVAL;
 934         if (!INPUT(i).type)
 935                 return -EINVAL;
 936
 937         cx88_newstation(core);
 938         cx88_video_mux(core, i);
 939         return 0;
 940 }
 941
 942 static int vidioc_g_tuner(struct file *file, void *priv,
 943                           struct v4l2_tuner *t)
 944 {
 945         struct cx8800_dev *dev = video_drvdata(file);
 946         struct cx88_core *core = dev->core;
 947         u32 reg;
 948
 949         if (unlikely(core->board.tuner_type == UNSET))
 950                 return -EINVAL;
 951         if (t->index != 0)
 952                 return -EINVAL;
 953
 954         strcpy(t->name, "Television");
 955         t->capability = V4L2_TUNER_CAP_NORM;
 956         t->rangehigh  = 0xffffffffUL;
 957         call_all(core, tuner, g_tuner, t);
 958
 959         cx88_get_stereo(core, t);
 960         reg = cx_read(MO_DEVICE_STATUS);
 961         t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
 962         return 0;
 963 }
 964
 965 static int vidioc_s_tuner(struct file *file, void *priv,
 966                           const struct v4l2_tuner *t)
 967 {
 968         struct cx8800_dev *dev = video_drvdata(file);
 969         struct cx88_core *core = dev->core;
 970
 971         if (core->board.tuner_type == UNSET)
 972                 return -EINVAL;
 973         if (t->index != 0)
 974                 return -EINVAL;
 975
 976         cx88_set_stereo(core, t->audmode, 1);
 977         return 0;
 978 }
 979
 980 static int vidioc_g_frequency(struct file *file, void *priv,
 981                               struct v4l2_frequency *f)
 982 {
 983         struct cx8800_dev *dev = video_drvdata(file);
 984         struct cx88_core *core = dev->core;
 985
 986         if (unlikely(core->board.tuner_type == UNSET))
 987                 return -EINVAL;
 988         if (f->tuner)
 989                 return -EINVAL;
 990
 991         f->frequency = core->freq;
 992
 993         call_all(core, tuner, g_frequency, f);
 994
 995         return 0;
 996 }
 997
 998 int cx88_set_freq(struct cx88_core  *core,
 999                   const struct v4l2_frequency *f)
1000 {
1001         struct v4l2_frequency new_freq = *f;
1002
1003         if (unlikely(core->board.tuner_type == UNSET))
1004                 return -EINVAL;
1005         if (unlikely(f->tuner != 0))
1006                 return -EINVAL;
1007
1008         cx88_newstation(core);
1009         call_all(core, tuner, s_frequency, f);
1010         call_all(core, tuner, g_frequency, &new_freq);
1011         core->freq = new_freq.frequency;
1012
1013         /* When changing channels it is required to reset TVAUDIO */
1014         usleep_range(10000, 20000);
1015         cx88_set_tvaudio(core);
1016
1017         return 0;
1018 }
1019 EXPORT_SYMBOL(cx88_set_freq);
1020
1021 static int vidioc_s_frequency(struct file *file, void *priv,
1022                               const struct v4l2_frequency *f)
1023 {
1024         struct cx8800_dev *dev = video_drvdata(file);
1025         struct cx88_core *core = dev->core;
1026
1027         return cx88_set_freq(core, f);
1028 }
1029
1030 #ifdef CONFIG_VIDEO_ADV_DEBUG
1031 static int vidioc_g_register(struct file *file, void *fh,
1032                              struct v4l2_dbg_register *reg)
1033 {
1034         struct cx8800_dev *dev = video_drvdata(file);
1035         struct cx88_core *core = dev->core;
1036
1037         /* cx2388x has a 24-bit register space */
1038         reg->val = cx_read(reg->reg & 0xfffffc);
1039         reg->size = 4;
1040         return 0;
1041 }
1042
1043 static int vidioc_s_register(struct file *file, void *fh,
1044                              const struct v4l2_dbg_register *reg)
1045 {
1046         struct cx8800_dev *dev = video_drvdata(file);
1047         struct cx88_core *core = dev->core;
1048
1049         cx_write(reg->reg & 0xfffffc, reg->val);
1050         return 0;
1051 }
1052 #endif
1053
1054 /* ----------------------------------------------------------- */
1055 /* RADIO ESPECIFIC IOCTLS                                      */
1056 /* ----------------------------------------------------------- */
1057
1058 static int radio_g_tuner(struct file *file, void *priv,
1059                          struct v4l2_tuner *t)
1060 {
1061         struct cx8800_dev *dev = video_drvdata(file);
1062         struct cx88_core *core = dev->core;
1063
1064         if (unlikely(t->index > 0))
1065                 return -EINVAL;
1066
1067         strcpy(t->name, "Radio");
1068
1069         call_all(core, tuner, g_tuner, t);
1070         return 0;
1071 }
1072
1073 static int radio_s_tuner(struct file *file, void *priv,
1074                          const struct v4l2_tuner *t)
1075 {
1076         struct cx8800_dev *dev = video_drvdata(file);
1077         struct cx88_core *core = dev->core;
1078
1079         if (t->index != 0)
1080                 return -EINVAL;
1081
1082         call_all(core, tuner, s_tuner, t);
1083         return 0;
1084 }
1085
1086 /* ----------------------------------------------------------- */
1087
1088 static const char *cx88_vid_irqs[32] = {
1089         "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1090         "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1091         "y_oflow",  "u_oflow",  "v_oflow",  "vbi_oflow",
1092         "y_sync",   "u_sync",   "v_sync",   "vbi_sync",
1093         "opc_err",  "par_err",  "rip_err",  "pci_abort",
1094 };
1095
1096 static void cx8800_vid_irq(struct cx8800_dev *dev)
1097 {
1098         struct cx88_core *core = dev->core;
1099         u32 status, mask, count;
1100
1101         status = cx_read(MO_VID_INTSTAT);
1102         mask   = cx_read(MO_VID_INTMSK);
1103         if (0 == (status & mask))
1104                 return;
1105         cx_write(MO_VID_INTSTAT, status);
1106         if (irq_debug  ||  (status & mask & ~0xff))
1107                 cx88_print_irqbits("irq vid",
1108                                    cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1109                                    status, mask);
1110
1111         /* risc op code error */
1112         if (status & (1 << 16)) {
1113                 pr_warn("video risc op code error\n");
1114                 cx_clear(MO_VID_DMACNTRL, 0x11);
1115                 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1116                 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1117         }
1118
1119         /* risc1 y */
1120         if (status & 0x01) {
1121                 spin_lock(&dev->slock);
1122                 count = cx_read(MO_VIDY_GPCNT);
1123                 cx88_wakeup(core, &dev->vidq, count);
1124                 spin_unlock(&dev->slock);
1125         }
1126
1127         /* risc1 vbi */
1128         if (status & 0x08) {
1129                 spin_lock(&dev->slock);
1130                 count = cx_read(MO_VBI_GPCNT);
1131                 cx88_wakeup(core, &dev->vbiq, count);
1132                 spin_unlock(&dev->slock);
1133         }
1134 }
1135
1136 static irqreturn_t cx8800_irq(int irq, void *dev_id)
1137 {
1138         struct cx8800_dev *dev = dev_id;
1139         struct cx88_core *core = dev->core;
1140         u32 status;
1141         int loop, handled = 0;
1142
1143         for (loop = 0; loop < 10; loop++) {
1144                 status = cx_read(MO_PCI_INTSTAT) &
1145                         (core->pci_irqmask | PCI_INT_VIDINT);
1146                 if (status == 0)
1147                         goto out;
1148                 cx_write(MO_PCI_INTSTAT, status);
1149                 handled = 1;
1150
1151                 if (status & core->pci_irqmask)
1152                         cx88_core_irq(core, status);
1153                 if (status & PCI_INT_VIDINT)
1154                         cx8800_vid_irq(dev);
1155         }
1156         if (loop == 10) {
1157                 pr_warn("irq loop -- clearing mask\n");
1158                 cx_write(MO_PCI_INTMSK, 0);
1159         }
1160
1161  out:
1162         return IRQ_RETVAL(handled);
1163 }
1164
1165 /* ----------------------------------------------------------- */
1166 /* exported stuff                                              */
1167
1168 static const struct v4l2_file_operations video_fops = {
1169         .owner         = THIS_MODULE,
1170         .open          = v4l2_fh_open,
1171         .release       = vb2_fop_release,
1172         .read          = vb2_fop_read,
1173         .poll          = vb2_fop_poll,
1174         .mmap          = vb2_fop_mmap,
1175         .unlocked_ioctl = video_ioctl2,
1176 };
1177
1178 static const struct v4l2_ioctl_ops video_ioctl_ops = {
1179         .vidioc_querycap      = vidioc_querycap,
1180         .vidioc_enum_fmt_vid_cap  = vidioc_enum_fmt_vid_cap,
1181         .vidioc_g_fmt_vid_cap     = vidioc_g_fmt_vid_cap,
1182         .vidioc_try_fmt_vid_cap   = vidioc_try_fmt_vid_cap,
1183         .vidioc_s_fmt_vid_cap     = vidioc_s_fmt_vid_cap,
1184         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1185         .vidioc_querybuf      = vb2_ioctl_querybuf,
1186         .vidioc_qbuf          = vb2_ioctl_qbuf,
1187         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1188         .vidioc_g_std         = vidioc_g_std,
1189         .vidioc_s_std         = vidioc_s_std,
1190         .vidioc_enum_input    = vidioc_enum_input,
1191         .vidioc_g_input       = vidioc_g_input,
1192         .vidioc_s_input       = vidioc_s_input,
1193         .vidioc_streamon      = vb2_ioctl_streamon,
1194         .vidioc_streamoff     = vb2_ioctl_streamoff,
1195         .vidioc_g_tuner       = vidioc_g_tuner,
1196         .vidioc_s_tuner       = vidioc_s_tuner,
1197         .vidioc_g_frequency   = vidioc_g_frequency,
1198         .vidioc_s_frequency   = vidioc_s_frequency,
1199         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1200         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1201 #ifdef CONFIG_VIDEO_ADV_DEBUG
1202         .vidioc_g_register    = vidioc_g_register,
1203         .vidioc_s_register    = vidioc_s_register,
1204 #endif
1205 };
1206
1207 static const struct video_device cx8800_video_template = {
1208         .name                 = "cx8800-video",
1209         .fops                 = &video_fops,
1210         .ioctl_ops            = &video_ioctl_ops,
1211         .tvnorms              = CX88_NORMS,
1212 };
1213
1214 static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1215         .vidioc_querycap      = vidioc_querycap,
1216         .vidioc_g_fmt_vbi_cap     = cx8800_vbi_fmt,
1217         .vidioc_try_fmt_vbi_cap   = cx8800_vbi_fmt,
1218         .vidioc_s_fmt_vbi_cap     = cx8800_vbi_fmt,
1219         .vidioc_reqbufs       = vb2_ioctl_reqbufs,
1220         .vidioc_querybuf      = vb2_ioctl_querybuf,
1221         .vidioc_qbuf          = vb2_ioctl_qbuf,
1222         .vidioc_dqbuf         = vb2_ioctl_dqbuf,
1223         .vidioc_g_std         = vidioc_g_std,
1224         .vidioc_s_std         = vidioc_s_std,
1225         .vidioc_enum_input    = vidioc_enum_input,
1226         .vidioc_g_input       = vidioc_g_input,
1227         .vidioc_s_input       = vidioc_s_input,
1228         .vidioc_streamon      = vb2_ioctl_streamon,
1229         .vidioc_streamoff     = vb2_ioctl_streamoff,
1230         .vidioc_g_tuner       = vidioc_g_tuner,
1231         .vidioc_s_tuner       = vidioc_s_tuner,
1232         .vidioc_g_frequency   = vidioc_g_frequency,
1233         .vidioc_s_frequency   = vidioc_s_frequency,
1234 #ifdef CONFIG_VIDEO_ADV_DEBUG
1235         .vidioc_g_register    = vidioc_g_register,
1236         .vidioc_s_register    = vidioc_s_register,
1237 #endif
1238 };
1239
1240 static const struct video_device cx8800_vbi_template = {
1241         .name                 = "cx8800-vbi",
1242         .fops                 = &video_fops,
1243         .ioctl_ops            = &vbi_ioctl_ops,
1244         .tvnorms              = CX88_NORMS,
1245 };
1246
1247 static const struct v4l2_file_operations radio_fops = {
1248         .owner         = THIS_MODULE,
1249         .open          = radio_open,
1250         .poll          = v4l2_ctrl_poll,
1251         .release       = v4l2_fh_release,
1252         .unlocked_ioctl = video_ioctl2,
1253 };
1254
1255 static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1256         .vidioc_querycap      = vidioc_querycap,
1257         .vidioc_g_tuner       = radio_g_tuner,
1258         .vidioc_s_tuner       = radio_s_tuner,
1259         .vidioc_g_frequency   = vidioc_g_frequency,
1260         .vidioc_s_frequency   = vidioc_s_frequency,
1261         .vidioc_subscribe_event      = v4l2_ctrl_subscribe_event,
1262         .vidioc_unsubscribe_event    = v4l2_event_unsubscribe,
1263 #ifdef CONFIG_VIDEO_ADV_DEBUG
1264         .vidioc_g_register    = vidioc_g_register,
1265         .vidioc_s_register    = vidioc_s_register,
1266 #endif
1267 };
1268
1269 static const struct video_device cx8800_radio_template = {
1270         .name                 = "cx8800-radio",
1271         .fops                 = &radio_fops,
1272         .ioctl_ops            = &radio_ioctl_ops,
1273 };
1274
1275 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1276         .s_ctrl = cx8800_s_vid_ctrl,
1277 };
1278
1279 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1280         .s_ctrl = cx8800_s_aud_ctrl,
1281 };
1282
1283 /* ----------------------------------------------------------- */
1284
1285 static void cx8800_unregister_video(struct cx8800_dev *dev)
1286 {
1287         video_unregister_device(&dev->radio_dev);
1288         video_unregister_device(&dev->vbi_dev);
1289         video_unregister_device(&dev->video_dev);
1290 }
1291
1292 static int cx8800_initdev(struct pci_dev *pci_dev,
1293                           const struct pci_device_id *pci_id)
1294 {
1295         struct cx8800_dev *dev;
1296         struct cx88_core *core;
1297         struct vb2_queue *q;
1298         int err;
1299         int i;
1300
1301         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1302         if (!dev)
1303                 return -ENOMEM;
1304
1305         /* pci init */
1306         dev->pci = pci_dev;
1307         if (pci_enable_device(pci_dev)) {
1308                 err = -EIO;
1309                 goto fail_free;
1310         }
1311         core = cx88_core_get(dev->pci);
1312         if (!core) {
1313                 err = -EINVAL;
1314                 goto fail_disable;
1315         }
1316         dev->core = core;
1317
1318         /* print pci info */
1319         dev->pci_rev = pci_dev->revision;
1320         pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER,  &dev->pci_lat);
1321         pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1322                 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1323                 dev->pci_lat,
1324                 (unsigned long long)pci_resource_start(pci_dev, 0));
1325
1326         pci_set_master(pci_dev);
1327         err = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
1328         if (err) {
1329                 pr_err("Oops: no 32bit PCI DMA ???\n");
1330                 goto fail_core;
1331         }
1332
1333         /* initialize driver struct */
1334         spin_lock_init(&dev->slock);
1335
1336         /* init video dma queues */
1337         INIT_LIST_HEAD(&dev->vidq.active);
1338
1339         /* init vbi dma queues */
1340         INIT_LIST_HEAD(&dev->vbiq.active);
1341
1342         /* get irq */
1343         err = request_irq(pci_dev->irq, cx8800_irq,
1344                           IRQF_SHARED, core->name, dev);
1345         if (err < 0) {
1346                 pr_err("can't get IRQ %d\n", pci_dev->irq);
1347                 goto fail_core;
1348         }
1349         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1350
1351         for (i = 0; i < CX8800_AUD_CTLS; i++) {
1352                 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1353                 struct v4l2_ctrl *vc;
1354
1355                 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1356                                        cc->id, cc->minimum, cc->maximum,
1357                                        cc->step, cc->default_value);
1358                 if (!vc) {
1359                         err = core->audio_hdl.error;
1360                         goto fail_irq;
1361                 }
1362                 vc->priv = (void *)cc;
1363         }
1364
1365         for (i = 0; i < CX8800_VID_CTLS; i++) {
1366                 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1367                 struct v4l2_ctrl *vc;
1368
1369                 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1370                                        cc->id, cc->minimum, cc->maximum,
1371                                        cc->step, cc->default_value);
1372                 if (!vc) {
1373                         err = core->video_hdl.error;
1374                         goto fail_irq;
1375                 }
1376                 vc->priv = (void *)cc;
1377                 if (vc->id == V4L2_CID_CHROMA_AGC)
1378                         core->chroma_agc = vc;
1379         }
1380         v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL);
1381
1382         /* load and configure helper modules */
1383
1384         if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1385                 struct i2c_board_info wm8775_info = {
1386                         .type = "wm8775",
1387                         .addr = 0x36 >> 1,
1388                         .platform_data = &core->wm8775_data,
1389                 };
1390                 struct v4l2_subdev *sd;
1391
1392                 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1393                         core->wm8775_data.is_nova_s = true;
1394                 else
1395                         core->wm8775_data.is_nova_s = false;
1396
1397                 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1398                                                &wm8775_info, NULL);
1399                 if (sd) {
1400                         core->sd_wm8775 = sd;
1401                         sd->grp_id = WM8775_GID;
1402                 }
1403         }
1404
1405         if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1406                 /*
1407                  * This probes for a tda9874 as is used on some
1408                  * Pixelview Ultra boards.
1409                  */
1410                 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1411                                     "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1412         }
1413
1414         switch (core->boardnr) {
1415         case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1416         case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1417                 static const struct i2c_board_info rtc_info = {
1418                         I2C_BOARD_INFO("isl1208", 0x6f)
1419                 };
1420
1421                 request_module("rtc-isl1208");
1422                 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1423         }
1424                 /* fall-through */
1425         case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1426                 request_module("ir-kbd-i2c");
1427         }
1428
1429         /* Sets device info at pci_dev */
1430         pci_set_drvdata(pci_dev, dev);
1431
1432         dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1433
1434         /* Maintain a reference so cx88-blackbird can query the 8800 device. */
1435         core->v4ldev = dev;
1436
1437         /* initial device configuration */
1438         mutex_lock(&core->lock);
1439         cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1440         v4l2_ctrl_handler_setup(&core->video_hdl);
1441         v4l2_ctrl_handler_setup(&core->audio_hdl);
1442         cx88_video_mux(core, 0);
1443
1444         q = &dev->vb2_vidq;
1445         q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1446         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1447         q->gfp_flags = GFP_DMA32;
1448         q->min_buffers_needed = 2;
1449         q->drv_priv = dev;
1450         q->buf_struct_size = sizeof(struct cx88_buffer);
1451         q->ops = &cx8800_video_qops;
1452         q->mem_ops = &vb2_dma_sg_memops;
1453         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1454         q->lock = &core->lock;
1455         q->dev = &dev->pci->dev;
1456
1457         err = vb2_queue_init(q);
1458         if (err < 0)
1459                 goto fail_unreg;
1460
1461         q = &dev->vb2_vbiq;
1462         q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1463         q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1464         q->gfp_flags = GFP_DMA32;
1465         q->min_buffers_needed = 2;
1466         q->drv_priv = dev;
1467         q->buf_struct_size = sizeof(struct cx88_buffer);
1468         q->ops = &cx8800_vbi_qops;
1469         q->mem_ops = &vb2_dma_sg_memops;
1470         q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1471         q->lock = &core->lock;
1472         q->dev = &dev->pci->dev;
1473
1474         err = vb2_queue_init(q);
1475         if (err < 0)
1476                 goto fail_unreg;
1477
1478         /* register v4l devices */
1479         cx88_vdev_init(core, dev->pci, &dev->video_dev,
1480                        &cx8800_video_template, "video");
1481         video_set_drvdata(&dev->video_dev, dev);
1482         dev->video_dev.ctrl_handler = &core->video_hdl;
1483         dev->video_dev.queue = &dev->vb2_vidq;
1484         err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1485                                     video_nr[core->nr]);
1486         if (err < 0) {
1487                 pr_err("can't register video device\n");
1488                 goto fail_unreg;
1489         }
1490         pr_info("registered device %s [v4l2]\n",
1491                 video_device_node_name(&dev->video_dev));
1492
1493         cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1494                        &cx8800_vbi_template, "vbi");
1495         video_set_drvdata(&dev->vbi_dev, dev);
1496         dev->vbi_dev.queue = &dev->vb2_vbiq;
1497         err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1498                                     vbi_nr[core->nr]);
1499         if (err < 0) {
1500                 pr_err("can't register vbi device\n");
1501                 goto fail_unreg;
1502         }
1503         pr_info("registered device %s\n",
1504                 video_device_node_name(&dev->vbi_dev));
1505
1506         if (core->board.radio.type == CX88_RADIO) {
1507                 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1508                                &cx8800_radio_template, "radio");
1509                 video_set_drvdata(&dev->radio_dev, dev);
1510                 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1511                 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1512                                             radio_nr[core->nr]);
1513                 if (err < 0) {
1514                         pr_err("can't register radio device\n");
1515                         goto fail_unreg;
1516                 }
1517                 pr_info("registered device %s\n",
1518                         video_device_node_name(&dev->radio_dev));
1519         }
1520
1521         /* start tvaudio thread */
1522         if (core->board.tuner_type != UNSET) {
1523                 core->kthread = kthread_run(cx88_audio_thread,
1524                                             core, "cx88 tvaudio");
1525                 if (IS_ERR(core->kthread)) {
1526                         err = PTR_ERR(core->kthread);
1527                         pr_err("failed to create cx88 audio thread, err=%d\n",
1528                                err);
1529                 }
1530         }
1531         mutex_unlock(&core->lock);
1532
1533         return 0;
1534
1535 fail_unreg:
1536         cx8800_unregister_video(dev);
1537         mutex_unlock(&core->lock);
1538 fail_irq:
1539         free_irq(pci_dev->irq, dev);
1540 fail_core:
1541         core->v4ldev = NULL;
1542         cx88_core_put(core, dev->pci);
1543 fail_disable:
1544         pci_disable_device(pci_dev);
1545 fail_free:
1546         kfree(dev);
1547         return err;
1548 }
1549
1550 static void cx8800_finidev(struct pci_dev *pci_dev)
1551 {
1552         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1553         struct cx88_core *core = dev->core;
1554
1555         /* stop thread */
1556         if (core->kthread) {
1557                 kthread_stop(core->kthread);
1558                 core->kthread = NULL;
1559         }
1560
1561         if (core->ir)
1562                 cx88_ir_stop(core);
1563
1564         cx88_shutdown(core); /* FIXME */
1565
1566         /* unregister stuff */
1567
1568         free_irq(pci_dev->irq, dev);
1569         cx8800_unregister_video(dev);
1570         pci_disable_device(pci_dev);
1571
1572         core->v4ldev = NULL;
1573
1574         /* free memory */
1575         cx88_core_put(core, dev->pci);
1576         kfree(dev);
1577 }
1578
1579 #ifdef CONFIG_PM
1580 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1581 {
1582         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1583         struct cx88_core *core = dev->core;
1584         unsigned long flags;
1585
1586         /* stop video+vbi capture */
1587         spin_lock_irqsave(&dev->slock, flags);
1588         if (!list_empty(&dev->vidq.active)) {
1589                 pr_info("suspend video\n");
1590                 stop_video_dma(dev);
1591         }
1592         if (!list_empty(&dev->vbiq.active)) {
1593                 pr_info("suspend vbi\n");
1594                 cx8800_stop_vbi_dma(dev);
1595         }
1596         spin_unlock_irqrestore(&dev->slock, flags);
1597
1598         if (core->ir)
1599                 cx88_ir_stop(core);
1600         /* FIXME -- shutdown device */
1601         cx88_shutdown(core);
1602
1603         pci_save_state(pci_dev);
1604         if (pci_set_power_state(pci_dev,
1605                                 pci_choose_state(pci_dev, state)) != 0) {
1606                 pci_disable_device(pci_dev);
1607                 dev->state.disabled = 1;
1608         }
1609         return 0;
1610 }
1611
1612 static int cx8800_resume(struct pci_dev *pci_dev)
1613 {
1614         struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1615         struct cx88_core *core = dev->core;
1616         unsigned long flags;
1617         int err;
1618
1619         if (dev->state.disabled) {
1620                 err = pci_enable_device(pci_dev);
1621                 if (err) {
1622                         pr_err("can't enable device\n");
1623                         return err;
1624                 }
1625
1626                 dev->state.disabled = 0;
1627         }
1628         err = pci_set_power_state(pci_dev, PCI_D0);
1629         if (err) {
1630                 pr_err("can't set power state\n");
1631                 pci_disable_device(pci_dev);
1632                 dev->state.disabled = 1;
1633
1634                 return err;
1635         }
1636         pci_restore_state(pci_dev);
1637
1638         /* FIXME: re-initialize hardware */
1639         cx88_reset(core);
1640         if (core->ir)
1641                 cx88_ir_start(core);
1642
1643         cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1644
1645         /* restart video+vbi capture */
1646         spin_lock_irqsave(&dev->slock, flags);
1647         if (!list_empty(&dev->vidq.active)) {
1648                 pr_info("resume video\n");
1649                 restart_video_queue(dev, &dev->vidq);
1650         }
1651         if (!list_empty(&dev->vbiq.active)) {
1652                 pr_info("resume vbi\n");
1653                 cx8800_restart_vbi_queue(dev, &dev->vbiq);
1654         }
1655         spin_unlock_irqrestore(&dev->slock, flags);
1656
1657         return 0;
1658 }
1659 #endif
1660
1661 /* ----------------------------------------------------------- */
1662
1663 static const struct pci_device_id cx8800_pci_tbl[] = {
1664         {
1665                 .vendor       = 0x14f1,
1666                 .device       = 0x8800,
1667                 .subvendor    = PCI_ANY_ID,
1668                 .subdevice    = PCI_ANY_ID,
1669         }, {
1670                 /* --- end of list --- */
1671         }
1672 };
1673 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1674
1675 static struct pci_driver cx8800_pci_driver = {
1676         .name     = "cx8800",
1677         .id_table = cx8800_pci_tbl,
1678         .probe    = cx8800_initdev,
1679         .remove   = cx8800_finidev,
1680 #ifdef CONFIG_PM
1681         .suspend  = cx8800_suspend,
1682         .resume   = cx8800_resume,
1683 #endif
1684 };
1685
1686 module_pci_driver(cx8800_pci_driver);