1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the Conexant CX25821 PCIe bridge
5 * Copyright (C) 2009 Conexant Systems Inc.
6 * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
9 #include <linux/module.h>
12 /********************* GPIO stuffs *********************/
13 void cx25821_set_gpiopin_direction(struct cx25821_dev *dev,
14 int pin_number, int pin_logic_value)
17 u32 gpio_oe_reg = GPIO_LO_OE;
18 u32 gpio_register = 0;
21 /* Check for valid pinNumber */
25 if (pin_number > 31) {
26 bit = pin_number - 31;
27 gpio_oe_reg = GPIO_HI_OE;
29 /* Here we will make sure that the GPIOs 0 and 1 are output. keep the
31 gpio_register = cx_read(gpio_oe_reg);
33 if (pin_logic_value == 1)
34 value = gpio_register | Set_GPIO_Bit(bit);
36 value = gpio_register & Clear_GPIO_Bit(bit);
38 cx_write(gpio_oe_reg, value);
40 EXPORT_SYMBOL(cx25821_set_gpiopin_direction);
42 static void cx25821_set_gpiopin_logicvalue(struct cx25821_dev *dev,
43 int pin_number, int pin_logic_value)
46 u32 gpio_reg = GPIO_LO;
49 /* Check for valid pinNumber */
53 /* change to output direction */
54 cx25821_set_gpiopin_direction(dev, pin_number, 0);
56 if (pin_number > 31) {
57 bit = pin_number - 31;
61 value = cx_read(gpio_reg);
63 if (pin_logic_value == 0)
64 value &= Clear_GPIO_Bit(bit);
66 value |= Set_GPIO_Bit(bit);
68 cx_write(gpio_reg, value);
71 void cx25821_gpio_init(struct cx25821_dev *dev)
77 case CX25821_BOARD_CONEXANT_ATHENA10:
79 /* set GPIO 5 to select the path for Medusa/Athena */
80 cx25821_set_gpiopin_logicvalue(dev, 5, 1);