1 // SPDX-License-Identifier: GPL-2.0+
3 * IMI RDACM21 GMSL Camera Driver
5 * Copyright (C) 2017-2020 Jacopo Mondi
6 * Copyright (C) 2017-2019 Kieran Bingham
7 * Copyright (C) 2017-2019 Laurent Pinchart
8 * Copyright (C) 2017-2019 Niklas Söderlund
9 * Copyright (C) 2016 Renesas Electronics Corporation
10 * Copyright (C) 2015 Cogent Embedded, Inc.
13 #include <linux/delay.h>
14 #include <linux/fwnode.h>
15 #include <linux/init.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/videodev2.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-subdev.h>
26 #define MAX9271_RESET_CYCLES 10
28 #define OV490_I2C_ADDRESS 0x24
30 #define OV490_PAGE_HIGH_REG 0xfffd
31 #define OV490_PAGE_LOW_REG 0xfffe
34 * The SCCB slave handling is undocumented; the registers naming scheme is
37 #define OV490_SCCB_SLAVE_WRITE 0x00
38 #define OV490_SCCB_SLAVE_READ 0x01
39 #define OV490_SCCB_SLAVE0_DIR 0x80195000
40 #define OV490_SCCB_SLAVE0_ADDR_HIGH 0x80195001
41 #define OV490_SCCB_SLAVE0_ADDR_LOW 0x80195002
43 #define OV490_DVP_CTRL3 0x80286009
45 #define OV490_ODS_CTRL_FRAME_OUTPUT_EN 0x0c
46 #define OV490_ODS_CTRL 0x8029d000
48 #define OV490_HOST_CMD 0x808000c0
49 #define OV490_HOST_CMD_TRIGGER 0xc1
51 #define OV490_ID_VAL 0x0490
52 #define OV490_ID(_p, _v) ((((_p) & 0xff) << 8) | ((_v) & 0xff))
53 #define OV490_PID 0x8080300a
54 #define OV490_VER 0x8080300b
55 #define OV490_PID_TIMEOUT 20
56 #define OV490_OUTPUT_EN_TIMEOUT 300
58 #define OV490_GPIO0 BIT(0)
59 #define OV490_SPWDN0 BIT(0)
60 #define OV490_GPIO_SEL0 0x80800050
61 #define OV490_GPIO_SEL1 0x80800051
62 #define OV490_GPIO_DIRECTION0 0x80800054
63 #define OV490_GPIO_DIRECTION1 0x80800055
64 #define OV490_GPIO_OUTPUT_VALUE0 0x80800058
65 #define OV490_GPIO_OUTPUT_VALUE1 0x80800059
67 #define OV490_ISP_HSIZE_LOW 0x80820060
68 #define OV490_ISP_HSIZE_HIGH 0x80820061
69 #define OV490_ISP_VSIZE_LOW 0x80820062
70 #define OV490_ISP_VSIZE_HIGH 0x80820063
72 #define OV10640_PID_TIMEOUT 20
73 #define OV10640_ID_HIGH 0xa6
74 #define OV10640_CHIP_ID 0x300a
75 #define OV10640_PIXEL_RATE 55000000
77 struct rdacm21_device {
79 struct max9271_device serializer;
80 struct i2c_client *isp;
81 struct v4l2_subdev sd;
83 struct v4l2_mbus_framefmt fmt;
84 struct v4l2_ctrl_handler ctrls;
89 static inline struct rdacm21_device *sd_to_rdacm21(struct v4l2_subdev *sd)
91 return container_of(sd, struct rdacm21_device, sd);
94 static const struct ov490_reg {
97 } ov490_regs_wizard[] = {
105 * OV490 EMB line disable in YUV and RAW data,
106 * NOTE: EMB line is still used in ISP and sensor
113 * PCLK polarity - useless due to silicon bug.
114 * Use 0x808000bb register instead.
119 /* bit[3]=0 - PCLK polarity workaround. */
121 /* Ov490 FSIN: app_fsin_from_fsync */
153 * Load fsin0,load fsin1,load other,
154 * It will be cleared automatically.
163 /* ov10640 FSIN enable */
171 /* ov10640 HFLIP=1 by default */
179 static int ov490_read(struct rdacm21_device *dev, u16 reg, u8 *val)
181 u8 buf[2] = { reg >> 8, reg };
184 ret = i2c_master_send(dev->isp, buf, 2);
186 ret = i2c_master_recv(dev->isp, val, 1);
189 dev_dbg(dev->dev, "%s: register 0x%04x read failed (%d)\n",
197 static int ov490_write(struct rdacm21_device *dev, u16 reg, u8 val)
199 u8 buf[3] = { reg >> 8, reg, val };
202 ret = i2c_master_send(dev->isp, buf, 3);
204 dev_err(dev->dev, "%s: register 0x%04x write failed (%d)\n",
212 static int ov490_set_page(struct rdacm21_device *dev, u16 page)
214 u8 page_high = page >> 8;
218 if (page == dev->last_page)
221 if (page_high != (dev->last_page >> 8)) {
222 ret = ov490_write(dev, OV490_PAGE_HIGH_REG, page_high);
227 if (page_low != (u8)dev->last_page) {
228 ret = ov490_write(dev, OV490_PAGE_LOW_REG, page_low);
233 dev->last_page = page;
234 usleep_range(100, 150);
239 static int ov490_read_reg(struct rdacm21_device *dev, u32 reg, u8 *val)
243 ret = ov490_set_page(dev, reg >> 16);
247 ret = ov490_read(dev, (u16)reg, val);
251 dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, *val);
256 static int ov490_write_reg(struct rdacm21_device *dev, u32 reg, u8 val)
260 ret = ov490_set_page(dev, reg >> 16);
264 ret = ov490_write(dev, (u16)reg, val);
268 dev_dbg(dev->dev, "%s: 0x%08x = 0x%02x\n", __func__, reg, val);
273 static int rdacm21_s_stream(struct v4l2_subdev *sd, int enable)
275 struct rdacm21_device *dev = sd_to_rdacm21(sd);
278 * Enable serial link now that the ISP provides a valid pixel clock
279 * to start serializing video data on the GMSL link.
281 return max9271_set_serial_link(&dev->serializer, enable);
284 static int rdacm21_enum_mbus_code(struct v4l2_subdev *sd,
285 struct v4l2_subdev_state *sd_state,
286 struct v4l2_subdev_mbus_code_enum *code)
288 if (code->pad || code->index > 0)
291 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
296 static int rdacm21_get_fmt(struct v4l2_subdev *sd,
297 struct v4l2_subdev_state *sd_state,
298 struct v4l2_subdev_format *format)
300 struct v4l2_mbus_framefmt *mf = &format->format;
301 struct rdacm21_device *dev = sd_to_rdacm21(sd);
306 mf->width = dev->fmt.width;
307 mf->height = dev->fmt.height;
308 mf->code = MEDIA_BUS_FMT_YUYV8_1X16;
309 mf->colorspace = V4L2_COLORSPACE_SRGB;
310 mf->field = V4L2_FIELD_NONE;
311 mf->ycbcr_enc = V4L2_YCBCR_ENC_601;
312 mf->quantization = V4L2_QUANTIZATION_FULL_RANGE;
313 mf->xfer_func = V4L2_XFER_FUNC_NONE;
318 static const struct v4l2_subdev_video_ops rdacm21_video_ops = {
319 .s_stream = rdacm21_s_stream,
322 static const struct v4l2_subdev_pad_ops rdacm21_subdev_pad_ops = {
323 .enum_mbus_code = rdacm21_enum_mbus_code,
324 .get_fmt = rdacm21_get_fmt,
325 .set_fmt = rdacm21_get_fmt,
328 static const struct v4l2_subdev_ops rdacm21_subdev_ops = {
329 .video = &rdacm21_video_ops,
330 .pad = &rdacm21_subdev_pad_ops,
333 static void ov10640_power_up(struct rdacm21_device *dev)
335 /* Enable GPIO0#0 (reset) and GPIO1#0 (pwdn) as output lines. */
336 ov490_write_reg(dev, OV490_GPIO_SEL0, OV490_GPIO0);
337 ov490_write_reg(dev, OV490_GPIO_SEL1, OV490_SPWDN0);
338 ov490_write_reg(dev, OV490_GPIO_DIRECTION0, OV490_GPIO0);
339 ov490_write_reg(dev, OV490_GPIO_DIRECTION1, OV490_SPWDN0);
341 /* Power up OV10640 and then reset it. */
342 ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE1, OV490_SPWDN0);
343 usleep_range(1500, 3000);
345 ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, 0x00);
346 usleep_range(1500, 3000);
347 ov490_write_reg(dev, OV490_GPIO_OUTPUT_VALUE0, OV490_GPIO0);
348 usleep_range(3000, 5000);
351 static int ov10640_check_id(struct rdacm21_device *dev)
356 /* Read OV10640 ID to test communications. */
357 for (i = 0; i < OV10640_PID_TIMEOUT; ++i) {
358 ov490_write_reg(dev, OV490_SCCB_SLAVE0_DIR,
359 OV490_SCCB_SLAVE_READ);
360 ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_HIGH,
361 OV10640_CHIP_ID >> 8);
362 ov490_write_reg(dev, OV490_SCCB_SLAVE0_ADDR_LOW,
363 OV10640_CHIP_ID & 0xff);
366 * Trigger SCCB slave transaction and give it some time
369 ov490_write_reg(dev, OV490_HOST_CMD, OV490_HOST_CMD_TRIGGER);
370 usleep_range(1000, 1500);
372 ov490_read_reg(dev, OV490_SCCB_SLAVE0_DIR, &val);
373 if (val == OV10640_ID_HIGH)
375 usleep_range(1000, 1500);
377 if (i == OV10640_PID_TIMEOUT) {
378 dev_err(dev->dev, "OV10640 ID mismatch: (0x%02x)\n", val);
382 dev_dbg(dev->dev, "OV10640 ID = 0x%2x\n", val);
387 static int ov490_initialize(struct rdacm21_device *dev)
393 ov10640_power_up(dev);
396 * Read OV490 Id to test communications. Give it up to 40msec to
399 for (i = 0; i < OV490_PID_TIMEOUT; ++i) {
400 ret = ov490_read_reg(dev, OV490_PID, &pid);
403 usleep_range(1000, 2000);
405 if (i == OV490_PID_TIMEOUT) {
406 dev_err(dev->dev, "OV490 PID read failed (%d)\n", ret);
410 ret = ov490_read_reg(dev, OV490_VER, &ver);
414 if (OV490_ID(pid, ver) != OV490_ID_VAL) {
415 dev_err(dev->dev, "OV490 ID mismatch (0x%04x)\n",
420 /* Wait for firmware boot by reading streamon status. */
421 for (i = 0; i < OV490_OUTPUT_EN_TIMEOUT; ++i) {
422 ov490_read_reg(dev, OV490_ODS_CTRL, &val);
423 if (val == OV490_ODS_CTRL_FRAME_OUTPUT_EN)
425 usleep_range(1000, 2000);
427 if (i == OV490_OUTPUT_EN_TIMEOUT) {
428 dev_err(dev->dev, "Timeout waiting for firmware boot\n");
432 ret = ov10640_check_id(dev);
436 /* Program OV490 with register-value table. */
437 for (i = 0; i < ARRAY_SIZE(ov490_regs_wizard); ++i) {
438 ret = ov490_write(dev, ov490_regs_wizard[i].reg,
439 ov490_regs_wizard[i].val);
442 "%s: register %u (0x%04x) write failed (%d)\n",
443 __func__, i, ov490_regs_wizard[i].reg, ret);
448 usleep_range(100, 150);
452 * The ISP is programmed with the content of a serial flash memory.
453 * Read the firmware configuration to reflect it through the V4L2 APIs.
455 ov490_read_reg(dev, OV490_ISP_HSIZE_HIGH, &val);
456 dev->fmt.width = (val & 0xf) << 8;
457 ov490_read_reg(dev, OV490_ISP_HSIZE_LOW, &val);
458 dev->fmt.width |= (val & 0xff);
460 ov490_read_reg(dev, OV490_ISP_VSIZE_HIGH, &val);
461 dev->fmt.height = (val & 0xf) << 8;
462 ov490_read_reg(dev, OV490_ISP_VSIZE_LOW, &val);
463 dev->fmt.height |= val & 0xff;
465 /* Set bus width to 12 bits with [0:11] ordering. */
466 ov490_write_reg(dev, OV490_DVP_CTRL3, 0x10);
468 dev_info(dev->dev, "Identified RDACM21 camera module\n");
473 static int rdacm21_initialize(struct rdacm21_device *dev)
477 max9271_wake_up(&dev->serializer);
479 /* Enable reverse channel and disable the serial link. */
480 ret = max9271_set_serial_link(&dev->serializer, false);
484 /* Configure I2C bus at 105Kbps speed and configure GMSL. */
485 ret = max9271_configure_i2c(&dev->serializer,
486 MAX9271_I2CSLVSH_469NS_234NS |
487 MAX9271_I2CSLVTO_1024US |
488 MAX9271_I2CMSTBT_105KBPS);
492 ret = max9271_verify_id(&dev->serializer);
497 * Enable GPIO1 and hold OV490 in reset during max9271 configuration.
498 * The reset signal has to be asserted for at least 250 useconds.
500 ret = max9271_enable_gpios(&dev->serializer, MAX9271_GPIO1OUT);
504 ret = max9271_clear_gpios(&dev->serializer, MAX9271_GPIO1OUT);
507 usleep_range(250, 500);
509 ret = max9271_configure_gmsl_link(&dev->serializer);
513 ret = max9271_set_address(&dev->serializer, dev->addrs[0]);
516 dev->serializer.client->addr = dev->addrs[0];
518 ret = max9271_set_translation(&dev->serializer, dev->addrs[1],
522 dev->isp->addr = dev->addrs[1];
524 /* Release OV490 from reset and initialize it. */
525 ret = max9271_set_gpios(&dev->serializer, MAX9271_GPIO1OUT);
528 usleep_range(3000, 5000);
530 ret = ov490_initialize(dev);
535 * Set reverse channel high threshold to increase noise immunity.
537 * This should be compensated by increasing the reverse channel
538 * amplitude on the remote deserializer side.
540 return max9271_set_high_threshold(&dev->serializer, true);
543 static int rdacm21_probe(struct i2c_client *client)
545 struct rdacm21_device *dev;
546 struct fwnode_handle *ep;
549 dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
552 dev->dev = &client->dev;
553 dev->serializer.client = client;
555 ret = of_property_read_u32_array(client->dev.of_node, "reg",
558 dev_err(dev->dev, "Invalid DT reg property: %d\n", ret);
562 /* Create the dummy I2C client for the sensor. */
563 dev->isp = i2c_new_dummy_device(client->adapter, OV490_I2C_ADDRESS);
564 if (IS_ERR(dev->isp))
565 return PTR_ERR(dev->isp);
567 ret = rdacm21_initialize(dev);
571 /* Initialize and register the subdevice. */
572 v4l2_i2c_subdev_init(&dev->sd, client, &rdacm21_subdev_ops);
573 dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
575 v4l2_ctrl_handler_init(&dev->ctrls, 1);
576 v4l2_ctrl_new_std(&dev->ctrls, NULL, V4L2_CID_PIXEL_RATE,
577 OV10640_PIXEL_RATE, OV10640_PIXEL_RATE, 1,
579 dev->sd.ctrl_handler = &dev->ctrls;
581 ret = dev->ctrls.error;
583 goto error_free_ctrls;
585 dev->pad.flags = MEDIA_PAD_FL_SOURCE;
586 dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
587 ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad);
589 goto error_free_ctrls;
591 ep = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
593 dev_err(&client->dev,
594 "Unable to get endpoint in node %pOF\n",
595 client->dev.of_node);
597 goto error_free_ctrls;
601 ret = v4l2_async_register_subdev(&dev->sd);
608 fwnode_handle_put(dev->sd.fwnode);
610 v4l2_ctrl_handler_free(&dev->ctrls);
612 i2c_unregister_device(dev->isp);
617 static void rdacm21_remove(struct i2c_client *client)
619 struct rdacm21_device *dev = sd_to_rdacm21(i2c_get_clientdata(client));
621 v4l2_async_unregister_subdev(&dev->sd);
622 v4l2_ctrl_handler_free(&dev->ctrls);
623 i2c_unregister_device(dev->isp);
624 fwnode_handle_put(dev->sd.fwnode);
627 static const struct of_device_id rdacm21_of_ids[] = {
628 { .compatible = "imi,rdacm21" },
631 MODULE_DEVICE_TABLE(of, rdacm21_of_ids);
633 static struct i2c_driver rdacm21_i2c_driver = {
636 .of_match_table = rdacm21_of_ids,
638 .probe_new = rdacm21_probe,
639 .remove = rdacm21_remove,
642 module_i2c_driver(rdacm21_i2c_driver);
644 MODULE_DESCRIPTION("GMSL Camera driver for RDACM21");
645 MODULE_AUTHOR("Jacopo Mondi");
646 MODULE_LICENSE("GPL v2");