1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
10 #include <linux/module.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regulator/consumer.h>
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-device.h>
15 #include <media/v4l2-fwnode.h>
17 #define OV8856_REG_VALUE_08BIT 1
18 #define OV8856_REG_VALUE_16BIT 2
19 #define OV8856_REG_VALUE_24BIT 3
21 #define OV8856_SCLK 144000000ULL
22 #define OV8856_XVCLK_19_2 19200000
23 #define OV8856_DATA_LANES 4
24 #define OV8856_RGB_DEPTH 10
26 #define OV8856_REG_CHIP_ID 0x300a
27 #define OV8856_CHIP_ID 0x00885a
29 #define OV8856_REG_MODE_SELECT 0x0100
30 #define OV8856_MODE_STANDBY 0x00
31 #define OV8856_MODE_STREAMING 0x01
33 /* module revisions */
34 #define OV8856_2A_MODULE 0x01
35 #define OV8856_1B_MODULE 0x02
37 /* the OTP read-out buffer is at 0x7000 and 0xf is the offset
38 * of the byte in the OTP that means the module revision
40 #define OV8856_MODULE_REVISION 0x700f
41 #define OV8856_OTP_MODE_CTRL 0x3d84
42 #define OV8856_OTP_LOAD_CTRL 0x3d81
43 #define OV8856_OTP_MODE_AUTO 0x00
44 #define OV8856_OTP_LOAD_CTRL_ENABLE BIT(0)
46 /* vertical-timings from sensor */
47 #define OV8856_REG_VTS 0x380e
48 #define OV8856_VTS_MAX 0x7fff
50 /* horizontal-timings from sensor */
51 #define OV8856_REG_HTS 0x380c
53 /* Exposure controls from sensor */
54 #define OV8856_REG_EXPOSURE 0x3500
55 #define OV8856_EXPOSURE_MIN 6
56 #define OV8856_EXPOSURE_MAX_MARGIN 6
57 #define OV8856_EXPOSURE_STEP 1
59 /* Analog gain controls from sensor */
60 #define OV8856_REG_ANALOG_GAIN 0x3508
61 #define OV8856_ANAL_GAIN_MIN 128
62 #define OV8856_ANAL_GAIN_MAX 2047
63 #define OV8856_ANAL_GAIN_STEP 1
65 /* Digital gain controls from sensor */
66 #define OV8856_REG_DIGITAL_GAIN 0x350a
67 #define OV8856_REG_MWB_R_GAIN 0x5019
68 #define OV8856_REG_MWB_G_GAIN 0x501b
69 #define OV8856_REG_MWB_B_GAIN 0x501d
70 #define OV8856_DGTL_GAIN_MIN 0
71 #define OV8856_DGTL_GAIN_MAX 4095
72 #define OV8856_DGTL_GAIN_STEP 1
73 #define OV8856_DGTL_GAIN_DEFAULT 1024
75 /* Test Pattern Control */
76 #define OV8856_REG_TEST_PATTERN 0x5e00
77 #define OV8856_TEST_PATTERN_ENABLE BIT(7)
78 #define OV8856_TEST_PATTERN_BAR_SHIFT 2
81 #define NUM_MODE_REGS 187
82 #define NUM_MODE_REGS_2 200
84 /* Flip Mirror Controls from sensor */
85 #define OV8856_REG_FORMAT1 0x3820
86 #define OV8856_REG_FORMAT2 0x3821
87 #define OV8856_REG_FORMAT1_OP_1 BIT(1)
88 #define OV8856_REG_FORMAT1_OP_2 BIT(2)
89 #define OV8856_REG_FORMAT1_OP_3 BIT(6)
90 #define OV8856_REG_FORMAT2_OP_1 BIT(1)
91 #define OV8856_REG_FORMAT2_OP_2 BIT(2)
92 #define OV8856_REG_FORMAT2_OP_3 BIT(6)
93 #define OV8856_REG_FLIP_OPT_1 0x376b
94 #define OV8856_REG_FLIP_OPT_2 0x5001
95 #define OV8856_REG_FLIP_OPT_3 0x502e
96 #define OV8856_REG_MIRROR_OPT_1 0x5004
97 #define OV8856_REG_FLIP_OP_0 BIT(0)
98 #define OV8856_REG_FLIP_OP_1 BIT(1)
99 #define OV8856_REG_FLIP_OP_2 BIT(2)
100 #define OV8856_REG_MIRROR_OP_1 BIT(1)
101 #define OV8856_REG_MIRROR_OP_2 BIT(2)
103 #define to_ov8856(_sd) container_of(_sd, struct ov8856, sd)
105 static const char * const ov8856_supply_names[] = {
106 "dovdd", /* Digital I/O power */
107 "avdd", /* Analog power */
108 "dvdd", /* Digital core power */
112 OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
113 OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
121 struct ov8856_reg_list {
123 const struct ov8856_reg *regs;
126 struct ov8856_link_freq_config {
127 const struct ov8856_reg_list reg_list;
131 /* Frame width in pixels */
134 /* Frame height in pixels */
137 /* Horizontal timining size */
140 /* Default vertical timining size */
143 /* Min vertical timining size */
146 /* Link frequency needed for this resolution */
149 /* Sensor register settings for this resolution */
150 const struct ov8856_reg_list reg_list;
152 /* Number of data lanes */
155 /* Default MEDIA_BUS_FMT for this mode */
156 u32 default_mbus_index;
159 struct ov8856_mipi_data_rates {
160 const struct ov8856_reg regs_0[NUM_REGS];
161 const struct ov8856_reg regs_1[NUM_REGS];
164 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_2 = {
165 //mipi_data_rate_1440mbps
175 //mipi_data_rate_720mbps
187 static const struct ov8856_mipi_data_rates mipi_data_rate_lane_4 = {
188 //mipi_data_rate_720mbps
198 //mipi_data_rate_360mbps
210 static const struct ov8856_reg lane_2_mode_3280x2464[] = {
211 /* 3280x2464 resolution */
402 static const struct ov8856_reg lane_2_mode_1640x1232[] = {
403 /* 1640x1232 resolution */
594 static const struct ov8856_reg lane_4_mode_3280x2464[] = {
595 /* 3280x2464 resolution */
785 static const struct ov8856_reg lane_4_mode_1640x1232[] = {
786 /* 1640x1232 resolution */
976 static const struct ov8856_reg lane_4_mode_3264x2448[] = {
977 /* 3264x2448 resolution */
1180 static const struct ov8856_reg lane_4_mode_1632x1224[] = {
1181 /* 1632x1224 resolution */
1384 static const struct ov8856_reg mipi_data_mbus_sbggr10_1x10[] = {
1388 static const struct ov8856_reg mipi_data_mbus_sgrbg10_1x10[] = {
1392 static const u32 ov8856_mbus_codes[] = {
1393 MEDIA_BUS_FMT_SBGGR10_1X10,
1394 MEDIA_BUS_FMT_SGRBG10_1X10
1397 static const char * const ov8856_test_pattern_menu[] = {
1399 "Standard Color Bar",
1400 "Top-Bottom Darker Color Bar",
1401 "Right-Left Darker Color Bar",
1402 "Bottom-Top Darker Color Bar"
1405 static const struct ov8856_reg_list bayer_offset_configs[] = {
1406 [OV8856_MEDIA_BUS_FMT_SBGGR10_1X10] = {
1407 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sbggr10_1x10),
1408 .regs = mipi_data_mbus_sbggr10_1x10,
1410 [OV8856_MEDIA_BUS_FMT_SGRBG10_1X10] = {
1411 .num_of_regs = ARRAY_SIZE(mipi_data_mbus_sgrbg10_1x10),
1412 .regs = mipi_data_mbus_sgrbg10_1x10,
1417 struct v4l2_subdev sd;
1418 struct media_pad pad;
1419 struct v4l2_ctrl_handler ctrl_handler;
1422 struct gpio_desc *reset_gpio;
1423 struct regulator_bulk_data supplies[ARRAY_SIZE(ov8856_supply_names)];
1426 struct v4l2_ctrl *link_freq;
1427 struct v4l2_ctrl *pixel_rate;
1428 struct v4l2_ctrl *vblank;
1429 struct v4l2_ctrl *hblank;
1430 struct v4l2_ctrl *exposure;
1433 const struct ov8856_mode *cur_mode;
1435 /* Application specified mbus format */
1438 /* To serialize asynchronus callbacks */
1444 const struct ov8856_lane_cfg *priv_lane;
1447 /* True if the device has been identified */
1451 struct ov8856_lane_cfg {
1452 const s64 link_freq_menu_items[2];
1453 const struct ov8856_link_freq_config link_freq_configs[2];
1454 const struct ov8856_mode supported_modes[4];
1457 static const struct ov8856_lane_cfg lane_cfg_2 = {
1465 ARRAY_SIZE(mipi_data_rate_lane_2.regs_0),
1466 .regs = mipi_data_rate_lane_2.regs_0,
1472 ARRAY_SIZE(mipi_data_rate_lane_2.regs_1),
1473 .regs = mipi_data_rate_lane_2.regs_1,
1484 ARRAY_SIZE(lane_2_mode_3280x2464),
1485 .regs = lane_2_mode_3280x2464,
1487 .link_freq_index = 0,
1489 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1499 ARRAY_SIZE(lane_2_mode_1640x1232),
1500 .regs = lane_2_mode_1640x1232,
1502 .link_freq_index = 1,
1504 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1508 static const struct ov8856_lane_cfg lane_cfg_4 = {
1516 ARRAY_SIZE(mipi_data_rate_lane_4.regs_0),
1517 .regs = mipi_data_rate_lane_4.regs_0,
1523 ARRAY_SIZE(mipi_data_rate_lane_4.regs_1),
1524 .regs = mipi_data_rate_lane_4.regs_1,
1535 ARRAY_SIZE(lane_4_mode_3280x2464),
1536 .regs = lane_4_mode_3280x2464,
1538 .link_freq_index = 0,
1540 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1550 ARRAY_SIZE(lane_4_mode_1640x1232),
1551 .regs = lane_4_mode_1640x1232,
1553 .link_freq_index = 1,
1555 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SGRBG10_1X10,
1565 ARRAY_SIZE(lane_4_mode_3264x2448),
1566 .regs = lane_4_mode_3264x2448,
1568 .link_freq_index = 0,
1570 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1580 ARRAY_SIZE(lane_4_mode_1632x1224),
1581 .regs = lane_4_mode_1632x1224,
1583 .link_freq_index = 1,
1585 .default_mbus_index = OV8856_MEDIA_BUS_FMT_SBGGR10_1X10,
1589 static unsigned int ov8856_modes_num(const struct ov8856 *ov8856)
1591 unsigned int i, count = 0;
1593 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->supported_modes); i++) {
1594 if (ov8856->priv_lane->supported_modes[i].width == 0)
1602 static u64 to_rate(const s64 *link_freq_menu_items,
1603 u32 f_index, u8 nlanes)
1605 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes;
1607 do_div(pixel_rate, OV8856_RGB_DEPTH);
1612 static u64 to_pixels_per_line(const s64 *link_freq_menu_items, u32 hts,
1613 u32 f_index, u8 nlanes)
1615 u64 ppl = hts * to_rate(link_freq_menu_items, f_index, nlanes);
1617 do_div(ppl, OV8856_SCLK);
1622 static int ov8856_read_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 *val)
1624 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1625 struct i2c_msg msgs[2];
1627 u8 data_buf[4] = {0};
1633 put_unaligned_be16(reg, addr_buf);
1634 msgs[0].addr = client->addr;
1636 msgs[0].len = sizeof(addr_buf);
1637 msgs[0].buf = addr_buf;
1638 msgs[1].addr = client->addr;
1639 msgs[1].flags = I2C_M_RD;
1641 msgs[1].buf = &data_buf[4 - len];
1643 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1644 if (ret != ARRAY_SIZE(msgs))
1647 *val = get_unaligned_be32(data_buf);
1652 static int ov8856_write_reg(struct ov8856 *ov8856, u16 reg, u16 len, u32 val)
1654 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1660 put_unaligned_be16(reg, buf);
1661 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
1662 if (i2c_master_send(client, buf, len + 2) != len + 2)
1668 static int ov8856_write_reg_list(struct ov8856 *ov8856,
1669 const struct ov8856_reg_list *r_list)
1671 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1675 for (i = 0; i < r_list->num_of_regs; i++) {
1676 ret = ov8856_write_reg(ov8856, r_list->regs[i].address, 1,
1677 r_list->regs[i].val);
1679 dev_err_ratelimited(&client->dev,
1680 "failed to write reg 0x%4.4x. error = %d",
1681 r_list->regs[i].address, ret);
1689 static int ov8856_identify_module(struct ov8856 *ov8856)
1691 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1695 if (ov8856->identified)
1698 ret = ov8856_read_reg(ov8856, OV8856_REG_CHIP_ID,
1699 OV8856_REG_VALUE_24BIT, &val);
1703 if (val != OV8856_CHIP_ID) {
1704 dev_err(&client->dev, "chip id mismatch: %x!=%x",
1705 OV8856_CHIP_ID, val);
1709 ov8856->identified = true;
1714 static int ov8856_update_digital_gain(struct ov8856 *ov8856, u32 d_gain)
1716 return ov8856_write_reg(ov8856, OV8856_REG_DIGITAL_GAIN,
1717 OV8856_REG_VALUE_16BIT, d_gain);
1720 static int ov8856_test_pattern(struct ov8856 *ov8856, u32 pattern)
1723 pattern = (pattern - 1) << OV8856_TEST_PATTERN_BAR_SHIFT |
1724 OV8856_TEST_PATTERN_ENABLE;
1726 return ov8856_write_reg(ov8856, OV8856_REG_TEST_PATTERN,
1727 OV8856_REG_VALUE_08BIT, pattern);
1730 static int ov8856_set_ctrl_hflip(struct ov8856 *ov8856, u32 ctrl_val)
1735 ret = ov8856_read_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1736 OV8856_REG_VALUE_08BIT, &val);
1740 ret = ov8856_write_reg(ov8856, OV8856_REG_MIRROR_OPT_1,
1741 OV8856_REG_VALUE_08BIT,
1742 ctrl_val ? val & ~OV8856_REG_MIRROR_OP_2 :
1743 val | OV8856_REG_MIRROR_OP_2);
1748 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT2,
1749 OV8856_REG_VALUE_08BIT, &val);
1753 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT2,
1754 OV8856_REG_VALUE_08BIT,
1755 ctrl_val ? val & ~OV8856_REG_FORMAT2_OP_1 &
1756 ~OV8856_REG_FORMAT2_OP_2 &
1757 ~OV8856_REG_FORMAT2_OP_3 :
1758 val | OV8856_REG_FORMAT2_OP_1 |
1759 OV8856_REG_FORMAT2_OP_2 |
1760 OV8856_REG_FORMAT2_OP_3);
1763 static int ov8856_set_ctrl_vflip(struct ov8856 *ov8856, u8 ctrl_val)
1768 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1769 OV8856_REG_VALUE_08BIT, &val);
1773 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_1,
1774 OV8856_REG_VALUE_08BIT,
1775 ctrl_val ? val | OV8856_REG_FLIP_OP_1 |
1776 OV8856_REG_FLIP_OP_2 :
1777 val & ~OV8856_REG_FLIP_OP_1 &
1778 ~OV8856_REG_FLIP_OP_2);
1780 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1781 OV8856_REG_VALUE_08BIT, &val);
1785 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_2,
1786 OV8856_REG_VALUE_08BIT,
1787 ctrl_val ? val | OV8856_REG_FLIP_OP_2 :
1788 val & ~OV8856_REG_FLIP_OP_2);
1790 ret = ov8856_read_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1791 OV8856_REG_VALUE_08BIT, &val);
1795 ret = ov8856_write_reg(ov8856, OV8856_REG_FLIP_OPT_3,
1796 OV8856_REG_VALUE_08BIT,
1797 ctrl_val ? val & ~OV8856_REG_FLIP_OP_0 &
1798 ~OV8856_REG_FLIP_OP_1 :
1799 val | OV8856_REG_FLIP_OP_0 |
1800 OV8856_REG_FLIP_OP_1);
1802 ret = ov8856_read_reg(ov8856, OV8856_REG_FORMAT1,
1803 OV8856_REG_VALUE_08BIT, &val);
1807 return ov8856_write_reg(ov8856, OV8856_REG_FORMAT1,
1808 OV8856_REG_VALUE_08BIT,
1809 ctrl_val ? val | OV8856_REG_FORMAT1_OP_1 |
1810 OV8856_REG_FORMAT1_OP_3 |
1811 OV8856_REG_FORMAT1_OP_2 :
1812 val & ~OV8856_REG_FORMAT1_OP_1 &
1813 ~OV8856_REG_FORMAT1_OP_3 &
1814 ~OV8856_REG_FORMAT1_OP_2);
1817 static int ov8856_set_ctrl(struct v4l2_ctrl *ctrl)
1819 struct ov8856 *ov8856 = container_of(ctrl->handler,
1820 struct ov8856, ctrl_handler);
1821 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1825 /* Propagate change of current control to all related controls */
1826 if (ctrl->id == V4L2_CID_VBLANK) {
1827 /* Update max exposure while meeting expected vblanking */
1828 exposure_max = ov8856->cur_mode->height + ctrl->val -
1829 OV8856_EXPOSURE_MAX_MARGIN;
1830 __v4l2_ctrl_modify_range(ov8856->exposure,
1831 ov8856->exposure->minimum,
1832 exposure_max, ov8856->exposure->step,
1836 /* V4L2 controls values will be applied only when power is already up */
1837 if (!pm_runtime_get_if_in_use(&client->dev))
1841 case V4L2_CID_ANALOGUE_GAIN:
1842 ret = ov8856_write_reg(ov8856, OV8856_REG_ANALOG_GAIN,
1843 OV8856_REG_VALUE_16BIT, ctrl->val);
1846 case V4L2_CID_DIGITAL_GAIN:
1847 ret = ov8856_update_digital_gain(ov8856, ctrl->val);
1850 case V4L2_CID_EXPOSURE:
1851 /* 4 least significant bits of expsoure are fractional part */
1852 ret = ov8856_write_reg(ov8856, OV8856_REG_EXPOSURE,
1853 OV8856_REG_VALUE_24BIT, ctrl->val << 4);
1856 case V4L2_CID_VBLANK:
1857 ret = ov8856_write_reg(ov8856, OV8856_REG_VTS,
1858 OV8856_REG_VALUE_16BIT,
1859 ov8856->cur_mode->height + ctrl->val);
1862 case V4L2_CID_TEST_PATTERN:
1863 ret = ov8856_test_pattern(ov8856, ctrl->val);
1866 case V4L2_CID_HFLIP:
1867 ret = ov8856_set_ctrl_hflip(ov8856, ctrl->val);
1870 case V4L2_CID_VFLIP:
1871 ret = ov8856_set_ctrl_vflip(ov8856, ctrl->val);
1879 pm_runtime_put(&client->dev);
1884 static const struct v4l2_ctrl_ops ov8856_ctrl_ops = {
1885 .s_ctrl = ov8856_set_ctrl,
1888 static int ov8856_init_controls(struct ov8856 *ov8856)
1890 struct v4l2_ctrl_handler *ctrl_hdlr;
1891 s64 exposure_max, h_blank;
1894 ctrl_hdlr = &ov8856->ctrl_handler;
1895 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1899 ctrl_hdlr->lock = &ov8856->mutex;
1900 ov8856->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov8856_ctrl_ops,
1903 (ov8856->priv_lane->link_freq_menu_items)
1905 0, ov8856->priv_lane->link_freq_menu_items);
1906 if (ov8856->link_freq)
1907 ov8856->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1909 ov8856->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1910 V4L2_CID_PIXEL_RATE, 0,
1911 to_rate(ov8856->priv_lane->link_freq_menu_items,
1913 ov8856->cur_mode->data_lanes), 1,
1914 to_rate(ov8856->priv_lane->link_freq_menu_items,
1916 ov8856->cur_mode->data_lanes));
1917 ov8856->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1919 ov8856->cur_mode->vts_min - ov8856->cur_mode->height,
1920 OV8856_VTS_MAX - ov8856->cur_mode->height, 1,
1921 ov8856->cur_mode->vts_def -
1922 ov8856->cur_mode->height);
1923 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
1924 ov8856->cur_mode->hts,
1925 ov8856->cur_mode->link_freq_index,
1926 ov8856->cur_mode->data_lanes) -
1927 ov8856->cur_mode->width;
1928 ov8856->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1929 V4L2_CID_HBLANK, h_blank, h_blank, 1,
1932 ov8856->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1934 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1935 OV8856_ANAL_GAIN_MIN, OV8856_ANAL_GAIN_MAX,
1936 OV8856_ANAL_GAIN_STEP, OV8856_ANAL_GAIN_MIN);
1937 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1938 OV8856_DGTL_GAIN_MIN, OV8856_DGTL_GAIN_MAX,
1939 OV8856_DGTL_GAIN_STEP, OV8856_DGTL_GAIN_DEFAULT);
1940 exposure_max = ov8856->cur_mode->vts_def - OV8856_EXPOSURE_MAX_MARGIN;
1941 ov8856->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1943 OV8856_EXPOSURE_MIN, exposure_max,
1944 OV8856_EXPOSURE_STEP,
1946 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov8856_ctrl_ops,
1947 V4L2_CID_TEST_PATTERN,
1948 ARRAY_SIZE(ov8856_test_pattern_menu) - 1,
1949 0, 0, ov8856_test_pattern_menu);
1950 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1951 V4L2_CID_HFLIP, 0, 1, 1, 0);
1952 v4l2_ctrl_new_std(ctrl_hdlr, &ov8856_ctrl_ops,
1953 V4L2_CID_VFLIP, 0, 1, 1, 0);
1954 if (ctrl_hdlr->error)
1955 return ctrl_hdlr->error;
1957 ov8856->sd.ctrl_handler = ctrl_hdlr;
1962 static void ov8856_update_pad_format(struct ov8856 *ov8856,
1963 const struct ov8856_mode *mode,
1964 struct v4l2_mbus_framefmt *fmt)
1968 fmt->width = mode->width;
1969 fmt->height = mode->height;
1970 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
1971 if (ov8856_mbus_codes[index] == fmt->code)
1973 if (index == ARRAY_SIZE(ov8856_mbus_codes))
1974 index = mode->default_mbus_index;
1975 fmt->code = ov8856_mbus_codes[index];
1976 ov8856->cur_mbus_index = index;
1977 fmt->field = V4L2_FIELD_NONE;
1980 static int ov8856_start_streaming(struct ov8856 *ov8856)
1982 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
1983 const struct ov8856_reg_list *reg_list;
1984 int link_freq_index, ret;
1986 ret = ov8856_identify_module(ov8856);
1990 link_freq_index = ov8856->cur_mode->link_freq_index;
1991 reg_list = &ov8856->priv_lane->link_freq_configs[link_freq_index].reg_list;
1993 ret = ov8856_write_reg_list(ov8856, reg_list);
1995 dev_err(&client->dev, "failed to set plls");
1999 reg_list = &ov8856->cur_mode->reg_list;
2000 ret = ov8856_write_reg_list(ov8856, reg_list);
2002 dev_err(&client->dev, "failed to set mode");
2006 reg_list = &bayer_offset_configs[ov8856->cur_mbus_index];
2007 ret = ov8856_write_reg_list(ov8856, reg_list);
2009 dev_err(&client->dev, "failed to set mbus format");
2013 ret = __v4l2_ctrl_handler_setup(ov8856->sd.ctrl_handler);
2017 ret = ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2018 OV8856_REG_VALUE_08BIT, OV8856_MODE_STREAMING);
2020 dev_err(&client->dev, "failed to set stream");
2027 static void ov8856_stop_streaming(struct ov8856 *ov8856)
2029 struct i2c_client *client = v4l2_get_subdevdata(&ov8856->sd);
2031 if (ov8856_write_reg(ov8856, OV8856_REG_MODE_SELECT,
2032 OV8856_REG_VALUE_08BIT, OV8856_MODE_STANDBY))
2033 dev_err(&client->dev, "failed to set stream");
2036 static int ov8856_set_stream(struct v4l2_subdev *sd, int enable)
2038 struct ov8856 *ov8856 = to_ov8856(sd);
2039 struct i2c_client *client = v4l2_get_subdevdata(sd);
2042 mutex_lock(&ov8856->mutex);
2044 ret = pm_runtime_resume_and_get(&client->dev);
2046 mutex_unlock(&ov8856->mutex);
2050 ret = ov8856_start_streaming(ov8856);
2053 ov8856_stop_streaming(ov8856);
2054 pm_runtime_put(&client->dev);
2057 ov8856_stop_streaming(ov8856);
2058 pm_runtime_put(&client->dev);
2061 mutex_unlock(&ov8856->mutex);
2066 static int ov8856_power_on(struct device *dev)
2068 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2069 struct ov8856 *ov8856 = to_ov8856(sd);
2072 if (is_acpi_node(dev_fwnode(dev)))
2075 ret = clk_prepare_enable(ov8856->xvclk);
2077 dev_err(dev, "failed to enable xvclk\n");
2081 if (ov8856->reset_gpio) {
2082 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2083 usleep_range(1000, 2000);
2086 ret = regulator_bulk_enable(ARRAY_SIZE(ov8856_supply_names),
2089 dev_err(dev, "failed to enable regulators\n");
2093 gpiod_set_value_cansleep(ov8856->reset_gpio, 0);
2094 usleep_range(1500, 1800);
2099 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2100 clk_disable_unprepare(ov8856->xvclk);
2105 static int ov8856_power_off(struct device *dev)
2107 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2108 struct ov8856 *ov8856 = to_ov8856(sd);
2110 if (is_acpi_node(dev_fwnode(dev)))
2113 gpiod_set_value_cansleep(ov8856->reset_gpio, 1);
2114 regulator_bulk_disable(ARRAY_SIZE(ov8856_supply_names),
2116 clk_disable_unprepare(ov8856->xvclk);
2121 static int ov8856_set_format(struct v4l2_subdev *sd,
2122 struct v4l2_subdev_state *sd_state,
2123 struct v4l2_subdev_format *fmt)
2125 struct ov8856 *ov8856 = to_ov8856(sd);
2126 const struct ov8856_mode *mode;
2127 s32 vblank_def, h_blank;
2129 mode = v4l2_find_nearest_size(ov8856->priv_lane->supported_modes,
2131 width, height, fmt->format.width,
2132 fmt->format.height);
2134 mutex_lock(&ov8856->mutex);
2135 ov8856_update_pad_format(ov8856, mode, &fmt->format);
2136 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2137 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
2139 ov8856->cur_mode = mode;
2140 __v4l2_ctrl_s_ctrl(ov8856->link_freq, mode->link_freq_index);
2141 __v4l2_ctrl_s_ctrl_int64(ov8856->pixel_rate,
2142 to_rate(ov8856->priv_lane->link_freq_menu_items,
2143 mode->link_freq_index,
2144 ov8856->cur_mode->data_lanes));
2146 /* Update limits and set FPS to default */
2147 vblank_def = mode->vts_def - mode->height;
2148 __v4l2_ctrl_modify_range(ov8856->vblank,
2149 mode->vts_min - mode->height,
2150 OV8856_VTS_MAX - mode->height, 1,
2152 __v4l2_ctrl_s_ctrl(ov8856->vblank, vblank_def);
2153 h_blank = to_pixels_per_line(ov8856->priv_lane->link_freq_menu_items,
2155 mode->link_freq_index,
2156 ov8856->cur_mode->data_lanes)
2158 __v4l2_ctrl_modify_range(ov8856->hblank, h_blank, h_blank, 1,
2162 mutex_unlock(&ov8856->mutex);
2167 static int ov8856_get_format(struct v4l2_subdev *sd,
2168 struct v4l2_subdev_state *sd_state,
2169 struct v4l2_subdev_format *fmt)
2171 struct ov8856 *ov8856 = to_ov8856(sd);
2173 mutex_lock(&ov8856->mutex);
2174 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
2175 fmt->format = *v4l2_subdev_get_try_format(&ov8856->sd,
2179 ov8856_update_pad_format(ov8856, ov8856->cur_mode, &fmt->format);
2181 mutex_unlock(&ov8856->mutex);
2186 static int ov8856_enum_mbus_code(struct v4l2_subdev *sd,
2187 struct v4l2_subdev_state *sd_state,
2188 struct v4l2_subdev_mbus_code_enum *code)
2190 if (code->index >= ARRAY_SIZE(ov8856_mbus_codes))
2193 code->code = ov8856_mbus_codes[code->index];
2198 static int ov8856_enum_frame_size(struct v4l2_subdev *sd,
2199 struct v4l2_subdev_state *sd_state,
2200 struct v4l2_subdev_frame_size_enum *fse)
2202 struct ov8856 *ov8856 = to_ov8856(sd);
2205 if (fse->index >= ov8856->modes_size)
2208 for (index = 0; index < ARRAY_SIZE(ov8856_mbus_codes); ++index)
2209 if (fse->code == ov8856_mbus_codes[index])
2211 if (index == ARRAY_SIZE(ov8856_mbus_codes))
2214 fse->min_width = ov8856->priv_lane->supported_modes[fse->index].width;
2215 fse->max_width = fse->min_width;
2216 fse->min_height = ov8856->priv_lane->supported_modes[fse->index].height;
2217 fse->max_height = fse->min_height;
2222 static int ov8856_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2224 struct ov8856 *ov8856 = to_ov8856(sd);
2226 mutex_lock(&ov8856->mutex);
2227 ov8856_update_pad_format(ov8856, &ov8856->priv_lane->supported_modes[0],
2228 v4l2_subdev_get_try_format(sd, fh->state, 0));
2229 mutex_unlock(&ov8856->mutex);
2234 static const struct v4l2_subdev_video_ops ov8856_video_ops = {
2235 .s_stream = ov8856_set_stream,
2238 static const struct v4l2_subdev_pad_ops ov8856_pad_ops = {
2239 .set_fmt = ov8856_set_format,
2240 .get_fmt = ov8856_get_format,
2241 .enum_mbus_code = ov8856_enum_mbus_code,
2242 .enum_frame_size = ov8856_enum_frame_size,
2245 static const struct v4l2_subdev_ops ov8856_subdev_ops = {
2246 .video = &ov8856_video_ops,
2247 .pad = &ov8856_pad_ops,
2250 static const struct media_entity_operations ov8856_subdev_entity_ops = {
2251 .link_validate = v4l2_subdev_link_validate,
2254 static const struct v4l2_subdev_internal_ops ov8856_internal_ops = {
2255 .open = ov8856_open,
2259 static int ov8856_get_hwcfg(struct ov8856 *ov8856, struct device *dev)
2261 struct fwnode_handle *ep;
2262 struct fwnode_handle *fwnode = dev_fwnode(dev);
2263 struct v4l2_fwnode_endpoint bus_cfg = {
2264 .bus_type = V4L2_MBUS_CSI2_DPHY
2273 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &xvclk_rate);
2277 if (!is_acpi_node(fwnode)) {
2278 ov8856->xvclk = devm_clk_get(dev, "xvclk");
2279 if (IS_ERR(ov8856->xvclk)) {
2280 dev_err(dev, "could not get xvclk clock (%pe)\n",
2282 return PTR_ERR(ov8856->xvclk);
2285 clk_set_rate(ov8856->xvclk, xvclk_rate);
2286 xvclk_rate = clk_get_rate(ov8856->xvclk);
2288 ov8856->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2290 if (IS_ERR(ov8856->reset_gpio))
2291 return PTR_ERR(ov8856->reset_gpio);
2293 for (i = 0; i < ARRAY_SIZE(ov8856_supply_names); i++)
2294 ov8856->supplies[i].supply = ov8856_supply_names[i];
2296 ret = devm_regulator_bulk_get(dev,
2297 ARRAY_SIZE(ov8856_supply_names),
2303 if (xvclk_rate != OV8856_XVCLK_19_2)
2304 dev_warn(dev, "external clock rate %u is unsupported",
2307 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2311 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2312 fwnode_handle_put(ep);
2316 /* Get number of data lanes */
2317 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
2318 bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
2319 dev_err(dev, "number of CSI2 data lanes %d is not supported",
2320 bus_cfg.bus.mipi_csi2.num_data_lanes);
2322 goto check_hwcfg_error;
2325 dev_dbg(dev, "Using %u data lanes\n", ov8856->cur_mode->data_lanes);
2327 if (bus_cfg.bus.mipi_csi2.num_data_lanes == 2)
2328 ov8856->priv_lane = &lane_cfg_2;
2330 ov8856->priv_lane = &lane_cfg_4;
2332 ov8856->modes_size = ov8856_modes_num(ov8856);
2334 if (!bus_cfg.nr_of_link_frequencies) {
2335 dev_err(dev, "no link frequencies defined");
2337 goto check_hwcfg_error;
2340 for (i = 0; i < ARRAY_SIZE(ov8856->priv_lane->link_freq_menu_items); i++) {
2341 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
2342 if (ov8856->priv_lane->link_freq_menu_items[i] ==
2343 bus_cfg.link_frequencies[j])
2347 if (j == bus_cfg.nr_of_link_frequencies) {
2348 dev_err(dev, "no link frequency %lld supported",
2349 ov8856->priv_lane->link_freq_menu_items[i]);
2351 goto check_hwcfg_error;
2356 v4l2_fwnode_endpoint_free(&bus_cfg);
2361 static void ov8856_remove(struct i2c_client *client)
2363 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2364 struct ov8856 *ov8856 = to_ov8856(sd);
2366 v4l2_async_unregister_subdev(sd);
2367 media_entity_cleanup(&sd->entity);
2368 v4l2_ctrl_handler_free(sd->ctrl_handler);
2369 pm_runtime_disable(&client->dev);
2370 mutex_destroy(&ov8856->mutex);
2372 ov8856_power_off(&client->dev);
2375 static int ov8856_probe(struct i2c_client *client)
2377 struct ov8856 *ov8856;
2381 ov8856 = devm_kzalloc(&client->dev, sizeof(*ov8856), GFP_KERNEL);
2385 ret = ov8856_get_hwcfg(ov8856, &client->dev);
2387 dev_err(&client->dev, "failed to get HW configuration: %d",
2392 v4l2_i2c_subdev_init(&ov8856->sd, client, &ov8856_subdev_ops);
2394 full_power = acpi_dev_state_d0(&client->dev);
2396 ret = ov8856_power_on(&client->dev);
2398 dev_err(&client->dev, "failed to power on\n");
2402 ret = ov8856_identify_module(ov8856);
2404 dev_err(&client->dev, "failed to find sensor: %d", ret);
2405 goto probe_power_off;
2409 mutex_init(&ov8856->mutex);
2410 ov8856->cur_mode = &ov8856->priv_lane->supported_modes[0];
2411 ov8856->cur_mbus_index = ov8856->cur_mode->default_mbus_index;
2412 ret = ov8856_init_controls(ov8856);
2414 dev_err(&client->dev, "failed to init controls: %d", ret);
2415 goto probe_error_v4l2_ctrl_handler_free;
2418 ov8856->sd.internal_ops = &ov8856_internal_ops;
2419 ov8856->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2420 ov8856->sd.entity.ops = &ov8856_subdev_entity_ops;
2421 ov8856->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2422 ov8856->pad.flags = MEDIA_PAD_FL_SOURCE;
2423 ret = media_entity_pads_init(&ov8856->sd.entity, 1, &ov8856->pad);
2425 dev_err(&client->dev, "failed to init entity pads: %d", ret);
2426 goto probe_error_v4l2_ctrl_handler_free;
2429 ret = v4l2_async_register_subdev_sensor(&ov8856->sd);
2431 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
2433 goto probe_error_media_entity_cleanup;
2436 /* Set the device's state to active if it's in D0 state. */
2438 pm_runtime_set_active(&client->dev);
2439 pm_runtime_enable(&client->dev);
2440 pm_runtime_idle(&client->dev);
2444 probe_error_media_entity_cleanup:
2445 media_entity_cleanup(&ov8856->sd.entity);
2447 probe_error_v4l2_ctrl_handler_free:
2448 v4l2_ctrl_handler_free(ov8856->sd.ctrl_handler);
2449 mutex_destroy(&ov8856->mutex);
2452 ov8856_power_off(&client->dev);
2457 static const struct dev_pm_ops ov8856_pm_ops = {
2458 SET_RUNTIME_PM_OPS(ov8856_power_off, ov8856_power_on, NULL)
2462 static const struct acpi_device_id ov8856_acpi_ids[] = {
2467 MODULE_DEVICE_TABLE(acpi, ov8856_acpi_ids);
2470 static const struct of_device_id ov8856_of_match[] = {
2471 { .compatible = "ovti,ov8856" },
2474 MODULE_DEVICE_TABLE(of, ov8856_of_match);
2476 static struct i2c_driver ov8856_i2c_driver = {
2479 .pm = &ov8856_pm_ops,
2480 .acpi_match_table = ACPI_PTR(ov8856_acpi_ids),
2481 .of_match_table = ov8856_of_match,
2483 .probe = ov8856_probe,
2484 .remove = ov8856_remove,
2485 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
2488 module_i2c_driver(ov8856_i2c_driver);
2490 MODULE_AUTHOR("Ben Kao <ben.kao@intel.com>");
2491 MODULE_DESCRIPTION("OmniVision OV8856 sensor driver");
2492 MODULE_LICENSE("GPL v2");