drivers/media/i2c/ov5693.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
   4  *
   5  * Adapted from the atomisp-ov5693 driver, with contributions from:
   6  *
   7  * Daniel Scally
   8  * Jean-Michel Hautbois
   9  * Fabian Wuthrich
  10  * Tsuchiya Yuto
  11  * Jordan Hand
  12  * Jake Day
  13  */
  14
  15 #include <asm/unaligned.h>
  16 #include <linux/acpi.h>
  17 #include <linux/clk.h>
  18 #include <linux/delay.h>
  19 #include <linux/device.h>
  20 #include <linux/i2c.h>
  21 #include <linux/module.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/slab.h>
  25 #include <linux/types.h>
  26 #include <media/v4l2-ctrls.h>
  27 #include <media/v4l2-device.h>
  28 #include <media/v4l2-fwnode.h>
  29
  30 #define OV5693_REG_8BIT(n)                      ((1 << 16) | (n))
  31 #define OV5693_REG_16BIT(n)                     ((2 << 16) | (n))
  32 #define OV5693_REG_24BIT(n)                     ((3 << 16) | (n))
  33 #define OV5693_REG_SIZE_SHIFT                   16
  34 #define OV5693_REG_ADDR_MASK                    0xffff
  35
  36 /* System Control */
  37 #define OV5693_SW_RESET_REG                     OV5693_REG_8BIT(0x0103)
  38 #define OV5693_SW_STREAM_REG                    OV5693_REG_8BIT(0x0100)
  39 #define OV5693_START_STREAMING                  0x01
  40 #define OV5693_STOP_STREAMING                   0x00
  41 #define OV5693_SW_RESET                         0x01
  42
  43 #define OV5693_REG_CHIP_ID                      OV5693_REG_16BIT(0x300a)
  44 /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */
  45 #define OV5693_CHIP_ID                          0x5690
  46
  47 /* Exposure */
  48 #define OV5693_EXPOSURE_CTRL_REG                OV5693_REG_24BIT(0x3500)
  49 #define OV5693_EXPOSURE_CTRL_MASK               GENMASK(19, 4)
  50 #define OV5693_INTEGRATION_TIME_MARGIN          8
  51 #define OV5693_EXPOSURE_MIN                     1
  52 #define OV5693_EXPOSURE_STEP                    1
  53
  54 /* Analogue Gain */
  55 #define OV5693_GAIN_CTRL_REG                    OV5693_REG_16BIT(0x350a)
  56 #define OV5693_GAIN_CTRL_MASK                   GENMASK(10, 4)
  57 #define OV5693_GAIN_MIN                         1
  58 #define OV5693_GAIN_MAX                         127
  59 #define OV5693_GAIN_DEF                         8
  60 #define OV5693_GAIN_STEP                        1
  61
  62 /* Digital Gain */
  63 #define OV5693_MWB_RED_GAIN_REG                 OV5693_REG_16BIT(0x3400)
  64 #define OV5693_MWB_GREEN_GAIN_REG               OV5693_REG_16BIT(0x3402)
  65 #define OV5693_MWB_BLUE_GAIN_REG                OV5693_REG_16BIT(0x3404)
  66 #define OV5693_MWB_GAIN_MASK                    GENMASK(11, 0)
  67 #define OV5693_MWB_GAIN_MAX                     0x0fff
  68 #define OV5693_DIGITAL_GAIN_MIN                 1
  69 #define OV5693_DIGITAL_GAIN_MAX                 4095
  70 #define OV5693_DIGITAL_GAIN_DEF                 1024
  71 #define OV5693_DIGITAL_GAIN_STEP                1
  72
  73 /* Timing and Format */
  74 #define OV5693_CROP_START_X_REG                 OV5693_REG_16BIT(0x3800)
  75 #define OV5693_CROP_START_Y_REG                 OV5693_REG_16BIT(0x3802)
  76 #define OV5693_CROP_END_X_REG                   OV5693_REG_16BIT(0x3804)
  77 #define OV5693_CROP_END_Y_REG                   OV5693_REG_16BIT(0x3806)
  78 #define OV5693_OUTPUT_SIZE_X_REG                OV5693_REG_16BIT(0x3808)
  79 #define OV5693_OUTPUT_SIZE_Y_REG                OV5693_REG_16BIT(0x380a)
  80
  81 #define OV5693_TIMING_HTS_REG                   OV5693_REG_16BIT(0x380c)
  82 #define OV5693_FIXED_PPL                        2688U
  83 #define OV5693_TIMING_VTS_REG                   OV5693_REG_16BIT(0x380e)
  84 #define OV5693_TIMING_MAX_VTS                   0xffff
  85 #define OV5693_TIMING_MIN_VTS                   0x04
  86
  87 #define OV5693_OFFSET_START_X_REG               OV5693_REG_16BIT(0x3810)
  88 #define OV5693_OFFSET_START_Y_REG               OV5693_REG_16BIT(0x3812)
  89
  90 #define OV5693_SUB_INC_X_REG                    OV5693_REG_8BIT(0x3814)
  91 #define OV5693_SUB_INC_Y_REG                    OV5693_REG_8BIT(0x3815)
  92
  93 #define OV5693_FORMAT1_REG                      OV5693_REG_8BIT(0x3820)
  94 #define OV5693_FORMAT1_FLIP_VERT_ISP_EN         BIT(6)
  95 #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN      BIT(1)
  96 #define OV5693_FORMAT1_VBIN_EN                  BIT(0)
  97 #define OV5693_FORMAT2_REG                      OV5693_REG_8BIT(0x3821)
  98 #define OV5693_FORMAT2_HDR_EN                   BIT(7)
  99 #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN         BIT(2)
 100 #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN      BIT(1)
 101 #define OV5693_FORMAT2_HBIN_EN                  BIT(0)
 102
 103 #define OV5693_ISP_CTRL2_REG                    OV5693_REG_8BIT(0x5002)
 104 #define OV5693_ISP_SCALE_ENABLE                 BIT(7)
 105
 106 /* Pixel Array */
 107 #define OV5693_NATIVE_WIDTH                     2624
 108 #define OV5693_NATIVE_HEIGHT                    1956
 109 #define OV5693_NATIVE_START_LEFT                0
 110 #define OV5693_NATIVE_START_TOP                 0
 111 #define OV5693_ACTIVE_WIDTH                     2592
 112 #define OV5693_ACTIVE_HEIGHT                    1944
 113 #define OV5693_ACTIVE_START_LEFT                16
 114 #define OV5693_ACTIVE_START_TOP                 6
 115 #define OV5693_MIN_CROP_WIDTH                   2
 116 #define OV5693_MIN_CROP_HEIGHT                  2
 117
 118 /* Test Pattern */
 119 #define OV5693_TEST_PATTERN_REG                 OV5693_REG_8BIT(0x5e00)
 120 #define OV5693_TEST_PATTERN_ENABLE              BIT(7)
 121 #define OV5693_TEST_PATTERN_ROLLING             BIT(6)
 122 #define OV5693_TEST_PATTERN_RANDOM              0x01
 123 #define OV5693_TEST_PATTERN_BARS                0x00
 124
 125 /* System Frequencies */
 126 #define OV5693_XVCLK_FREQ                       19200000
 127 #define OV5693_LINK_FREQ_419_2MHZ               419200000
 128 #define OV5693_PIXEL_RATE                       167680000
 129
 130 #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd)
 131
 132 static const char * const ov5693_supply_names[] = {
 133         "avdd",         /* Analog power */
 134         "dovdd",        /* Digital I/O power */
 135         "dvdd",         /* Digital circuit power */
 136 };
 137
 138 #define OV5693_NUM_SUPPLIES     ARRAY_SIZE(ov5693_supply_names)
 139
 140 struct ov5693_reg {
 141         u32 reg;
 142         u8 val;
 143 };
 144
 145 struct ov5693_reg_list {
 146         u32 num_regs;
 147         const struct ov5693_reg *regs;
 148 };
 149
 150 struct ov5693_device {
 151         struct i2c_client *client;
 152         struct device *dev;
 153
 154         /* Protect against concurrent changes to controls */
 155         struct mutex lock;
 156
 157         struct gpio_desc *reset;
 158         struct gpio_desc *powerdown;
 159         struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES];
 160         struct clk *xvclk;
 161
 162         struct ov5693_mode {
 163                 struct v4l2_rect crop;
 164                 struct v4l2_mbus_framefmt format;
 165                 bool binning_x;
 166                 bool binning_y;
 167                 unsigned int inc_x_odd;
 168                 unsigned int inc_y_odd;
 169                 unsigned int vts;
 170         } mode;
 171         bool streaming;
 172
 173         struct v4l2_subdev sd;
 174         struct media_pad pad;
 175
 176         struct ov5693_v4l2_ctrls {
 177                 struct v4l2_ctrl_handler handler;
 178                 struct v4l2_ctrl *link_freq;
 179                 struct v4l2_ctrl *pixel_rate;
 180                 struct v4l2_ctrl *exposure;
 181                 struct v4l2_ctrl *analogue_gain;
 182                 struct v4l2_ctrl *digital_gain;
 183                 struct v4l2_ctrl *hflip;
 184                 struct v4l2_ctrl *vflip;
 185                 struct v4l2_ctrl *hblank;
 186                 struct v4l2_ctrl *vblank;
 187                 struct v4l2_ctrl *test_pattern;
 188         } ctrls;
 189 };
 190
 191 static const struct ov5693_reg ov5693_global_regs[] = {
 192         {OV5693_REG_8BIT(0x3016), 0xf0},
 193         {OV5693_REG_8BIT(0x3017), 0xf0},
 194         {OV5693_REG_8BIT(0x3018), 0xf0},
 195         {OV5693_REG_8BIT(0x3022), 0x01},
 196         {OV5693_REG_8BIT(0x3028), 0x44},
 197         {OV5693_REG_8BIT(0x3098), 0x02},
 198         {OV5693_REG_8BIT(0x3099), 0x19},
 199         {OV5693_REG_8BIT(0x309a), 0x02},
 200         {OV5693_REG_8BIT(0x309b), 0x01},
 201         {OV5693_REG_8BIT(0x309c), 0x00},
 202         {OV5693_REG_8BIT(0x30a0), 0xd2},
 203         {OV5693_REG_8BIT(0x30a2), 0x01},
 204         {OV5693_REG_8BIT(0x30b2), 0x00},
 205         {OV5693_REG_8BIT(0x30b3), 0x83},
 206         {OV5693_REG_8BIT(0x30b4), 0x03},
 207         {OV5693_REG_8BIT(0x30b5), 0x04},
 208         {OV5693_REG_8BIT(0x30b6), 0x01},
 209         {OV5693_REG_8BIT(0x3080), 0x01},
 210         {OV5693_REG_8BIT(0x3104), 0x21},
 211         {OV5693_REG_8BIT(0x3106), 0x00},
 212         {OV5693_REG_8BIT(0x3406), 0x01},
 213         {OV5693_REG_8BIT(0x3503), 0x07},
 214         {OV5693_REG_8BIT(0x350b), 0x40},
 215         {OV5693_REG_8BIT(0x3601), 0x0a},
 216         {OV5693_REG_8BIT(0x3602), 0x38},
 217         {OV5693_REG_8BIT(0x3612), 0x80},
 218         {OV5693_REG_8BIT(0x3620), 0x54},
 219         {OV5693_REG_8BIT(0x3621), 0xc7},
 220         {OV5693_REG_8BIT(0x3622), 0x0f},
 221         {OV5693_REG_8BIT(0x3625), 0x10},
 222         {OV5693_REG_8BIT(0x3630), 0x55},
 223         {OV5693_REG_8BIT(0x3631), 0xf4},
 224         {OV5693_REG_8BIT(0x3632), 0x00},
 225         {OV5693_REG_8BIT(0x3633), 0x34},
 226         {OV5693_REG_8BIT(0x3634), 0x02},
 227         {OV5693_REG_8BIT(0x364d), 0x0d},
 228         {OV5693_REG_8BIT(0x364f), 0xdd},
 229         {OV5693_REG_8BIT(0x3660), 0x04},
 230         {OV5693_REG_8BIT(0x3662), 0x10},
 231         {OV5693_REG_8BIT(0x3663), 0xf1},
 232         {OV5693_REG_8BIT(0x3665), 0x00},
 233         {OV5693_REG_8BIT(0x3666), 0x20},
 234         {OV5693_REG_8BIT(0x3667), 0x00},
 235         {OV5693_REG_8BIT(0x366a), 0x80},
 236         {OV5693_REG_8BIT(0x3680), 0xe0},
 237         {OV5693_REG_8BIT(0x3681), 0x00},
 238         {OV5693_REG_8BIT(0x3700), 0x42},
 239         {OV5693_REG_8BIT(0x3701), 0x14},
 240         {OV5693_REG_8BIT(0x3702), 0xa0},
 241         {OV5693_REG_8BIT(0x3703), 0xd8},
 242         {OV5693_REG_8BIT(0x3704), 0x78},
 243         {OV5693_REG_8BIT(0x3705), 0x02},
 244         {OV5693_REG_8BIT(0x370a), 0x00},
 245         {OV5693_REG_8BIT(0x370b), 0x20},
 246         {OV5693_REG_8BIT(0x370c), 0x0c},
 247         {OV5693_REG_8BIT(0x370d), 0x11},
 248         {OV5693_REG_8BIT(0x370e), 0x00},
 249         {OV5693_REG_8BIT(0x370f), 0x40},
 250         {OV5693_REG_8BIT(0x3710), 0x00},
 251         {OV5693_REG_8BIT(0x371a), 0x1c},
 252         {OV5693_REG_8BIT(0x371b), 0x05},
 253         {OV5693_REG_8BIT(0x371c), 0x01},
 254         {OV5693_REG_8BIT(0x371e), 0xa1},
 255         {OV5693_REG_8BIT(0x371f), 0x0c},
 256         {OV5693_REG_8BIT(0x3721), 0x00},
 257         {OV5693_REG_8BIT(0x3724), 0x10},
 258         {OV5693_REG_8BIT(0x3726), 0x00},
 259         {OV5693_REG_8BIT(0x372a), 0x01},
 260         {OV5693_REG_8BIT(0x3730), 0x10},
 261         {OV5693_REG_8BIT(0x3738), 0x22},
 262         {OV5693_REG_8BIT(0x3739), 0xe5},
 263         {OV5693_REG_8BIT(0x373a), 0x50},
 264         {OV5693_REG_8BIT(0x373b), 0x02},
 265         {OV5693_REG_8BIT(0x373c), 0x41},
 266         {OV5693_REG_8BIT(0x373f), 0x02},
 267         {OV5693_REG_8BIT(0x3740), 0x42},
 268         {OV5693_REG_8BIT(0x3741), 0x02},
 269         {OV5693_REG_8BIT(0x3742), 0x18},
 270         {OV5693_REG_8BIT(0x3743), 0x01},
 271         {OV5693_REG_8BIT(0x3744), 0x02},
 272         {OV5693_REG_8BIT(0x3747), 0x10},
 273         {OV5693_REG_8BIT(0x374c), 0x04},
 274         {OV5693_REG_8BIT(0x3751), 0xf0},
 275         {OV5693_REG_8BIT(0x3752), 0x00},
 276         {OV5693_REG_8BIT(0x3753), 0x00},
 277         {OV5693_REG_8BIT(0x3754), 0xc0},
 278         {OV5693_REG_8BIT(0x3755), 0x00},
 279         {OV5693_REG_8BIT(0x3756), 0x1a},
 280         {OV5693_REG_8BIT(0x3758), 0x00},
 281         {OV5693_REG_8BIT(0x3759), 0x0f},
 282         {OV5693_REG_8BIT(0x376b), 0x44},
 283         {OV5693_REG_8BIT(0x375c), 0x04},
 284         {OV5693_REG_8BIT(0x3774), 0x10},
 285         {OV5693_REG_8BIT(0x3776), 0x00},
 286         {OV5693_REG_8BIT(0x377f), 0x08},
 287         {OV5693_REG_8BIT(0x3780), 0x22},
 288         {OV5693_REG_8BIT(0x3781), 0x0c},
 289         {OV5693_REG_8BIT(0x3784), 0x2c},
 290         {OV5693_REG_8BIT(0x3785), 0x1e},
 291         {OV5693_REG_8BIT(0x378f), 0xf5},
 292         {OV5693_REG_8BIT(0x3791), 0xb0},
 293         {OV5693_REG_8BIT(0x3795), 0x00},
 294         {OV5693_REG_8BIT(0x3796), 0x64},
 295         {OV5693_REG_8BIT(0x3797), 0x11},
 296         {OV5693_REG_8BIT(0x3798), 0x30},
 297         {OV5693_REG_8BIT(0x3799), 0x41},
 298         {OV5693_REG_8BIT(0x379a), 0x07},
 299         {OV5693_REG_8BIT(0x379b), 0xb0},
 300         {OV5693_REG_8BIT(0x379c), 0x0c},
 301         {OV5693_REG_8BIT(0x3a04), 0x06},
 302         {OV5693_REG_8BIT(0x3a05), 0x14},
 303         {OV5693_REG_8BIT(0x3e07), 0x20},
 304         {OV5693_REG_8BIT(0x4000), 0x08},
 305         {OV5693_REG_8BIT(0x4001), 0x04},
 306         {OV5693_REG_8BIT(0x4004), 0x08},
 307         {OV5693_REG_8BIT(0x4006), 0x20},
 308         {OV5693_REG_8BIT(0x4008), 0x24},
 309         {OV5693_REG_8BIT(0x4009), 0x10},
 310         {OV5693_REG_8BIT(0x4058), 0x00},
 311         {OV5693_REG_8BIT(0x4101), 0xb2},
 312         {OV5693_REG_8BIT(0x4307), 0x31},
 313         {OV5693_REG_8BIT(0x4511), 0x05},
 314         {OV5693_REG_8BIT(0x4512), 0x01},
 315         {OV5693_REG_8BIT(0x481f), 0x30},
 316         {OV5693_REG_8BIT(0x4826), 0x2c},
 317         {OV5693_REG_8BIT(0x4d02), 0xfd},
 318         {OV5693_REG_8BIT(0x4d03), 0xf5},
 319         {OV5693_REG_8BIT(0x4d04), 0x0c},
 320         {OV5693_REG_8BIT(0x4d05), 0xcc},
 321         {OV5693_REG_8BIT(0x4837), 0x0a},
 322         {OV5693_REG_8BIT(0x5003), 0x20},
 323         {OV5693_REG_8BIT(0x5013), 0x00},
 324         {OV5693_REG_8BIT(0x5842), 0x01},
 325         {OV5693_REG_8BIT(0x5843), 0x2b},
 326         {OV5693_REG_8BIT(0x5844), 0x01},
 327         {OV5693_REG_8BIT(0x5845), 0x92},
 328         {OV5693_REG_8BIT(0x5846), 0x01},
 329         {OV5693_REG_8BIT(0x5847), 0x8f},
 330         {OV5693_REG_8BIT(0x5848), 0x01},
 331         {OV5693_REG_8BIT(0x5849), 0x0c},
 332         {OV5693_REG_8BIT(0x5e10), 0x0c},
 333         {OV5693_REG_8BIT(0x3820), 0x00},
 334         {OV5693_REG_8BIT(0x3821), 0x1e},
 335         {OV5693_REG_8BIT(0x5041), 0x14}
 336 };
 337
 338 static const struct ov5693_reg_list ov5693_global_setting = {
 339         .num_regs = ARRAY_SIZE(ov5693_global_regs),
 340         .regs = ov5693_global_regs,
 341 };
 342
 343 static const struct v4l2_rect ov5693_default_crop = {
 344         .left = OV5693_ACTIVE_START_LEFT,
 345         .top = OV5693_ACTIVE_START_TOP,
 346         .width = OV5693_ACTIVE_WIDTH,
 347         .height = OV5693_ACTIVE_HEIGHT,
 348 };
 349
 350 static const struct v4l2_mbus_framefmt ov5693_default_fmt = {
 351         .width = OV5693_ACTIVE_WIDTH,
 352         .height = OV5693_ACTIVE_HEIGHT,
 353         .code = MEDIA_BUS_FMT_SBGGR10_1X10,
 354 };
 355
 356 static const s64 link_freq_menu_items[] = {
 357         OV5693_LINK_FREQ_419_2MHZ
 358 };
 359
 360 static const char * const ov5693_test_pattern_menu[] = {
 361         "Disabled",
 362         "Random Data",
 363         "Colour Bars",
 364         "Colour Bars with Rolling Bar"
 365 };
 366
 367 static const u8 ov5693_test_pattern_bits[] = {
 368         0,
 369         OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM,
 370         OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS,
 371         OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS |
 372         OV5693_TEST_PATTERN_ROLLING,
 373 };
 374
 375 /* I2C I/O Operations */
 376
 377 static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value)
 378 {
 379         struct i2c_client *client = ov5693->client;
 380         __be16 reg;
 381         u8 val[4];
 382         struct i2c_msg msg[] = {
 383                 {
 384                         .addr   = client->addr,
 385                         .flags  = 0,
 386                         .len    = 2,
 387                         .buf    = (u8 *)&reg,
 388                 },
 389                 {
 390                         .addr   = client->addr,
 391                         .flags  = I2C_M_RD,
 392                         .buf    = (u8 *)&val,
 393                 },
 394         };
 395         unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
 396         unsigned int i;
 397         int ret;
 398
 399         reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
 400
 401         msg[1].len = len;
 402
 403         ret = i2c_transfer(client->adapter, msg, 2);
 404         if (ret < 0)
 405                 return dev_err_probe(&client->dev, ret,
 406                                      "Failed to read register 0x%04x: %d\n",
 407                                      addr & OV5693_REG_ADDR_MASK, ret);
 408
 409         *value = 0;
 410         for (i = 0; i < len; ++i) {
 411                 *value <<= 8;
 412                 *value |= val[i];
 413         }
 414
 415         return 0;
 416 }
 417
 418 static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value,
 419                              int *error)
 420 {
 421         struct i2c_client *client = ov5693->client;
 422         struct {
 423                 __be16 reg;
 424                 u8 val[4];
 425         } __packed buf;
 426         struct i2c_msg msg = {
 427                 .addr   = client->addr,
 428                 .buf    = (u8 *)&buf,
 429         };
 430         unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
 431         unsigned int i;
 432         int ret;
 433
 434         if (*error < 0)
 435                 return;
 436
 437         buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
 438         for (i = 0; i < len; ++i) {
 439                 buf.val[len - i - 1] = value & 0xff;
 440                 value >>= 8;
 441         }
 442
 443         msg.len = len + 2;
 444
 445         ret = i2c_transfer(client->adapter, &msg, 1);
 446         if (ret < 0) {
 447                 dev_err(&client->dev, "Failed to write register 0x%04x: %d\n",
 448                         addr & OV5693_REG_ADDR_MASK, ret);
 449                 *error = ret;
 450         }
 451 }
 452
 453 static int ov5693_write_reg_array(struct ov5693_device *ov5693,
 454                                   const struct ov5693_reg_list *reglist)
 455 {
 456         unsigned int i;
 457         int ret = 0;
 458
 459         for (i = 0; i < reglist->num_regs; i++)
 460                 ov5693_write_reg(ov5693, reglist->regs[i].reg,
 461                                  reglist->regs[i].val, &ret);
 462
 463         return ret;
 464 }
 465
 466 static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address,
 467                               u32 mask, u32 bits)
 468 {
 469         u32 value = 0;
 470         int ret;
 471
 472         ret = ov5693_read_reg(ov5693, address, &value);
 473         if (ret)
 474                 return ret;
 475
 476         value &= ~mask;
 477         value |= bits;
 478
 479         ov5693_write_reg(ov5693, address, value, &ret);
 480
 481         return ret;
 482 }
 483
 484 /* V4L2 Controls Functions */
 485
 486 static int ov5693_flip_vert_configure(struct ov5693_device *ov5693,
 487                                       bool enable)
 488 {
 489         u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN |
 490                   OV5693_FORMAT1_FLIP_VERT_SENSOR_EN;
 491         int ret;
 492
 493         ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits,
 494                                  enable ? bits : 0);
 495         if (ret)
 496                 return ret;
 497
 498         return 0;
 499 }
 500
 501 static int ov5693_flip_horz_configure(struct ov5693_device *ov5693,
 502                                       bool enable)
 503 {
 504         u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN |
 505                   OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN;
 506         int ret;
 507
 508         ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits,
 509                                  enable ? bits : 0);
 510         if (ret)
 511                 return ret;
 512
 513         return 0;
 514 }
 515
 516 static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value)
 517 {
 518         u32 exposure;
 519         int ret;
 520
 521         ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure);
 522         if (ret)
 523                 return ret;
 524
 525         /* The lowest 4 bits are unsupported fractional bits */
 526         *value = exposure >> 4;
 527
 528         return 0;
 529 }
 530
 531 static int ov5693_exposure_configure(struct ov5693_device *ov5693,
 532                                      u32 exposure)
 533 {
 534         int ret = 0;
 535
 536         exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK;
 537
 538         ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret);
 539
 540         return ret;
 541 }
 542
 543 static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain)
 544 {
 545         u32 value;
 546         int ret;
 547
 548         ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value);
 549         if (ret)
 550                 return ret;
 551
 552         /* As with exposure, the lowest 4 bits are fractional bits. */
 553         *gain = value >> 4;
 554
 555         return ret;
 556 }
 557
 558 static int ov5693_digital_gain_configure(struct ov5693_device *ov5693,
 559                                          u32 gain)
 560 {
 561         int ret = 0;
 562
 563         gain &= OV5693_MWB_GAIN_MASK;
 564
 565         ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret);
 566         ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret);
 567         ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret);
 568
 569         return ret;
 570 }
 571
 572 static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain)
 573 {
 574         int ret = 0;
 575
 576         gain = (gain << 4) & OV5693_GAIN_CTRL_MASK;
 577
 578         ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret);
 579
 580         return ret;
 581 }
 582
 583 static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank)
 584 {
 585         u16 vts = ov5693->mode.format.height + vblank;
 586         int ret = 0;
 587
 588         ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret);
 589
 590         return ret;
 591 }
 592
 593 static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx)
 594 {
 595         int ret = 0;
 596
 597         ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG,
 598                          ov5693_test_pattern_bits[idx], &ret);
 599
 600         return ret;
 601 }
 602
 603 static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl)
 604 {
 605         struct ov5693_device *ov5693 =
 606             container_of(ctrl->handler, struct ov5693_device, ctrls.handler);
 607         int ret = 0;
 608
 609         /* If VBLANK is altered we need to update exposure to compensate */
 610         if (ctrl->id == V4L2_CID_VBLANK) {
 611                 int exposure_max;
 612
 613                 exposure_max = ov5693->mode.format.height + ctrl->val -
 614                                OV5693_INTEGRATION_TIME_MARGIN;
 615                 __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
 616                                          ov5693->ctrls.exposure->minimum,
 617                                          exposure_max,
 618                                          ov5693->ctrls.exposure->step,
 619                                          min(ov5693->ctrls.exposure->val,
 620                                              exposure_max));
 621         }
 622
 623         /* Only apply changes to the controls if the device is powered up */
 624         if (!pm_runtime_get_if_in_use(ov5693->dev))
 625                 return 0;
 626
 627         switch (ctrl->id) {
 628         case V4L2_CID_EXPOSURE:
 629                 ret = ov5693_exposure_configure(ov5693, ctrl->val);
 630                 break;
 631         case V4L2_CID_ANALOGUE_GAIN:
 632                 ret = ov5693_analog_gain_configure(ov5693, ctrl->val);
 633                 break;
 634         case V4L2_CID_DIGITAL_GAIN:
 635                 ret = ov5693_digital_gain_configure(ov5693, ctrl->val);
 636                 break;
 637         case V4L2_CID_HFLIP:
 638                 ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val);
 639                 break;
 640         case V4L2_CID_VFLIP:
 641                 ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val);
 642                 break;
 643         case V4L2_CID_VBLANK:
 644                 ret = ov5693_vts_configure(ov5693, ctrl->val);
 645                 break;
 646         case V4L2_CID_TEST_PATTERN:
 647                 ret = ov5693_test_pattern_configure(ov5693, ctrl->val);
 648                 break;
 649         default:
 650                 ret = -EINVAL;
 651         }
 652
 653         pm_runtime_put(ov5693->dev);
 654
 655         return ret;
 656 }
 657
 658 static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
 659 {
 660         struct ov5693_device *ov5693 = container_of(ctrl->handler,
 661                                                     struct ov5693_device,
 662                                                     ctrls.handler);
 663
 664         switch (ctrl->id) {
 665         case V4L2_CID_EXPOSURE_ABSOLUTE:
 666                 return ov5693_get_exposure(ov5693, &ctrl->val);
 667         case V4L2_CID_AUTOGAIN:
 668                 return ov5693_get_gain(ov5693, &ctrl->val);
 669         default:
 670                 return -EINVAL;
 671         }
 672 }
 673
 674 static const struct v4l2_ctrl_ops ov5693_ctrl_ops = {
 675         .s_ctrl = ov5693_s_ctrl,
 676         .g_volatile_ctrl = ov5693_g_volatile_ctrl
 677 };
 678
 679 /* System Control Functions */
 680
 681 static int ov5693_mode_configure(struct ov5693_device *ov5693)
 682 {
 683         const struct ov5693_mode *mode = &ov5693->mode;
 684         int ret = 0;
 685
 686         /* Crop Start X */
 687         ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left,
 688                          &ret);
 689
 690         /* Offset X */
 691         ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret);
 692
 693         /* Output Size X */
 694         ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width,
 695                          &ret);
 696
 697         /* Crop End X */
 698         ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG,
 699                          mode->crop.left + mode->crop.width, &ret);
 700
 701         /* Horizontal Total Size */
 702         ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL,
 703                          &ret);
 704
 705         /* Crop Start Y */
 706         ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top,
 707                          &ret);
 708
 709         /* Offset Y */
 710         ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret);
 711
 712         /* Output Size Y */
 713         ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height,
 714                          &ret);
 715
 716         /* Crop End Y */
 717         ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG,
 718                          mode->crop.top + mode->crop.height, &ret);
 719
 720         /* Subsample X increase */
 721         ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG,
 722                          ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret);
 723         /* Subsample Y increase */
 724         ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG,
 725                          ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret);
 726
 727         if (ret)
 728                 return ret;
 729
 730         /* Binning */
 731         ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG,
 732                                  OV5693_FORMAT1_VBIN_EN,
 733                                  mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0);
 734         if (ret)
 735                 return ret;
 736
 737         ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG,
 738                                  OV5693_FORMAT2_HBIN_EN,
 739                                  mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0);
 740
 741         return ret;
 742 }
 743
 744 static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable)
 745 {
 746         int ret = 0;
 747
 748         ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG,
 749                          enable ? OV5693_START_STREAMING :
 750                                   OV5693_STOP_STREAMING, &ret);
 751
 752         return ret;
 753 }
 754
 755 static int ov5693_sw_reset(struct ov5693_device *ov5693)
 756 {
 757         int ret = 0;
 758
 759         ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret);
 760
 761         return ret;
 762 }
 763
 764 static int ov5693_sensor_init(struct ov5693_device *ov5693)
 765 {
 766         int ret;
 767
 768         ret = ov5693_sw_reset(ov5693);
 769         if (ret)
 770                 return dev_err_probe(ov5693->dev, ret,
 771                                      "software reset error\n");
 772
 773         ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting);
 774         if (ret)
 775                 return dev_err_probe(ov5693->dev, ret,
 776                                      "global settings error\n");
 777
 778         ret = ov5693_mode_configure(ov5693);
 779         if (ret)
 780                 return dev_err_probe(ov5693->dev, ret,
 781                                      "mode configure error\n");
 782
 783         ret = ov5693_enable_streaming(ov5693, false);
 784         if (ret)
 785                 dev_err(ov5693->dev, "stop streaming error\n");
 786
 787         return ret;
 788 }
 789
 790 static void ov5693_sensor_powerdown(struct ov5693_device *ov5693)
 791 {
 792         gpiod_set_value_cansleep(ov5693->reset, 1);
 793         gpiod_set_value_cansleep(ov5693->powerdown, 1);
 794
 795         regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies);
 796
 797         clk_disable_unprepare(ov5693->xvclk);
 798 }
 799
 800 static int ov5693_sensor_powerup(struct ov5693_device *ov5693)
 801 {
 802         int ret;
 803
 804         gpiod_set_value_cansleep(ov5693->reset, 1);
 805         gpiod_set_value_cansleep(ov5693->powerdown, 1);
 806
 807         ret = clk_prepare_enable(ov5693->xvclk);
 808         if (ret) {
 809                 dev_err(ov5693->dev, "Failed to enable clk\n");
 810                 goto fail_power;
 811         }
 812
 813         ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies);
 814         if (ret) {
 815                 dev_err(ov5693->dev, "Failed to enable regulators\n");
 816                 goto fail_power;
 817         }
 818
 819         gpiod_set_value_cansleep(ov5693->powerdown, 0);
 820         gpiod_set_value_cansleep(ov5693->reset, 0);
 821
 822         usleep_range(5000, 7500);
 823
 824         return 0;
 825
 826 fail_power:
 827         ov5693_sensor_powerdown(ov5693);
 828         return ret;
 829 }
 830
 831 static int __maybe_unused ov5693_sensor_suspend(struct device *dev)
 832 {
 833         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 834         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
 835
 836         ov5693_sensor_powerdown(ov5693);
 837
 838         return 0;
 839 }
 840
 841 static int __maybe_unused ov5693_sensor_resume(struct device *dev)
 842 {
 843         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 844         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
 845         int ret;
 846
 847         mutex_lock(&ov5693->lock);
 848
 849         ret = ov5693_sensor_powerup(ov5693);
 850         if (ret)
 851                 goto out_unlock;
 852
 853         ret = ov5693_sensor_init(ov5693);
 854         if (ret) {
 855                 dev_err(dev, "ov5693 sensor init failure\n");
 856                 goto err_power;
 857         }
 858
 859         goto out_unlock;
 860
 861 err_power:
 862         ov5693_sensor_powerdown(ov5693);
 863 out_unlock:
 864         mutex_unlock(&ov5693->lock);
 865         return ret;
 866 }
 867
 868 static int ov5693_detect(struct ov5693_device *ov5693)
 869 {
 870         int ret;
 871         u32 id;
 872
 873         ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id);
 874         if (ret)
 875                 return ret;
 876
 877         if (id != OV5693_CHIP_ID)
 878                 return dev_err_probe(ov5693->dev, -ENODEV,
 879                                      "sensor ID mismatch. Found 0x%04x\n", id);
 880
 881         return 0;
 882 }
 883
 884 /* V4L2 Framework callbacks */
 885
 886 static unsigned int __ov5693_calc_vts(u32 height)
 887 {
 888         /*
 889          * We need to set a sensible default VTS for whatever format height we
 890          * happen to be given from set_fmt(). This function just targets
 891          * an even multiple of 30fps.
 892          */
 893
 894         unsigned int tgt_fps;
 895
 896         tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30);
 897
 898         return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2);
 899 }
 900
 901 static struct v4l2_mbus_framefmt *
 902 __ov5693_get_pad_format(struct ov5693_device *ov5693,
 903                         struct v4l2_subdev_state *state,
 904                         unsigned int pad, enum v4l2_subdev_format_whence which)
 905 {
 906         switch (which) {
 907         case V4L2_SUBDEV_FORMAT_TRY:
 908                 return v4l2_subdev_get_try_format(&ov5693->sd, state, pad);
 909         case V4L2_SUBDEV_FORMAT_ACTIVE:
 910                 return &ov5693->mode.format;
 911         default:
 912                 return NULL;
 913         }
 914 }
 915
 916 static struct v4l2_rect *
 917 __ov5693_get_pad_crop(struct ov5693_device *ov5693,
 918                       struct v4l2_subdev_state *state,
 919                       unsigned int pad, enum v4l2_subdev_format_whence which)
 920 {
 921         switch (which) {
 922         case V4L2_SUBDEV_FORMAT_TRY:
 923                 return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad);
 924         case V4L2_SUBDEV_FORMAT_ACTIVE:
 925                 return &ov5693->mode.crop;
 926         }
 927
 928         return NULL;
 929 }
 930
 931 static int ov5693_get_fmt(struct v4l2_subdev *sd,
 932                           struct v4l2_subdev_state *state,
 933                           struct v4l2_subdev_format *format)
 934 {
 935         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
 936
 937         format->format = ov5693->mode.format;
 938
 939         return 0;
 940 }
 941
 942 static int ov5693_set_fmt(struct v4l2_subdev *sd,
 943                           struct v4l2_subdev_state *state,
 944                           struct v4l2_subdev_format *format)
 945 {
 946         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
 947         const struct v4l2_rect *crop;
 948         struct v4l2_mbus_framefmt *fmt;
 949         unsigned int hratio, vratio;
 950         unsigned int width, height;
 951         unsigned int hblank;
 952         int exposure_max;
 953
 954         crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which);
 955
 956         /*
 957          * Align to two to simplify the binning calculations below, and clamp
 958          * the requested format at the crop rectangle
 959          */
 960         width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
 961                         OV5693_MIN_CROP_WIDTH, crop->width);
 962         height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
 963                          OV5693_MIN_CROP_HEIGHT, crop->height);
 964
 965         /*
 966          * We can only support setting either the dimensions of the crop rect
 967          * or those dimensions binned (separately) by a factor of two.
 968          */
 969         hratio = clamp_t(unsigned int,
 970                          DIV_ROUND_CLOSEST(crop->width, width), 1, 2);
 971         vratio = clamp_t(unsigned int,
 972                          DIV_ROUND_CLOSEST(crop->height, height), 1, 2);
 973
 974         fmt = __ov5693_get_pad_format(ov5693, state, format->pad,
 975                                       format->which);
 976
 977         fmt->width = crop->width / hratio;
 978         fmt->height = crop->height / vratio;
 979         fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
 980
 981         format->format = *fmt;
 982
 983         if (format->which == V4L2_SUBDEV_FORMAT_TRY)
 984                 return 0;
 985
 986         mutex_lock(&ov5693->lock);
 987
 988         ov5693->mode.binning_x = hratio > 1;
 989         ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1;
 990         ov5693->mode.binning_y = vratio > 1;
 991         ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1;
 992
 993         ov5693->mode.vts = __ov5693_calc_vts(fmt->height);
 994
 995         __v4l2_ctrl_modify_range(ov5693->ctrls.vblank,
 996                                  OV5693_TIMING_MIN_VTS,
 997                                  OV5693_TIMING_MAX_VTS - fmt->height,
 998                                  1, ov5693->mode.vts - fmt->height);
 999         __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank,
1000                            ov5693->mode.vts - fmt->height);
1001
1002         hblank = OV5693_FIXED_PPL - fmt->width;
1003         __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1,
1004                                  hblank);
1005
1006         exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1007         __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
1008                                  ov5693->ctrls.exposure->minimum, exposure_max,
1009                                  ov5693->ctrls.exposure->step,
1010                                  min(ov5693->ctrls.exposure->val,
1011                                      exposure_max));
1012
1013         mutex_unlock(&ov5693->lock);
1014         return 0;
1015 }
1016
1017 static int ov5693_get_selection(struct v4l2_subdev *sd,
1018                                 struct v4l2_subdev_state *state,
1019                                 struct v4l2_subdev_selection *sel)
1020 {
1021         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1022
1023         switch (sel->target) {
1024         case V4L2_SEL_TGT_CROP:
1025                 mutex_lock(&ov5693->lock);
1026                 sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad,
1027                                                 sel->which);
1028                 mutex_unlock(&ov5693->lock);
1029                 break;
1030         case V4L2_SEL_TGT_NATIVE_SIZE:
1031                 sel->r.top = 0;
1032                 sel->r.left = 0;
1033                 sel->r.width = OV5693_NATIVE_WIDTH;
1034                 sel->r.height = OV5693_NATIVE_HEIGHT;
1035                 break;
1036         case V4L2_SEL_TGT_CROP_BOUNDS:
1037         case V4L2_SEL_TGT_CROP_DEFAULT:
1038                 sel->r.top = OV5693_ACTIVE_START_TOP;
1039                 sel->r.left = OV5693_ACTIVE_START_LEFT;
1040                 sel->r.width = OV5693_ACTIVE_WIDTH;
1041                 sel->r.height = OV5693_ACTIVE_HEIGHT;
1042                 break;
1043         default:
1044                 return -EINVAL;
1045         }
1046
1047         return 0;
1048 }
1049
1050 static int ov5693_set_selection(struct v4l2_subdev *sd,
1051                                 struct v4l2_subdev_state *state,
1052                                 struct v4l2_subdev_selection *sel)
1053 {
1054         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1055         struct v4l2_mbus_framefmt *format;
1056         struct v4l2_rect *__crop;
1057         struct v4l2_rect rect;
1058
1059         if (sel->target != V4L2_SEL_TGT_CROP)
1060                 return -EINVAL;
1061
1062         /*
1063          * Clamp the boundaries of the crop rectangle to the size of the sensor
1064          * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't
1065          * disrupted.
1066          */
1067         rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT,
1068                           OV5693_NATIVE_WIDTH);
1069         rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP,
1070                          OV5693_NATIVE_HEIGHT);
1071         rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
1072                              OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH);
1073         rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
1074                               OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT);
1075
1076         /* Make sure the crop rectangle isn't outside the bounds of the array */
1077         rect.width = min_t(unsigned int, rect.width,
1078                            OV5693_NATIVE_WIDTH - rect.left);
1079         rect.height = min_t(unsigned int, rect.height,
1080                             OV5693_NATIVE_HEIGHT - rect.top);
1081
1082         __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which);
1083
1084         if (rect.width != __crop->width || rect.height != __crop->height) {
1085                 /*
1086                  * Reset the output image size if the crop rectangle size has
1087                  * been modified.
1088                  */
1089                 format = __ov5693_get_pad_format(ov5693, state, sel->pad,
1090                                                  sel->which);
1091                 format->width = rect.width;
1092                 format->height = rect.height;
1093         }
1094
1095         *__crop = rect;
1096         sel->r = rect;
1097
1098         return 0;
1099 }
1100
1101 static int ov5693_s_stream(struct v4l2_subdev *sd, int enable)
1102 {
1103         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1104         int ret;
1105
1106         if (enable) {
1107                 ret = pm_runtime_get_sync(ov5693->dev);
1108                 if (ret < 0)
1109                         goto err_power_down;
1110
1111                 mutex_lock(&ov5693->lock);
1112                 ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler);
1113                 if (ret) {
1114                         mutex_unlock(&ov5693->lock);
1115                         goto err_power_down;
1116                 }
1117
1118                 ret = ov5693_enable_streaming(ov5693, true);
1119                 mutex_unlock(&ov5693->lock);
1120         } else {
1121                 mutex_lock(&ov5693->lock);
1122                 ret = ov5693_enable_streaming(ov5693, false);
1123                 mutex_unlock(&ov5693->lock);
1124         }
1125         if (ret)
1126                 goto err_power_down;
1127
1128         ov5693->streaming = !!enable;
1129
1130         if (!enable)
1131                 pm_runtime_put(ov5693->dev);
1132
1133         return 0;
1134 err_power_down:
1135         pm_runtime_put_noidle(ov5693->dev);
1136         return ret;
1137 }
1138
1139 static int ov5693_g_frame_interval(struct v4l2_subdev *sd,
1140                                    struct v4l2_subdev_frame_interval *interval)
1141 {
1142         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1143         unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height +
1144                                  ov5693->ctrls.vblank->val);
1145         unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize);
1146
1147         interval->interval.numerator = 1;
1148         interval->interval.denominator = fps;
1149
1150         return 0;
1151 }
1152
1153 static int ov5693_enum_mbus_code(struct v4l2_subdev *sd,
1154                                  struct v4l2_subdev_state *state,
1155                                  struct v4l2_subdev_mbus_code_enum *code)
1156 {
1157         /* Only a single mbus format is supported */
1158         if (code->index > 0)
1159                 return -EINVAL;
1160
1161         code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1162         return 0;
1163 }
1164
1165 static int ov5693_enum_frame_size(struct v4l2_subdev *sd,
1166                                   struct v4l2_subdev_state *state,
1167                                   struct v4l2_subdev_frame_size_enum *fse)
1168 {
1169         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1170         struct v4l2_rect *__crop;
1171
1172         if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
1173                 return -EINVAL;
1174
1175         __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which);
1176         if (!__crop)
1177                 return -EINVAL;
1178
1179         fse->min_width = __crop->width / (fse->index + 1);
1180         fse->min_height = __crop->height / (fse->index + 1);
1181         fse->max_width = fse->min_width;
1182         fse->max_height = fse->min_height;
1183
1184         return 0;
1185 }
1186
1187 static const struct v4l2_subdev_video_ops ov5693_video_ops = {
1188         .s_stream = ov5693_s_stream,
1189         .g_frame_interval = ov5693_g_frame_interval,
1190 };
1191
1192 static const struct v4l2_subdev_pad_ops ov5693_pad_ops = {
1193         .enum_mbus_code = ov5693_enum_mbus_code,
1194         .enum_frame_size = ov5693_enum_frame_size,
1195         .get_fmt = ov5693_get_fmt,
1196         .set_fmt = ov5693_set_fmt,
1197         .get_selection = ov5693_get_selection,
1198         .set_selection = ov5693_set_selection,
1199 };
1200
1201 static const struct v4l2_subdev_ops ov5693_ops = {
1202         .video = &ov5693_video_ops,
1203         .pad = &ov5693_pad_ops,
1204 };
1205
1206 /* Sensor and Driver Configuration Functions */
1207
1208 static int ov5693_init_controls(struct ov5693_device *ov5693)
1209 {
1210         const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops;
1211         struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls;
1212         struct v4l2_fwnode_device_properties props;
1213         int vblank_max, vblank_def;
1214         int exposure_max;
1215         int hblank;
1216         int ret;
1217
1218         ret = v4l2_ctrl_handler_init(&ctrls->handler, 12);
1219         if (ret)
1220                 return ret;
1221
1222         /* link freq */
1223         ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler,
1224                                                   NULL, V4L2_CID_LINK_FREQ,
1225                                                   0, 0, link_freq_menu_items);
1226         if (ctrls->link_freq)
1227                 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1228
1229         /* pixel rate */
1230         ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL,
1231                                               V4L2_CID_PIXEL_RATE, 0,
1232                                               OV5693_PIXEL_RATE, 1,
1233                                               OV5693_PIXEL_RATE);
1234
1235         /* Exposure */
1236         exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1237         ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops,
1238                                             V4L2_CID_EXPOSURE,
1239                                             OV5693_EXPOSURE_MIN, exposure_max,
1240                                             OV5693_EXPOSURE_STEP, exposure_max);
1241
1242         /* Gain */
1243         ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler,
1244                                                  ops, V4L2_CID_ANALOGUE_GAIN,
1245                                                  OV5693_GAIN_MIN,
1246                                                  OV5693_GAIN_MAX,
1247                                                  OV5693_GAIN_STEP,
1248                                                  OV5693_GAIN_DEF);
1249
1250         ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops,
1251                                                 V4L2_CID_DIGITAL_GAIN,
1252                                                 OV5693_DIGITAL_GAIN_MIN,
1253                                                 OV5693_DIGITAL_GAIN_MAX,
1254                                                 OV5693_DIGITAL_GAIN_STEP,
1255                                                 OV5693_DIGITAL_GAIN_DEF);
1256
1257         /* Flip */
1258         ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1259                                          V4L2_CID_HFLIP, 0, 1, 1, 0);
1260
1261         ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1262                                          V4L2_CID_VFLIP, 0, 1, 1, 0);
1263
1264         hblank = OV5693_FIXED_PPL - ov5693->mode.format.width;
1265         ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1266                                           V4L2_CID_HBLANK, hblank,
1267                                           hblank, 1, hblank);
1268
1269         if (ctrls->hblank)
1270                 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1271
1272         vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height;
1273         vblank_def = ov5693->mode.vts - ov5693->mode.format.height;
1274         ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1275                                           V4L2_CID_VBLANK,
1276                                           OV5693_TIMING_MIN_VTS,
1277                                           vblank_max, 1, vblank_def);
1278
1279         ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(
1280                                         &ctrls->handler, ops,
1281                                         V4L2_CID_TEST_PATTERN,
1282                                         ARRAY_SIZE(ov5693_test_pattern_menu) - 1,
1283                                         0, 0, ov5693_test_pattern_menu);
1284
1285         if (ctrls->handler.error) {
1286                 dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n");
1287                 ret = ctrls->handler.error;
1288                 goto err_free_handler;
1289         }
1290
1291         /* set properties from fwnode (e.g. rotation, orientation) */
1292         ret = v4l2_fwnode_device_parse(ov5693->dev, &props);
1293         if (ret)
1294                 goto err_free_handler;
1295
1296         ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops,
1297                                               &props);
1298         if (ret)
1299                 goto err_free_handler;
1300
1301         /* Use same lock for controls as for everything else. */
1302         ctrls->handler.lock = &ov5693->lock;
1303         ov5693->sd.ctrl_handler = &ctrls->handler;
1304
1305         return 0;
1306
1307 err_free_handler:
1308         v4l2_ctrl_handler_free(&ctrls->handler);
1309         return ret;
1310 }
1311
1312 static int ov5693_configure_gpios(struct ov5693_device *ov5693)
1313 {
1314         ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset",
1315                                                 GPIOD_OUT_HIGH);
1316         if (IS_ERR(ov5693->reset)) {
1317                 dev_err(ov5693->dev, "Error fetching reset GPIO\n");
1318                 return PTR_ERR(ov5693->reset);
1319         }
1320
1321         ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown",
1322                                                     GPIOD_OUT_HIGH);
1323         if (IS_ERR(ov5693->powerdown)) {
1324                 dev_err(ov5693->dev, "Error fetching powerdown GPIO\n");
1325                 return PTR_ERR(ov5693->powerdown);
1326         }
1327
1328         return 0;
1329 }
1330
1331 static int ov5693_get_regulators(struct ov5693_device *ov5693)
1332 {
1333         unsigned int i;
1334
1335         for (i = 0; i < OV5693_NUM_SUPPLIES; i++)
1336                 ov5693->supplies[i].supply = ov5693_supply_names[i];
1337
1338         return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES,
1339                                        ov5693->supplies);
1340 }
1341
1342 static int ov5693_check_hwcfg(struct ov5693_device *ov5693)
1343 {
1344         struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev);
1345         struct v4l2_fwnode_endpoint bus_cfg = {
1346                 .bus_type = V4L2_MBUS_CSI2_DPHY,
1347         };
1348         struct fwnode_handle *endpoint;
1349         unsigned int i;
1350         int ret;
1351
1352         endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
1353         if (!endpoint)
1354                 return -EPROBE_DEFER; /* Could be provided by cio2-bridge */
1355
1356         ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
1357         fwnode_handle_put(endpoint);
1358         if (ret)
1359                 return ret;
1360
1361         if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1362                 dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported");
1363                 ret = -EINVAL;
1364                 goto out_free_bus_cfg;
1365         }
1366
1367         if (!bus_cfg.nr_of_link_frequencies) {
1368                 dev_err(ov5693->dev, "no link frequencies defined\n");
1369                 ret = -EINVAL;
1370                 goto out_free_bus_cfg;
1371         }
1372
1373         for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
1374                 if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ)
1375                         break;
1376
1377         if (i == bus_cfg.nr_of_link_frequencies) {
1378                 dev_err(ov5693->dev, "supported link freq %ull not found\n",
1379                         OV5693_LINK_FREQ_419_2MHZ);
1380                 ret = -EINVAL;
1381                 goto out_free_bus_cfg;
1382         }
1383
1384 out_free_bus_cfg:
1385         v4l2_fwnode_endpoint_free(&bus_cfg);
1386
1387         return ret;
1388 }
1389
1390 static int ov5693_probe(struct i2c_client *client)
1391 {
1392         struct ov5693_device *ov5693;
1393         u32 xvclk_rate;
1394         int ret = 0;
1395
1396         ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL);
1397         if (!ov5693)
1398                 return -ENOMEM;
1399
1400         ov5693->client = client;
1401         ov5693->dev = &client->dev;
1402
1403         ret = ov5693_check_hwcfg(ov5693);
1404         if (ret)
1405                 return ret;
1406
1407         mutex_init(&ov5693->lock);
1408
1409         v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops);
1410
1411         ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk");
1412         if (IS_ERR(ov5693->xvclk))
1413                 return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk),
1414                                      "failed to get xvclk: %ld\n",
1415                                      PTR_ERR(ov5693->xvclk));
1416
1417         if (ov5693->xvclk) {
1418                 xvclk_rate = clk_get_rate(ov5693->xvclk);
1419         } else {
1420                 ret = fwnode_property_read_u32(dev_fwnode(&client->dev),
1421                                      "clock-frequency",
1422                                      &xvclk_rate);
1423
1424                 if (ret) {
1425                         dev_err(&client->dev, "can't get clock frequency");
1426                         return ret;
1427                 }
1428         }
1429
1430         if (xvclk_rate != OV5693_XVCLK_FREQ)
1431                 dev_warn(&client->dev, "Found clk freq %u, expected %u\n",
1432                          xvclk_rate, OV5693_XVCLK_FREQ);
1433
1434         ret = ov5693_configure_gpios(ov5693);
1435         if (ret)
1436                 return ret;
1437
1438         ret = ov5693_get_regulators(ov5693);
1439         if (ret)
1440                 return dev_err_probe(&client->dev, ret,
1441                                      "Error fetching regulators\n");
1442
1443         ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1444         ov5693->pad.flags = MEDIA_PAD_FL_SOURCE;
1445         ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1446
1447         ov5693->mode.crop = ov5693_default_crop;
1448         ov5693->mode.format = ov5693_default_fmt;
1449         ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height);
1450
1451         ret = ov5693_init_controls(ov5693);
1452         if (ret)
1453                 return ret;
1454
1455         ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad);
1456         if (ret)
1457                 goto err_ctrl_handler_free;
1458
1459         /*
1460          * We need the driver to work in the event that pm runtime is disable in
1461          * the kernel, so power up and verify the chip now. In the event that
1462          * runtime pm is disabled this will leave the chip on, so that streaming
1463          * will work.
1464          */
1465
1466         ret = ov5693_sensor_powerup(ov5693);
1467         if (ret)
1468                 goto err_media_entity_cleanup;
1469
1470         ret = ov5693_detect(ov5693);
1471         if (ret)
1472                 goto err_powerdown;
1473
1474         pm_runtime_set_active(&client->dev);
1475         pm_runtime_get_noresume(&client->dev);
1476         pm_runtime_enable(&client->dev);
1477
1478         ret = v4l2_async_register_subdev_sensor(&ov5693->sd);
1479         if (ret) {
1480                 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1481                         ret);
1482                 goto err_pm_runtime;
1483         }
1484
1485         pm_runtime_set_autosuspend_delay(&client->dev, 1000);
1486         pm_runtime_use_autosuspend(&client->dev);
1487         pm_runtime_put_autosuspend(&client->dev);
1488
1489         return ret;
1490
1491 err_pm_runtime:
1492         pm_runtime_disable(&client->dev);
1493         pm_runtime_put_noidle(&client->dev);
1494 err_powerdown:
1495         ov5693_sensor_powerdown(ov5693);
1496 err_media_entity_cleanup:
1497         media_entity_cleanup(&ov5693->sd.entity);
1498 err_ctrl_handler_free:
1499         v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1500
1501         return ret;
1502 }
1503
1504 static void ov5693_remove(struct i2c_client *client)
1505 {
1506         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1507         struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1508
1509         v4l2_async_unregister_subdev(sd);
1510         media_entity_cleanup(&ov5693->sd.entity);
1511         v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1512         mutex_destroy(&ov5693->lock);
1513
1514         /*
1515          * Disable runtime PM. In case runtime PM is disabled in the kernel,
1516          * make sure to turn power off manually.
1517          */
1518         pm_runtime_disable(&client->dev);
1519         if (!pm_runtime_status_suspended(&client->dev))
1520                 ov5693_sensor_powerdown(ov5693);
1521         pm_runtime_set_suspended(&client->dev);
1522 }
1523
1524 static const struct dev_pm_ops ov5693_pm_ops = {
1525         SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL)
1526 };
1527
1528 static const struct acpi_device_id ov5693_acpi_match[] = {
1529         {"INT33BE"},
1530         {},
1531 };
1532 MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match);
1533
1534 static const struct of_device_id ov5693_of_match[] = {
1535         { .compatible = "ovti,ov5693", },
1536         { /* sentinel */ },
1537 };
1538 MODULE_DEVICE_TABLE(of, ov5693_of_match);
1539
1540 static struct i2c_driver ov5693_driver = {
1541         .driver = {
1542                 .name = "ov5693",
1543                 .acpi_match_table = ov5693_acpi_match,
1544                 .of_match_table = ov5693_of_match,
1545                 .pm = &ov5693_pm_ops,
1546         },
1547         .probe_new = ov5693_probe,
1548         .remove = ov5693_remove,
1549 };
1550 module_i2c_driver(ov5693_driver);
1551
1552 MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors");
1553 MODULE_LICENSE("GPL");