1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
5 * Adapted from the atomisp-ov5693 driver, with contributions from:
15 #include <asm/unaligned.h>
16 #include <linux/acpi.h>
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/device.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25 #include <linux/types.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-fwnode.h>
30 #define OV5693_REG_8BIT(n) ((1 << 16) | (n))
31 #define OV5693_REG_16BIT(n) ((2 << 16) | (n))
32 #define OV5693_REG_24BIT(n) ((3 << 16) | (n))
33 #define OV5693_REG_SIZE_SHIFT 16
34 #define OV5693_REG_ADDR_MASK 0xffff
37 #define OV5693_SW_RESET_REG OV5693_REG_8BIT(0x0103)
38 #define OV5693_SW_STREAM_REG OV5693_REG_8BIT(0x0100)
39 #define OV5693_START_STREAMING 0x01
40 #define OV5693_STOP_STREAMING 0x00
41 #define OV5693_SW_RESET 0x01
43 #define OV5693_REG_CHIP_ID OV5693_REG_16BIT(0x300a)
44 /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */
45 #define OV5693_CHIP_ID 0x5690
48 #define OV5693_EXPOSURE_CTRL_REG OV5693_REG_24BIT(0x3500)
49 #define OV5693_EXPOSURE_CTRL_MASK GENMASK(19, 4)
50 #define OV5693_INTEGRATION_TIME_MARGIN 8
51 #define OV5693_EXPOSURE_MIN 1
52 #define OV5693_EXPOSURE_STEP 1
55 #define OV5693_GAIN_CTRL_REG OV5693_REG_16BIT(0x350a)
56 #define OV5693_GAIN_CTRL_MASK GENMASK(10, 4)
57 #define OV5693_GAIN_MIN 1
58 #define OV5693_GAIN_MAX 127
59 #define OV5693_GAIN_DEF 8
60 #define OV5693_GAIN_STEP 1
63 #define OV5693_MWB_RED_GAIN_REG OV5693_REG_16BIT(0x3400)
64 #define OV5693_MWB_GREEN_GAIN_REG OV5693_REG_16BIT(0x3402)
65 #define OV5693_MWB_BLUE_GAIN_REG OV5693_REG_16BIT(0x3404)
66 #define OV5693_MWB_GAIN_MASK GENMASK(11, 0)
67 #define OV5693_MWB_GAIN_MAX 0x0fff
68 #define OV5693_DIGITAL_GAIN_MIN 1
69 #define OV5693_DIGITAL_GAIN_MAX 4095
70 #define OV5693_DIGITAL_GAIN_DEF 1024
71 #define OV5693_DIGITAL_GAIN_STEP 1
73 /* Timing and Format */
74 #define OV5693_CROP_START_X_REG OV5693_REG_16BIT(0x3800)
75 #define OV5693_CROP_START_Y_REG OV5693_REG_16BIT(0x3802)
76 #define OV5693_CROP_END_X_REG OV5693_REG_16BIT(0x3804)
77 #define OV5693_CROP_END_Y_REG OV5693_REG_16BIT(0x3806)
78 #define OV5693_OUTPUT_SIZE_X_REG OV5693_REG_16BIT(0x3808)
79 #define OV5693_OUTPUT_SIZE_Y_REG OV5693_REG_16BIT(0x380a)
81 #define OV5693_TIMING_HTS_REG OV5693_REG_16BIT(0x380c)
82 #define OV5693_FIXED_PPL 2688U
83 #define OV5693_TIMING_VTS_REG OV5693_REG_16BIT(0x380e)
84 #define OV5693_TIMING_MAX_VTS 0xffff
85 #define OV5693_TIMING_MIN_VTS 0x04
87 #define OV5693_OFFSET_START_X_REG OV5693_REG_16BIT(0x3810)
88 #define OV5693_OFFSET_START_Y_REG OV5693_REG_16BIT(0x3812)
90 #define OV5693_SUB_INC_X_REG OV5693_REG_8BIT(0x3814)
91 #define OV5693_SUB_INC_Y_REG OV5693_REG_8BIT(0x3815)
93 #define OV5693_FORMAT1_REG OV5693_REG_8BIT(0x3820)
94 #define OV5693_FORMAT1_FLIP_VERT_ISP_EN BIT(6)
95 #define OV5693_FORMAT1_FLIP_VERT_SENSOR_EN BIT(1)
96 #define OV5693_FORMAT1_VBIN_EN BIT(0)
97 #define OV5693_FORMAT2_REG OV5693_REG_8BIT(0x3821)
98 #define OV5693_FORMAT2_HDR_EN BIT(7)
99 #define OV5693_FORMAT2_FLIP_HORZ_ISP_EN BIT(2)
100 #define OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN BIT(1)
101 #define OV5693_FORMAT2_HBIN_EN BIT(0)
103 #define OV5693_ISP_CTRL2_REG OV5693_REG_8BIT(0x5002)
104 #define OV5693_ISP_SCALE_ENABLE BIT(7)
107 #define OV5693_NATIVE_WIDTH 2624
108 #define OV5693_NATIVE_HEIGHT 1956
109 #define OV5693_NATIVE_START_LEFT 0
110 #define OV5693_NATIVE_START_TOP 0
111 #define OV5693_ACTIVE_WIDTH 2592
112 #define OV5693_ACTIVE_HEIGHT 1944
113 #define OV5693_ACTIVE_START_LEFT 16
114 #define OV5693_ACTIVE_START_TOP 6
115 #define OV5693_MIN_CROP_WIDTH 2
116 #define OV5693_MIN_CROP_HEIGHT 2
119 #define OV5693_TEST_PATTERN_REG OV5693_REG_8BIT(0x5e00)
120 #define OV5693_TEST_PATTERN_ENABLE BIT(7)
121 #define OV5693_TEST_PATTERN_ROLLING BIT(6)
122 #define OV5693_TEST_PATTERN_RANDOM 0x01
123 #define OV5693_TEST_PATTERN_BARS 0x00
125 /* System Frequencies */
126 #define OV5693_XVCLK_FREQ 19200000
127 #define OV5693_LINK_FREQ_419_2MHZ 419200000
128 #define OV5693_PIXEL_RATE 167680000
130 #define to_ov5693_sensor(x) container_of(x, struct ov5693_device, sd)
132 static const char * const ov5693_supply_names[] = {
133 "avdd", /* Analog power */
134 "dovdd", /* Digital I/O power */
135 "dvdd", /* Digital circuit power */
138 #define OV5693_NUM_SUPPLIES ARRAY_SIZE(ov5693_supply_names)
145 struct ov5693_reg_list {
147 const struct ov5693_reg *regs;
150 struct ov5693_device {
151 struct i2c_client *client;
154 /* Protect against concurrent changes to controls */
157 struct gpio_desc *reset;
158 struct gpio_desc *powerdown;
159 struct regulator_bulk_data supplies[OV5693_NUM_SUPPLIES];
163 struct v4l2_rect crop;
164 struct v4l2_mbus_framefmt format;
167 unsigned int inc_x_odd;
168 unsigned int inc_y_odd;
173 struct v4l2_subdev sd;
174 struct media_pad pad;
176 struct ov5693_v4l2_ctrls {
177 struct v4l2_ctrl_handler handler;
178 struct v4l2_ctrl *link_freq;
179 struct v4l2_ctrl *pixel_rate;
180 struct v4l2_ctrl *exposure;
181 struct v4l2_ctrl *analogue_gain;
182 struct v4l2_ctrl *digital_gain;
183 struct v4l2_ctrl *hflip;
184 struct v4l2_ctrl *vflip;
185 struct v4l2_ctrl *hblank;
186 struct v4l2_ctrl *vblank;
187 struct v4l2_ctrl *test_pattern;
191 static const struct ov5693_reg ov5693_global_regs[] = {
192 {OV5693_REG_8BIT(0x3016), 0xf0},
193 {OV5693_REG_8BIT(0x3017), 0xf0},
194 {OV5693_REG_8BIT(0x3018), 0xf0},
195 {OV5693_REG_8BIT(0x3022), 0x01},
196 {OV5693_REG_8BIT(0x3028), 0x44},
197 {OV5693_REG_8BIT(0x3098), 0x02},
198 {OV5693_REG_8BIT(0x3099), 0x19},
199 {OV5693_REG_8BIT(0x309a), 0x02},
200 {OV5693_REG_8BIT(0x309b), 0x01},
201 {OV5693_REG_8BIT(0x309c), 0x00},
202 {OV5693_REG_8BIT(0x30a0), 0xd2},
203 {OV5693_REG_8BIT(0x30a2), 0x01},
204 {OV5693_REG_8BIT(0x30b2), 0x00},
205 {OV5693_REG_8BIT(0x30b3), 0x83},
206 {OV5693_REG_8BIT(0x30b4), 0x03},
207 {OV5693_REG_8BIT(0x30b5), 0x04},
208 {OV5693_REG_8BIT(0x30b6), 0x01},
209 {OV5693_REG_8BIT(0x3080), 0x01},
210 {OV5693_REG_8BIT(0x3104), 0x21},
211 {OV5693_REG_8BIT(0x3106), 0x00},
212 {OV5693_REG_8BIT(0x3406), 0x01},
213 {OV5693_REG_8BIT(0x3503), 0x07},
214 {OV5693_REG_8BIT(0x350b), 0x40},
215 {OV5693_REG_8BIT(0x3601), 0x0a},
216 {OV5693_REG_8BIT(0x3602), 0x38},
217 {OV5693_REG_8BIT(0x3612), 0x80},
218 {OV5693_REG_8BIT(0x3620), 0x54},
219 {OV5693_REG_8BIT(0x3621), 0xc7},
220 {OV5693_REG_8BIT(0x3622), 0x0f},
221 {OV5693_REG_8BIT(0x3625), 0x10},
222 {OV5693_REG_8BIT(0x3630), 0x55},
223 {OV5693_REG_8BIT(0x3631), 0xf4},
224 {OV5693_REG_8BIT(0x3632), 0x00},
225 {OV5693_REG_8BIT(0x3633), 0x34},
226 {OV5693_REG_8BIT(0x3634), 0x02},
227 {OV5693_REG_8BIT(0x364d), 0x0d},
228 {OV5693_REG_8BIT(0x364f), 0xdd},
229 {OV5693_REG_8BIT(0x3660), 0x04},
230 {OV5693_REG_8BIT(0x3662), 0x10},
231 {OV5693_REG_8BIT(0x3663), 0xf1},
232 {OV5693_REG_8BIT(0x3665), 0x00},
233 {OV5693_REG_8BIT(0x3666), 0x20},
234 {OV5693_REG_8BIT(0x3667), 0x00},
235 {OV5693_REG_8BIT(0x366a), 0x80},
236 {OV5693_REG_8BIT(0x3680), 0xe0},
237 {OV5693_REG_8BIT(0x3681), 0x00},
238 {OV5693_REG_8BIT(0x3700), 0x42},
239 {OV5693_REG_8BIT(0x3701), 0x14},
240 {OV5693_REG_8BIT(0x3702), 0xa0},
241 {OV5693_REG_8BIT(0x3703), 0xd8},
242 {OV5693_REG_8BIT(0x3704), 0x78},
243 {OV5693_REG_8BIT(0x3705), 0x02},
244 {OV5693_REG_8BIT(0x370a), 0x00},
245 {OV5693_REG_8BIT(0x370b), 0x20},
246 {OV5693_REG_8BIT(0x370c), 0x0c},
247 {OV5693_REG_8BIT(0x370d), 0x11},
248 {OV5693_REG_8BIT(0x370e), 0x00},
249 {OV5693_REG_8BIT(0x370f), 0x40},
250 {OV5693_REG_8BIT(0x3710), 0x00},
251 {OV5693_REG_8BIT(0x371a), 0x1c},
252 {OV5693_REG_8BIT(0x371b), 0x05},
253 {OV5693_REG_8BIT(0x371c), 0x01},
254 {OV5693_REG_8BIT(0x371e), 0xa1},
255 {OV5693_REG_8BIT(0x371f), 0x0c},
256 {OV5693_REG_8BIT(0x3721), 0x00},
257 {OV5693_REG_8BIT(0x3724), 0x10},
258 {OV5693_REG_8BIT(0x3726), 0x00},
259 {OV5693_REG_8BIT(0x372a), 0x01},
260 {OV5693_REG_8BIT(0x3730), 0x10},
261 {OV5693_REG_8BIT(0x3738), 0x22},
262 {OV5693_REG_8BIT(0x3739), 0xe5},
263 {OV5693_REG_8BIT(0x373a), 0x50},
264 {OV5693_REG_8BIT(0x373b), 0x02},
265 {OV5693_REG_8BIT(0x373c), 0x41},
266 {OV5693_REG_8BIT(0x373f), 0x02},
267 {OV5693_REG_8BIT(0x3740), 0x42},
268 {OV5693_REG_8BIT(0x3741), 0x02},
269 {OV5693_REG_8BIT(0x3742), 0x18},
270 {OV5693_REG_8BIT(0x3743), 0x01},
271 {OV5693_REG_8BIT(0x3744), 0x02},
272 {OV5693_REG_8BIT(0x3747), 0x10},
273 {OV5693_REG_8BIT(0x374c), 0x04},
274 {OV5693_REG_8BIT(0x3751), 0xf0},
275 {OV5693_REG_8BIT(0x3752), 0x00},
276 {OV5693_REG_8BIT(0x3753), 0x00},
277 {OV5693_REG_8BIT(0x3754), 0xc0},
278 {OV5693_REG_8BIT(0x3755), 0x00},
279 {OV5693_REG_8BIT(0x3756), 0x1a},
280 {OV5693_REG_8BIT(0x3758), 0x00},
281 {OV5693_REG_8BIT(0x3759), 0x0f},
282 {OV5693_REG_8BIT(0x376b), 0x44},
283 {OV5693_REG_8BIT(0x375c), 0x04},
284 {OV5693_REG_8BIT(0x3774), 0x10},
285 {OV5693_REG_8BIT(0x3776), 0x00},
286 {OV5693_REG_8BIT(0x377f), 0x08},
287 {OV5693_REG_8BIT(0x3780), 0x22},
288 {OV5693_REG_8BIT(0x3781), 0x0c},
289 {OV5693_REG_8BIT(0x3784), 0x2c},
290 {OV5693_REG_8BIT(0x3785), 0x1e},
291 {OV5693_REG_8BIT(0x378f), 0xf5},
292 {OV5693_REG_8BIT(0x3791), 0xb0},
293 {OV5693_REG_8BIT(0x3795), 0x00},
294 {OV5693_REG_8BIT(0x3796), 0x64},
295 {OV5693_REG_8BIT(0x3797), 0x11},
296 {OV5693_REG_8BIT(0x3798), 0x30},
297 {OV5693_REG_8BIT(0x3799), 0x41},
298 {OV5693_REG_8BIT(0x379a), 0x07},
299 {OV5693_REG_8BIT(0x379b), 0xb0},
300 {OV5693_REG_8BIT(0x379c), 0x0c},
301 {OV5693_REG_8BIT(0x3a04), 0x06},
302 {OV5693_REG_8BIT(0x3a05), 0x14},
303 {OV5693_REG_8BIT(0x3e07), 0x20},
304 {OV5693_REG_8BIT(0x4000), 0x08},
305 {OV5693_REG_8BIT(0x4001), 0x04},
306 {OV5693_REG_8BIT(0x4004), 0x08},
307 {OV5693_REG_8BIT(0x4006), 0x20},
308 {OV5693_REG_8BIT(0x4008), 0x24},
309 {OV5693_REG_8BIT(0x4009), 0x10},
310 {OV5693_REG_8BIT(0x4058), 0x00},
311 {OV5693_REG_8BIT(0x4101), 0xb2},
312 {OV5693_REG_8BIT(0x4307), 0x31},
313 {OV5693_REG_8BIT(0x4511), 0x05},
314 {OV5693_REG_8BIT(0x4512), 0x01},
315 {OV5693_REG_8BIT(0x481f), 0x30},
316 {OV5693_REG_8BIT(0x4826), 0x2c},
317 {OV5693_REG_8BIT(0x4d02), 0xfd},
318 {OV5693_REG_8BIT(0x4d03), 0xf5},
319 {OV5693_REG_8BIT(0x4d04), 0x0c},
320 {OV5693_REG_8BIT(0x4d05), 0xcc},
321 {OV5693_REG_8BIT(0x4837), 0x0a},
322 {OV5693_REG_8BIT(0x5003), 0x20},
323 {OV5693_REG_8BIT(0x5013), 0x00},
324 {OV5693_REG_8BIT(0x5842), 0x01},
325 {OV5693_REG_8BIT(0x5843), 0x2b},
326 {OV5693_REG_8BIT(0x5844), 0x01},
327 {OV5693_REG_8BIT(0x5845), 0x92},
328 {OV5693_REG_8BIT(0x5846), 0x01},
329 {OV5693_REG_8BIT(0x5847), 0x8f},
330 {OV5693_REG_8BIT(0x5848), 0x01},
331 {OV5693_REG_8BIT(0x5849), 0x0c},
332 {OV5693_REG_8BIT(0x5e10), 0x0c},
333 {OV5693_REG_8BIT(0x3820), 0x00},
334 {OV5693_REG_8BIT(0x3821), 0x1e},
335 {OV5693_REG_8BIT(0x5041), 0x14}
338 static const struct ov5693_reg_list ov5693_global_setting = {
339 .num_regs = ARRAY_SIZE(ov5693_global_regs),
340 .regs = ov5693_global_regs,
343 static const struct v4l2_rect ov5693_default_crop = {
344 .left = OV5693_ACTIVE_START_LEFT,
345 .top = OV5693_ACTIVE_START_TOP,
346 .width = OV5693_ACTIVE_WIDTH,
347 .height = OV5693_ACTIVE_HEIGHT,
350 static const struct v4l2_mbus_framefmt ov5693_default_fmt = {
351 .width = OV5693_ACTIVE_WIDTH,
352 .height = OV5693_ACTIVE_HEIGHT,
353 .code = MEDIA_BUS_FMT_SBGGR10_1X10,
356 static const s64 link_freq_menu_items[] = {
357 OV5693_LINK_FREQ_419_2MHZ
360 static const char * const ov5693_test_pattern_menu[] = {
364 "Colour Bars with Rolling Bar"
367 static const u8 ov5693_test_pattern_bits[] = {
369 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_RANDOM,
370 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS,
371 OV5693_TEST_PATTERN_ENABLE | OV5693_TEST_PATTERN_BARS |
372 OV5693_TEST_PATTERN_ROLLING,
375 /* I2C I/O Operations */
377 static int ov5693_read_reg(struct ov5693_device *ov5693, u32 addr, u32 *value)
379 struct i2c_client *client = ov5693->client;
382 struct i2c_msg msg[] = {
384 .addr = client->addr,
390 .addr = client->addr,
395 unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
399 reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
403 ret = i2c_transfer(client->adapter, msg, 2);
405 return dev_err_probe(&client->dev, ret,
406 "Failed to read register 0x%04x: %d\n",
407 addr & OV5693_REG_ADDR_MASK, ret);
410 for (i = 0; i < len; ++i) {
418 static void ov5693_write_reg(struct ov5693_device *ov5693, u32 addr, u32 value,
421 struct i2c_client *client = ov5693->client;
426 struct i2c_msg msg = {
427 .addr = client->addr,
430 unsigned int len = ((addr >> OV5693_REG_SIZE_SHIFT) & 3);
437 buf.reg = cpu_to_be16(addr & OV5693_REG_ADDR_MASK);
438 for (i = 0; i < len; ++i) {
439 buf.val[len - i - 1] = value & 0xff;
445 ret = i2c_transfer(client->adapter, &msg, 1);
447 dev_err(&client->dev, "Failed to write register 0x%04x: %d\n",
448 addr & OV5693_REG_ADDR_MASK, ret);
453 static int ov5693_write_reg_array(struct ov5693_device *ov5693,
454 const struct ov5693_reg_list *reglist)
459 for (i = 0; i < reglist->num_regs; i++)
460 ov5693_write_reg(ov5693, reglist->regs[i].reg,
461 reglist->regs[i].val, &ret);
466 static int ov5693_update_bits(struct ov5693_device *ov5693, u32 address,
472 ret = ov5693_read_reg(ov5693, address, &value);
479 ov5693_write_reg(ov5693, address, value, &ret);
484 /* V4L2 Controls Functions */
486 static int ov5693_flip_vert_configure(struct ov5693_device *ov5693,
489 u8 bits = OV5693_FORMAT1_FLIP_VERT_ISP_EN |
490 OV5693_FORMAT1_FLIP_VERT_SENSOR_EN;
493 ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG, bits,
501 static int ov5693_flip_horz_configure(struct ov5693_device *ov5693,
504 u8 bits = OV5693_FORMAT2_FLIP_HORZ_ISP_EN |
505 OV5693_FORMAT2_FLIP_HORZ_SENSOR_EN;
508 ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG, bits,
516 static int ov5693_get_exposure(struct ov5693_device *ov5693, s32 *value)
521 ret = ov5693_read_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, &exposure);
525 /* The lowest 4 bits are unsupported fractional bits */
526 *value = exposure >> 4;
531 static int ov5693_exposure_configure(struct ov5693_device *ov5693,
536 exposure = (exposure << 4) & OV5693_EXPOSURE_CTRL_MASK;
538 ov5693_write_reg(ov5693, OV5693_EXPOSURE_CTRL_REG, exposure, &ret);
543 static int ov5693_get_gain(struct ov5693_device *ov5693, u32 *gain)
548 ret = ov5693_read_reg(ov5693, OV5693_GAIN_CTRL_REG, &value);
552 /* As with exposure, the lowest 4 bits are fractional bits. */
558 static int ov5693_digital_gain_configure(struct ov5693_device *ov5693,
563 gain &= OV5693_MWB_GAIN_MASK;
565 ov5693_write_reg(ov5693, OV5693_MWB_RED_GAIN_REG, gain, &ret);
566 ov5693_write_reg(ov5693, OV5693_MWB_GREEN_GAIN_REG, gain, &ret);
567 ov5693_write_reg(ov5693, OV5693_MWB_BLUE_GAIN_REG, gain, &ret);
572 static int ov5693_analog_gain_configure(struct ov5693_device *ov5693, u32 gain)
576 gain = (gain << 4) & OV5693_GAIN_CTRL_MASK;
578 ov5693_write_reg(ov5693, OV5693_GAIN_CTRL_REG, gain, &ret);
583 static int ov5693_vts_configure(struct ov5693_device *ov5693, u32 vblank)
585 u16 vts = ov5693->mode.format.height + vblank;
588 ov5693_write_reg(ov5693, OV5693_TIMING_VTS_REG, vts, &ret);
593 static int ov5693_test_pattern_configure(struct ov5693_device *ov5693, u32 idx)
597 ov5693_write_reg(ov5693, OV5693_TEST_PATTERN_REG,
598 ov5693_test_pattern_bits[idx], &ret);
603 static int ov5693_s_ctrl(struct v4l2_ctrl *ctrl)
605 struct ov5693_device *ov5693 =
606 container_of(ctrl->handler, struct ov5693_device, ctrls.handler);
609 /* If VBLANK is altered we need to update exposure to compensate */
610 if (ctrl->id == V4L2_CID_VBLANK) {
613 exposure_max = ov5693->mode.format.height + ctrl->val -
614 OV5693_INTEGRATION_TIME_MARGIN;
615 __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
616 ov5693->ctrls.exposure->minimum,
618 ov5693->ctrls.exposure->step,
619 min(ov5693->ctrls.exposure->val,
623 /* Only apply changes to the controls if the device is powered up */
624 if (!pm_runtime_get_if_in_use(ov5693->dev))
628 case V4L2_CID_EXPOSURE:
629 ret = ov5693_exposure_configure(ov5693, ctrl->val);
631 case V4L2_CID_ANALOGUE_GAIN:
632 ret = ov5693_analog_gain_configure(ov5693, ctrl->val);
634 case V4L2_CID_DIGITAL_GAIN:
635 ret = ov5693_digital_gain_configure(ov5693, ctrl->val);
638 ret = ov5693_flip_horz_configure(ov5693, !!ctrl->val);
641 ret = ov5693_flip_vert_configure(ov5693, !!ctrl->val);
643 case V4L2_CID_VBLANK:
644 ret = ov5693_vts_configure(ov5693, ctrl->val);
646 case V4L2_CID_TEST_PATTERN:
647 ret = ov5693_test_pattern_configure(ov5693, ctrl->val);
653 pm_runtime_put(ov5693->dev);
658 static int ov5693_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
660 struct ov5693_device *ov5693 = container_of(ctrl->handler,
661 struct ov5693_device,
665 case V4L2_CID_EXPOSURE_ABSOLUTE:
666 return ov5693_get_exposure(ov5693, &ctrl->val);
667 case V4L2_CID_AUTOGAIN:
668 return ov5693_get_gain(ov5693, &ctrl->val);
674 static const struct v4l2_ctrl_ops ov5693_ctrl_ops = {
675 .s_ctrl = ov5693_s_ctrl,
676 .g_volatile_ctrl = ov5693_g_volatile_ctrl
679 /* System Control Functions */
681 static int ov5693_mode_configure(struct ov5693_device *ov5693)
683 const struct ov5693_mode *mode = &ov5693->mode;
687 ov5693_write_reg(ov5693, OV5693_CROP_START_X_REG, mode->crop.left,
691 ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret);
694 ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_X_REG, mode->format.width,
698 ov5693_write_reg(ov5693, OV5693_CROP_END_X_REG,
699 mode->crop.left + mode->crop.width, &ret);
701 /* Horizontal Total Size */
702 ov5693_write_reg(ov5693, OV5693_TIMING_HTS_REG, OV5693_FIXED_PPL,
706 ov5693_write_reg(ov5693, OV5693_CROP_START_Y_REG, mode->crop.top,
710 ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret);
713 ov5693_write_reg(ov5693, OV5693_OUTPUT_SIZE_Y_REG, mode->format.height,
717 ov5693_write_reg(ov5693, OV5693_CROP_END_Y_REG,
718 mode->crop.top + mode->crop.height, &ret);
720 /* Subsample X increase */
721 ov5693_write_reg(ov5693, OV5693_SUB_INC_X_REG,
722 ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret);
723 /* Subsample Y increase */
724 ov5693_write_reg(ov5693, OV5693_SUB_INC_Y_REG,
725 ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret);
731 ret = ov5693_update_bits(ov5693, OV5693_FORMAT1_REG,
732 OV5693_FORMAT1_VBIN_EN,
733 mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0);
737 ret = ov5693_update_bits(ov5693, OV5693_FORMAT2_REG,
738 OV5693_FORMAT2_HBIN_EN,
739 mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0);
744 static int ov5693_enable_streaming(struct ov5693_device *ov5693, bool enable)
748 ov5693_write_reg(ov5693, OV5693_SW_STREAM_REG,
749 enable ? OV5693_START_STREAMING :
750 OV5693_STOP_STREAMING, &ret);
755 static int ov5693_sw_reset(struct ov5693_device *ov5693)
759 ov5693_write_reg(ov5693, OV5693_SW_RESET_REG, OV5693_SW_RESET, &ret);
764 static int ov5693_sensor_init(struct ov5693_device *ov5693)
768 ret = ov5693_sw_reset(ov5693);
770 return dev_err_probe(ov5693->dev, ret,
771 "software reset error\n");
773 ret = ov5693_write_reg_array(ov5693, &ov5693_global_setting);
775 return dev_err_probe(ov5693->dev, ret,
776 "global settings error\n");
778 ret = ov5693_mode_configure(ov5693);
780 return dev_err_probe(ov5693->dev, ret,
781 "mode configure error\n");
783 ret = ov5693_enable_streaming(ov5693, false);
785 dev_err(ov5693->dev, "stop streaming error\n");
790 static void ov5693_sensor_powerdown(struct ov5693_device *ov5693)
792 gpiod_set_value_cansleep(ov5693->reset, 1);
793 gpiod_set_value_cansleep(ov5693->powerdown, 1);
795 regulator_bulk_disable(OV5693_NUM_SUPPLIES, ov5693->supplies);
797 clk_disable_unprepare(ov5693->xvclk);
800 static int ov5693_sensor_powerup(struct ov5693_device *ov5693)
804 gpiod_set_value_cansleep(ov5693->reset, 1);
805 gpiod_set_value_cansleep(ov5693->powerdown, 1);
807 ret = clk_prepare_enable(ov5693->xvclk);
809 dev_err(ov5693->dev, "Failed to enable clk\n");
813 ret = regulator_bulk_enable(OV5693_NUM_SUPPLIES, ov5693->supplies);
815 dev_err(ov5693->dev, "Failed to enable regulators\n");
819 gpiod_set_value_cansleep(ov5693->powerdown, 0);
820 gpiod_set_value_cansleep(ov5693->reset, 0);
822 usleep_range(5000, 7500);
827 ov5693_sensor_powerdown(ov5693);
831 static int __maybe_unused ov5693_sensor_suspend(struct device *dev)
833 struct v4l2_subdev *sd = dev_get_drvdata(dev);
834 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
836 ov5693_sensor_powerdown(ov5693);
841 static int __maybe_unused ov5693_sensor_resume(struct device *dev)
843 struct v4l2_subdev *sd = dev_get_drvdata(dev);
844 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
847 mutex_lock(&ov5693->lock);
849 ret = ov5693_sensor_powerup(ov5693);
853 ret = ov5693_sensor_init(ov5693);
855 dev_err(dev, "ov5693 sensor init failure\n");
862 ov5693_sensor_powerdown(ov5693);
864 mutex_unlock(&ov5693->lock);
868 static int ov5693_detect(struct ov5693_device *ov5693)
873 ret = ov5693_read_reg(ov5693, OV5693_REG_CHIP_ID, &id);
877 if (id != OV5693_CHIP_ID)
878 return dev_err_probe(ov5693->dev, -ENODEV,
879 "sensor ID mismatch. Found 0x%04x\n", id);
884 /* V4L2 Framework callbacks */
886 static unsigned int __ov5693_calc_vts(u32 height)
889 * We need to set a sensible default VTS for whatever format height we
890 * happen to be given from set_fmt(). This function just targets
891 * an even multiple of 30fps.
894 unsigned int tgt_fps;
896 tgt_fps = rounddown(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / height, 30);
898 return ALIGN_DOWN(OV5693_PIXEL_RATE / OV5693_FIXED_PPL / tgt_fps, 2);
901 static struct v4l2_mbus_framefmt *
902 __ov5693_get_pad_format(struct ov5693_device *ov5693,
903 struct v4l2_subdev_state *state,
904 unsigned int pad, enum v4l2_subdev_format_whence which)
907 case V4L2_SUBDEV_FORMAT_TRY:
908 return v4l2_subdev_get_try_format(&ov5693->sd, state, pad);
909 case V4L2_SUBDEV_FORMAT_ACTIVE:
910 return &ov5693->mode.format;
916 static struct v4l2_rect *
917 __ov5693_get_pad_crop(struct ov5693_device *ov5693,
918 struct v4l2_subdev_state *state,
919 unsigned int pad, enum v4l2_subdev_format_whence which)
922 case V4L2_SUBDEV_FORMAT_TRY:
923 return v4l2_subdev_get_try_crop(&ov5693->sd, state, pad);
924 case V4L2_SUBDEV_FORMAT_ACTIVE:
925 return &ov5693->mode.crop;
931 static int ov5693_get_fmt(struct v4l2_subdev *sd,
932 struct v4l2_subdev_state *state,
933 struct v4l2_subdev_format *format)
935 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
937 format->format = ov5693->mode.format;
942 static int ov5693_set_fmt(struct v4l2_subdev *sd,
943 struct v4l2_subdev_state *state,
944 struct v4l2_subdev_format *format)
946 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
947 const struct v4l2_rect *crop;
948 struct v4l2_mbus_framefmt *fmt;
949 unsigned int hratio, vratio;
950 unsigned int width, height;
954 crop = __ov5693_get_pad_crop(ov5693, state, format->pad, format->which);
957 * Align to two to simplify the binning calculations below, and clamp
958 * the requested format at the crop rectangle
960 width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
961 OV5693_MIN_CROP_WIDTH, crop->width);
962 height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
963 OV5693_MIN_CROP_HEIGHT, crop->height);
966 * We can only support setting either the dimensions of the crop rect
967 * or those dimensions binned (separately) by a factor of two.
969 hratio = clamp_t(unsigned int,
970 DIV_ROUND_CLOSEST(crop->width, width), 1, 2);
971 vratio = clamp_t(unsigned int,
972 DIV_ROUND_CLOSEST(crop->height, height), 1, 2);
974 fmt = __ov5693_get_pad_format(ov5693, state, format->pad,
977 fmt->width = crop->width / hratio;
978 fmt->height = crop->height / vratio;
979 fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
981 format->format = *fmt;
983 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
986 mutex_lock(&ov5693->lock);
988 ov5693->mode.binning_x = hratio > 1;
989 ov5693->mode.inc_x_odd = hratio > 1 ? 3 : 1;
990 ov5693->mode.binning_y = vratio > 1;
991 ov5693->mode.inc_y_odd = vratio > 1 ? 3 : 1;
993 ov5693->mode.vts = __ov5693_calc_vts(fmt->height);
995 __v4l2_ctrl_modify_range(ov5693->ctrls.vblank,
996 OV5693_TIMING_MIN_VTS,
997 OV5693_TIMING_MAX_VTS - fmt->height,
998 1, ov5693->mode.vts - fmt->height);
999 __v4l2_ctrl_s_ctrl(ov5693->ctrls.vblank,
1000 ov5693->mode.vts - fmt->height);
1002 hblank = OV5693_FIXED_PPL - fmt->width;
1003 __v4l2_ctrl_modify_range(ov5693->ctrls.hblank, hblank, hblank, 1,
1006 exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1007 __v4l2_ctrl_modify_range(ov5693->ctrls.exposure,
1008 ov5693->ctrls.exposure->minimum, exposure_max,
1009 ov5693->ctrls.exposure->step,
1010 min(ov5693->ctrls.exposure->val,
1013 mutex_unlock(&ov5693->lock);
1017 static int ov5693_get_selection(struct v4l2_subdev *sd,
1018 struct v4l2_subdev_state *state,
1019 struct v4l2_subdev_selection *sel)
1021 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1023 switch (sel->target) {
1024 case V4L2_SEL_TGT_CROP:
1025 mutex_lock(&ov5693->lock);
1026 sel->r = *__ov5693_get_pad_crop(ov5693, state, sel->pad,
1028 mutex_unlock(&ov5693->lock);
1030 case V4L2_SEL_TGT_NATIVE_SIZE:
1033 sel->r.width = OV5693_NATIVE_WIDTH;
1034 sel->r.height = OV5693_NATIVE_HEIGHT;
1036 case V4L2_SEL_TGT_CROP_BOUNDS:
1037 case V4L2_SEL_TGT_CROP_DEFAULT:
1038 sel->r.top = OV5693_ACTIVE_START_TOP;
1039 sel->r.left = OV5693_ACTIVE_START_LEFT;
1040 sel->r.width = OV5693_ACTIVE_WIDTH;
1041 sel->r.height = OV5693_ACTIVE_HEIGHT;
1050 static int ov5693_set_selection(struct v4l2_subdev *sd,
1051 struct v4l2_subdev_state *state,
1052 struct v4l2_subdev_selection *sel)
1054 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1055 struct v4l2_mbus_framefmt *format;
1056 struct v4l2_rect *__crop;
1057 struct v4l2_rect rect;
1059 if (sel->target != V4L2_SEL_TGT_CROP)
1063 * Clamp the boundaries of the crop rectangle to the size of the sensor
1064 * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't
1067 rect.left = clamp(ALIGN(sel->r.left, 2), OV5693_NATIVE_START_LEFT,
1068 OV5693_NATIVE_WIDTH);
1069 rect.top = clamp(ALIGN(sel->r.top, 2), OV5693_NATIVE_START_TOP,
1070 OV5693_NATIVE_HEIGHT);
1071 rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
1072 OV5693_MIN_CROP_WIDTH, OV5693_NATIVE_WIDTH);
1073 rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
1074 OV5693_MIN_CROP_HEIGHT, OV5693_NATIVE_HEIGHT);
1076 /* Make sure the crop rectangle isn't outside the bounds of the array */
1077 rect.width = min_t(unsigned int, rect.width,
1078 OV5693_NATIVE_WIDTH - rect.left);
1079 rect.height = min_t(unsigned int, rect.height,
1080 OV5693_NATIVE_HEIGHT - rect.top);
1082 __crop = __ov5693_get_pad_crop(ov5693, state, sel->pad, sel->which);
1084 if (rect.width != __crop->width || rect.height != __crop->height) {
1086 * Reset the output image size if the crop rectangle size has
1089 format = __ov5693_get_pad_format(ov5693, state, sel->pad,
1091 format->width = rect.width;
1092 format->height = rect.height;
1101 static int ov5693_s_stream(struct v4l2_subdev *sd, int enable)
1103 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1107 ret = pm_runtime_get_sync(ov5693->dev);
1109 goto err_power_down;
1111 mutex_lock(&ov5693->lock);
1112 ret = __v4l2_ctrl_handler_setup(&ov5693->ctrls.handler);
1114 mutex_unlock(&ov5693->lock);
1115 goto err_power_down;
1118 ret = ov5693_enable_streaming(ov5693, true);
1119 mutex_unlock(&ov5693->lock);
1121 mutex_lock(&ov5693->lock);
1122 ret = ov5693_enable_streaming(ov5693, false);
1123 mutex_unlock(&ov5693->lock);
1126 goto err_power_down;
1128 ov5693->streaming = !!enable;
1131 pm_runtime_put(ov5693->dev);
1135 pm_runtime_put_noidle(ov5693->dev);
1139 static int ov5693_g_frame_interval(struct v4l2_subdev *sd,
1140 struct v4l2_subdev_frame_interval *interval)
1142 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1143 unsigned int framesize = OV5693_FIXED_PPL * (ov5693->mode.format.height +
1144 ov5693->ctrls.vblank->val);
1145 unsigned int fps = DIV_ROUND_CLOSEST(OV5693_PIXEL_RATE, framesize);
1147 interval->interval.numerator = 1;
1148 interval->interval.denominator = fps;
1153 static int ov5693_enum_mbus_code(struct v4l2_subdev *sd,
1154 struct v4l2_subdev_state *state,
1155 struct v4l2_subdev_mbus_code_enum *code)
1157 /* Only a single mbus format is supported */
1158 if (code->index > 0)
1161 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1165 static int ov5693_enum_frame_size(struct v4l2_subdev *sd,
1166 struct v4l2_subdev_state *state,
1167 struct v4l2_subdev_frame_size_enum *fse)
1169 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1170 struct v4l2_rect *__crop;
1172 if (fse->index > 1 || fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
1175 __crop = __ov5693_get_pad_crop(ov5693, state, fse->pad, fse->which);
1179 fse->min_width = __crop->width / (fse->index + 1);
1180 fse->min_height = __crop->height / (fse->index + 1);
1181 fse->max_width = fse->min_width;
1182 fse->max_height = fse->min_height;
1187 static const struct v4l2_subdev_video_ops ov5693_video_ops = {
1188 .s_stream = ov5693_s_stream,
1189 .g_frame_interval = ov5693_g_frame_interval,
1192 static const struct v4l2_subdev_pad_ops ov5693_pad_ops = {
1193 .enum_mbus_code = ov5693_enum_mbus_code,
1194 .enum_frame_size = ov5693_enum_frame_size,
1195 .get_fmt = ov5693_get_fmt,
1196 .set_fmt = ov5693_set_fmt,
1197 .get_selection = ov5693_get_selection,
1198 .set_selection = ov5693_set_selection,
1201 static const struct v4l2_subdev_ops ov5693_ops = {
1202 .video = &ov5693_video_ops,
1203 .pad = &ov5693_pad_ops,
1206 /* Sensor and Driver Configuration Functions */
1208 static int ov5693_init_controls(struct ov5693_device *ov5693)
1210 const struct v4l2_ctrl_ops *ops = &ov5693_ctrl_ops;
1211 struct ov5693_v4l2_ctrls *ctrls = &ov5693->ctrls;
1212 struct v4l2_fwnode_device_properties props;
1213 int vblank_max, vblank_def;
1218 ret = v4l2_ctrl_handler_init(&ctrls->handler, 12);
1223 ctrls->link_freq = v4l2_ctrl_new_int_menu(&ctrls->handler,
1224 NULL, V4L2_CID_LINK_FREQ,
1225 0, 0, link_freq_menu_items);
1226 if (ctrls->link_freq)
1227 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1230 ctrls->pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, NULL,
1231 V4L2_CID_PIXEL_RATE, 0,
1232 OV5693_PIXEL_RATE, 1,
1236 exposure_max = ov5693->mode.vts - OV5693_INTEGRATION_TIME_MARGIN;
1237 ctrls->exposure = v4l2_ctrl_new_std(&ctrls->handler, ops,
1239 OV5693_EXPOSURE_MIN, exposure_max,
1240 OV5693_EXPOSURE_STEP, exposure_max);
1243 ctrls->analogue_gain = v4l2_ctrl_new_std(&ctrls->handler,
1244 ops, V4L2_CID_ANALOGUE_GAIN,
1250 ctrls->digital_gain = v4l2_ctrl_new_std(&ctrls->handler, ops,
1251 V4L2_CID_DIGITAL_GAIN,
1252 OV5693_DIGITAL_GAIN_MIN,
1253 OV5693_DIGITAL_GAIN_MAX,
1254 OV5693_DIGITAL_GAIN_STEP,
1255 OV5693_DIGITAL_GAIN_DEF);
1258 ctrls->hflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1259 V4L2_CID_HFLIP, 0, 1, 1, 0);
1261 ctrls->vflip = v4l2_ctrl_new_std(&ctrls->handler, ops,
1262 V4L2_CID_VFLIP, 0, 1, 1, 0);
1264 hblank = OV5693_FIXED_PPL - ov5693->mode.format.width;
1265 ctrls->hblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1266 V4L2_CID_HBLANK, hblank,
1270 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1272 vblank_max = OV5693_TIMING_MAX_VTS - ov5693->mode.format.height;
1273 vblank_def = ov5693->mode.vts - ov5693->mode.format.height;
1274 ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, ops,
1276 OV5693_TIMING_MIN_VTS,
1277 vblank_max, 1, vblank_def);
1279 ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(
1280 &ctrls->handler, ops,
1281 V4L2_CID_TEST_PATTERN,
1282 ARRAY_SIZE(ov5693_test_pattern_menu) - 1,
1283 0, 0, ov5693_test_pattern_menu);
1285 if (ctrls->handler.error) {
1286 dev_err(ov5693->dev, "Error initialising v4l2 ctrls\n");
1287 ret = ctrls->handler.error;
1288 goto err_free_handler;
1291 /* set properties from fwnode (e.g. rotation, orientation) */
1292 ret = v4l2_fwnode_device_parse(ov5693->dev, &props);
1294 goto err_free_handler;
1296 ret = v4l2_ctrl_new_fwnode_properties(&ctrls->handler, ops,
1299 goto err_free_handler;
1301 /* Use same lock for controls as for everything else. */
1302 ctrls->handler.lock = &ov5693->lock;
1303 ov5693->sd.ctrl_handler = &ctrls->handler;
1308 v4l2_ctrl_handler_free(&ctrls->handler);
1312 static int ov5693_configure_gpios(struct ov5693_device *ov5693)
1314 ov5693->reset = devm_gpiod_get_optional(ov5693->dev, "reset",
1316 if (IS_ERR(ov5693->reset)) {
1317 dev_err(ov5693->dev, "Error fetching reset GPIO\n");
1318 return PTR_ERR(ov5693->reset);
1321 ov5693->powerdown = devm_gpiod_get_optional(ov5693->dev, "powerdown",
1323 if (IS_ERR(ov5693->powerdown)) {
1324 dev_err(ov5693->dev, "Error fetching powerdown GPIO\n");
1325 return PTR_ERR(ov5693->powerdown);
1331 static int ov5693_get_regulators(struct ov5693_device *ov5693)
1335 for (i = 0; i < OV5693_NUM_SUPPLIES; i++)
1336 ov5693->supplies[i].supply = ov5693_supply_names[i];
1338 return devm_regulator_bulk_get(ov5693->dev, OV5693_NUM_SUPPLIES,
1342 static int ov5693_check_hwcfg(struct ov5693_device *ov5693)
1344 struct fwnode_handle *fwnode = dev_fwnode(ov5693->dev);
1345 struct v4l2_fwnode_endpoint bus_cfg = {
1346 .bus_type = V4L2_MBUS_CSI2_DPHY,
1348 struct fwnode_handle *endpoint;
1352 endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL);
1354 return -EPROBE_DEFER; /* Could be provided by cio2-bridge */
1356 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg);
1357 fwnode_handle_put(endpoint);
1361 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1362 dev_err(ov5693->dev, "only a 2-lane CSI2 config is supported");
1364 goto out_free_bus_cfg;
1367 if (!bus_cfg.nr_of_link_frequencies) {
1368 dev_err(ov5693->dev, "no link frequencies defined\n");
1370 goto out_free_bus_cfg;
1373 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)
1374 if (bus_cfg.link_frequencies[i] == OV5693_LINK_FREQ_419_2MHZ)
1377 if (i == bus_cfg.nr_of_link_frequencies) {
1378 dev_err(ov5693->dev, "supported link freq %ull not found\n",
1379 OV5693_LINK_FREQ_419_2MHZ);
1381 goto out_free_bus_cfg;
1385 v4l2_fwnode_endpoint_free(&bus_cfg);
1390 static int ov5693_probe(struct i2c_client *client)
1392 struct ov5693_device *ov5693;
1396 ov5693 = devm_kzalloc(&client->dev, sizeof(*ov5693), GFP_KERNEL);
1400 ov5693->client = client;
1401 ov5693->dev = &client->dev;
1403 ret = ov5693_check_hwcfg(ov5693);
1407 mutex_init(&ov5693->lock);
1409 v4l2_i2c_subdev_init(&ov5693->sd, client, &ov5693_ops);
1411 ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk");
1412 if (IS_ERR(ov5693->xvclk))
1413 return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk),
1414 "failed to get xvclk: %ld\n",
1415 PTR_ERR(ov5693->xvclk));
1417 if (ov5693->xvclk) {
1418 xvclk_rate = clk_get_rate(ov5693->xvclk);
1420 ret = fwnode_property_read_u32(dev_fwnode(&client->dev),
1425 dev_err(&client->dev, "can't get clock frequency");
1430 if (xvclk_rate != OV5693_XVCLK_FREQ)
1431 dev_warn(&client->dev, "Found clk freq %u, expected %u\n",
1432 xvclk_rate, OV5693_XVCLK_FREQ);
1434 ret = ov5693_configure_gpios(ov5693);
1438 ret = ov5693_get_regulators(ov5693);
1440 return dev_err_probe(&client->dev, ret,
1441 "Error fetching regulators\n");
1443 ov5693->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1444 ov5693->pad.flags = MEDIA_PAD_FL_SOURCE;
1445 ov5693->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1447 ov5693->mode.crop = ov5693_default_crop;
1448 ov5693->mode.format = ov5693_default_fmt;
1449 ov5693->mode.vts = __ov5693_calc_vts(ov5693->mode.format.height);
1451 ret = ov5693_init_controls(ov5693);
1455 ret = media_entity_pads_init(&ov5693->sd.entity, 1, &ov5693->pad);
1457 goto err_ctrl_handler_free;
1460 * We need the driver to work in the event that pm runtime is disable in
1461 * the kernel, so power up and verify the chip now. In the event that
1462 * runtime pm is disabled this will leave the chip on, so that streaming
1466 ret = ov5693_sensor_powerup(ov5693);
1468 goto err_media_entity_cleanup;
1470 ret = ov5693_detect(ov5693);
1474 pm_runtime_set_active(&client->dev);
1475 pm_runtime_get_noresume(&client->dev);
1476 pm_runtime_enable(&client->dev);
1478 ret = v4l2_async_register_subdev_sensor(&ov5693->sd);
1480 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1482 goto err_pm_runtime;
1485 pm_runtime_set_autosuspend_delay(&client->dev, 1000);
1486 pm_runtime_use_autosuspend(&client->dev);
1487 pm_runtime_put_autosuspend(&client->dev);
1492 pm_runtime_disable(&client->dev);
1493 pm_runtime_put_noidle(&client->dev);
1495 ov5693_sensor_powerdown(ov5693);
1496 err_media_entity_cleanup:
1497 media_entity_cleanup(&ov5693->sd.entity);
1498 err_ctrl_handler_free:
1499 v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1504 static void ov5693_remove(struct i2c_client *client)
1506 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1507 struct ov5693_device *ov5693 = to_ov5693_sensor(sd);
1509 v4l2_async_unregister_subdev(sd);
1510 media_entity_cleanup(&ov5693->sd.entity);
1511 v4l2_ctrl_handler_free(&ov5693->ctrls.handler);
1512 mutex_destroy(&ov5693->lock);
1515 * Disable runtime PM. In case runtime PM is disabled in the kernel,
1516 * make sure to turn power off manually.
1518 pm_runtime_disable(&client->dev);
1519 if (!pm_runtime_status_suspended(&client->dev))
1520 ov5693_sensor_powerdown(ov5693);
1521 pm_runtime_set_suspended(&client->dev);
1524 static const struct dev_pm_ops ov5693_pm_ops = {
1525 SET_RUNTIME_PM_OPS(ov5693_sensor_suspend, ov5693_sensor_resume, NULL)
1528 static const struct acpi_device_id ov5693_acpi_match[] = {
1532 MODULE_DEVICE_TABLE(acpi, ov5693_acpi_match);
1534 static const struct of_device_id ov5693_of_match[] = {
1535 { .compatible = "ovti,ov5693", },
1538 MODULE_DEVICE_TABLE(of, ov5693_of_match);
1540 static struct i2c_driver ov5693_driver = {
1543 .acpi_match_table = ov5693_acpi_match,
1544 .of_match_table = ov5693_of_match,
1545 .pm = &ov5693_pm_ops,
1547 .probe_new = ov5693_probe,
1548 .remove = ov5693_remove,
1550 module_i2c_driver(ov5693_driver);
1552 MODULE_DESCRIPTION("A low-level driver for OmniVision 5693 sensors");
1553 MODULE_LICENSE("GPL");