1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN 6000000
30 #define OV5640_XCLK_MAX 54000000
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
34 #define OV5640_REG_SYS_RESET02 0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
36 #define OV5640_REG_SYS_CTRL0 0x3008
37 #define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
38 #define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
39 #define OV5640_REG_CHIP_ID 0x300a
40 #define OV5640_REG_IO_MIPI_CTRL00 0x300e
41 #define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
42 #define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
43 #define OV5640_REG_PAD_OUTPUT00 0x3019
44 #define OV5640_REG_SYSTEM_CONTROL1 0x302e
45 #define OV5640_REG_SC_PLL_CTRL0 0x3034
46 #define OV5640_REG_SC_PLL_CTRL1 0x3035
47 #define OV5640_REG_SC_PLL_CTRL2 0x3036
48 #define OV5640_REG_SC_PLL_CTRL3 0x3037
49 #define OV5640_REG_SLAVE_ID 0x3100
50 #define OV5640_REG_SCCB_SYS_CTRL1 0x3103
51 #define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
52 #define OV5640_REG_AWB_R_GAIN 0x3400
53 #define OV5640_REG_AWB_G_GAIN 0x3402
54 #define OV5640_REG_AWB_B_GAIN 0x3404
55 #define OV5640_REG_AWB_MANUAL_CTRL 0x3406
56 #define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
57 #define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
58 #define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
59 #define OV5640_REG_AEC_PK_MANUAL 0x3503
60 #define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
61 #define OV5640_REG_AEC_PK_VTS 0x350c
62 #define OV5640_REG_TIMING_DVPHO 0x3808
63 #define OV5640_REG_TIMING_DVPVO 0x380a
64 #define OV5640_REG_TIMING_HTS 0x380c
65 #define OV5640_REG_TIMING_VTS 0x380e
66 #define OV5640_REG_TIMING_TC_REG20 0x3820
67 #define OV5640_REG_TIMING_TC_REG21 0x3821
68 #define OV5640_REG_AEC_CTRL00 0x3a00
69 #define OV5640_REG_AEC_B50_STEP 0x3a08
70 #define OV5640_REG_AEC_B60_STEP 0x3a0a
71 #define OV5640_REG_AEC_CTRL0D 0x3a0d
72 #define OV5640_REG_AEC_CTRL0E 0x3a0e
73 #define OV5640_REG_AEC_CTRL0F 0x3a0f
74 #define OV5640_REG_AEC_CTRL10 0x3a10
75 #define OV5640_REG_AEC_CTRL11 0x3a11
76 #define OV5640_REG_AEC_CTRL1B 0x3a1b
77 #define OV5640_REG_AEC_CTRL1E 0x3a1e
78 #define OV5640_REG_AEC_CTRL1F 0x3a1f
79 #define OV5640_REG_HZ5060_CTRL00 0x3c00
80 #define OV5640_REG_HZ5060_CTRL01 0x3c01
81 #define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
82 #define OV5640_REG_FRAME_CTRL01 0x4202
83 #define OV5640_REG_FORMAT_CONTROL00 0x4300
84 #define OV5640_REG_VFIFO_HSIZE 0x4602
85 #define OV5640_REG_VFIFO_VSIZE 0x4604
86 #define OV5640_REG_JPG_MODE_SELECT 0x4713
87 #define OV5640_REG_CCIR656_CTRL00 0x4730
88 #define OV5640_REG_POLARITY_CTRL00 0x4740
89 #define OV5640_REG_MIPI_CTRL00 0x4800
90 #define OV5640_REG_DEBUG_MODE 0x4814
91 #define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
92 #define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
93 #define OV5640_REG_SDE_CTRL0 0x5580
94 #define OV5640_REG_SDE_CTRL1 0x5581
95 #define OV5640_REG_SDE_CTRL3 0x5583
96 #define OV5640_REG_SDE_CTRL4 0x5584
97 #define OV5640_REG_SDE_CTRL5 0x5585
98 #define OV5640_REG_AVG_READOUT 0x56a1
100 enum ov5640_mode_id {
101 OV5640_MODE_QCIF_176_144 = 0,
102 OV5640_MODE_QVGA_320_240,
103 OV5640_MODE_VGA_640_480,
104 OV5640_MODE_NTSC_720_480,
105 OV5640_MODE_PAL_720_576,
106 OV5640_MODE_XGA_1024_768,
107 OV5640_MODE_720P_1280_720,
108 OV5640_MODE_1080P_1920_1080,
109 OV5640_MODE_QSXGA_2592_1944,
113 enum ov5640_frame_rate {
117 OV5640_NUM_FRAMERATES,
120 enum ov5640_format_mux {
121 OV5640_FMT_MUX_YUV422 = 0,
123 OV5640_FMT_MUX_DITHER,
124 OV5640_FMT_MUX_RAW_DPC,
125 OV5640_FMT_MUX_SNR_RAW,
126 OV5640_FMT_MUX_RAW_CIP,
129 struct ov5640_pixfmt {
134 static const struct ov5640_pixfmt ov5640_formats[] = {
135 { MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
136 { MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
137 { MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
138 { MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
139 { MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
140 { MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
141 { MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
142 { MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
143 { MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
147 * FIXME: remove this when a subdev API becomes available
148 * to set the MIPI CSI-2 virtual channel.
150 static unsigned int virtual_channel;
151 module_param(virtual_channel, uint, 0444);
152 MODULE_PARM_DESC(virtual_channel,
153 "MIPI CSI-2 virtual channel (0..3), default 0");
155 static const int ov5640_framerates[] = {
156 [OV5640_15_FPS] = 15,
157 [OV5640_30_FPS] = 30,
158 [OV5640_60_FPS] = 60,
161 /* regulator supplies */
162 static const char * const ov5640_supply_name[] = {
163 "DOVDD", /* Digital I/O (1.8V) supply */
164 "AVDD", /* Analog (2.8V) supply */
165 "DVDD", /* Digital Core (1.5V) supply */
168 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
171 * Image size under 1280 * 960 are SUBSAMPLING
172 * Image size upper 1280 * 960 are SCALING
174 enum ov5640_downsize_mode {
186 struct ov5640_mode_info {
187 enum ov5640_mode_id id;
188 enum ov5640_downsize_mode dn_mode;
193 const struct reg_value *reg_data;
198 struct ov5640_ctrls {
199 struct v4l2_ctrl_handler handler;
200 struct v4l2_ctrl *pixel_rate;
202 struct v4l2_ctrl *auto_exp;
203 struct v4l2_ctrl *exposure;
206 struct v4l2_ctrl *auto_wb;
207 struct v4l2_ctrl *blue_balance;
208 struct v4l2_ctrl *red_balance;
211 struct v4l2_ctrl *auto_gain;
212 struct v4l2_ctrl *gain;
214 struct v4l2_ctrl *brightness;
215 struct v4l2_ctrl *light_freq;
216 struct v4l2_ctrl *saturation;
217 struct v4l2_ctrl *contrast;
218 struct v4l2_ctrl *hue;
219 struct v4l2_ctrl *test_pattern;
220 struct v4l2_ctrl *hflip;
221 struct v4l2_ctrl *vflip;
225 struct i2c_client *i2c_client;
226 struct v4l2_subdev sd;
227 struct media_pad pad;
228 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
229 struct clk *xclk; /* system clock to OV5640 */
232 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
233 struct gpio_desc *reset_gpio;
234 struct gpio_desc *pwdn_gpio;
237 /* lock to protect all members below */
242 struct v4l2_mbus_framefmt fmt;
243 bool pending_fmt_change;
245 const struct ov5640_mode_info *current_mode;
246 const struct ov5640_mode_info *last_mode;
247 enum ov5640_frame_rate current_fr;
248 struct v4l2_fract frame_interval;
250 struct ov5640_ctrls ctrls;
252 u32 prev_sysclk, prev_hts;
253 u32 ae_low, ae_high, ae_target;
255 bool pending_mode_change;
259 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
261 return container_of(sd, struct ov5640_dev, sd);
264 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
266 return &container_of(ctrl->handler, struct ov5640_dev,
271 * FIXME: all of these register tables are likely filled with
272 * entries that set the register to their power-on default values,
273 * and which are otherwise not touched by this driver. Those entries
274 * should be identified and removed to speed register load time
277 /* YUV422 UYVY VGA@30fps */
278 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
279 {0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
280 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
281 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
282 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
283 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
284 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
285 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
286 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
287 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
288 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
289 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
290 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
291 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
292 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
293 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
294 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
295 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
296 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
297 {0x3810, 0x00, 0, 0},
298 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
299 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
300 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
301 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
302 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
303 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
304 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
305 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
306 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
307 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
308 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
309 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
310 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
311 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
312 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
313 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
314 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
315 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
316 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
317 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
318 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
319 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
320 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
321 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
322 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
323 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
324 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
325 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
326 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
327 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
328 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
329 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
330 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
331 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
332 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
333 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
334 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
335 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
336 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
337 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
338 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
339 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
340 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
341 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
342 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
343 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
344 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
345 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
346 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
347 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
348 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
349 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
350 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
351 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
352 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
353 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
354 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
355 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
356 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
357 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
358 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
359 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
362 static const struct reg_value ov5640_setting_VGA_640_480[] = {
363 {0x3c07, 0x08, 0, 0},
364 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
365 {0x3814, 0x31, 0, 0},
366 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
367 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
368 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
369 {0x3810, 0x00, 0, 0},
370 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
371 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
372 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
373 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
374 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
375 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
376 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
377 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
378 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
381 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
382 {0x3c07, 0x08, 0, 0},
383 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
384 {0x3814, 0x31, 0, 0},
385 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
386 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
387 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
388 {0x3810, 0x00, 0, 0},
389 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
390 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
391 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
392 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
393 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
394 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
395 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
396 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
397 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
400 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
401 {0x3c07, 0x08, 0, 0},
402 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
403 {0x3814, 0x31, 0, 0},
404 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
405 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
406 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
407 {0x3810, 0x00, 0, 0},
408 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
409 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
410 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
411 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
412 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
413 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
414 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
415 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
416 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
419 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
420 {0x3c07, 0x08, 0, 0},
421 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
422 {0x3814, 0x31, 0, 0},
423 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
424 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
425 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
426 {0x3810, 0x00, 0, 0},
427 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
428 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
429 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
430 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
431 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
432 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
433 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
434 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
435 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
438 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
439 {0x3c07, 0x08, 0, 0},
440 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
441 {0x3814, 0x31, 0, 0},
442 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
443 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
444 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
445 {0x3810, 0x00, 0, 0},
446 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
447 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
448 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
449 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
450 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
451 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
452 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
453 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
454 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
457 static const struct reg_value ov5640_setting_PAL_720_576[] = {
458 {0x3c07, 0x08, 0, 0},
459 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
460 {0x3814, 0x31, 0, 0},
461 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
462 {0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
463 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
464 {0x3810, 0x00, 0, 0},
465 {0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
466 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
467 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
468 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
469 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
470 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
471 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
472 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
473 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
476 static const struct reg_value ov5640_setting_720P_1280_720[] = {
477 {0x3c07, 0x07, 0, 0},
478 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
479 {0x3814, 0x31, 0, 0},
480 {0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
481 {0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
482 {0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
483 {0x3810, 0x00, 0, 0},
484 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
485 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
486 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
487 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
488 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
489 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
490 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
491 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
492 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
495 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
496 {0x3c07, 0x08, 0, 0},
497 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
498 {0x3814, 0x11, 0, 0},
499 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
500 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
501 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
502 {0x3810, 0x00, 0, 0},
503 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
504 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
505 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
506 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
507 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
508 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
509 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
510 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
511 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
512 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
513 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
514 {0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
515 {0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
516 {0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
517 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
518 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
519 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
520 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
521 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
522 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
523 {0x4005, 0x1a, 0, 0},
526 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
527 {0x3c07, 0x08, 0, 0},
528 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
529 {0x3814, 0x11, 0, 0},
530 {0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
531 {0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
532 {0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
533 {0x3810, 0x00, 0, 0},
534 {0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
535 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
536 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
537 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
538 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
539 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
540 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
541 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
542 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
545 /* power-on sensor init reg table */
546 static const struct ov5640_mode_info ov5640_mode_init_data = {
547 0, SUBSAMPLING, 640, 1896, 480, 984,
548 ov5640_init_setting_30fps_VGA,
549 ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
553 static const struct ov5640_mode_info
554 ov5640_mode_data[OV5640_NUM_MODES] = {
555 {OV5640_MODE_QCIF_176_144, SUBSAMPLING,
557 ov5640_setting_QCIF_176_144,
558 ARRAY_SIZE(ov5640_setting_QCIF_176_144),
560 {OV5640_MODE_QVGA_320_240, SUBSAMPLING,
562 ov5640_setting_QVGA_320_240,
563 ARRAY_SIZE(ov5640_setting_QVGA_320_240),
565 {OV5640_MODE_VGA_640_480, SUBSAMPLING,
566 640, 1896, 480, 1080,
567 ov5640_setting_VGA_640_480,
568 ARRAY_SIZE(ov5640_setting_VGA_640_480),
570 {OV5640_MODE_NTSC_720_480, SUBSAMPLING,
572 ov5640_setting_NTSC_720_480,
573 ARRAY_SIZE(ov5640_setting_NTSC_720_480),
575 {OV5640_MODE_PAL_720_576, SUBSAMPLING,
577 ov5640_setting_PAL_720_576,
578 ARRAY_SIZE(ov5640_setting_PAL_720_576),
580 {OV5640_MODE_XGA_1024_768, SUBSAMPLING,
581 1024, 1896, 768, 1080,
582 ov5640_setting_XGA_1024_768,
583 ARRAY_SIZE(ov5640_setting_XGA_1024_768),
585 {OV5640_MODE_720P_1280_720, SUBSAMPLING,
586 1280, 1892, 720, 740,
587 ov5640_setting_720P_1280_720,
588 ARRAY_SIZE(ov5640_setting_720P_1280_720),
590 {OV5640_MODE_1080P_1920_1080, SCALING,
591 1920, 2500, 1080, 1120,
592 ov5640_setting_1080P_1920_1080,
593 ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
595 {OV5640_MODE_QSXGA_2592_1944, SCALING,
596 2592, 2844, 1944, 1968,
597 ov5640_setting_QSXGA_2592_1944,
598 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
602 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
604 struct i2c_client *client = sensor->i2c_client;
609 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
612 buf[0] = OV5640_REG_SLAVE_ID >> 8;
613 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
614 buf[2] = client->addr << 1;
616 msg.addr = OV5640_DEFAULT_SLAVE_ID;
619 msg.len = sizeof(buf);
621 ret = i2c_transfer(client->adapter, &msg, 1);
623 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
630 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
632 struct i2c_client *client = sensor->i2c_client;
641 msg.addr = client->addr;
642 msg.flags = client->flags;
644 msg.len = sizeof(buf);
646 ret = i2c_transfer(client->adapter, &msg, 1);
648 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
656 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
658 struct i2c_client *client = sensor->i2c_client;
659 struct i2c_msg msg[2];
666 msg[0].addr = client->addr;
667 msg[0].flags = client->flags;
669 msg[0].len = sizeof(buf);
671 msg[1].addr = client->addr;
672 msg[1].flags = client->flags | I2C_M_RD;
676 ret = i2c_transfer(client->adapter, msg, 2);
678 dev_err(&client->dev, "%s: error: reg=%x\n",
687 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
692 ret = ov5640_read_reg(sensor, reg, &hi);
695 ret = ov5640_read_reg(sensor, reg + 1, &lo);
699 *val = ((u16)hi << 8) | (u16)lo;
703 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
707 ret = ov5640_write_reg(sensor, reg, val >> 8);
711 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
714 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
720 ret = ov5640_read_reg(sensor, reg, &readval);
728 return ov5640_write_reg(sensor, reg, val);
732 * After trying the various combinations, reading various
733 * documentations spread around the net, and from the various
734 * feedback, the clock tree is probably as follows:
740 * +->| PLL1 | - reg 0x3036, for the multiplier
741 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
743 * +->| System Clock | - reg 0x3035, bits 4-7
746 * +->| MIPI Divider | - reg 0x3035, bits 0-3
748 * | +----------------> MIPI SCLK
750 * | +->| / 2 |-------> MIPI BIT CLK
753 * +->| PLL Root Div | - reg 0x3037, bit 4
756 * +->| Bit Div | - reg 0x3034, bits 0-3
759 * +->| SCLK Div | - reg 0x3108, bits 0-1
761 * | +---------------> SCLK
763 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
765 * | +---------------> SCLK 2X
767 * +->| PCLK Div | - reg 0x3108, bits 4-5
770 * +->| P_DIV | - reg 0x3035, bits 0-3
772 * +------------> PCLK
774 * This is deviating from the datasheet at least for the register
775 * 0x3108, since it's said here that the PCLK would be clocked from
778 * There seems to be also (unverified) constraints:
779 * - the PLL pre-divider output rate should be in the 4-27MHz range
780 * - the PLL multiplier output rate should be in the 500-1000MHz range
781 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
783 * In the two latter cases, these constraints are met since our
784 * factors are hardcoded. If we were to change that, we would need to
785 * take this into account. The only varying parts are the PLL
786 * multiplier and the system clock divider, which are shared between
787 * all these clocks so won't cause any issue.
791 * This is supposed to be ranging from 1 to 8, but the value is always
792 * set to 3 in the vendor kernels.
794 #define OV5640_PLL_PREDIV 3
796 #define OV5640_PLL_MULT_MIN 4
797 #define OV5640_PLL_MULT_MAX 252
800 * This is supposed to be ranging from 1 to 16, but the value is
801 * always set to either 1 or 2 in the vendor kernels.
803 #define OV5640_SYSDIV_MIN 1
804 #define OV5640_SYSDIV_MAX 16
807 * Hardcode these values for scaler and non-scaler modes.
808 * FIXME: to be re-calcualted for 1 data lanes setups
810 #define OV5640_MIPI_DIV_PCLK 2
811 #define OV5640_MIPI_DIV_SCLK 1
814 * This is supposed to be ranging from 1 to 2, but the value is always
815 * set to 2 in the vendor kernels.
817 #define OV5640_PLL_ROOT_DIV 2
818 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
821 * We only supports 8-bit formats at the moment
823 #define OV5640_BIT_DIV 2
824 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
827 * This is supposed to be ranging from 1 to 8, but the value is always
828 * set to 2 in the vendor kernels.
830 #define OV5640_SCLK_ROOT_DIV 2
833 * This is hardcoded so that the consistency is maintained between SCLK and
836 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
839 * This is supposed to be ranging from 1 to 8, but the value is always
840 * set to 1 in the vendor kernels.
842 #define OV5640_PCLK_ROOT_DIV 1
843 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
845 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
846 u8 pll_prediv, u8 pll_mult,
849 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
851 /* PLL1 output cannot exceed 1GHz. */
852 if (sysclk / 1000000 > 1000)
855 return sysclk / sysdiv;
858 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
860 u8 *pll_prediv, u8 *pll_mult,
863 unsigned long best = ~0;
864 u8 best_sysdiv = 1, best_mult = 1;
865 u8 _sysdiv, _pll_mult;
867 for (_sysdiv = OV5640_SYSDIV_MIN;
868 _sysdiv <= OV5640_SYSDIV_MAX;
870 for (_pll_mult = OV5640_PLL_MULT_MIN;
871 _pll_mult <= OV5640_PLL_MULT_MAX;
876 * The PLL multiplier cannot be odd if above
879 if (_pll_mult > 127 && (_pll_mult % 2))
882 _rate = ov5640_compute_sys_clk(sensor,
887 * We have reached the maximum allowed PLL1 output,
894 * Prefer rates above the expected clock rate than
895 * below, even if that means being less precise.
900 if (abs(rate - _rate) < abs(rate - best)) {
902 best_sysdiv = _sysdiv;
903 best_mult = _pll_mult;
912 *sysdiv = best_sysdiv;
913 *pll_prediv = OV5640_PLL_PREDIV;
914 *pll_mult = best_mult;
920 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
921 * for the MIPI CSI-2 output.
923 * @rate: The requested bandwidth per lane in bytes per second.
924 * 'Bandwidth Per Lane' is calculated as:
925 * bpl = HTOT * VTOT * FPS * bpp / num_lanes;
927 * This function use the requested bandwidth to calculate:
928 * - sample_rate = bpl / (bpp / num_lanes);
929 * = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
931 * - mipi_sclk = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
933 * with these fixed parameters:
935 * BIT_DIVIDER = 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
938 * The MIPI clock generation differs for modes that use the scaler and modes
939 * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
942 * - mipi_sclk = bpl / MIPI_DIV / 2;
945 * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
946 * from the pixel clock, and thus:
948 * - sample_rate = bpl / (bpp / num_lanes);
949 * = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
950 * = bpl / (4 * MIPI_DIV / num_lanes);
951 * - MIPI_DIV = bpp / (4 * num_lanes);
953 * FIXME: this have been tested with 16bpp and 2 lanes setup only.
954 * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
955 * above formula for setups with 1 lane or image formats with different bpp.
957 * FIXME: this deviates from the sensor manual documentation which is quite
958 * thin on the MIPI clock tree generation part.
960 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
963 const struct ov5640_mode_info *mode = sensor->current_mode;
964 u8 prediv, mult, sysdiv;
969 * 1280x720 is reported to use 'SUBSAMPLING' only,
970 * but according to the sensor manual it goes through the
971 * scaler before subsampling.
973 if (mode->dn_mode == SCALING ||
974 (mode->id == OV5640_MODE_720P_1280_720))
975 mipi_div = OV5640_MIPI_DIV_SCLK;
977 mipi_div = OV5640_MIPI_DIV_PCLK;
979 ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
981 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
982 0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
984 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
985 0xff, sysdiv << 4 | mipi_div);
989 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
993 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
994 0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
998 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
999 0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
1002 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1004 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1005 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1007 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1008 OV5640_PCLK_ROOT_DIV;
1010 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1012 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1013 *bit_div = OV5640_BIT_DIV;
1014 *pclk_div = OV5640_PCLK_ROOT_DIV;
1016 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1019 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1021 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1024 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1025 &bit_div, &pclk_div);
1030 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1036 * We need to set sysdiv according to the clock, and to clear
1039 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1044 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1049 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1050 0x1f, prediv | ((pll_rdiv - 1) << 4));
1054 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1055 (ilog2(pclk_div) << 4));
1058 /* set JPEG framing sizes */
1059 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1060 const struct ov5640_mode_info *mode)
1065 * compression mode 3 timing
1067 * Data is transmitted with programmable width (VFIFO_HSIZE).
1068 * No padding done. Last line may have less data. Varying
1069 * number of lines per frame, depending on amount of data.
1071 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1075 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1079 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1082 /* download ov5640 settings to sensor through i2c */
1083 static int ov5640_set_timings(struct ov5640_dev *sensor,
1084 const struct ov5640_mode_info *mode)
1088 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1089 ret = ov5640_set_jpeg_timings(sensor, mode);
1094 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1098 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1102 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1106 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1109 static int ov5640_load_regs(struct ov5640_dev *sensor,
1110 const struct ov5640_mode_info *mode)
1112 const struct reg_value *regs = mode->reg_data;
1119 for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1120 delay_ms = regs->delay_ms;
1121 reg_addr = regs->reg_addr;
1125 /* remain in power down mode for DVP */
1126 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1127 val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
1128 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1132 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1134 ret = ov5640_write_reg(sensor, reg_addr, val);
1139 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1142 return ov5640_set_timings(sensor, mode);
1145 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1147 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1148 BIT(0), on ? 0 : BIT(0));
1151 /* read exposure, in number of line periods */
1152 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1157 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1160 exp = ((int)temp & 0x0f) << 16;
1161 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1164 exp |= ((int)temp << 8);
1165 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1173 /* write exposure, given number of line periods */
1174 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1180 ret = ov5640_write_reg(sensor,
1181 OV5640_REG_AEC_PK_EXPOSURE_LO,
1185 ret = ov5640_write_reg(sensor,
1186 OV5640_REG_AEC_PK_EXPOSURE_MED,
1187 (exposure >> 8) & 0xff);
1190 return ov5640_write_reg(sensor,
1191 OV5640_REG_AEC_PK_EXPOSURE_HI,
1192 (exposure >> 16) & 0x0f);
1195 static int ov5640_get_gain(struct ov5640_dev *sensor)
1200 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1204 return gain & 0x3ff;
1207 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1209 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1213 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1215 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1216 BIT(1), on ? 0 : BIT(1));
1219 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1221 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1222 OV5640_REG_SYS_CTRL0_SW_PWUP :
1223 OV5640_REG_SYS_CTRL0_SW_PWDN);
1226 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1231 * Enable/disable the MIPI interface
1233 * 0x300e = on ? 0x45 : 0x40
1235 * FIXME: the sensor manual (version 2.03) reports
1236 * [7:5] = 000 : 1 data lane mode
1237 * [7:5] = 001 : 2 data lanes mode
1238 * But this settings do not work, while the following ones
1239 * have been validated for 2 data lanes mode.
1241 * [7:5] = 010 : 2 data lanes mode
1242 * [4] = 0 : Power up MIPI HS Tx
1243 * [3] = 0 : Power up MIPI LS Rx
1244 * [2] = 1/0 : MIPI interface enable/disable
1245 * [1:0] = 01/00: FIXME: 'debug'
1247 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1252 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1256 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1258 /* calculate sysclk */
1259 u32 xvclk = sensor->xclk_freq / 10000;
1260 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1261 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1262 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1266 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1269 temp2 = temp1 & 0x0f;
1270 if (temp2 == 8 || temp2 == 10)
1271 bit_div2x = temp2 / 2;
1273 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1276 sysdiv = temp1 >> 4;
1280 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1285 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1288 prediv = temp1 & 0x0f;
1289 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1291 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1294 temp2 = temp1 & 0x03;
1295 sclk_rdiv = sclk_rdiv_map[temp2];
1297 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1300 VCO = xvclk * multiplier / prediv;
1302 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1307 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1309 /* read HTS from register settings */
1313 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1317 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1320 static int ov5640_get_hts(struct ov5640_dev *sensor)
1322 /* read HTS from register settings */
1326 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1332 static int ov5640_get_vts(struct ov5640_dev *sensor)
1337 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1343 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1345 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1348 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1350 /* get banding filter value */
1351 int ret, light_freq = 0;
1354 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1360 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1373 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1389 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1391 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1394 /* read preview PCLK */
1395 ret = ov5640_get_sysclk(sensor);
1400 sensor->prev_sysclk = ret;
1401 /* read preview HTS */
1402 ret = ov5640_get_hts(sensor);
1407 sensor->prev_hts = ret;
1409 /* read preview VTS */
1410 ret = ov5640_get_vts(sensor);
1415 /* calculate banding filter */
1417 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1418 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1423 max_band60 = (int)((prev_vts - 4) / band_step60);
1424 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1429 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1430 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1435 max_band50 = (int)((prev_vts - 4) / band_step50);
1436 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1439 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1441 /* stable in high */
1442 u32 fast_high, fast_low;
1445 sensor->ae_low = target * 23 / 25; /* 0.92 */
1446 sensor->ae_high = target * 27 / 25; /* 1.08 */
1448 fast_high = sensor->ae_high << 1;
1449 if (fast_high > 255)
1452 fast_low = sensor->ae_low >> 1;
1454 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1457 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1460 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1463 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1466 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1469 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1472 static int ov5640_get_binning(struct ov5640_dev *sensor)
1477 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1481 return temp & BIT(0);
1484 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1490 * - [0]: Horizontal binning enable
1492 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1493 BIT(0), enable ? BIT(0) : 0);
1498 * - [0]: Undocumented, but hardcoded init sequences
1499 * are always setting REG21/REG20 bit 0 to same value...
1501 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1502 BIT(0), enable ? BIT(0) : 0);
1505 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1507 struct i2c_client *client = sensor->i2c_client;
1508 u8 temp, channel = virtual_channel;
1512 dev_err(&client->dev,
1513 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1518 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1522 temp |= (channel << 6);
1523 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1526 static const struct ov5640_mode_info *
1527 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1528 int width, int height, bool nearest)
1530 const struct ov5640_mode_info *mode;
1532 mode = v4l2_find_nearest_size(ov5640_mode_data,
1533 ARRAY_SIZE(ov5640_mode_data),
1538 (!nearest && (mode->hact != width || mode->vact != height)))
1541 /* Check to see if the current mode exceeds the max frame rate */
1542 if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1548 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1552 rate = sensor->current_mode->vtot * sensor->current_mode->htot;
1553 rate *= ov5640_framerates[sensor->current_fr];
1559 * sensor changes between scaling and subsampling, go through
1560 * exposure calculation
1562 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1563 const struct ov5640_mode_info *mode)
1565 u32 prev_shutter, prev_gain16;
1566 u32 cap_shutter, cap_gain16;
1567 u32 cap_sysclk, cap_hts, cap_vts;
1568 u32 light_freq, cap_bandfilt, cap_maxband;
1569 u32 cap_gain16_shutter;
1573 if (!mode->reg_data)
1576 /* read preview shutter */
1577 ret = ov5640_get_exposure(sensor);
1581 ret = ov5640_get_binning(sensor);
1584 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1585 mode->id != OV5640_MODE_1080P_1920_1080)
1588 /* read preview gain */
1589 ret = ov5640_get_gain(sensor);
1595 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1599 /* turn off night mode for capture */
1600 ret = ov5640_set_night_mode(sensor);
1604 /* Write capture setting */
1605 ret = ov5640_load_regs(sensor, mode);
1609 /* read capture VTS */
1610 ret = ov5640_get_vts(sensor);
1614 ret = ov5640_get_hts(sensor);
1621 ret = ov5640_get_sysclk(sensor);
1628 /* calculate capture banding filter */
1629 ret = ov5640_get_light_freq(sensor);
1634 if (light_freq == 60) {
1636 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1639 cap_bandfilt = cap_sysclk * 100 / cap_hts;
1642 if (!sensor->prev_sysclk) {
1643 ret = ov5640_get_sysclk(sensor);
1648 sensor->prev_sysclk = ret;
1654 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1656 /* calculate capture shutter/gain16 */
1657 if (average > sensor->ae_low && average < sensor->ae_high) {
1658 /* in stable range */
1659 cap_gain16_shutter =
1660 prev_gain16 * prev_shutter *
1661 cap_sysclk / sensor->prev_sysclk *
1662 sensor->prev_hts / cap_hts *
1663 sensor->ae_target / average;
1665 cap_gain16_shutter =
1666 prev_gain16 * prev_shutter *
1667 cap_sysclk / sensor->prev_sysclk *
1668 sensor->prev_hts / cap_hts;
1671 /* gain to shutter */
1672 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1673 /* shutter < 1/100 */
1674 cap_shutter = cap_gain16_shutter / 16;
1675 if (cap_shutter < 1)
1678 cap_gain16 = cap_gain16_shutter / cap_shutter;
1679 if (cap_gain16 < 16)
1682 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1683 /* exposure reach max */
1684 cap_shutter = cap_bandfilt * cap_maxband;
1688 cap_gain16 = cap_gain16_shutter / cap_shutter;
1690 /* 1/100 < (cap_shutter = n/100) =< max */
1692 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1697 cap_gain16 = cap_gain16_shutter / cap_shutter;
1701 /* set capture gain */
1702 ret = ov5640_set_gain(sensor, cap_gain16);
1706 /* write capture shutter */
1707 if (cap_shutter > (cap_vts - 4)) {
1708 cap_vts = cap_shutter + 4;
1709 ret = ov5640_set_vts(sensor, cap_vts);
1715 return ov5640_set_exposure(sensor, cap_shutter);
1719 * if sensor changes inside scaling or subsampling
1720 * change mode directly
1722 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1723 const struct ov5640_mode_info *mode)
1725 if (!mode->reg_data)
1728 /* Write capture setting */
1729 return ov5640_load_regs(sensor, mode);
1732 static int ov5640_set_mode(struct ov5640_dev *sensor)
1734 const struct ov5640_mode_info *mode = sensor->current_mode;
1735 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1736 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1737 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1738 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1742 dn_mode = mode->dn_mode;
1743 orig_dn_mode = orig_mode->dn_mode;
1745 /* auto gain and exposure must be turned off when changing modes */
1747 ret = ov5640_set_autogain(sensor, false);
1753 ret = ov5640_set_autoexposure(sensor, false);
1755 goto restore_auto_gain;
1759 * All the formats we support have 16 bits per pixel, seems to require
1760 * the same rate than YUV, so we can just use 16 bpp all the time.
1762 rate = ov5640_calc_pixel_rate(sensor) * 16;
1763 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1764 rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1765 ret = ov5640_set_mipi_pclk(sensor, rate);
1767 rate = rate / sensor->ep.bus.parallel.bus_width;
1768 ret = ov5640_set_dvp_pclk(sensor, rate);
1774 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1775 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1777 * change between subsampling and scaling
1778 * go through exposure calculation
1780 ret = ov5640_set_mode_exposure_calc(sensor, mode);
1783 * change inside subsampling or scaling
1784 * download firmware directly
1786 ret = ov5640_set_mode_direct(sensor, mode);
1789 goto restore_auto_exp_gain;
1791 /* restore auto gain and exposure */
1793 ov5640_set_autogain(sensor, true);
1795 ov5640_set_autoexposure(sensor, true);
1797 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1800 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1803 ret = ov5640_get_light_freq(sensor);
1806 ret = ov5640_set_bandingfilter(sensor);
1809 ret = ov5640_set_virtual_channel(sensor);
1813 sensor->pending_mode_change = false;
1814 sensor->last_mode = mode;
1818 restore_auto_exp_gain:
1820 ov5640_set_autoexposure(sensor, true);
1823 ov5640_set_autogain(sensor, true);
1828 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1829 struct v4l2_mbus_framefmt *format);
1831 /* restore the last set video mode after chip power-on */
1832 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1836 /* first load the initial register values */
1837 ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1840 sensor->last_mode = &ov5640_mode_init_data;
1842 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1843 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1844 ilog2(OV5640_SCLK_ROOT_DIV));
1848 /* now restore the last capture mode */
1849 ret = ov5640_set_mode(sensor);
1853 return ov5640_set_framefmt(sensor, &sensor->fmt);
1856 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1858 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1861 static void ov5640_reset(struct ov5640_dev *sensor)
1863 if (!sensor->reset_gpio)
1866 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1868 /* camera power cycle */
1869 ov5640_power(sensor, false);
1870 usleep_range(5000, 10000);
1871 ov5640_power(sensor, true);
1872 usleep_range(5000, 10000);
1874 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1875 usleep_range(1000, 2000);
1877 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1878 usleep_range(20000, 25000);
1881 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1883 struct i2c_client *client = sensor->i2c_client;
1886 ret = clk_prepare_enable(sensor->xclk);
1888 dev_err(&client->dev, "%s: failed to enable clock\n",
1893 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1896 dev_err(&client->dev, "%s: failed to enable regulators\n",
1901 ov5640_reset(sensor);
1902 ov5640_power(sensor, true);
1904 ret = ov5640_init_slave_id(sensor);
1911 ov5640_power(sensor, false);
1912 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1914 clk_disable_unprepare(sensor->xclk);
1918 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1920 ov5640_power(sensor, false);
1921 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1922 clk_disable_unprepare(sensor->xclk);
1925 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
1930 /* Reset MIPI bus settings to their default values. */
1931 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
1932 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
1933 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
1938 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
1941 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
1942 * "ov5640_set_stream_mipi()")
1943 * [4] = 0 : Power up MIPI HS Tx
1944 * [3] = 0 : Power up MIPI LS Rx
1945 * [2] = 0 : MIPI interface disabled
1947 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
1952 * Gate clock and set LP11 in 'no packets mode' (idle)
1955 * [5] = 1 : Gate clock when 'no packets'
1956 * [2] = 1 : MIPI bus in LP11 when 'no packets'
1958 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
1963 * Set data lanes and clock in LP11 when 'sleeping'
1966 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
1967 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
1968 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
1970 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
1974 /* Give lanes some time to coax into LP11 state. */
1975 usleep_range(500, 1000);
1980 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
1982 unsigned int flags = sensor->ep.bus.parallel.flags;
1983 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
1988 /* Reset settings to their default values. */
1989 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
1990 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
1991 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
1992 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
1993 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
1998 * Note about parallel port configuration.
2000 * When configured in parallel mode, the OV5640 will
2001 * output 10 bits data on DVP data lines [9:0].
2002 * If only 8 bits data are wanted, the 8 bits data lines
2003 * of the camera interface must be physically connected
2004 * on the DVP data lines [9:2].
2006 * Control lines polarity can be configured through
2007 * devicetree endpoint control lines properties.
2008 * If no endpoint control lines properties are set,
2009 * polarity will be as below:
2010 * - VSYNC: active high
2011 * - HREF: active low
2012 * - PCLK: active low
2014 * VSYNC & HREF are not configured if BT656 bus mode is selected
2018 * BT656 embedded synchronization configuration
2021 * - [7]: SYNC code selection (0: auto generate sync code,
2022 * 1: sync code from regs 0x4732-0x4735)
2023 * - [6]: f value in CCIR656 SYNC code when fixed f value
2024 * - [5]: Fixed f value
2025 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
2026 * 01: data from regs 0x4736-0x4738, 10: always keep 0)
2027 * - [1]: Clip data disable
2028 * - [0]: CCIR656 mode enable
2030 * Default CCIR656 SAV/EAV mode with default codes
2031 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2032 * - CCIR656 mode enable
2033 * - auto generation of sync codes
2034 * - blank toggle data 1'h040/1'h200
2035 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2037 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2038 bt656 ? 0x01 : 0x00);
2043 * configure parallel port control lines polarity
2046 * - [5]: PCLK polarity (0: active low, 1: active high)
2047 * - [1]: HREF polarity (0: active low, 1: active high)
2048 * - [0]: VSYNC polarity (mismatch here between
2049 * datasheet and hardware, 0 is active high
2050 * and 1 is active low...)
2053 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2054 polarities |= BIT(1);
2055 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
2056 polarities |= BIT(0);
2058 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2059 polarities |= BIT(5);
2061 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2066 * powerdown MIPI TX/RX PHY & enable DVP
2069 * [4] = 1 : Power down MIPI HS Tx
2070 * [3] = 1 : Power down MIPI LS Rx
2071 * [2] = 0 : DVP enable (MIPI disable)
2073 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2078 * enable VSYNC/HREF/PCLK DVP control lines
2079 * & D[9:6] DVP data lines
2081 * PAD OUTPUT ENABLE 01
2082 * - 6: VSYNC output enable
2083 * - 5: HREF output enable
2084 * - 4: PCLK output enable
2085 * - [3:0]: D[9:6] output enable
2087 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
2088 bt656 ? 0x1f : 0x7f);
2093 * enable D[5:0] DVP data lines
2095 * PAD OUTPUT ENABLE 02
2096 * - [7:2]: D[5:0] output enable
2098 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2101 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2106 ret = ov5640_set_power_on(sensor);
2110 ret = ov5640_restore_mode(sensor);
2115 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2116 ret = ov5640_set_power_mipi(sensor, on);
2118 ret = ov5640_set_power_dvp(sensor, on);
2123 ov5640_set_power_off(sensor);
2128 ov5640_set_power_off(sensor);
2132 /* --------------- Subdev Operations --------------- */
2134 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2136 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2139 mutex_lock(&sensor->lock);
2142 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2143 * update the power state.
2145 if (sensor->power_count == !on) {
2146 ret = ov5640_set_power(sensor, !!on);
2151 /* Update the power count. */
2152 sensor->power_count += on ? 1 : -1;
2153 WARN_ON(sensor->power_count < 0);
2155 mutex_unlock(&sensor->lock);
2157 if (on && !ret && sensor->power_count == 1) {
2158 /* restore controls */
2159 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2165 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2166 struct v4l2_fract *fi,
2167 u32 width, u32 height)
2169 const struct ov5640_mode_info *mode;
2170 enum ov5640_frame_rate rate = OV5640_15_FPS;
2171 int minfps, maxfps, best_fps, fps;
2174 minfps = ov5640_framerates[OV5640_15_FPS];
2175 maxfps = ov5640_framerates[OV5640_60_FPS];
2177 if (fi->numerator == 0) {
2178 fi->denominator = maxfps;
2180 rate = OV5640_60_FPS;
2184 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2188 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2189 int curr_fps = ov5640_framerates[i];
2191 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2192 best_fps = curr_fps;
2198 fi->denominator = best_fps;
2201 mode = ov5640_find_mode(sensor, rate, width, height, false);
2202 return mode ? rate : -EINVAL;
2205 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2206 struct v4l2_subdev_pad_config *cfg,
2207 struct v4l2_subdev_format *format)
2209 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2210 struct v4l2_mbus_framefmt *fmt;
2212 if (format->pad != 0)
2215 mutex_lock(&sensor->lock);
2217 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2218 fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2223 format->format = *fmt;
2225 mutex_unlock(&sensor->lock);
2230 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2231 struct v4l2_mbus_framefmt *fmt,
2232 enum ov5640_frame_rate fr,
2233 const struct ov5640_mode_info **new_mode)
2235 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2236 const struct ov5640_mode_info *mode;
2239 mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2242 fmt->width = mode->hact;
2243 fmt->height = mode->vact;
2248 for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2249 if (ov5640_formats[i].code == fmt->code)
2251 if (i >= ARRAY_SIZE(ov5640_formats))
2254 fmt->code = ov5640_formats[i].code;
2255 fmt->colorspace = ov5640_formats[i].colorspace;
2256 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2257 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2258 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2263 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2264 struct v4l2_subdev_pad_config *cfg,
2265 struct v4l2_subdev_format *format)
2267 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2268 const struct ov5640_mode_info *new_mode;
2269 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2270 struct v4l2_mbus_framefmt *fmt;
2273 if (format->pad != 0)
2276 mutex_lock(&sensor->lock);
2278 if (sensor->streaming) {
2283 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2284 sensor->current_fr, &new_mode);
2288 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2289 fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2295 if (new_mode != sensor->current_mode) {
2296 sensor->current_mode = new_mode;
2297 sensor->pending_mode_change = true;
2299 if (mbus_fmt->code != sensor->fmt.code)
2300 sensor->pending_fmt_change = true;
2302 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2303 ov5640_calc_pixel_rate(sensor));
2305 mutex_unlock(&sensor->lock);
2309 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2310 struct v4l2_mbus_framefmt *format)
2313 bool is_jpeg = false;
2316 switch (format->code) {
2317 case MEDIA_BUS_FMT_UYVY8_2X8:
2320 mux = OV5640_FMT_MUX_YUV422;
2322 case MEDIA_BUS_FMT_YUYV8_2X8:
2325 mux = OV5640_FMT_MUX_YUV422;
2327 case MEDIA_BUS_FMT_RGB565_2X8_LE:
2328 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2330 mux = OV5640_FMT_MUX_RGB;
2332 case MEDIA_BUS_FMT_RGB565_2X8_BE:
2333 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2335 mux = OV5640_FMT_MUX_RGB;
2337 case MEDIA_BUS_FMT_JPEG_1X8:
2340 mux = OV5640_FMT_MUX_YUV422;
2343 case MEDIA_BUS_FMT_SBGGR8_1X8:
2344 /* Raw, BGBG... / GRGR... */
2346 mux = OV5640_FMT_MUX_RAW_DPC;
2348 case MEDIA_BUS_FMT_SGBRG8_1X8:
2349 /* Raw bayer, GBGB... / RGRG... */
2351 mux = OV5640_FMT_MUX_RAW_DPC;
2353 case MEDIA_BUS_FMT_SGRBG8_1X8:
2354 /* Raw bayer, GRGR... / BGBG... */
2356 mux = OV5640_FMT_MUX_RAW_DPC;
2358 case MEDIA_BUS_FMT_SRGGB8_1X8:
2359 /* Raw bayer, RGRG... / GBGB... */
2361 mux = OV5640_FMT_MUX_RAW_DPC;
2367 /* FORMAT CONTROL00: YUV and RGB formatting */
2368 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2372 /* FORMAT MUX CONTROL: ISP YUV or RGB */
2373 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2379 * - [5]: JPEG enable
2381 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2382 BIT(5), is_jpeg ? BIT(5) : 0);
2388 * - [4]: Reset JFIFO
2389 * - [3]: Reset SFIFO
2392 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2393 BIT(4) | BIT(3) | BIT(2),
2394 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2400 * - [5]: Enable JPEG 2x clock
2401 * - [3]: Enable JPEG clock
2403 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2405 is_jpeg ? (BIT(5) | BIT(3)) : 0);
2412 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2417 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2421 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2423 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2429 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2434 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2438 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2441 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2447 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2452 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2456 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2460 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2463 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2469 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2473 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2474 BIT(0), awb ? 0 : 1);
2479 u16 red = (u16)sensor->ctrls.red_balance->val;
2480 u16 blue = (u16)sensor->ctrls.blue_balance->val;
2482 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2485 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2491 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2492 enum v4l2_exposure_auto_type auto_exposure)
2494 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2495 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2498 if (ctrls->auto_exp->is_new) {
2499 ret = ov5640_set_autoexposure(sensor, auto_exp);
2504 if (!auto_exp && ctrls->exposure->is_new) {
2507 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2511 ret = ov5640_get_vts(sensor);
2517 if (ctrls->exposure->val < max_exp)
2518 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2524 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2526 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2529 if (ctrls->auto_gain->is_new) {
2530 ret = ov5640_set_autogain(sensor, auto_gain);
2535 if (!auto_gain && ctrls->gain->is_new)
2536 ret = ov5640_set_gain(sensor, ctrls->gain->val);
2541 static const char * const test_pattern_menu[] = {
2544 "Color bars w/ rolling bar",
2546 "Color squares w/ rolling bar",
2549 #define OV5640_TEST_ENABLE BIT(7)
2550 #define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
2551 #define OV5640_TEST_TRANSPARENT BIT(5)
2552 #define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
2553 #define OV5640_TEST_BAR_STANDARD (0 << 2)
2554 #define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
2555 #define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
2556 #define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
2557 #define OV5640_TEST_BAR (0 << 0)
2558 #define OV5640_TEST_RANDOM (1 << 0)
2559 #define OV5640_TEST_SQUARE (2 << 0)
2560 #define OV5640_TEST_BLACK (3 << 0)
2562 static const u8 test_pattern_val[] = {
2564 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2566 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2567 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2568 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2569 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2572 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2574 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2575 test_pattern_val[value]);
2578 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2582 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2583 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2588 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2589 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2593 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2596 * If sensor is mounted upside down, mirror logic is inversed.
2598 * Sensor is a BSI (Back Side Illuminated) one,
2599 * so image captured is physically mirrored.
2600 * This is why mirror logic is inversed in
2601 * order to cancel this mirror effect.
2607 * - [1]: Sensor mirror
2609 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2611 (!(value ^ sensor->upside_down)) ?
2612 (BIT(2) | BIT(1)) : 0);
2615 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2617 /* If sensor is mounted upside down, flip logic is inversed */
2622 * - [1]: Sensor vflip
2624 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2626 (value ^ sensor->upside_down) ?
2627 (BIT(2) | BIT(1)) : 0);
2630 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2632 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2633 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2636 /* v4l2_ctrl_lock() locks our own mutex */
2639 case V4L2_CID_AUTOGAIN:
2640 val = ov5640_get_gain(sensor);
2643 sensor->ctrls.gain->val = val;
2645 case V4L2_CID_EXPOSURE_AUTO:
2646 val = ov5640_get_exposure(sensor);
2649 sensor->ctrls.exposure->val = val;
2656 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2658 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2659 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2662 /* v4l2_ctrl_lock() locks our own mutex */
2665 * If the device is not powered up by the host driver do
2666 * not apply any controls to H/W at this time. Instead
2667 * the controls will be restored right after power-up.
2669 if (sensor->power_count == 0)
2673 case V4L2_CID_AUTOGAIN:
2674 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2676 case V4L2_CID_EXPOSURE_AUTO:
2677 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2679 case V4L2_CID_AUTO_WHITE_BALANCE:
2680 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2683 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2685 case V4L2_CID_CONTRAST:
2686 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2688 case V4L2_CID_SATURATION:
2689 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2691 case V4L2_CID_TEST_PATTERN:
2692 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2694 case V4L2_CID_POWER_LINE_FREQUENCY:
2695 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2697 case V4L2_CID_HFLIP:
2698 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2700 case V4L2_CID_VFLIP:
2701 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2711 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2712 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
2713 .s_ctrl = ov5640_s_ctrl,
2716 static int ov5640_init_controls(struct ov5640_dev *sensor)
2718 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2719 struct ov5640_ctrls *ctrls = &sensor->ctrls;
2720 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2723 v4l2_ctrl_handler_init(hdl, 32);
2725 /* we can use our own mutex for the ctrl lock */
2726 hdl->lock = &sensor->lock;
2728 /* Clock related controls */
2729 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
2731 ov5640_calc_pixel_rate(sensor));
2733 /* Auto/manual white balance */
2734 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2735 V4L2_CID_AUTO_WHITE_BALANCE,
2737 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2739 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2741 /* Auto/manual exposure */
2742 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2743 V4L2_CID_EXPOSURE_AUTO,
2744 V4L2_EXPOSURE_MANUAL, 0,
2745 V4L2_EXPOSURE_AUTO);
2746 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2748 /* Auto/manual gain */
2749 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2751 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2754 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2756 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2758 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2760 ctrls->test_pattern =
2761 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2762 ARRAY_SIZE(test_pattern_menu) - 1,
2763 0, 0, test_pattern_menu);
2764 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2766 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2770 v4l2_ctrl_new_std_menu(hdl, ops,
2771 V4L2_CID_POWER_LINE_FREQUENCY,
2772 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2773 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2780 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2781 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2782 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2784 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2785 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2786 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2788 sensor->sd.ctrl_handler = hdl;
2792 v4l2_ctrl_handler_free(hdl);
2796 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2797 struct v4l2_subdev_pad_config *cfg,
2798 struct v4l2_subdev_frame_size_enum *fse)
2802 if (fse->index >= OV5640_NUM_MODES)
2806 ov5640_mode_data[fse->index].hact;
2807 fse->max_width = fse->min_width;
2809 ov5640_mode_data[fse->index].vact;
2810 fse->max_height = fse->min_height;
2815 static int ov5640_enum_frame_interval(
2816 struct v4l2_subdev *sd,
2817 struct v4l2_subdev_pad_config *cfg,
2818 struct v4l2_subdev_frame_interval_enum *fie)
2820 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2821 struct v4l2_fract tpf;
2826 if (fie->index >= OV5640_NUM_FRAMERATES)
2830 tpf.denominator = ov5640_framerates[fie->index];
2832 ret = ov5640_try_frame_interval(sensor, &tpf,
2833 fie->width, fie->height);
2837 fie->interval = tpf;
2841 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2842 struct v4l2_subdev_frame_interval *fi)
2844 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2846 mutex_lock(&sensor->lock);
2847 fi->interval = sensor->frame_interval;
2848 mutex_unlock(&sensor->lock);
2853 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2854 struct v4l2_subdev_frame_interval *fi)
2856 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2857 const struct ov5640_mode_info *mode;
2858 int frame_rate, ret = 0;
2863 mutex_lock(&sensor->lock);
2865 if (sensor->streaming) {
2870 mode = sensor->current_mode;
2872 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2873 mode->hact, mode->vact);
2874 if (frame_rate < 0) {
2875 /* Always return a valid frame interval value */
2876 fi->interval = sensor->frame_interval;
2880 mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2887 if (mode != sensor->current_mode ||
2888 frame_rate != sensor->current_fr) {
2889 sensor->current_fr = frame_rate;
2890 sensor->frame_interval = fi->interval;
2891 sensor->current_mode = mode;
2892 sensor->pending_mode_change = true;
2894 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2895 ov5640_calc_pixel_rate(sensor));
2898 mutex_unlock(&sensor->lock);
2902 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2903 struct v4l2_subdev_pad_config *cfg,
2904 struct v4l2_subdev_mbus_code_enum *code)
2908 if (code->index >= ARRAY_SIZE(ov5640_formats))
2911 code->code = ov5640_formats[code->index].code;
2915 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2917 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2920 mutex_lock(&sensor->lock);
2922 if (sensor->streaming == !enable) {
2923 if (enable && sensor->pending_mode_change) {
2924 ret = ov5640_set_mode(sensor);
2929 if (enable && sensor->pending_fmt_change) {
2930 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2933 sensor->pending_fmt_change = false;
2936 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2937 ret = ov5640_set_stream_mipi(sensor, enable);
2939 ret = ov5640_set_stream_dvp(sensor, enable);
2942 sensor->streaming = enable;
2945 mutex_unlock(&sensor->lock);
2949 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2950 .s_power = ov5640_s_power,
2951 .log_status = v4l2_ctrl_subdev_log_status,
2952 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2953 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2956 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2957 .g_frame_interval = ov5640_g_frame_interval,
2958 .s_frame_interval = ov5640_s_frame_interval,
2959 .s_stream = ov5640_s_stream,
2962 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2963 .enum_mbus_code = ov5640_enum_mbus_code,
2964 .get_fmt = ov5640_get_fmt,
2965 .set_fmt = ov5640_set_fmt,
2966 .enum_frame_size = ov5640_enum_frame_size,
2967 .enum_frame_interval = ov5640_enum_frame_interval,
2970 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2971 .core = &ov5640_core_ops,
2972 .video = &ov5640_video_ops,
2973 .pad = &ov5640_pad_ops,
2976 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2980 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2981 sensor->supplies[i].supply = ov5640_supply_name[i];
2983 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2984 OV5640_NUM_SUPPLIES,
2988 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2990 struct i2c_client *client = sensor->i2c_client;
2994 ret = ov5640_set_power_on(sensor);
2998 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3000 dev_err(&client->dev, "%s: failed to read chip identifier\n",
3005 if (chip_id != 0x5640) {
3006 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3012 ov5640_set_power_off(sensor);
3016 static int ov5640_probe(struct i2c_client *client)
3018 struct device *dev = &client->dev;
3019 struct fwnode_handle *endpoint;
3020 struct ov5640_dev *sensor;
3021 struct v4l2_mbus_framefmt *fmt;
3025 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3029 sensor->i2c_client = client;
3032 * default init sequence initialize sensor to
3033 * YUV422 UYVY VGA@30fps
3036 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
3037 fmt->colorspace = V4L2_COLORSPACE_SRGB;
3038 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
3039 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
3040 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
3043 fmt->field = V4L2_FIELD_NONE;
3044 sensor->frame_interval.numerator = 1;
3045 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3046 sensor->current_fr = OV5640_30_FPS;
3047 sensor->current_mode =
3048 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
3049 sensor->last_mode = sensor->current_mode;
3051 sensor->ae_target = 52;
3053 /* optional indication of physical rotation of sensor */
3054 ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3059 sensor->upside_down = true;
3064 dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3069 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3072 dev_err(dev, "endpoint node not found\n");
3076 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3077 fwnode_handle_put(endpoint);
3079 dev_err(dev, "Could not parse endpoint\n");
3083 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3084 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3085 sensor->ep.bus_type != V4L2_MBUS_BT656) {
3086 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3090 /* get system clock (xclk) */
3091 sensor->xclk = devm_clk_get(dev, "xclk");
3092 if (IS_ERR(sensor->xclk)) {
3093 dev_err(dev, "failed to get xclk\n");
3094 return PTR_ERR(sensor->xclk);
3097 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3098 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3099 sensor->xclk_freq > OV5640_XCLK_MAX) {
3100 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3105 /* request optional power down pin */
3106 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3108 if (IS_ERR(sensor->pwdn_gpio))
3109 return PTR_ERR(sensor->pwdn_gpio);
3111 /* request optional reset pin */
3112 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3114 if (IS_ERR(sensor->reset_gpio))
3115 return PTR_ERR(sensor->reset_gpio);
3117 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3119 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3120 V4L2_SUBDEV_FL_HAS_EVENTS;
3121 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3122 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3123 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3127 ret = ov5640_get_regulators(sensor);
3131 mutex_init(&sensor->lock);
3133 ret = ov5640_check_chip_id(sensor);
3135 goto entity_cleanup;
3137 ret = ov5640_init_controls(sensor);
3139 goto entity_cleanup;
3141 ret = v4l2_async_register_subdev_sensor_common(&sensor->sd);
3148 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3150 media_entity_cleanup(&sensor->sd.entity);
3151 mutex_destroy(&sensor->lock);
3155 static int ov5640_remove(struct i2c_client *client)
3157 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3158 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3160 v4l2_async_unregister_subdev(&sensor->sd);
3161 media_entity_cleanup(&sensor->sd.entity);
3162 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3163 mutex_destroy(&sensor->lock);
3168 static const struct i2c_device_id ov5640_id[] = {
3172 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3174 static const struct of_device_id ov5640_dt_ids[] = {
3175 { .compatible = "ovti,ov5640" },
3178 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3180 static struct i2c_driver ov5640_i2c_driver = {
3183 .of_match_table = ov5640_dt_ids,
3185 .id_table = ov5640_id,
3186 .probe_new = ov5640_probe,
3187 .remove = ov5640_remove,
3190 module_i2c_driver(ov5640_i2c_driver);
3192 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3193 MODULE_LICENSE("GPL");