1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2021 Intel Corporation.
4 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/gpio/consumer.h>
9 #include <linux/module.h>
10 #include <linux/pm_runtime.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-fwnode.h>
15 #define OV13B10_REG_VALUE_08BIT 1
16 #define OV13B10_REG_VALUE_16BIT 2
17 #define OV13B10_REG_VALUE_24BIT 3
19 #define OV13B10_REG_MODE_SELECT 0x0100
20 #define OV13B10_MODE_STANDBY 0x00
21 #define OV13B10_MODE_STREAMING 0x01
23 #define OV13B10_REG_SOFTWARE_RST 0x0103
24 #define OV13B10_SOFTWARE_RST 0x01
27 #define OV13B10_REG_CHIP_ID 0x300a
28 #define OV13B10_CHIP_ID 0x560d42
30 /* V_TIMING internal */
31 #define OV13B10_REG_VTS 0x380e
32 #define OV13B10_VTS_30FPS 0x0c7c
33 #define OV13B10_VTS_60FPS 0x063e
34 #define OV13B10_VTS_120FPS 0x0320
35 #define OV13B10_VTS_MAX 0x7fff
37 /* HBLANK control - read only */
38 #define OV13B10_PPL_560MHZ 4704
40 /* Exposure control */
41 #define OV13B10_REG_EXPOSURE 0x3500
42 #define OV13B10_EXPOSURE_MIN 4
43 #define OV13B10_EXPOSURE_STEP 1
44 #define OV13B10_EXPOSURE_DEFAULT 0x40
46 /* Analog gain control */
47 #define OV13B10_REG_ANALOG_GAIN 0x3508
48 #define OV13B10_ANA_GAIN_MIN 0x80
49 #define OV13B10_ANA_GAIN_MAX 0x07c0
50 #define OV13B10_ANA_GAIN_STEP 1
51 #define OV13B10_ANA_GAIN_DEFAULT 0x80
53 /* Digital gain control */
54 #define OV13B10_REG_DGTL_GAIN_H 0x350a
55 #define OV13B10_REG_DGTL_GAIN_M 0x350b
56 #define OV13B10_REG_DGTL_GAIN_L 0x350c
58 #define OV13B10_DGTL_GAIN_MIN 1024 /* Min = 1 X */
59 #define OV13B10_DGTL_GAIN_MAX (4096 - 1) /* Max = 4 X */
60 #define OV13B10_DGTL_GAIN_DEFAULT 2560 /* Default gain = 2.5 X */
61 #define OV13B10_DGTL_GAIN_STEP 1 /* Each step = 1/1024 */
63 #define OV13B10_DGTL_GAIN_L_SHIFT 6
64 #define OV13B10_DGTL_GAIN_L_MASK 0x3
65 #define OV13B10_DGTL_GAIN_M_SHIFT 2
66 #define OV13B10_DGTL_GAIN_M_MASK 0xff
67 #define OV13B10_DGTL_GAIN_H_SHIFT 10
68 #define OV13B10_DGTL_GAIN_H_MASK 0x3
70 /* Test Pattern Control */
71 #define OV13B10_REG_TEST_PATTERN 0x5080
72 #define OV13B10_TEST_PATTERN_ENABLE BIT(7)
73 #define OV13B10_TEST_PATTERN_MASK 0xf3
74 #define OV13B10_TEST_PATTERN_BAR_SHIFT 2
77 #define OV13B10_REG_FORMAT1 0x3820
78 #define OV13B10_REG_FORMAT2 0x3821
80 /* Horizontal Window Offset */
81 #define OV13B10_REG_H_WIN_OFFSET 0x3811
83 /* Vertical Window Offset */
84 #define OV13B10_REG_V_WIN_OFFSET 0x3813
91 struct ov13b10_reg_list {
93 const struct ov13b10_reg *regs;
96 /* Link frequency config */
97 struct ov13b10_link_freq_config {
100 /* registers for this link frequency */
101 struct ov13b10_reg_list reg_list;
104 /* Mode : resolution and related config&values */
105 struct ov13b10_mode {
115 /* Index of Link frequency config to be used */
117 /* Default register values */
118 struct ov13b10_reg_list reg_list;
121 /* 4208x3120 needs 1120Mbps/lane, 4 lanes */
122 static const struct ov13b10_reg mipi_data_rate_1120mbps[] = {
252 static const struct ov13b10_reg mode_4208x3120_regs[] = {
296 static const struct ov13b10_reg mode_4160x3120_regs[] = {
340 static const struct ov13b10_reg mode_4160x2340_regs[] = {
384 static const struct ov13b10_reg mode_2104x1560_regs[] = {
428 static const struct ov13b10_reg mode_2080x1170_regs[] = {
472 static const struct ov13b10_reg mode_1364x768_120fps_regs[] = {
516 static const char * const ov13b10_test_pattern_menu[] = {
518 "Vertical Color Bar Type 1",
519 "Vertical Color Bar Type 2",
520 "Vertical Color Bar Type 3",
521 "Vertical Color Bar Type 4"
524 /* Configurations for supported link frequencies */
525 #define OV13B10_LINK_FREQ_560MHZ 560000000ULL
526 #define OV13B10_LINK_FREQ_INDEX_0 0
528 #define OV13B10_EXT_CLK 19200000
529 #define OV13B10_DATA_LANES 4
532 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample
533 * data rate => double data rate; number of lanes => 4; bits per pixel => 10
535 static u64 link_freq_to_pixel_rate(u64 f)
537 f *= 2 * OV13B10_DATA_LANES;
543 /* Menu items for LINK_FREQ V4L2 control */
544 static const s64 link_freq_menu_items[] = {
545 OV13B10_LINK_FREQ_560MHZ
548 /* Link frequency configs */
549 static const struct ov13b10_link_freq_config
550 link_freq_configs[] = {
552 .pixels_per_line = OV13B10_PPL_560MHZ,
554 .num_of_regs = ARRAY_SIZE(mipi_data_rate_1120mbps),
555 .regs = mipi_data_rate_1120mbps,
561 static const struct ov13b10_mode supported_modes[] = {
565 .vts_def = OV13B10_VTS_30FPS,
566 .vts_min = OV13B10_VTS_30FPS,
568 .num_of_regs = ARRAY_SIZE(mode_4208x3120_regs),
569 .regs = mode_4208x3120_regs,
571 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
576 .vts_def = OV13B10_VTS_30FPS,
577 .vts_min = OV13B10_VTS_30FPS,
579 .num_of_regs = ARRAY_SIZE(mode_4160x3120_regs),
580 .regs = mode_4160x3120_regs,
582 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
587 .vts_def = OV13B10_VTS_30FPS,
588 .vts_min = OV13B10_VTS_30FPS,
590 .num_of_regs = ARRAY_SIZE(mode_4160x2340_regs),
591 .regs = mode_4160x2340_regs,
593 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
598 .vts_def = OV13B10_VTS_60FPS,
599 .vts_min = OV13B10_VTS_60FPS,
601 .num_of_regs = ARRAY_SIZE(mode_2104x1560_regs),
602 .regs = mode_2104x1560_regs,
604 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
609 .vts_def = OV13B10_VTS_60FPS,
610 .vts_min = OV13B10_VTS_60FPS,
612 .num_of_regs = ARRAY_SIZE(mode_2080x1170_regs),
613 .regs = mode_2080x1170_regs,
615 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
620 .vts_def = OV13B10_VTS_120FPS,
621 .vts_min = OV13B10_VTS_120FPS,
622 .link_freq_index = OV13B10_LINK_FREQ_INDEX_0,
624 .num_of_regs = ARRAY_SIZE(mode_1364x768_120fps_regs),
625 .regs = mode_1364x768_120fps_regs,
631 struct v4l2_subdev sd;
632 struct media_pad pad;
634 struct v4l2_ctrl_handler ctrl_handler;
637 struct regulator *avdd;
638 struct gpio_desc *reset;
641 struct v4l2_ctrl *link_freq;
642 struct v4l2_ctrl *pixel_rate;
643 struct v4l2_ctrl *vblank;
644 struct v4l2_ctrl *hblank;
645 struct v4l2_ctrl *exposure;
648 const struct ov13b10_mode *cur_mode;
650 /* Mutex for serialized access */
653 /* True if the device has been identified */
657 #define to_ov13b10(_sd) container_of(_sd, struct ov13b10, sd)
659 /* Read registers up to 4 at a time */
660 static int ov13b10_read_reg(struct ov13b10 *ov13b,
661 u16 reg, u32 len, u32 *val)
663 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
664 struct i2c_msg msgs[2];
668 __be16 reg_addr_be = cpu_to_be16(reg);
673 data_be_p = (u8 *)&data_be;
674 /* Write register address */
675 msgs[0].addr = client->addr;
678 msgs[0].buf = (u8 *)®_addr_be;
680 /* Read data from register */
681 msgs[1].addr = client->addr;
682 msgs[1].flags = I2C_M_RD;
684 msgs[1].buf = &data_be_p[4 - len];
686 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
687 if (ret != ARRAY_SIZE(msgs))
690 *val = be32_to_cpu(data_be);
695 /* Write registers up to 4 at a time */
696 static int ov13b10_write_reg(struct ov13b10 *ov13b,
697 u16 reg, u32 len, u32 __val)
699 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
710 val = cpu_to_be32(__val);
716 buf[buf_i++] = val_p[val_i++];
718 if (i2c_master_send(client, buf, len + 2) != len + 2)
724 /* Write a list of registers */
725 static int ov13b10_write_regs(struct ov13b10 *ov13b,
726 const struct ov13b10_reg *regs, u32 len)
728 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
732 for (i = 0; i < len; i++) {
733 ret = ov13b10_write_reg(ov13b, regs[i].address, 1,
736 dev_err_ratelimited(&client->dev,
737 "Failed to write reg 0x%4.4x. error = %d\n",
738 regs[i].address, ret);
747 static int ov13b10_write_reg_list(struct ov13b10 *ov13b,
748 const struct ov13b10_reg_list *r_list)
750 return ov13b10_write_regs(ov13b, r_list->regs, r_list->num_of_regs);
753 /* Open sub-device */
754 static int ov13b10_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
756 const struct ov13b10_mode *default_mode = &supported_modes[0];
757 struct ov13b10 *ov13b = to_ov13b10(sd);
758 struct v4l2_mbus_framefmt *try_fmt = v4l2_subdev_get_try_format(sd,
762 mutex_lock(&ov13b->mutex);
764 /* Initialize try_fmt */
765 try_fmt->width = default_mode->width;
766 try_fmt->height = default_mode->height;
767 try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
768 try_fmt->field = V4L2_FIELD_NONE;
770 /* No crop or compose */
771 mutex_unlock(&ov13b->mutex);
776 static int ov13b10_update_digital_gain(struct ov13b10 *ov13b, u32 d_gain)
782 * 0x350C[7:6], 0x350B[7:0], 0x350A[1:0]
785 val = (d_gain & OV13B10_DGTL_GAIN_L_MASK) << OV13B10_DGTL_GAIN_L_SHIFT;
786 ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_L,
787 OV13B10_REG_VALUE_08BIT, val);
791 val = (d_gain >> OV13B10_DGTL_GAIN_M_SHIFT) & OV13B10_DGTL_GAIN_M_MASK;
792 ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_M,
793 OV13B10_REG_VALUE_08BIT, val);
797 val = (d_gain >> OV13B10_DGTL_GAIN_H_SHIFT) & OV13B10_DGTL_GAIN_H_MASK;
798 ret = ov13b10_write_reg(ov13b, OV13B10_REG_DGTL_GAIN_H,
799 OV13B10_REG_VALUE_08BIT, val);
804 static int ov13b10_enable_test_pattern(struct ov13b10 *ov13b, u32 pattern)
809 ret = ov13b10_read_reg(ov13b, OV13B10_REG_TEST_PATTERN,
810 OV13B10_REG_VALUE_08BIT, &val);
815 val &= OV13B10_TEST_PATTERN_MASK;
816 val |= ((pattern - 1) << OV13B10_TEST_PATTERN_BAR_SHIFT) |
817 OV13B10_TEST_PATTERN_ENABLE;
819 val &= ~OV13B10_TEST_PATTERN_ENABLE;
822 return ov13b10_write_reg(ov13b, OV13B10_REG_TEST_PATTERN,
823 OV13B10_REG_VALUE_08BIT, val);
826 static int ov13b10_set_ctrl_hflip(struct ov13b10 *ov13b, u32 ctrl_val)
831 ret = ov13b10_read_reg(ov13b, OV13B10_REG_FORMAT1,
832 OV13B10_REG_VALUE_08BIT, &val);
836 ret = ov13b10_write_reg(ov13b, OV13B10_REG_FORMAT1,
837 OV13B10_REG_VALUE_08BIT,
838 ctrl_val ? val & ~BIT(3) : val);
843 ret = ov13b10_read_reg(ov13b, OV13B10_REG_H_WIN_OFFSET,
844 OV13B10_REG_VALUE_08BIT, &val);
849 * Applying cropping offset to reverse the change of Bayer order
850 * after mirroring image
852 return ov13b10_write_reg(ov13b, OV13B10_REG_H_WIN_OFFSET,
853 OV13B10_REG_VALUE_08BIT,
854 ctrl_val ? ++val : val);
857 static int ov13b10_set_ctrl_vflip(struct ov13b10 *ov13b, u32 ctrl_val)
862 ret = ov13b10_read_reg(ov13b, OV13B10_REG_FORMAT1,
863 OV13B10_REG_VALUE_08BIT, &val);
867 ret = ov13b10_write_reg(ov13b, OV13B10_REG_FORMAT1,
868 OV13B10_REG_VALUE_08BIT,
869 ctrl_val ? val | BIT(4) | BIT(5) : val);
874 ret = ov13b10_read_reg(ov13b, OV13B10_REG_V_WIN_OFFSET,
875 OV13B10_REG_VALUE_08BIT, &val);
880 * Applying cropping offset to reverse the change of Bayer order
881 * after flipping image
883 return ov13b10_write_reg(ov13b, OV13B10_REG_V_WIN_OFFSET,
884 OV13B10_REG_VALUE_08BIT,
885 ctrl_val ? --val : val);
888 static int ov13b10_set_ctrl(struct v4l2_ctrl *ctrl)
890 struct ov13b10 *ov13b = container_of(ctrl->handler,
891 struct ov13b10, ctrl_handler);
892 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
896 /* Propagate change of current control to all related controls */
898 case V4L2_CID_VBLANK:
899 /* Update max exposure while meeting expected vblanking */
900 max = ov13b->cur_mode->height + ctrl->val - 8;
901 __v4l2_ctrl_modify_range(ov13b->exposure,
902 ov13b->exposure->minimum,
903 max, ov13b->exposure->step, max);
908 * Applying V4L2 control value only happens
909 * when power is up for streaming
911 if (!pm_runtime_get_if_in_use(&client->dev))
916 case V4L2_CID_ANALOGUE_GAIN:
917 ret = ov13b10_write_reg(ov13b, OV13B10_REG_ANALOG_GAIN,
918 OV13B10_REG_VALUE_16BIT,
921 case V4L2_CID_DIGITAL_GAIN:
922 ret = ov13b10_update_digital_gain(ov13b, ctrl->val);
924 case V4L2_CID_EXPOSURE:
925 ret = ov13b10_write_reg(ov13b, OV13B10_REG_EXPOSURE,
926 OV13B10_REG_VALUE_24BIT,
929 case V4L2_CID_VBLANK:
930 ret = ov13b10_write_reg(ov13b, OV13B10_REG_VTS,
931 OV13B10_REG_VALUE_16BIT,
932 ov13b->cur_mode->height
935 case V4L2_CID_TEST_PATTERN:
936 ret = ov13b10_enable_test_pattern(ov13b, ctrl->val);
939 ov13b10_set_ctrl_hflip(ov13b, ctrl->val);
942 ov13b10_set_ctrl_vflip(ov13b, ctrl->val);
945 dev_info(&client->dev,
946 "ctrl(id:0x%x,val:0x%x) is not handled\n",
947 ctrl->id, ctrl->val);
951 pm_runtime_put(&client->dev);
956 static const struct v4l2_ctrl_ops ov13b10_ctrl_ops = {
957 .s_ctrl = ov13b10_set_ctrl,
960 static int ov13b10_enum_mbus_code(struct v4l2_subdev *sd,
961 struct v4l2_subdev_state *sd_state,
962 struct v4l2_subdev_mbus_code_enum *code)
964 /* Only one bayer order(GRBG) is supported */
968 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
973 static int ov13b10_enum_frame_size(struct v4l2_subdev *sd,
974 struct v4l2_subdev_state *sd_state,
975 struct v4l2_subdev_frame_size_enum *fse)
977 if (fse->index >= ARRAY_SIZE(supported_modes))
980 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
983 fse->min_width = supported_modes[fse->index].width;
984 fse->max_width = fse->min_width;
985 fse->min_height = supported_modes[fse->index].height;
986 fse->max_height = fse->min_height;
991 static void ov13b10_update_pad_format(const struct ov13b10_mode *mode,
992 struct v4l2_subdev_format *fmt)
994 fmt->format.width = mode->width;
995 fmt->format.height = mode->height;
996 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
997 fmt->format.field = V4L2_FIELD_NONE;
1000 static int ov13b10_do_get_pad_format(struct ov13b10 *ov13b,
1001 struct v4l2_subdev_state *sd_state,
1002 struct v4l2_subdev_format *fmt)
1004 struct v4l2_mbus_framefmt *framefmt;
1005 struct v4l2_subdev *sd = &ov13b->sd;
1007 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1008 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
1009 fmt->format = *framefmt;
1011 ov13b10_update_pad_format(ov13b->cur_mode, fmt);
1017 static int ov13b10_get_pad_format(struct v4l2_subdev *sd,
1018 struct v4l2_subdev_state *sd_state,
1019 struct v4l2_subdev_format *fmt)
1021 struct ov13b10 *ov13b = to_ov13b10(sd);
1024 mutex_lock(&ov13b->mutex);
1025 ret = ov13b10_do_get_pad_format(ov13b, sd_state, fmt);
1026 mutex_unlock(&ov13b->mutex);
1032 ov13b10_set_pad_format(struct v4l2_subdev *sd,
1033 struct v4l2_subdev_state *sd_state,
1034 struct v4l2_subdev_format *fmt)
1036 struct ov13b10 *ov13b = to_ov13b10(sd);
1037 const struct ov13b10_mode *mode;
1038 struct v4l2_mbus_framefmt *framefmt;
1045 mutex_lock(&ov13b->mutex);
1047 /* Only one raw bayer(GRBG) order is supported */
1048 if (fmt->format.code != MEDIA_BUS_FMT_SGRBG10_1X10)
1049 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1051 mode = v4l2_find_nearest_size(supported_modes,
1052 ARRAY_SIZE(supported_modes),
1054 fmt->format.width, fmt->format.height);
1055 ov13b10_update_pad_format(mode, fmt);
1056 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1057 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
1058 *framefmt = fmt->format;
1060 ov13b->cur_mode = mode;
1061 __v4l2_ctrl_s_ctrl(ov13b->link_freq, mode->link_freq_index);
1062 link_freq = link_freq_menu_items[mode->link_freq_index];
1063 pixel_rate = link_freq_to_pixel_rate(link_freq);
1064 __v4l2_ctrl_s_ctrl_int64(ov13b->pixel_rate, pixel_rate);
1066 /* Update limits and set FPS to default */
1067 vblank_def = ov13b->cur_mode->vts_def -
1068 ov13b->cur_mode->height;
1069 vblank_min = ov13b->cur_mode->vts_min -
1070 ov13b->cur_mode->height;
1071 __v4l2_ctrl_modify_range(ov13b->vblank, vblank_min,
1073 - ov13b->cur_mode->height,
1076 __v4l2_ctrl_s_ctrl(ov13b->vblank, vblank_def);
1078 link_freq_configs[mode->link_freq_index].pixels_per_line
1079 - ov13b->cur_mode->width;
1080 __v4l2_ctrl_modify_range(ov13b->hblank, h_blank,
1081 h_blank, 1, h_blank);
1084 mutex_unlock(&ov13b->mutex);
1089 /* Verify chip ID */
1090 static int ov13b10_identify_module(struct ov13b10 *ov13b)
1092 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1096 if (ov13b->identified)
1099 ret = ov13b10_read_reg(ov13b, OV13B10_REG_CHIP_ID,
1100 OV13B10_REG_VALUE_24BIT, &val);
1104 if (val != OV13B10_CHIP_ID) {
1105 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1106 OV13B10_CHIP_ID, val);
1110 ov13b->identified = true;
1115 static int ov13b10_power_off(struct device *dev)
1117 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1118 struct ov13b10 *ov13b10 = to_ov13b10(sd);
1120 gpiod_set_value_cansleep(ov13b10->reset, 1);
1123 regulator_disable(ov13b10->avdd);
1125 clk_disable_unprepare(ov13b10->img_clk);
1130 static int ov13b10_power_on(struct device *dev)
1132 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1133 struct ov13b10 *ov13b10 = to_ov13b10(sd);
1136 ret = clk_prepare_enable(ov13b10->img_clk);
1138 dev_err(dev, "failed to enable imaging clock: %d", ret);
1142 if (ov13b10->avdd) {
1143 ret = regulator_enable(ov13b10->avdd);
1145 dev_err(dev, "failed to enable avdd: %d", ret);
1146 clk_disable_unprepare(ov13b10->img_clk);
1151 gpiod_set_value_cansleep(ov13b10->reset, 0);
1152 /* 5ms to wait ready after XSHUTDN assert */
1153 usleep_range(5000, 5500);
1158 static int ov13b10_start_streaming(struct ov13b10 *ov13b)
1160 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1161 const struct ov13b10_reg_list *reg_list;
1162 int ret, link_freq_index;
1164 ret = ov13b10_identify_module(ov13b);
1168 /* Get out of from software reset */
1169 ret = ov13b10_write_reg(ov13b, OV13B10_REG_SOFTWARE_RST,
1170 OV13B10_REG_VALUE_08BIT, OV13B10_SOFTWARE_RST);
1172 dev_err(&client->dev, "%s failed to set powerup registers\n",
1177 link_freq_index = ov13b->cur_mode->link_freq_index;
1178 reg_list = &link_freq_configs[link_freq_index].reg_list;
1179 ret = ov13b10_write_reg_list(ov13b, reg_list);
1181 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1185 /* Apply default values of current mode */
1186 reg_list = &ov13b->cur_mode->reg_list;
1187 ret = ov13b10_write_reg_list(ov13b, reg_list);
1189 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1193 /* Apply customized values from user */
1194 ret = __v4l2_ctrl_handler_setup(ov13b->sd.ctrl_handler);
1198 return ov13b10_write_reg(ov13b, OV13B10_REG_MODE_SELECT,
1199 OV13B10_REG_VALUE_08BIT,
1200 OV13B10_MODE_STREAMING);
1203 /* Stop streaming */
1204 static int ov13b10_stop_streaming(struct ov13b10 *ov13b)
1206 return ov13b10_write_reg(ov13b, OV13B10_REG_MODE_SELECT,
1207 OV13B10_REG_VALUE_08BIT, OV13B10_MODE_STANDBY);
1210 static int ov13b10_set_stream(struct v4l2_subdev *sd, int enable)
1212 struct ov13b10 *ov13b = to_ov13b10(sd);
1213 struct i2c_client *client = v4l2_get_subdevdata(sd);
1216 mutex_lock(&ov13b->mutex);
1219 ret = pm_runtime_resume_and_get(&client->dev);
1224 * Apply default & customized values
1225 * and then start streaming.
1227 ret = ov13b10_start_streaming(ov13b);
1231 ov13b10_stop_streaming(ov13b);
1232 pm_runtime_put(&client->dev);
1235 mutex_unlock(&ov13b->mutex);
1240 pm_runtime_put(&client->dev);
1242 mutex_unlock(&ov13b->mutex);
1247 static int ov13b10_suspend(struct device *dev)
1249 ov13b10_power_off(dev);
1254 static int ov13b10_resume(struct device *dev)
1256 return ov13b10_power_on(dev);
1259 static const struct v4l2_subdev_video_ops ov13b10_video_ops = {
1260 .s_stream = ov13b10_set_stream,
1263 static const struct v4l2_subdev_pad_ops ov13b10_pad_ops = {
1264 .enum_mbus_code = ov13b10_enum_mbus_code,
1265 .get_fmt = ov13b10_get_pad_format,
1266 .set_fmt = ov13b10_set_pad_format,
1267 .enum_frame_size = ov13b10_enum_frame_size,
1270 static const struct v4l2_subdev_ops ov13b10_subdev_ops = {
1271 .video = &ov13b10_video_ops,
1272 .pad = &ov13b10_pad_ops,
1275 static const struct media_entity_operations ov13b10_subdev_entity_ops = {
1276 .link_validate = v4l2_subdev_link_validate,
1279 static const struct v4l2_subdev_internal_ops ov13b10_internal_ops = {
1280 .open = ov13b10_open,
1283 /* Initialize control handlers */
1284 static int ov13b10_init_controls(struct ov13b10 *ov13b)
1286 struct i2c_client *client = v4l2_get_subdevdata(&ov13b->sd);
1287 struct v4l2_fwnode_device_properties props;
1288 struct v4l2_ctrl_handler *ctrl_hdlr;
1295 const struct ov13b10_mode *mode;
1299 ctrl_hdlr = &ov13b->ctrl_handler;
1300 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
1304 mutex_init(&ov13b->mutex);
1305 ctrl_hdlr->lock = &ov13b->mutex;
1306 max = ARRAY_SIZE(link_freq_menu_items) - 1;
1307 ov13b->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1312 link_freq_menu_items);
1313 if (ov13b->link_freq)
1314 ov13b->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1316 pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]);
1318 /* By default, PIXEL_RATE is read only */
1319 ov13b->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1320 V4L2_CID_PIXEL_RATE,
1321 pixel_rate_min, pixel_rate_max,
1324 mode = ov13b->cur_mode;
1325 vblank_def = mode->vts_def - mode->height;
1326 vblank_min = mode->vts_min - mode->height;
1327 ov13b->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1330 OV13B10_VTS_MAX - mode->height, 1,
1333 hblank = link_freq_configs[mode->link_freq_index].pixels_per_line -
1335 ov13b->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1337 hblank, hblank, 1, hblank);
1339 ov13b->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1341 exposure_max = mode->vts_def - 8;
1342 ov13b->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1344 OV13B10_EXPOSURE_MIN,
1345 exposure_max, OV13B10_EXPOSURE_STEP,
1348 v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1349 OV13B10_ANA_GAIN_MIN, OV13B10_ANA_GAIN_MAX,
1350 OV13B10_ANA_GAIN_STEP, OV13B10_ANA_GAIN_DEFAULT);
1353 v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1354 OV13B10_DGTL_GAIN_MIN, OV13B10_DGTL_GAIN_MAX,
1355 OV13B10_DGTL_GAIN_STEP, OV13B10_DGTL_GAIN_DEFAULT);
1357 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov13b10_ctrl_ops,
1358 V4L2_CID_TEST_PATTERN,
1359 ARRAY_SIZE(ov13b10_test_pattern_menu) - 1,
1360 0, 0, ov13b10_test_pattern_menu);
1362 v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1363 V4L2_CID_HFLIP, 0, 1, 1, 0);
1364 v4l2_ctrl_new_std(ctrl_hdlr, &ov13b10_ctrl_ops,
1365 V4L2_CID_VFLIP, 0, 1, 1, 0);
1367 if (ctrl_hdlr->error) {
1368 ret = ctrl_hdlr->error;
1369 dev_err(&client->dev, "%s control init failed (%d)\n",
1374 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1378 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov13b10_ctrl_ops,
1383 ov13b->sd.ctrl_handler = ctrl_hdlr;
1388 v4l2_ctrl_handler_free(ctrl_hdlr);
1389 mutex_destroy(&ov13b->mutex);
1394 static void ov13b10_free_controls(struct ov13b10 *ov13b)
1396 v4l2_ctrl_handler_free(ov13b->sd.ctrl_handler);
1397 mutex_destroy(&ov13b->mutex);
1400 static int ov13b10_get_pm_resources(struct device *dev)
1402 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1403 struct ov13b10 *ov13b = to_ov13b10(sd);
1406 ov13b->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
1407 if (IS_ERR(ov13b->reset))
1408 return dev_err_probe(dev, PTR_ERR(ov13b->reset),
1409 "failed to get reset gpio\n");
1411 ov13b->img_clk = devm_clk_get_optional(dev, NULL);
1412 if (IS_ERR(ov13b->img_clk))
1413 return dev_err_probe(dev, PTR_ERR(ov13b->img_clk),
1414 "failed to get imaging clock\n");
1416 ov13b->avdd = devm_regulator_get_optional(dev, "avdd");
1417 if (IS_ERR(ov13b->avdd)) {
1418 ret = PTR_ERR(ov13b->avdd);
1421 return dev_err_probe(dev, ret,
1422 "failed to get avdd regulator\n");
1428 static int ov13b10_check_hwcfg(struct device *dev)
1430 struct v4l2_fwnode_endpoint bus_cfg = {
1431 .bus_type = V4L2_MBUS_CSI2_DPHY
1433 struct fwnode_handle *ep;
1434 struct fwnode_handle *fwnode = dev_fwnode(dev);
1442 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1444 return -EPROBE_DEFER;
1446 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
1449 dev_err(dev, "can't get clock frequency");
1453 if (ext_clk != OV13B10_EXT_CLK) {
1454 dev_err(dev, "external clock %d is not supported",
1459 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1460 fwnode_handle_put(ep);
1464 if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV13B10_DATA_LANES) {
1465 dev_err(dev, "number of CSI2 data lanes %d is not supported",
1466 bus_cfg.bus.mipi_csi2.num_data_lanes);
1471 if (!bus_cfg.nr_of_link_frequencies) {
1472 dev_err(dev, "no link frequencies defined");
1477 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1478 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1479 if (link_freq_menu_items[i] ==
1480 bus_cfg.link_frequencies[j])
1484 if (j == bus_cfg.nr_of_link_frequencies) {
1485 dev_err(dev, "no link frequency %lld supported",
1486 link_freq_menu_items[i]);
1493 v4l2_fwnode_endpoint_free(&bus_cfg);
1498 static int ov13b10_probe(struct i2c_client *client)
1500 struct ov13b10 *ov13b;
1504 /* Check HW config */
1505 ret = ov13b10_check_hwcfg(&client->dev);
1507 dev_err(&client->dev, "failed to check hwcfg: %d", ret);
1511 ov13b = devm_kzalloc(&client->dev, sizeof(*ov13b), GFP_KERNEL);
1515 /* Initialize subdev */
1516 v4l2_i2c_subdev_init(&ov13b->sd, client, &ov13b10_subdev_ops);
1518 ret = ov13b10_get_pm_resources(&client->dev);
1522 full_power = acpi_dev_state_d0(&client->dev);
1524 ret = ov13b10_power_on(&client->dev);
1526 dev_err(&client->dev, "failed to power on\n");
1530 /* Check module identity */
1531 ret = ov13b10_identify_module(ov13b);
1533 dev_err(&client->dev, "failed to find sensor: %d\n", ret);
1534 goto error_power_off;
1538 /* Set default mode to max resolution */
1539 ov13b->cur_mode = &supported_modes[0];
1541 ret = ov13b10_init_controls(ov13b);
1543 goto error_power_off;
1545 /* Initialize subdev */
1546 ov13b->sd.internal_ops = &ov13b10_internal_ops;
1547 ov13b->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1548 ov13b->sd.entity.ops = &ov13b10_subdev_entity_ops;
1549 ov13b->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1551 /* Initialize source pad */
1552 ov13b->pad.flags = MEDIA_PAD_FL_SOURCE;
1553 ret = media_entity_pads_init(&ov13b->sd.entity, 1, &ov13b->pad);
1555 dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1556 goto error_handler_free;
1561 * Device is already turned on by i2c-core with ACPI domain PM.
1562 * Enable runtime PM and turn off the device.
1564 /* Set the device's state to active if it's in D0 state. */
1566 pm_runtime_set_active(&client->dev);
1567 pm_runtime_enable(&client->dev);
1568 pm_runtime_idle(&client->dev);
1570 ret = v4l2_async_register_subdev_sensor(&ov13b->sd);
1572 goto error_media_entity_runtime_pm;
1576 error_media_entity_runtime_pm:
1577 pm_runtime_disable(&client->dev);
1579 pm_runtime_set_suspended(&client->dev);
1580 media_entity_cleanup(&ov13b->sd.entity);
1583 ov13b10_free_controls(ov13b);
1584 dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1587 ov13b10_power_off(&client->dev);
1592 static void ov13b10_remove(struct i2c_client *client)
1594 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1595 struct ov13b10 *ov13b = to_ov13b10(sd);
1597 v4l2_async_unregister_subdev(sd);
1598 media_entity_cleanup(&sd->entity);
1599 ov13b10_free_controls(ov13b);
1601 pm_runtime_disable(&client->dev);
1602 pm_runtime_set_suspended(&client->dev);
1605 static DEFINE_RUNTIME_DEV_PM_OPS(ov13b10_pm_ops, ov13b10_suspend,
1606 ov13b10_resume, NULL);
1609 static const struct acpi_device_id ov13b10_acpi_ids[] = {
1615 MODULE_DEVICE_TABLE(acpi, ov13b10_acpi_ids);
1618 static struct i2c_driver ov13b10_i2c_driver = {
1621 .pm = pm_ptr(&ov13b10_pm_ops),
1622 .acpi_match_table = ACPI_PTR(ov13b10_acpi_ids),
1624 .probe = ov13b10_probe,
1625 .remove = ov13b10_remove,
1626 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1629 module_i2c_driver(ov13b10_i2c_driver);
1631 MODULE_AUTHOR("Kao, Arec <arec.kao@intel.com>");
1632 MODULE_DESCRIPTION("Omnivision ov13b10 sensor driver");
1633 MODULE_LICENSE("GPL v2");