1 // SPDX-License-Identifier: GPL-2.0+
3 * Maxim MAX9286 GMSL Deserializer Driver
5 * Copyright (C) 2017-2019 Jacopo Mondi
6 * Copyright (C) 2017-2019 Kieran Bingham
7 * Copyright (C) 2017-2019 Laurent Pinchart
8 * Copyright (C) 2017-2019 Niklas Söderlund
9 * Copyright (C) 2016 Renesas Electronics Corporation
10 * Copyright (C) 2015 Cogent Embedded, Inc.
13 #include <linux/delay.h>
14 #include <linux/device.h>
15 #include <linux/fwnode.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c-mux.h>
20 #include <linux/module.h>
21 #include <linux/mutex.h>
22 #include <linux/of_graph.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
26 #include <media/v4l2-async.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-subdev.h>
33 #define MAX9286_MSTLINKSEL_AUTO (7 << 5)
34 #define MAX9286_MSTLINKSEL(n) ((n) << 5)
35 #define MAX9286_EN_VS_GEN BIT(4)
36 #define MAX9286_LINKEN(n) (1 << (n))
38 #define MAX9286_FSYNCMODE_ECU (3 << 6)
39 #define MAX9286_FSYNCMODE_EXT (2 << 6)
40 #define MAX9286_FSYNCMODE_INT_OUT (1 << 6)
41 #define MAX9286_FSYNCMODE_INT_HIZ (0 << 6)
42 #define MAX9286_GPIEN BIT(5)
43 #define MAX9286_ENLMO_RSTFSYNC BIT(2)
44 #define MAX9286_FSYNCMETH_AUTO (2 << 0)
45 #define MAX9286_FSYNCMETH_SEMI_AUTO (1 << 0)
46 #define MAX9286_FSYNCMETH_MANUAL (0 << 0)
47 #define MAX9286_REG_FSYNC_PERIOD_L 0x06
48 #define MAX9286_REG_FSYNC_PERIOD_M 0x07
49 #define MAX9286_REG_FSYNC_PERIOD_H 0x08
51 #define MAX9286_FWDCCEN(n) (1 << ((n) + 4))
52 #define MAX9286_REVCCEN(n) (1 << (n))
54 #define MAX9286_HVEN BIT(7)
55 #define MAX9286_EDC_6BIT_HAMMING (2 << 5)
56 #define MAX9286_EDC_6BIT_CRC (1 << 5)
57 #define MAX9286_EDC_1BIT_PARITY (0 << 5)
58 #define MAX9286_DESEL BIT(4)
59 #define MAX9286_INVVS BIT(3)
60 #define MAX9286_INVHS BIT(2)
61 #define MAX9286_HVSRC_D0 (2 << 0)
62 #define MAX9286_HVSRC_D14 (1 << 0)
63 #define MAX9286_HVSRC_D18 (0 << 0)
65 #define MAX9286_0X0F_RESERVED BIT(3)
67 #define MAX9286_CSILANECNT(n) (((n) - 1) << 6)
68 #define MAX9286_CSIDBL BIT(5)
69 #define MAX9286_DBL BIT(4)
70 #define MAX9286_DATATYPE_USER_8BIT (11 << 0)
71 #define MAX9286_DATATYPE_USER_YUV_12BIT (10 << 0)
72 #define MAX9286_DATATYPE_USER_24BIT (9 << 0)
73 #define MAX9286_DATATYPE_RAW14 (8 << 0)
74 #define MAX9286_DATATYPE_RAW11 (7 << 0)
75 #define MAX9286_DATATYPE_RAW10 (6 << 0)
76 #define MAX9286_DATATYPE_RAW8 (5 << 0)
77 #define MAX9286_DATATYPE_YUV422_10BIT (4 << 0)
78 #define MAX9286_DATATYPE_YUV422_8BIT (3 << 0)
79 #define MAX9286_DATATYPE_RGB555 (2 << 0)
80 #define MAX9286_DATATYPE_RGB565 (1 << 0)
81 #define MAX9286_DATATYPE_RGB888 (0 << 0)
83 #define MAX9286_VC(n) ((n) << 5)
84 #define MAX9286_VCTYPE BIT(4)
85 #define MAX9286_CSIOUTEN BIT(3)
86 #define MAX9286_0X15_RESV (3 << 0)
88 #define MAX9286_SWITCHIN(n) (1 << ((n) + 4))
89 #define MAX9286_ENEQ(n) (1 << (n))
91 #define MAX9286_LOCKED BIT(7)
93 #define MAX9286_FSYNC_LOCKED BIT(6)
95 #define MAX9286_I2CLOCACK BIT(7)
96 #define MAX9286_I2CSLVSH_1046NS_469NS (3 << 5)
97 #define MAX9286_I2CSLVSH_938NS_352NS (2 << 5)
98 #define MAX9286_I2CSLVSH_469NS_234NS (1 << 5)
99 #define MAX9286_I2CSLVSH_352NS_117NS (0 << 5)
100 #define MAX9286_I2CMSTBT_837KBPS (7 << 2)
101 #define MAX9286_I2CMSTBT_533KBPS (6 << 2)
102 #define MAX9286_I2CMSTBT_339KBPS (5 << 2)
103 #define MAX9286_I2CMSTBT_173KBPS (4 << 2)
104 #define MAX9286_I2CMSTBT_105KBPS (3 << 2)
105 #define MAX9286_I2CMSTBT_84KBPS (2 << 2)
106 #define MAX9286_I2CMSTBT_28KBPS (1 << 2)
107 #define MAX9286_I2CMSTBT_8KBPS (0 << 2)
108 #define MAX9286_I2CSLVTO_NONE (3 << 0)
109 #define MAX9286_I2CSLVTO_1024US (2 << 0)
110 #define MAX9286_I2CSLVTO_256US (1 << 0)
111 #define MAX9286_I2CSLVTO_64US (0 << 0)
113 #define MAX9286_REV_TRF(n) ((n) << 4)
114 #define MAX9286_REV_AMP(n) ((((n) - 30) / 10) << 1) /* in mV */
115 #define MAX9286_REV_AMP_X BIT(0)
117 #define MAX9286_EN_REV_CFG BIT(6)
118 #define MAX9286_REV_FLEN(n) ((n) - 20)
120 #define MAX9286_VIDEO_DETECT_MASK 0x0f
122 #define MAX9286_LFLTBMONMASKED BIT(7)
123 #define MAX9286_LOCKMONMASKED BIT(6)
124 #define MAX9286_AUTOCOMBACKEN BIT(5)
125 #define MAX9286_AUTOMASKEN BIT(4)
126 #define MAX9286_MASKLINK(n) ((n) << 0)
129 * The sink and source pads are created to match the OF graph port numbers so
130 * that their indexes can be used interchangeably.
132 #define MAX9286_NUM_GMSL 4
133 #define MAX9286_N_SINKS 4
134 #define MAX9286_N_PADS 5
135 #define MAX9286_SRC_PAD 4
137 struct max9286_source {
138 struct v4l2_subdev *sd;
139 struct fwnode_handle *fwnode;
143 struct v4l2_async_subdev base;
144 struct max9286_source *source;
147 static inline struct max9286_asd *to_max9286_asd(struct v4l2_async_subdev *asd)
149 return container_of(asd, struct max9286_asd, base);
152 struct max9286_priv {
153 struct i2c_client *client;
154 struct gpio_desc *gpiod_pwdn;
155 struct v4l2_subdev sd;
156 struct media_pad pads[MAX9286_N_PADS];
157 struct regulator *regulator;
159 struct gpio_chip gpio;
162 struct i2c_mux_core *mux;
163 unsigned int mux_channel;
166 struct v4l2_ctrl_handler ctrls;
167 struct v4l2_ctrl *pixelrate;
169 struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
171 /* Protects controls and fmt structures */
174 unsigned int nsources;
175 unsigned int source_mask;
176 unsigned int route_mask;
177 unsigned int bound_sources;
178 unsigned int csi2_data_lanes;
179 struct max9286_source sources[MAX9286_NUM_GMSL];
180 struct v4l2_async_notifier notifier;
183 static struct max9286_source *next_source(struct max9286_priv *priv,
184 struct max9286_source *source)
187 source = &priv->sources[0];
191 for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
199 #define for_each_source(priv, source) \
200 for ((source) = NULL; ((source) = next_source((priv), (source))); )
202 #define to_index(priv, source) ((source) - &(priv)->sources[0])
204 static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
206 return container_of(sd, struct max9286_priv, sd);
209 /* -----------------------------------------------------------------------------
213 static int max9286_read(struct max9286_priv *priv, u8 reg)
217 ret = i2c_smbus_read_byte_data(priv->client, reg);
219 dev_err(&priv->client->dev,
220 "%s: register 0x%02x read failed (%d)\n",
226 static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
230 ret = i2c_smbus_write_byte_data(priv->client, reg, val);
232 dev_err(&priv->client->dev,
233 "%s: register 0x%02x write failed (%d)\n",
239 /* -----------------------------------------------------------------------------
243 static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
245 max9286_write(priv, 0x0a, conf);
248 * We must sleep after any change to the forward or reverse channel
251 usleep_range(3000, 5000);
254 static void max9286_i2c_mux_open(struct max9286_priv *priv)
256 /* Open all channels on the MAX9286 */
257 max9286_i2c_mux_configure(priv, 0xff);
259 priv->mux_open = true;
262 static void max9286_i2c_mux_close(struct max9286_priv *priv)
265 * Ensure that both the forward and reverse channel are disabled on the
266 * mux, and that the channel ID is invalidated to ensure we reconfigure
267 * on the next max9286_i2c_mux_select() call.
269 max9286_i2c_mux_configure(priv, 0x00);
271 priv->mux_open = false;
272 priv->mux_channel = -1;
275 static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
277 struct max9286_priv *priv = i2c_mux_priv(muxc);
279 /* Channel select is disabled when configured in the opened state. */
283 if (priv->mux_channel == chan)
286 priv->mux_channel = chan;
288 max9286_i2c_mux_configure(priv,
289 MAX9286_FWDCCEN(chan) |
290 MAX9286_REVCCEN(chan));
295 static int max9286_i2c_mux_init(struct max9286_priv *priv)
297 struct max9286_source *source;
300 if (!i2c_check_functionality(priv->client->adapter,
301 I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
304 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
305 priv->nsources, 0, I2C_MUX_LOCKED,
306 max9286_i2c_mux_select, NULL);
310 priv->mux->priv = priv;
312 for_each_source(priv, source) {
313 unsigned int index = to_index(priv, source);
315 ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
323 i2c_mux_del_adapters(priv->mux);
327 static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
329 u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
330 MAX9286_I2CMSTBT_105KBPS;
333 config |= MAX9286_I2CLOCACK;
335 max9286_write(priv, 0x34, config);
336 usleep_range(3000, 5000);
340 * max9286_check_video_links() - Make sure video links are detected and locked
342 * Performs safety checks on video link status. Make sure they are detected
343 * and all enabled links are locked.
345 * Returns 0 for success, -EIO for errors.
347 static int max9286_check_video_links(struct max9286_priv *priv)
353 * Make sure valid video links are detected.
354 * The delay is not characterized in de-serializer manual, wait up
357 for (i = 0; i < 10; i++) {
358 ret = max9286_read(priv, 0x49);
362 if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
365 usleep_range(350, 500);
369 dev_err(&priv->client->dev,
370 "Unable to detect video links: 0x%02x\n", ret);
374 /* Make sure all enabled links are locked (4ms max). */
375 for (i = 0; i < 10; i++) {
376 ret = max9286_read(priv, 0x27);
380 if (ret & MAX9286_LOCKED)
383 usleep_range(350, 450);
387 dev_err(&priv->client->dev, "Not all enabled links locked\n");
395 * max9286_check_config_link() - Detect and wait for configuration links
397 * Determine if the configuration channel is up and settled for a link.
399 * Returns 0 for success, -EIO for errors.
401 static int max9286_check_config_link(struct max9286_priv *priv,
402 unsigned int source_mask)
404 unsigned int conflink_mask = (source_mask & 0x0f) << 4;
409 * Make sure requested configuration links are detected.
410 * The delay is not characterized in the chip manual: wait up
413 for (i = 0; i < 10; i++) {
414 ret = max9286_read(priv, 0x49);
419 if (ret == conflink_mask)
422 usleep_range(350, 500);
425 if (ret != conflink_mask) {
426 dev_err(&priv->client->dev,
427 "Unable to detect configuration links: 0x%02x expected 0x%02x\n",
432 dev_info(&priv->client->dev,
433 "Successfully detected configuration links after %u loops: 0x%02x\n",
439 /* -----------------------------------------------------------------------------
443 static int max9286_set_pixelrate(struct max9286_priv *priv)
445 struct max9286_source *source = NULL;
448 for_each_source(priv, source) {
449 struct v4l2_ctrl *ctrl;
452 /* Pixel rate is mandatory to be reported by sources. */
453 ctrl = v4l2_ctrl_find(source->sd->ctrl_handler,
454 V4L2_CID_PIXEL_RATE);
460 /* All source must report the same pixel rate. */
461 source_rate = v4l2_ctrl_g_ctrl_int64(ctrl);
463 pixelrate = source_rate;
464 } else if (pixelrate != source_rate) {
465 dev_err(&priv->client->dev,
466 "Unable to calculate pixel rate\n");
472 dev_err(&priv->client->dev,
473 "No pixel rate control available in sources\n");
478 * The CSI-2 transmitter pixel rate is the single source rate multiplied
479 * by the number of available sources.
481 return v4l2_ctrl_s_ctrl_int64(priv->pixelrate,
482 pixelrate * priv->nsources);
485 static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
486 struct v4l2_subdev *subdev,
487 struct v4l2_async_subdev *asd)
489 struct max9286_priv *priv = sd_to_max9286(notifier->sd);
490 struct max9286_source *source = to_max9286_asd(asd)->source;
491 unsigned int index = to_index(priv, source);
492 unsigned int src_pad;
495 ret = media_entity_get_fwnode_pad(&subdev->entity,
497 MEDIA_PAD_FL_SOURCE);
499 dev_err(&priv->client->dev,
500 "Failed to find pad for %s\n", subdev->name);
504 priv->bound_sources |= BIT(index);
508 ret = media_create_pad_link(&source->sd->entity, src_pad,
509 &priv->sd.entity, index,
510 MEDIA_LNK_FL_ENABLED |
511 MEDIA_LNK_FL_IMMUTABLE);
513 dev_err(&priv->client->dev,
514 "Unable to link %s:%u -> %s:%u\n",
515 source->sd->name, src_pad, priv->sd.name, index);
519 dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
520 subdev->name, src_pad, index);
523 * We can only register v4l2_async_notifiers, which do not provide a
524 * means to register a complete callback. bound_sources allows us to
525 * identify when all remote serializers have completed their probe.
527 if (priv->bound_sources != priv->source_mask)
531 * All enabled sources have probed and enabled their reverse control
534 * - Verify all configuration links are properly detected
535 * - Disable auto-ack as communication on the control channel are now
538 max9286_check_config_link(priv, priv->source_mask);
541 * Re-configure I2C with local acknowledge disabled after cameras have
544 max9286_configure_i2c(priv, false);
546 return max9286_set_pixelrate(priv);
549 static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
550 struct v4l2_subdev *subdev,
551 struct v4l2_async_subdev *asd)
553 struct max9286_priv *priv = sd_to_max9286(notifier->sd);
554 struct max9286_source *source = to_max9286_asd(asd)->source;
555 unsigned int index = to_index(priv, source);
558 priv->bound_sources &= ~BIT(index);
561 static const struct v4l2_async_notifier_operations max9286_notify_ops = {
562 .bound = max9286_notify_bound,
563 .unbind = max9286_notify_unbind,
566 static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
568 struct device *dev = &priv->client->dev;
569 struct max9286_source *source = NULL;
575 v4l2_async_notifier_init(&priv->notifier);
577 for_each_source(priv, source) {
578 unsigned int i = to_index(priv, source);
579 struct v4l2_async_subdev *asd;
581 asd = v4l2_async_notifier_add_fwnode_subdev(&priv->notifier,
583 sizeof(struct max9286_asd));
585 dev_err(dev, "Failed to add subdev for source %u: %ld",
587 v4l2_async_notifier_cleanup(&priv->notifier);
591 to_max9286_asd(asd)->source = source;
594 priv->notifier.ops = &max9286_notify_ops;
596 ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
598 dev_err(dev, "Failed to register subdev_notifier");
599 v4l2_async_notifier_cleanup(&priv->notifier);
606 static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
611 v4l2_async_notifier_unregister(&priv->notifier);
612 v4l2_async_notifier_cleanup(&priv->notifier);
615 static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
617 struct max9286_priv *priv = sd_to_max9286(sd);
618 struct max9286_source *source;
625 * The frame sync between cameras is transmitted across the
626 * reverse channel as GPIO. We must open all channels while
627 * streaming to allow this synchronisation signal to be shared.
629 max9286_i2c_mux_open(priv);
631 /* Start all cameras. */
632 for_each_source(priv, source) {
633 ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
638 ret = max9286_check_video_links(priv);
643 * Wait until frame synchronization is locked.
645 * Manual says frame sync locking should take ~6 VTS.
646 * From practical experience at least 8 are required. Give
647 * 12 complete frames time (~400ms at 30 fps) to achieve frame
648 * locking before returning error.
650 for (i = 0; i < 40; i++) {
651 if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
655 usleep_range(9000, 11000);
659 dev_err(&priv->client->dev,
660 "Failed to get frame synchronization\n");
661 return -EXDEV; /* Invalid cross-device link */
665 * Enable CSI output, VC set according to link number.
666 * Bit 7 must be set (chip manual says it's 0 and reserved).
668 max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
669 MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
671 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
673 /* Stop all cameras. */
674 for_each_source(priv, source)
675 v4l2_subdev_call(source->sd, video, s_stream, 0);
677 max9286_i2c_mux_close(priv);
683 static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
684 struct v4l2_subdev_pad_config *cfg,
685 struct v4l2_subdev_mbus_code_enum *code)
687 if (code->pad || code->index > 0)
690 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
695 static struct v4l2_mbus_framefmt *
696 max9286_get_pad_format(struct max9286_priv *priv,
697 struct v4l2_subdev_pad_config *cfg,
698 unsigned int pad, u32 which)
701 case V4L2_SUBDEV_FORMAT_TRY:
702 return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
703 case V4L2_SUBDEV_FORMAT_ACTIVE:
704 return &priv->fmt[pad];
710 static int max9286_set_fmt(struct v4l2_subdev *sd,
711 struct v4l2_subdev_pad_config *cfg,
712 struct v4l2_subdev_format *format)
714 struct max9286_priv *priv = sd_to_max9286(sd);
715 struct v4l2_mbus_framefmt *cfg_fmt;
717 if (format->pad == MAX9286_SRC_PAD)
720 /* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
721 switch (format->format.code) {
722 case MEDIA_BUS_FMT_UYVY8_1X16:
723 case MEDIA_BUS_FMT_VYUY8_1X16:
724 case MEDIA_BUS_FMT_YUYV8_1X16:
725 case MEDIA_BUS_FMT_YVYU8_1X16:
728 format->format.code = MEDIA_BUS_FMT_UYVY8_1X16;
732 cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
736 mutex_lock(&priv->mutex);
737 *cfg_fmt = format->format;
738 mutex_unlock(&priv->mutex);
743 static int max9286_get_fmt(struct v4l2_subdev *sd,
744 struct v4l2_subdev_pad_config *cfg,
745 struct v4l2_subdev_format *format)
747 struct max9286_priv *priv = sd_to_max9286(sd);
748 struct v4l2_mbus_framefmt *cfg_fmt;
749 unsigned int pad = format->pad;
752 * Multiplexed Stream Support: Support link validation by returning the
753 * format of the first bound link. All links must have the same format,
754 * as we do not support mixing and matching of cameras connected to the
757 if (pad == MAX9286_SRC_PAD)
758 pad = __ffs(priv->bound_sources);
760 cfg_fmt = max9286_get_pad_format(priv, cfg, pad, format->which);
764 mutex_lock(&priv->mutex);
765 format->format = *cfg_fmt;
766 mutex_unlock(&priv->mutex);
771 static const struct v4l2_subdev_video_ops max9286_video_ops = {
772 .s_stream = max9286_s_stream,
775 static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
776 .enum_mbus_code = max9286_enum_mbus_code,
777 .get_fmt = max9286_get_fmt,
778 .set_fmt = max9286_set_fmt,
781 static const struct v4l2_subdev_ops max9286_subdev_ops = {
782 .video = &max9286_video_ops,
783 .pad = &max9286_pad_ops,
786 static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
790 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
791 fmt->colorspace = V4L2_COLORSPACE_SRGB;
792 fmt->field = V4L2_FIELD_NONE;
793 fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
794 fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
795 fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
798 static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
800 struct v4l2_mbus_framefmt *format;
803 for (i = 0; i < MAX9286_N_SINKS; i++) {
804 format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
805 max9286_init_format(format);
811 static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
812 .open = max9286_open,
815 static int max9286_s_ctrl(struct v4l2_ctrl *ctrl)
818 case V4L2_CID_PIXEL_RATE:
825 static const struct v4l2_ctrl_ops max9286_ctrl_ops = {
826 .s_ctrl = max9286_s_ctrl,
829 static int max9286_v4l2_register(struct max9286_priv *priv)
831 struct device *dev = &priv->client->dev;
832 struct fwnode_handle *ep;
836 /* Register v4l2 async notifiers for connected Camera subdevices */
837 ret = max9286_v4l2_notifier_register(priv);
839 dev_err(dev, "Unable to register V4L2 async notifiers\n");
843 /* Configure V4L2 for the MAX9286 itself */
845 for (i = 0; i < MAX9286_N_SINKS; i++)
846 max9286_init_format(&priv->fmt[i]);
848 v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
849 priv->sd.internal_ops = &max9286_subdev_internal_ops;
850 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
852 v4l2_ctrl_handler_init(&priv->ctrls, 1);
853 priv->pixelrate = v4l2_ctrl_new_std(&priv->ctrls,
856 1, INT_MAX, 1, 50000000);
858 priv->sd.ctrl_handler = &priv->ctrls;
859 ret = priv->ctrls.error;
863 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
865 priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
866 for (i = 0; i < MAX9286_SRC_PAD; i++)
867 priv->pads[i].flags = MEDIA_PAD_FL_SINK;
868 ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
873 ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
876 dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
880 priv->sd.fwnode = ep;
882 ret = v4l2_async_register_subdev(&priv->sd);
884 dev_err(dev, "Unable to register subdevice\n");
891 fwnode_handle_put(ep);
893 max9286_v4l2_notifier_unregister(priv);
898 static void max9286_v4l2_unregister(struct max9286_priv *priv)
900 fwnode_handle_put(priv->sd.fwnode);
901 v4l2_async_unregister_subdev(&priv->sd);
902 max9286_v4l2_notifier_unregister(priv);
905 /* -----------------------------------------------------------------------------
909 static int max9286_setup(struct max9286_priv *priv)
912 * Link ordering values for all enabled links combinations. Orders must
913 * be assigned sequentially from 0 to the number of enabled links
914 * without leaving any hole for disabled links. We thus assign orders to
915 * enabled links first, and use the remaining order values for disabled
916 * links are all links must have a different order value;
918 static const u8 link_order[] = {
919 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
920 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
921 (3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
922 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
923 (3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
924 (3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
925 (3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
926 (3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
927 (0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
928 (1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
929 (1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
930 (2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
931 (1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
932 (2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
933 (2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
934 (3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
938 * Set the I2C bus speed.
940 * Enable I2C Local Acknowledge during the probe sequences of the camera
941 * only. This should be disabled after the mux is initialised.
943 max9286_configure_i2c(priv, true);
946 * Reverse channel setup.
948 * - Enable custom reverse channel configuration (through register 0x3f)
949 * and set the first pulse length to 35 clock cycles.
950 * - Increase the reverse channel amplitude to 170mV to accommodate the
951 * high threshold enabled by the serializer driver.
953 max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
954 max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
956 usleep_range(2000, 2500);
959 * Enable GMSL links, mask unused ones and autodetect link
960 * used as CSI clock source.
962 max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
963 max9286_write(priv, 0x0b, link_order[priv->route_mask]);
964 max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
967 * Video format setup:
968 * Disable CSI output, VC is set according to Link number.
970 max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
972 /* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
973 max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
974 MAX9286_CSILANECNT(priv->csi2_data_lanes) |
975 MAX9286_DATATYPE_YUV422_8BIT);
977 /* Automatic: FRAMESYNC taken from the slowest Link. */
978 max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
979 MAX9286_FSYNCMETH_AUTO);
981 /* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
982 max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
986 * The overlap window seems to provide additional validation by tracking
987 * the delay between vsync and frame sync, generating an error if the
988 * delay is bigger than the programmed window, though it's not yet clear
989 * what value should be set.
991 * As it's an optional value and can be disabled, we do so by setting
994 max9286_write(priv, 0x63, 0);
995 max9286_write(priv, 0x64, 0);
998 * Wait for 2ms to allow the link to resynchronize after the
999 * configuration change.
1001 usleep_range(2000, 5000);
1006 static void max9286_gpio_set(struct gpio_chip *chip,
1007 unsigned int offset, int value)
1009 struct max9286_priv *priv = gpiochip_get_data(chip);
1012 priv->gpio_state |= BIT(offset);
1014 priv->gpio_state &= ~BIT(offset);
1016 max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
1019 static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
1021 struct max9286_priv *priv = gpiochip_get_data(chip);
1023 return priv->gpio_state & BIT(offset);
1026 static int max9286_register_gpio(struct max9286_priv *priv)
1028 struct device *dev = &priv->client->dev;
1029 struct gpio_chip *gpio = &priv->gpio;
1032 /* Configure the GPIO */
1033 gpio->label = dev_name(dev);
1035 gpio->owner = THIS_MODULE;
1036 gpio->of_node = dev->of_node;
1039 gpio->set = max9286_gpio_set;
1040 gpio->get = max9286_gpio_get;
1041 gpio->can_sleep = true;
1043 /* GPIO values default to high */
1044 priv->gpio_state = BIT(0) | BIT(1);
1046 ret = devm_gpiochip_add_data(dev, gpio, priv);
1048 dev_err(dev, "Unable to create gpio_chip\n");
1053 static int max9286_init(struct device *dev)
1055 struct max9286_priv *priv;
1056 struct i2c_client *client;
1059 client = to_i2c_client(dev);
1060 priv = i2c_get_clientdata(client);
1062 /* Enable the bus power. */
1063 ret = regulator_enable(priv->regulator);
1065 dev_err(&client->dev, "Unable to turn PoC on\n");
1069 ret = max9286_setup(priv);
1071 dev_err(dev, "Unable to setup max9286\n");
1076 * Register all V4L2 interactions for the MAX9286 and notifiers for
1077 * any subdevices connected.
1079 ret = max9286_v4l2_register(priv);
1081 dev_err(dev, "Failed to register with V4L2\n");
1085 ret = max9286_i2c_mux_init(priv);
1087 dev_err(dev, "Unable to initialize I2C multiplexer\n");
1088 goto err_v4l2_register;
1091 /* Leave the mux channels disabled until they are selected. */
1092 max9286_i2c_mux_close(priv);
1097 max9286_v4l2_unregister(priv);
1099 regulator_disable(priv->regulator);
1104 static void max9286_cleanup_dt(struct max9286_priv *priv)
1106 struct max9286_source *source;
1108 for_each_source(priv, source) {
1109 fwnode_handle_put(source->fwnode);
1110 source->fwnode = NULL;
1114 static int max9286_parse_dt(struct max9286_priv *priv)
1116 struct device *dev = &priv->client->dev;
1117 struct device_node *i2c_mux;
1118 struct device_node *node = NULL;
1119 unsigned int i2c_mux_mask = 0;
1121 /* Balance the of_node_put() performed by of_find_node_by_name(). */
1122 of_node_get(dev->of_node);
1123 i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
1125 dev_err(dev, "Failed to find i2c-mux node\n");
1129 /* Identify which i2c-mux channels are enabled */
1130 for_each_child_of_node(i2c_mux, node) {
1133 of_property_read_u32(node, "reg", &id);
1134 if (id >= MAX9286_NUM_GMSL)
1137 if (!of_device_is_available(node)) {
1138 dev_dbg(dev, "Skipping disabled I2C bus port %u\n", id);
1142 i2c_mux_mask |= BIT(id);
1145 of_node_put(i2c_mux);
1147 /* Parse the endpoints */
1148 for_each_endpoint_of_node(dev->of_node, node) {
1149 struct max9286_source *source;
1150 struct of_endpoint ep;
1152 of_graph_parse_endpoint(node, &ep);
1153 dev_dbg(dev, "Endpoint %pOF on port %d",
1154 ep.local_node, ep.port);
1156 if (ep.port > MAX9286_NUM_GMSL) {
1157 dev_err(dev, "Invalid endpoint %s on port %d",
1158 of_node_full_name(ep.local_node), ep.port);
1162 /* For the source endpoint just parse the bus configuration. */
1163 if (ep.port == MAX9286_SRC_PAD) {
1164 struct v4l2_fwnode_endpoint vep = {
1165 .bus_type = V4L2_MBUS_CSI2_DPHY
1169 ret = v4l2_fwnode_endpoint_parse(
1170 of_fwnode_handle(node), &vep);
1176 priv->csi2_data_lanes =
1177 vep.bus.mipi_csi2.num_data_lanes;
1182 /* Skip if the corresponding GMSL link is unavailable. */
1183 if (!(i2c_mux_mask & BIT(ep.port)))
1186 if (priv->sources[ep.port].fwnode) {
1188 "Multiple port endpoints are not supported: %d",
1194 source = &priv->sources[ep.port];
1195 source->fwnode = fwnode_graph_get_remote_endpoint(
1196 of_fwnode_handle(node));
1197 if (!source->fwnode) {
1199 "Endpoint %pOF has no remote endpoint connection\n",
1205 priv->source_mask |= BIT(ep.port);
1210 priv->route_mask = priv->source_mask;
1215 static int max9286_probe(struct i2c_client *client)
1217 struct max9286_priv *priv;
1220 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
1224 mutex_init(&priv->mutex);
1226 priv->client = client;
1227 i2c_set_clientdata(client, priv);
1229 priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
1231 if (IS_ERR(priv->gpiod_pwdn))
1232 return PTR_ERR(priv->gpiod_pwdn);
1234 gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
1235 gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
1237 /* Wait at least 4ms before the I2C lines latch to the address */
1238 if (priv->gpiod_pwdn)
1239 usleep_range(4000, 5000);
1242 * The MAX9286 starts by default with all ports enabled, we disable all
1243 * ports early to ensure that all channels are disabled if we error out
1244 * and keep the bus consistent.
1246 max9286_i2c_mux_close(priv);
1249 * The MAX9286 initialises with auto-acknowledge enabled by default.
1250 * This can be invasive to other transactions on the same bus, so
1251 * disable it early. It will be enabled only as and when needed.
1253 max9286_configure_i2c(priv, false);
1255 ret = max9286_register_gpio(priv);
1259 priv->regulator = devm_regulator_get(&client->dev, "poc");
1260 if (IS_ERR(priv->regulator)) {
1261 if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
1262 dev_err(&client->dev,
1263 "Unable to get PoC regulator (%ld)\n",
1264 PTR_ERR(priv->regulator));
1265 ret = PTR_ERR(priv->regulator);
1269 ret = max9286_parse_dt(priv);
1273 ret = max9286_init(&client->dev);
1275 goto err_cleanup_dt;
1280 max9286_cleanup_dt(priv);
1282 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1287 static int max9286_remove(struct i2c_client *client)
1289 struct max9286_priv *priv = i2c_get_clientdata(client);
1291 i2c_mux_del_adapters(priv->mux);
1293 max9286_v4l2_unregister(priv);
1295 regulator_disable(priv->regulator);
1297 gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
1299 max9286_cleanup_dt(priv);
1304 static const struct of_device_id max9286_dt_ids[] = {
1305 { .compatible = "maxim,max9286" },
1308 MODULE_DEVICE_TABLE(of, max9286_dt_ids);
1310 static struct i2c_driver max9286_i2c_driver = {
1313 .of_match_table = of_match_ptr(max9286_dt_ids),
1315 .probe_new = max9286_probe,
1316 .remove = max9286_remove,
1319 module_i2c_driver(max9286_i2c_driver);
1321 MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
1322 MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
1323 MODULE_LICENSE("GPL");