1 // SPDX-License-Identifier: GPL-2.0
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/minmax.h>
22 #include <linux/module.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/regulator/consumer.h>
26 #include <media/v4l2-cci.h>
27 #include <media/v4l2-ctrls.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-event.h>
30 #include <media/v4l2-fwnode.h>
31 #include <media/v4l2-mediabus.h>
34 #define IMX219_REG_CHIP_ID CCI_REG16(0x0000)
35 #define IMX219_CHIP_ID 0x0219
37 #define IMX219_REG_MODE_SELECT CCI_REG8(0x0100)
38 #define IMX219_MODE_STANDBY 0x00
39 #define IMX219_MODE_STREAMING 0x01
41 #define IMX219_REG_CSI_LANE_MODE CCI_REG8(0x0114)
42 #define IMX219_CSI_2_LANE_MODE 0x01
43 #define IMX219_CSI_4_LANE_MODE 0x03
45 #define IMX219_REG_DPHY_CTRL CCI_REG8(0x0128)
46 #define IMX219_DPHY_CTRL_TIMING_AUTO 0
47 #define IMX219_DPHY_CTRL_TIMING_MANUAL 1
49 #define IMX219_REG_EXCK_FREQ CCI_REG16(0x012a)
50 #define IMX219_EXCK_FREQ(n) ((n) * 256) /* n expressed in MHz */
52 /* Analog gain control */
53 #define IMX219_REG_ANALOG_GAIN CCI_REG8(0x0157)
54 #define IMX219_ANA_GAIN_MIN 0
55 #define IMX219_ANA_GAIN_MAX 232
56 #define IMX219_ANA_GAIN_STEP 1
57 #define IMX219_ANA_GAIN_DEFAULT 0x0
59 /* Digital gain control */
60 #define IMX219_REG_DIGITAL_GAIN CCI_REG16(0x0158)
61 #define IMX219_DGTL_GAIN_MIN 0x0100
62 #define IMX219_DGTL_GAIN_MAX 0x0fff
63 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
64 #define IMX219_DGTL_GAIN_STEP 1
66 /* Exposure control */
67 #define IMX219_REG_EXPOSURE CCI_REG16(0x015a)
68 #define IMX219_EXPOSURE_MIN 4
69 #define IMX219_EXPOSURE_STEP 1
70 #define IMX219_EXPOSURE_DEFAULT 0x640
71 #define IMX219_EXPOSURE_MAX 65535
73 /* V_TIMING internal */
74 #define IMX219_REG_VTS CCI_REG16(0x0160)
75 #define IMX219_VTS_MAX 0xffff
77 #define IMX219_VBLANK_MIN 4
79 /* HBLANK control - read only */
80 #define IMX219_PPL_DEFAULT 3448
82 #define IMX219_REG_LINE_LENGTH_A CCI_REG16(0x0162)
83 #define IMX219_REG_X_ADD_STA_A CCI_REG16(0x0164)
84 #define IMX219_REG_X_ADD_END_A CCI_REG16(0x0166)
85 #define IMX219_REG_Y_ADD_STA_A CCI_REG16(0x0168)
86 #define IMX219_REG_Y_ADD_END_A CCI_REG16(0x016a)
87 #define IMX219_REG_X_OUTPUT_SIZE CCI_REG16(0x016c)
88 #define IMX219_REG_Y_OUTPUT_SIZE CCI_REG16(0x016e)
89 #define IMX219_REG_X_ODD_INC_A CCI_REG8(0x0170)
90 #define IMX219_REG_Y_ODD_INC_A CCI_REG8(0x0171)
91 #define IMX219_REG_ORIENTATION CCI_REG8(0x0172)
94 #define IMX219_REG_BINNING_MODE_H CCI_REG8(0x0174)
95 #define IMX219_REG_BINNING_MODE_V CCI_REG8(0x0175)
96 #define IMX219_BINNING_NONE 0x00
97 #define IMX219_BINNING_X2 0x01
98 #define IMX219_BINNING_X2_ANALOG 0x03
100 #define IMX219_REG_CSI_DATA_FORMAT_A CCI_REG16(0x018c)
103 #define IMX219_REG_VTPXCK_DIV CCI_REG8(0x0301)
104 #define IMX219_REG_VTSYCK_DIV CCI_REG8(0x0303)
105 #define IMX219_REG_PREPLLCK_VT_DIV CCI_REG8(0x0304)
106 #define IMX219_REG_PREPLLCK_OP_DIV CCI_REG8(0x0305)
107 #define IMX219_REG_PLL_VT_MPY CCI_REG16(0x0306)
108 #define IMX219_REG_OPPXCK_DIV CCI_REG8(0x0309)
109 #define IMX219_REG_OPSYCK_DIV CCI_REG8(0x030b)
110 #define IMX219_REG_PLL_OP_MPY CCI_REG16(0x030c)
112 /* Test Pattern Control */
113 #define IMX219_REG_TEST_PATTERN CCI_REG16(0x0600)
114 #define IMX219_TEST_PATTERN_DISABLE 0
115 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
116 #define IMX219_TEST_PATTERN_COLOR_BARS 2
117 #define IMX219_TEST_PATTERN_GREY_COLOR 3
118 #define IMX219_TEST_PATTERN_PN9 4
120 /* Test pattern colour components */
121 #define IMX219_REG_TESTP_RED CCI_REG16(0x0602)
122 #define IMX219_REG_TESTP_GREENR CCI_REG16(0x0604)
123 #define IMX219_REG_TESTP_BLUE CCI_REG16(0x0606)
124 #define IMX219_REG_TESTP_GREENB CCI_REG16(0x0608)
125 #define IMX219_TESTP_COLOUR_MIN 0
126 #define IMX219_TESTP_COLOUR_MAX 0x03ff
127 #define IMX219_TESTP_COLOUR_STEP 1
129 #define IMX219_REG_TP_WINDOW_WIDTH CCI_REG16(0x0624)
130 #define IMX219_REG_TP_WINDOW_HEIGHT CCI_REG16(0x0626)
132 /* External clock frequency is 24.0M */
133 #define IMX219_XCLK_FREQ 24000000
135 /* Pixel rate is fixed for all the modes */
136 #define IMX219_PIXEL_RATE 182400000
137 #define IMX219_PIXEL_RATE_4LANE 280800000
139 #define IMX219_DEFAULT_LINK_FREQ 456000000
140 #define IMX219_DEFAULT_LINK_FREQ_4LANE 363000000
142 /* IMX219 native and active pixel array size. */
143 #define IMX219_NATIVE_WIDTH 3296U
144 #define IMX219_NATIVE_HEIGHT 2480U
145 #define IMX219_PIXEL_ARRAY_LEFT 8U
146 #define IMX219_PIXEL_ARRAY_TOP 8U
147 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
148 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
150 /* Mode : resolution and related config&values */
158 unsigned int vts_def;
161 static const struct cci_reg_sequence imx219_common_regs[] = {
162 { IMX219_REG_MODE_SELECT, 0x00 }, /* Mode Select */
164 /* To Access Addresses 3000-5fff, send the following commands */
165 { CCI_REG8(0x30eb), 0x0c },
166 { CCI_REG8(0x30eb), 0x05 },
167 { CCI_REG8(0x300a), 0xff },
168 { CCI_REG8(0x300b), 0xff },
169 { CCI_REG8(0x30eb), 0x05 },
170 { CCI_REG8(0x30eb), 0x09 },
172 /* PLL Clock Table */
173 { IMX219_REG_VTPXCK_DIV, 5 },
174 { IMX219_REG_VTSYCK_DIV, 1 },
175 { IMX219_REG_PREPLLCK_VT_DIV, 3 }, /* 0x03 = AUTO set */
176 { IMX219_REG_PREPLLCK_OP_DIV, 3 }, /* 0x03 = AUTO set */
177 { IMX219_REG_PLL_VT_MPY, 57 },
178 { IMX219_REG_OPSYCK_DIV, 1 },
179 { IMX219_REG_PLL_OP_MPY, 114 },
181 /* Undocumented registers */
182 { CCI_REG8(0x455e), 0x00 },
183 { CCI_REG8(0x471e), 0x4b },
184 { CCI_REG8(0x4767), 0x0f },
185 { CCI_REG8(0x4750), 0x14 },
186 { CCI_REG8(0x4540), 0x00 },
187 { CCI_REG8(0x47b4), 0x14 },
188 { CCI_REG8(0x4713), 0x30 },
189 { CCI_REG8(0x478b), 0x10 },
190 { CCI_REG8(0x478f), 0x10 },
191 { CCI_REG8(0x4793), 0x10 },
192 { CCI_REG8(0x4797), 0x0e },
193 { CCI_REG8(0x479b), 0x0e },
195 /* Frame Bank Register Group "A" */
196 { IMX219_REG_LINE_LENGTH_A, 3448 },
197 { IMX219_REG_X_ODD_INC_A, 1 },
198 { IMX219_REG_Y_ODD_INC_A, 1 },
200 /* Output setup registers */
201 { IMX219_REG_DPHY_CTRL, IMX219_DPHY_CTRL_TIMING_AUTO },
202 { IMX219_REG_EXCK_FREQ, IMX219_EXCK_FREQ(IMX219_XCLK_FREQ / 1000000) },
205 static const s64 imx219_link_freq_menu[] = {
206 IMX219_DEFAULT_LINK_FREQ,
209 static const s64 imx219_link_freq_4lane_menu[] = {
210 IMX219_DEFAULT_LINK_FREQ_4LANE,
213 static const char * const imx219_test_pattern_menu[] = {
221 static const int imx219_test_pattern_val[] = {
222 IMX219_TEST_PATTERN_DISABLE,
223 IMX219_TEST_PATTERN_COLOR_BARS,
224 IMX219_TEST_PATTERN_SOLID_COLOR,
225 IMX219_TEST_PATTERN_GREY_COLOR,
226 IMX219_TEST_PATTERN_PN9,
229 /* regulator supplies */
230 static const char * const imx219_supply_name[] = {
231 /* Supplies can be enabled in any order */
232 "VANA", /* Analog (2.8V) supply */
233 "VDIG", /* Digital Core (1.8V) supply */
234 "VDDL", /* IF (1.2V) supply */
237 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
240 * The supported formats.
241 * This table MUST contain 4 entries per format, to cover the various flip
242 * combinations in the order
248 static const u32 imx219_mbus_formats[] = {
249 MEDIA_BUS_FMT_SRGGB10_1X10,
250 MEDIA_BUS_FMT_SGRBG10_1X10,
251 MEDIA_BUS_FMT_SGBRG10_1X10,
252 MEDIA_BUS_FMT_SBGGR10_1X10,
254 MEDIA_BUS_FMT_SRGGB8_1X8,
255 MEDIA_BUS_FMT_SGRBG8_1X8,
256 MEDIA_BUS_FMT_SGBRG8_1X8,
257 MEDIA_BUS_FMT_SBGGR8_1X8,
261 * Initialisation delay between XCLR low->high and the moment when the sensor
262 * can start capture (i.e. can leave software stanby) must be not less than:
263 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
265 * t4 is fixed, and is max 200uS,
266 * t5 is fixed, and is 6000uS,
267 * t6 depends on the sensor external clock, and is max 32000 clock periods.
268 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
269 * So for any acceptable external clock t6 is always within the range of
270 * 1185 to 5333 uS, and is always less than t5.
271 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
272 * initialize the sensor over I2C, and then exit the software standby.
274 * This start-up time can be optimized a bit more, if we start the writes
275 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
276 * initialization over I2C may complete before (t4+t5) expires, and we must
277 * ensure that capture is not started before (t4+t5).
279 * This delay doesn't account for the power supply startup time. If needed,
280 * this should be taken care of via the regulator framework. E.g. in the
281 * case of DT for regulator-fixed one should define the startup-delay-us
284 #define IMX219_XCLR_MIN_DELAY_US 6200
285 #define IMX219_XCLR_DELAY_RANGE_US 1000
288 static const struct imx219_mode supported_modes[] = {
290 /* 8MPix 15fps mode */
296 /* 1080P 30fps cropped */
302 /* 2x2 binned 30fps mode */
308 /* 640x480 30fps mode */
316 struct v4l2_subdev sd;
317 struct media_pad pad;
319 struct regmap *regmap;
320 struct clk *xclk; /* system clock to IMX219 */
323 struct gpio_desc *reset_gpio;
324 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
326 struct v4l2_ctrl_handler ctrl_handler;
328 struct v4l2_ctrl *pixel_rate;
329 struct v4l2_ctrl *link_freq;
330 struct v4l2_ctrl *exposure;
331 struct v4l2_ctrl *vflip;
332 struct v4l2_ctrl *hflip;
333 struct v4l2_ctrl *vblank;
334 struct v4l2_ctrl *hblank;
336 /* Two or Four lanes */
340 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
342 return container_of(_sd, struct imx219, sd);
345 /* Get bayer order based on flip setting. */
346 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
350 for (i = 0; i < ARRAY_SIZE(imx219_mbus_formats); i++)
351 if (imx219_mbus_formats[i] == code)
354 if (i >= ARRAY_SIZE(imx219_mbus_formats))
357 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
358 (imx219->hflip->val ? 1 : 0);
360 return imx219_mbus_formats[i];
363 /* -----------------------------------------------------------------------------
367 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
369 struct imx219 *imx219 =
370 container_of(ctrl->handler, struct imx219, ctrl_handler);
371 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
372 const struct v4l2_mbus_framefmt *format;
373 struct v4l2_subdev_state *state;
376 state = v4l2_subdev_get_locked_active_state(&imx219->sd);
377 format = v4l2_subdev_get_pad_format(&imx219->sd, state, 0);
379 if (ctrl->id == V4L2_CID_VBLANK) {
380 int exposure_max, exposure_def;
382 /* Update max exposure while meeting expected vblanking */
383 exposure_max = format->height + ctrl->val - 4;
384 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
385 exposure_max : IMX219_EXPOSURE_DEFAULT;
386 __v4l2_ctrl_modify_range(imx219->exposure,
387 imx219->exposure->minimum,
388 exposure_max, imx219->exposure->step,
393 * Applying V4L2 control value only happens
394 * when power is up for streaming
396 if (pm_runtime_get_if_in_use(&client->dev) == 0)
400 case V4L2_CID_ANALOGUE_GAIN:
401 cci_write(imx219->regmap, IMX219_REG_ANALOG_GAIN,
404 case V4L2_CID_EXPOSURE:
405 cci_write(imx219->regmap, IMX219_REG_EXPOSURE,
408 case V4L2_CID_DIGITAL_GAIN:
409 cci_write(imx219->regmap, IMX219_REG_DIGITAL_GAIN,
412 case V4L2_CID_TEST_PATTERN:
413 cci_write(imx219->regmap, IMX219_REG_TEST_PATTERN,
414 imx219_test_pattern_val[ctrl->val], &ret);
418 cci_write(imx219->regmap, IMX219_REG_ORIENTATION,
419 imx219->hflip->val | imx219->vflip->val << 1, &ret);
421 case V4L2_CID_VBLANK:
422 cci_write(imx219->regmap, IMX219_REG_VTS,
423 format->height + ctrl->val, &ret);
425 case V4L2_CID_TEST_PATTERN_RED:
426 cci_write(imx219->regmap, IMX219_REG_TESTP_RED,
429 case V4L2_CID_TEST_PATTERN_GREENR:
430 cci_write(imx219->regmap, IMX219_REG_TESTP_GREENR,
433 case V4L2_CID_TEST_PATTERN_BLUE:
434 cci_write(imx219->regmap, IMX219_REG_TESTP_BLUE,
437 case V4L2_CID_TEST_PATTERN_GREENB:
438 cci_write(imx219->regmap, IMX219_REG_TESTP_GREENB,
442 dev_info(&client->dev,
443 "ctrl(id:0x%x,val:0x%x) is not handled\n",
444 ctrl->id, ctrl->val);
449 pm_runtime_put(&client->dev);
454 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
455 .s_ctrl = imx219_set_ctrl,
458 static unsigned long imx219_get_pixel_rate(struct imx219 *imx219)
460 return (imx219->lanes == 2) ? IMX219_PIXEL_RATE : IMX219_PIXEL_RATE_4LANE;
463 /* Initialize control handlers */
464 static int imx219_init_controls(struct imx219 *imx219)
466 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
467 const struct imx219_mode *mode = &supported_modes[0];
468 struct v4l2_ctrl_handler *ctrl_hdlr;
469 struct v4l2_fwnode_device_properties props;
470 int exposure_max, exposure_def, hblank;
473 ctrl_hdlr = &imx219->ctrl_handler;
474 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
478 /* By default, PIXEL_RATE is read only */
479 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
481 imx219_get_pixel_rate(imx219),
482 imx219_get_pixel_rate(imx219), 1,
483 imx219_get_pixel_rate(imx219));
486 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
488 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
489 (imx219->lanes == 2) ? imx219_link_freq_menu :
490 imx219_link_freq_4lane_menu);
491 if (imx219->link_freq)
492 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
494 /* Initial vblank/hblank/exposure parameters based on current mode */
495 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
496 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
497 IMX219_VTS_MAX - mode->height, 1,
498 mode->vts_def - mode->height);
499 hblank = IMX219_PPL_DEFAULT - mode->width;
500 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
501 V4L2_CID_HBLANK, hblank, hblank,
504 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
505 exposure_max = mode->vts_def - 4;
506 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
507 exposure_max : IMX219_EXPOSURE_DEFAULT;
508 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
510 IMX219_EXPOSURE_MIN, exposure_max,
511 IMX219_EXPOSURE_STEP,
514 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
515 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
516 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
518 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
519 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
520 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
522 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
523 V4L2_CID_HFLIP, 0, 1, 1, 0);
525 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
527 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
528 V4L2_CID_VFLIP, 0, 1, 1, 0);
530 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
532 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
533 V4L2_CID_TEST_PATTERN,
534 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
535 0, 0, imx219_test_pattern_menu);
536 for (i = 0; i < 4; i++) {
538 * The assumption is that
539 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
540 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
541 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
543 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
544 V4L2_CID_TEST_PATTERN_RED + i,
545 IMX219_TESTP_COLOUR_MIN,
546 IMX219_TESTP_COLOUR_MAX,
547 IMX219_TESTP_COLOUR_STEP,
548 IMX219_TESTP_COLOUR_MAX);
549 /* The "Solid color" pattern is white by default */
552 if (ctrl_hdlr->error) {
553 ret = ctrl_hdlr->error;
554 dev_err(&client->dev, "%s control init failed (%d)\n",
559 ret = v4l2_fwnode_device_parse(&client->dev, &props);
563 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
568 imx219->sd.ctrl_handler = ctrl_hdlr;
573 v4l2_ctrl_handler_free(ctrl_hdlr);
578 static void imx219_free_controls(struct imx219 *imx219)
580 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
583 /* -----------------------------------------------------------------------------
587 static int imx219_set_framefmt(struct imx219 *imx219,
588 struct v4l2_subdev_state *state)
590 const struct v4l2_mbus_framefmt *format;
591 const struct v4l2_rect *crop;
596 format = v4l2_subdev_get_pad_format(&imx219->sd, state, 0);
597 crop = v4l2_subdev_get_pad_crop(&imx219->sd, state, 0);
599 switch (format->code) {
600 case MEDIA_BUS_FMT_SRGGB8_1X8:
601 case MEDIA_BUS_FMT_SGRBG8_1X8:
602 case MEDIA_BUS_FMT_SGBRG8_1X8:
603 case MEDIA_BUS_FMT_SBGGR8_1X8:
607 case MEDIA_BUS_FMT_SRGGB10_1X10:
608 case MEDIA_BUS_FMT_SGRBG10_1X10:
609 case MEDIA_BUS_FMT_SGBRG10_1X10:
610 case MEDIA_BUS_FMT_SBGGR10_1X10:
616 cci_write(imx219->regmap, IMX219_REG_X_ADD_STA_A,
617 crop->left - IMX219_PIXEL_ARRAY_LEFT, &ret);
618 cci_write(imx219->regmap, IMX219_REG_X_ADD_END_A,
619 crop->left - IMX219_PIXEL_ARRAY_LEFT + crop->width - 1, &ret);
620 cci_write(imx219->regmap, IMX219_REG_Y_ADD_STA_A,
621 crop->top - IMX219_PIXEL_ARRAY_TOP, &ret);
622 cci_write(imx219->regmap, IMX219_REG_Y_ADD_END_A,
623 crop->top - IMX219_PIXEL_ARRAY_TOP + crop->height - 1, &ret);
625 switch (crop->width / format->width) {
628 bin_h = IMX219_BINNING_NONE;
631 bin_h = bpp == 8 ? IMX219_BINNING_X2_ANALOG : IMX219_BINNING_X2;
635 switch (crop->height / format->height) {
638 bin_v = IMX219_BINNING_NONE;
641 bin_v = bpp == 8 ? IMX219_BINNING_X2_ANALOG : IMX219_BINNING_X2;
645 cci_write(imx219->regmap, IMX219_REG_BINNING_MODE_H, bin_h, &ret);
646 cci_write(imx219->regmap, IMX219_REG_BINNING_MODE_V, bin_v, &ret);
648 cci_write(imx219->regmap, IMX219_REG_X_OUTPUT_SIZE,
649 format->width, &ret);
650 cci_write(imx219->regmap, IMX219_REG_Y_OUTPUT_SIZE,
651 format->height, &ret);
653 cci_write(imx219->regmap, IMX219_REG_TP_WINDOW_WIDTH,
654 format->width, &ret);
655 cci_write(imx219->regmap, IMX219_REG_TP_WINDOW_HEIGHT,
656 format->height, &ret);
658 cci_write(imx219->regmap, IMX219_REG_CSI_DATA_FORMAT_A,
659 (bpp << 8) | bpp, &ret);
660 cci_write(imx219->regmap, IMX219_REG_OPPXCK_DIV, bpp, &ret);
665 static int imx219_configure_lanes(struct imx219 *imx219)
667 return cci_write(imx219->regmap, IMX219_REG_CSI_LANE_MODE,
668 imx219->lanes == 2 ? IMX219_CSI_2_LANE_MODE :
669 IMX219_CSI_4_LANE_MODE, NULL);
672 static int imx219_start_streaming(struct imx219 *imx219,
673 struct v4l2_subdev_state *state)
675 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
678 ret = pm_runtime_resume_and_get(&client->dev);
682 /* Send all registers that are common to all modes */
683 ret = cci_multi_reg_write(imx219->regmap, imx219_common_regs,
684 ARRAY_SIZE(imx219_common_regs), NULL);
686 dev_err(&client->dev, "%s failed to send mfg header\n", __func__);
690 /* Configure two or four Lane mode */
691 ret = imx219_configure_lanes(imx219);
693 dev_err(&client->dev, "%s failed to configure lanes\n", __func__);
697 /* Apply format and crop settings. */
698 ret = imx219_set_framefmt(imx219, state);
700 dev_err(&client->dev, "%s failed to set frame format: %d\n",
705 /* Apply customized values from user */
706 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
710 /* set stream on register */
711 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
712 IMX219_MODE_STREAMING, NULL);
716 /* vflip and hflip cannot change during streaming */
717 __v4l2_ctrl_grab(imx219->vflip, true);
718 __v4l2_ctrl_grab(imx219->hflip, true);
723 pm_runtime_put(&client->dev);
727 static void imx219_stop_streaming(struct imx219 *imx219)
729 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
732 /* set stream off register */
733 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
734 IMX219_MODE_STANDBY, NULL);
736 dev_err(&client->dev, "%s failed to set stream\n", __func__);
738 __v4l2_ctrl_grab(imx219->vflip, false);
739 __v4l2_ctrl_grab(imx219->hflip, false);
741 pm_runtime_put(&client->dev);
744 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
746 struct imx219 *imx219 = to_imx219(sd);
747 struct v4l2_subdev_state *state;
750 state = v4l2_subdev_lock_and_get_active_state(sd);
753 ret = imx219_start_streaming(imx219, state);
755 imx219_stop_streaming(imx219);
757 v4l2_subdev_unlock_state(state);
761 static void imx219_update_pad_format(struct imx219 *imx219,
762 const struct imx219_mode *mode,
763 struct v4l2_mbus_framefmt *fmt, u32 code)
765 /* Bayer order varies with flips */
766 fmt->code = imx219_get_format_code(imx219, code);
767 fmt->width = mode->width;
768 fmt->height = mode->height;
769 fmt->field = V4L2_FIELD_NONE;
770 fmt->colorspace = V4L2_COLORSPACE_RAW;
771 fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
772 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
773 fmt->xfer_func = V4L2_XFER_FUNC_NONE;
776 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
777 struct v4l2_subdev_state *state,
778 struct v4l2_subdev_mbus_code_enum *code)
780 struct imx219 *imx219 = to_imx219(sd);
782 if (code->index >= (ARRAY_SIZE(imx219_mbus_formats) / 4))
785 code->code = imx219_get_format_code(imx219, imx219_mbus_formats[code->index * 4]);
790 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
791 struct v4l2_subdev_state *state,
792 struct v4l2_subdev_frame_size_enum *fse)
794 struct imx219 *imx219 = to_imx219(sd);
797 if (fse->index >= ARRAY_SIZE(supported_modes))
800 code = imx219_get_format_code(imx219, fse->code);
801 if (fse->code != code)
804 fse->min_width = supported_modes[fse->index].width;
805 fse->max_width = fse->min_width;
806 fse->min_height = supported_modes[fse->index].height;
807 fse->max_height = fse->min_height;
812 static int imx219_set_pad_format(struct v4l2_subdev *sd,
813 struct v4l2_subdev_state *state,
814 struct v4l2_subdev_format *fmt)
816 struct imx219 *imx219 = to_imx219(sd);
817 const struct imx219_mode *mode;
818 struct v4l2_mbus_framefmt *format;
819 struct v4l2_rect *crop;
820 unsigned int bin_h, bin_v;
822 mode = v4l2_find_nearest_size(supported_modes,
823 ARRAY_SIZE(supported_modes),
825 fmt->format.width, fmt->format.height);
827 imx219_update_pad_format(imx219, mode, &fmt->format, fmt->format.code);
829 format = v4l2_subdev_get_pad_format(sd, state, 0);
830 *format = fmt->format;
833 * Use binning to maximize the crop rectangle size, and centre it in the
836 bin_h = min(IMX219_PIXEL_ARRAY_WIDTH / format->width, 2U);
837 bin_v = min(IMX219_PIXEL_ARRAY_HEIGHT / format->height, 2U);
839 crop = v4l2_subdev_get_pad_crop(sd, state, 0);
840 crop->width = format->width * bin_h;
841 crop->height = format->height * bin_v;
842 crop->left = (IMX219_NATIVE_WIDTH - crop->width) / 2;
843 crop->top = (IMX219_NATIVE_HEIGHT - crop->height) / 2;
845 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
850 /* Update limits and set FPS to default */
851 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
852 IMX219_VTS_MAX - mode->height, 1,
853 mode->vts_def - mode->height);
854 __v4l2_ctrl_s_ctrl(imx219->vblank,
855 mode->vts_def - mode->height);
856 /* Update max exposure while meeting expected vblanking */
857 exposure_max = mode->vts_def - 4;
858 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
859 exposure_max : IMX219_EXPOSURE_DEFAULT;
860 __v4l2_ctrl_modify_range(imx219->exposure,
861 imx219->exposure->minimum,
862 exposure_max, imx219->exposure->step,
865 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
866 * depends on mode->width only, and is not changeble in any
867 * way other than changing the mode.
869 hblank = IMX219_PPL_DEFAULT - mode->width;
870 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
877 static int imx219_get_selection(struct v4l2_subdev *sd,
878 struct v4l2_subdev_state *state,
879 struct v4l2_subdev_selection *sel)
881 switch (sel->target) {
882 case V4L2_SEL_TGT_CROP: {
883 sel->r = *v4l2_subdev_get_pad_crop(sd, state, 0);
887 case V4L2_SEL_TGT_NATIVE_SIZE:
890 sel->r.width = IMX219_NATIVE_WIDTH;
891 sel->r.height = IMX219_NATIVE_HEIGHT;
895 case V4L2_SEL_TGT_CROP_DEFAULT:
896 case V4L2_SEL_TGT_CROP_BOUNDS:
897 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
898 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
899 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
900 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
908 static int imx219_init_cfg(struct v4l2_subdev *sd,
909 struct v4l2_subdev_state *state)
911 struct v4l2_subdev_format fmt = {
912 .which = V4L2_SUBDEV_FORMAT_TRY,
915 .code = MEDIA_BUS_FMT_SRGGB10_1X10,
916 .width = supported_modes[0].width,
917 .height = supported_modes[0].height,
921 imx219_set_pad_format(sd, state, &fmt);
926 static const struct v4l2_subdev_core_ops imx219_core_ops = {
927 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
928 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
931 static const struct v4l2_subdev_video_ops imx219_video_ops = {
932 .s_stream = imx219_set_stream,
935 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
936 .init_cfg = imx219_init_cfg,
937 .enum_mbus_code = imx219_enum_mbus_code,
938 .get_fmt = v4l2_subdev_get_fmt,
939 .set_fmt = imx219_set_pad_format,
940 .get_selection = imx219_get_selection,
941 .enum_frame_size = imx219_enum_frame_size,
944 static const struct v4l2_subdev_ops imx219_subdev_ops = {
945 .core = &imx219_core_ops,
946 .video = &imx219_video_ops,
947 .pad = &imx219_pad_ops,
951 /* -----------------------------------------------------------------------------
955 static int imx219_power_on(struct device *dev)
957 struct v4l2_subdev *sd = dev_get_drvdata(dev);
958 struct imx219 *imx219 = to_imx219(sd);
961 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
964 dev_err(dev, "%s: failed to enable regulators\n",
969 ret = clk_prepare_enable(imx219->xclk);
971 dev_err(dev, "%s: failed to enable clock\n",
976 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
977 usleep_range(IMX219_XCLR_MIN_DELAY_US,
978 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
983 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
988 static int imx219_power_off(struct device *dev)
990 struct v4l2_subdev *sd = dev_get_drvdata(dev);
991 struct imx219 *imx219 = to_imx219(sd);
993 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
994 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
995 clk_disable_unprepare(imx219->xclk);
1000 /* -----------------------------------------------------------------------------
1004 static int imx219_get_regulators(struct imx219 *imx219)
1006 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1009 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1010 imx219->supplies[i].supply = imx219_supply_name[i];
1012 return devm_regulator_bulk_get(&client->dev,
1013 IMX219_NUM_SUPPLIES,
1017 /* Verify chip ID */
1018 static int imx219_identify_module(struct imx219 *imx219)
1020 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1024 ret = cci_read(imx219->regmap, IMX219_REG_CHIP_ID, &val, NULL);
1026 dev_err(&client->dev, "failed to read chip id %x\n",
1031 if (val != IMX219_CHIP_ID) {
1032 dev_err(&client->dev, "chip id mismatch: %x!=%llx\n",
1033 IMX219_CHIP_ID, val);
1040 static int imx219_check_hwcfg(struct device *dev, struct imx219 *imx219)
1042 struct fwnode_handle *endpoint;
1043 struct v4l2_fwnode_endpoint ep_cfg = {
1044 .bus_type = V4L2_MBUS_CSI2_DPHY
1048 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1050 dev_err(dev, "endpoint node not found\n");
1054 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1055 dev_err(dev, "could not parse endpoint\n");
1059 /* Check the number of MIPI CSI2 data lanes */
1060 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2 &&
1061 ep_cfg.bus.mipi_csi2.num_data_lanes != 4) {
1062 dev_err(dev, "only 2 or 4 data lanes are currently supported\n");
1065 imx219->lanes = ep_cfg.bus.mipi_csi2.num_data_lanes;
1067 /* Check the link frequency set in device tree */
1068 if (!ep_cfg.nr_of_link_frequencies) {
1069 dev_err(dev, "link-frequency property not found in DT\n");
1073 if (ep_cfg.nr_of_link_frequencies != 1 ||
1074 (ep_cfg.link_frequencies[0] != ((imx219->lanes == 2) ?
1075 IMX219_DEFAULT_LINK_FREQ : IMX219_DEFAULT_LINK_FREQ_4LANE))) {
1076 dev_err(dev, "Link frequency not supported: %lld\n",
1077 ep_cfg.link_frequencies[0]);
1084 v4l2_fwnode_endpoint_free(&ep_cfg);
1085 fwnode_handle_put(endpoint);
1090 static int imx219_probe(struct i2c_client *client)
1092 struct device *dev = &client->dev;
1093 struct imx219 *imx219;
1096 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1100 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1102 /* Check the hardware configuration in device tree */
1103 if (imx219_check_hwcfg(dev, imx219))
1106 imx219->regmap = devm_cci_regmap_init_i2c(client, 16);
1107 if (IS_ERR(imx219->regmap)) {
1108 ret = PTR_ERR(imx219->regmap);
1109 dev_err(dev, "failed to initialize CCI: %d\n", ret);
1113 /* Get system clock (xclk) */
1114 imx219->xclk = devm_clk_get(dev, NULL);
1115 if (IS_ERR(imx219->xclk)) {
1116 dev_err(dev, "failed to get xclk\n");
1117 return PTR_ERR(imx219->xclk);
1120 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1121 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1122 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1127 ret = imx219_get_regulators(imx219);
1129 dev_err(dev, "failed to get regulators\n");
1133 /* Request optional enable pin */
1134 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1138 * The sensor must be powered for imx219_identify_module()
1139 * to be able to read the CHIP_ID register
1141 ret = imx219_power_on(dev);
1145 ret = imx219_identify_module(imx219);
1147 goto error_power_off;
1150 * Sensor doesn't enter LP-11 state upon power up until and unless
1151 * streaming is started, so upon power up switch the modes to:
1152 * streaming -> standby
1154 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
1155 IMX219_MODE_STREAMING, NULL);
1157 goto error_power_off;
1159 usleep_range(100, 110);
1161 /* put sensor back to standby mode */
1162 ret = cci_write(imx219->regmap, IMX219_REG_MODE_SELECT,
1163 IMX219_MODE_STANDBY, NULL);
1165 goto error_power_off;
1167 usleep_range(100, 110);
1169 ret = imx219_init_controls(imx219);
1171 goto error_power_off;
1173 /* Initialize subdev */
1174 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1175 V4L2_SUBDEV_FL_HAS_EVENTS;
1176 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1178 /* Initialize source pad */
1179 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1181 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1183 dev_err(dev, "failed to init entity pads: %d\n", ret);
1184 goto error_handler_free;
1187 imx219->sd.state_lock = imx219->ctrl_handler.lock;
1188 ret = v4l2_subdev_init_finalize(&imx219->sd);
1190 dev_err(dev, "subdev init error: %d\n", ret);
1191 goto error_media_entity;
1194 ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1196 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1197 goto error_subdev_cleanup;
1200 /* Enable runtime PM and turn off the device */
1201 pm_runtime_set_active(dev);
1202 pm_runtime_enable(dev);
1203 pm_runtime_idle(dev);
1207 error_subdev_cleanup:
1208 v4l2_subdev_cleanup(&imx219->sd);
1211 media_entity_cleanup(&imx219->sd.entity);
1214 imx219_free_controls(imx219);
1217 imx219_power_off(dev);
1222 static void imx219_remove(struct i2c_client *client)
1224 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1225 struct imx219 *imx219 = to_imx219(sd);
1227 v4l2_async_unregister_subdev(sd);
1228 v4l2_subdev_cleanup(sd);
1229 media_entity_cleanup(&sd->entity);
1230 imx219_free_controls(imx219);
1232 pm_runtime_disable(&client->dev);
1233 if (!pm_runtime_status_suspended(&client->dev))
1234 imx219_power_off(&client->dev);
1235 pm_runtime_set_suspended(&client->dev);
1238 static const struct of_device_id imx219_dt_ids[] = {
1239 { .compatible = "sony,imx219" },
1242 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1244 static const struct dev_pm_ops imx219_pm_ops = {
1245 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1248 static struct i2c_driver imx219_i2c_driver = {
1251 .of_match_table = imx219_dt_ids,
1252 .pm = &imx219_pm_ops,
1254 .probe = imx219_probe,
1255 .remove = imx219_remove,
1258 module_i2c_driver(imx219_i2c_driver);
1260 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1261 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1262 MODULE_LICENSE("GPL v2");