1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Texas Instruments DS90UB913 video serializer
5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net>
7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net>
8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
11 #include <linux/clk-provider.h>
12 #include <linux/clk.h>
13 #include <linux/delay.h>
14 #include <linux/fwnode.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/i2c-atr.h>
17 #include <linux/i2c.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/property.h>
21 #include <linux/regmap.h>
23 #include <media/i2c/ds90ub9xx.h>
24 #include <media/v4l2-fwnode.h>
25 #include <media/v4l2-mediabus.h>
26 #include <media/v4l2-subdev.h>
28 #define UB913_PAD_SINK 0
29 #define UB913_PAD_SOURCE 1
32 * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator
33 * mode. Thus we only support 2 gpios for now.
35 #define UB913_NUM_GPIOS 2
37 #define UB913_REG_RESET_CTL 0x01
38 #define UB913_REG_RESET_CTL_DIGITAL_RESET_1 BIT(1)
39 #define UB913_REG_RESET_CTL_DIGITAL_RESET_0 BIT(0)
41 #define UB913_REG_GENERAL_CFG 0x03
42 #define UB913_REG_GENERAL_CFG_CRC_ERR_RESET BIT(5)
43 #define UB913_REG_GENERAL_CFG_PCLK_RISING BIT(0)
45 #define UB913_REG_MODE_SEL 0x05
46 #define UB913_REG_MODE_SEL_MODE_OVERRIDE BIT(5)
47 #define UB913_REG_MODE_SEL_MODE_UP_TO_DATE BIT(4)
48 #define UB913_REG_MODE_SEL_MODE_MASK GENMASK(3, 0)
50 #define UB913_REG_CRC_ERRORS_LSB 0x0a
51 #define UB913_REG_CRC_ERRORS_MSB 0x0b
53 #define UB913_REG_GENERAL_STATUS 0x0c
55 #define UB913_REG_GPIO_CFG(n) (0x0d + (n))
56 #define UB913_REG_GPIO_CFG_ENABLE(n) BIT(0 + (n) * 4)
57 #define UB913_REG_GPIO_CFG_DIR_INPUT(n) BIT(1 + (n) * 4)
58 #define UB913_REG_GPIO_CFG_REMOTE_EN(n) BIT(2 + (n) * 4)
59 #define UB913_REG_GPIO_CFG_OUT_VAL(n) BIT(3 + (n) * 4)
60 #define UB913_REG_GPIO_CFG_MASK(n) (0xf << ((n) * 4))
62 #define UB913_REG_SCL_HIGH_TIME 0x11
63 #define UB913_REG_SCL_LOW_TIME 0x12
65 #define UB913_REG_PLL_OVR 0x35
68 struct i2c_client *client;
69 struct regmap *regmap;
72 struct gpio_chip gpio_chip;
74 struct v4l2_subdev sd;
75 struct media_pad pads[2];
77 struct v4l2_async_notifier notifier;
79 struct v4l2_subdev *source_sd;
82 u64 enabled_source_streams;
84 struct clk_hw *clkout_clk_hw;
86 struct ds90ub9xx_platform_data *plat_data;
88 bool pclk_polarity_rising;
91 static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd)
93 return container_of(sd, struct ub913_data, sd);
96 struct ub913_format_info {
101 static const struct ub913_format_info ub913_formats[] = {
102 /* Only RAW10 with 8-bit payload is supported at the moment */
103 { .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 },
104 { .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 },
105 { .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 },
106 { .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 },
109 static const struct ub913_format_info *ub913_find_format(u32 incode)
113 for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) {
114 if (ub913_formats[i].incode == incode)
115 return &ub913_formats[i];
121 static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val)
126 ret = regmap_read(priv->regmap, reg, &v);
128 dev_err(&priv->client->dev,
129 "Cannot read register 0x%02x: %d!\n", reg, ret);
137 static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val)
141 ret = regmap_write(priv->regmap, reg, val);
143 dev_err(&priv->client->dev,
144 "Cannot write register 0x%02x: %d!\n", reg, ret);
152 static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
154 return GPIO_LINE_DIRECTION_OUT;
157 static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset,
160 struct ub913_data *priv = gpiochip_get_data(gc);
161 unsigned int reg_idx = offset / 2;
162 unsigned int field_idx = offset % 2;
164 return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx),
165 UB913_REG_GPIO_CFG_MASK(field_idx),
166 UB913_REG_GPIO_CFG_ENABLE(field_idx) |
167 (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) :
171 static void ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
173 ub913_gpio_direction_out(gc, offset, value);
176 static int ub913_gpio_of_xlate(struct gpio_chip *gc,
177 const struct of_phandle_args *gpiospec,
181 *flags = gpiospec->args[1];
183 return gpiospec->args[0];
186 static int ub913_gpiochip_probe(struct ub913_data *priv)
188 struct device *dev = &priv->client->dev;
189 struct gpio_chip *gc = &priv->gpio_chip;
192 /* Initialize GPIOs 0 and 1 to local control, tri-state */
193 ub913_write(priv, UB913_REG_GPIO_CFG(0), 0);
195 gc->label = dev_name(dev);
197 gc->owner = THIS_MODULE;
199 gc->can_sleep = true;
200 gc->ngpio = UB913_NUM_GPIOS;
201 gc->get_direction = ub913_gpio_get_direction;
202 gc->direction_output = ub913_gpio_direction_out;
203 gc->set = ub913_gpio_set;
204 gc->of_xlate = ub913_gpio_of_xlate;
205 gc->of_gpio_n_cells = 2;
207 ret = gpiochip_add_data(gc, priv);
209 dev_err(dev, "Failed to add GPIOs: %d\n", ret);
216 static void ub913_gpiochip_remove(struct ub913_data *priv)
218 gpiochip_remove(&priv->gpio_chip);
221 static const struct regmap_config ub913_regmap_config = {
225 .reg_format_endian = REGMAP_ENDIAN_DEFAULT,
226 .val_format_endian = REGMAP_ENDIAN_DEFAULT,
233 static int ub913_enable_streams(struct v4l2_subdev *sd,
234 struct v4l2_subdev_state *state, u32 pad,
237 struct ub913_data *priv = sd_to_ub913(sd);
241 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
245 ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad,
250 priv->enabled_source_streams |= streams_mask;
255 static int ub913_disable_streams(struct v4l2_subdev *sd,
256 struct v4l2_subdev_state *state, u32 pad,
259 struct ub913_data *priv = sd_to_ub913(sd);
263 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
267 ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad,
272 priv->enabled_source_streams &= ~streams_mask;
277 static int _ub913_set_routing(struct v4l2_subdev *sd,
278 struct v4l2_subdev_state *state,
279 struct v4l2_subdev_krouting *routing)
281 static const struct v4l2_mbus_framefmt in_format = {
284 .code = MEDIA_BUS_FMT_UYVY8_2X8,
285 .field = V4L2_FIELD_NONE,
286 .colorspace = V4L2_COLORSPACE_SRGB,
287 .ycbcr_enc = V4L2_YCBCR_ENC_601,
288 .quantization = V4L2_QUANTIZATION_LIM_RANGE,
289 .xfer_func = V4L2_XFER_FUNC_SRGB,
291 static const struct v4l2_mbus_framefmt out_format = {
294 .code = MEDIA_BUS_FMT_UYVY8_1X16,
295 .field = V4L2_FIELD_NONE,
296 .colorspace = V4L2_COLORSPACE_SRGB,
297 .ycbcr_enc = V4L2_YCBCR_ENC_601,
298 .quantization = V4L2_QUANTIZATION_LIM_RANGE,
299 .xfer_func = V4L2_XFER_FUNC_SRGB,
301 struct v4l2_subdev_stream_configs *stream_configs;
306 * Note: we can only support up to V4L2_FRAME_DESC_ENTRY_MAX, until
307 * frame desc is made dynamically allocated.
310 if (routing->num_routes > V4L2_FRAME_DESC_ENTRY_MAX)
313 ret = v4l2_subdev_routing_validate(sd, routing,
314 V4L2_SUBDEV_ROUTING_ONLY_1_TO_1);
318 ret = v4l2_subdev_set_routing(sd, state, routing);
322 stream_configs = &state->stream_configs;
324 for (i = 0; i < stream_configs->num_configs; i++) {
325 if (stream_configs->configs[i].pad == UB913_PAD_SINK)
326 stream_configs->configs[i].fmt = in_format;
328 stream_configs->configs[i].fmt = out_format;
334 static int ub913_set_routing(struct v4l2_subdev *sd,
335 struct v4l2_subdev_state *state,
336 enum v4l2_subdev_format_whence which,
337 struct v4l2_subdev_krouting *routing)
339 struct ub913_data *priv = sd_to_ub913(sd);
341 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams)
344 return _ub913_set_routing(sd, state, routing);
347 static int ub913_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad,
348 struct v4l2_mbus_frame_desc *fd)
350 struct ub913_data *priv = sd_to_ub913(sd);
351 const struct v4l2_subdev_krouting *routing;
352 struct v4l2_mbus_frame_desc source_fd;
353 struct v4l2_subdev_route *route;
354 struct v4l2_subdev_state *state;
357 if (pad != UB913_PAD_SOURCE)
360 ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc,
361 priv->source_sd_pad, &source_fd);
365 fd->type = V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL;
367 state = v4l2_subdev_lock_and_get_active_state(sd);
369 routing = &state->routing;
371 for_each_active_route(routing, route) {
374 if (route->source_pad != pad)
377 for (i = 0; i < source_fd.num_entries; i++) {
378 if (source_fd.entry[i].stream == route->sink_stream)
382 if (i == source_fd.num_entries) {
383 dev_err(&priv->client->dev,
384 "Failed to find stream from source frame desc\n");
389 fd->entry[fd->num_entries].stream = route->source_stream;
390 fd->entry[fd->num_entries].flags = source_fd.entry[i].flags;
391 fd->entry[fd->num_entries].length = source_fd.entry[i].length;
392 fd->entry[fd->num_entries].pixelcode =
393 source_fd.entry[i].pixelcode;
399 v4l2_subdev_unlock_state(state);
404 static int ub913_set_fmt(struct v4l2_subdev *sd,
405 struct v4l2_subdev_state *state,
406 struct v4l2_subdev_format *format)
408 struct ub913_data *priv = sd_to_ub913(sd);
409 struct v4l2_mbus_framefmt *fmt;
410 const struct ub913_format_info *finfo;
412 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE &&
413 priv->enabled_source_streams)
416 /* Source format is fully defined by the sink format, so not settable */
417 if (format->pad == UB913_PAD_SOURCE)
418 return v4l2_subdev_get_fmt(sd, state, format);
420 finfo = ub913_find_format(format->format.code);
422 finfo = &ub913_formats[0];
423 format->format.code = finfo->incode;
426 /* Set sink format */
427 fmt = v4l2_subdev_state_get_stream_format(state, format->pad,
432 *fmt = format->format;
434 /* Propagate to source format, and adjust the mbus code */
435 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad,
440 format->format.code = finfo->outcode;
442 *fmt = format->format;
447 static int ub913_init_cfg(struct v4l2_subdev *sd,
448 struct v4l2_subdev_state *state)
450 struct v4l2_subdev_route routes[] = {
452 .sink_pad = UB913_PAD_SINK,
454 .source_pad = UB913_PAD_SOURCE,
456 .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE,
460 struct v4l2_subdev_krouting routing = {
461 .num_routes = ARRAY_SIZE(routes),
465 return _ub913_set_routing(sd, state, &routing);
468 static int ub913_log_status(struct v4l2_subdev *sd)
470 struct ub913_data *priv = sd_to_ub913(sd);
471 struct device *dev = &priv->client->dev;
472 u8 v = 0, v1 = 0, v2 = 0;
474 ub913_read(priv, UB913_REG_MODE_SEL, &v);
475 dev_info(dev, "MODE_SEL %#02x\n", v);
477 ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1);
478 ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2);
479 dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8));
481 /* clear CRC errors */
482 ub913_read(priv, UB913_REG_GENERAL_CFG, &v);
483 ub913_write(priv, UB913_REG_GENERAL_CFG,
484 v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET);
485 ub913_write(priv, UB913_REG_GENERAL_CFG, v);
487 ub913_read(priv, UB913_REG_GENERAL_STATUS, &v);
488 dev_info(dev, "GENERAL_STATUS %#02x\n", v);
490 ub913_read(priv, UB913_REG_PLL_OVR, &v);
491 dev_info(dev, "PLL_OVR %#02x\n", v);
496 static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = {
497 .log_status = ub913_log_status,
500 static const struct v4l2_subdev_pad_ops ub913_pad_ops = {
501 .enable_streams = ub913_enable_streams,
502 .disable_streams = ub913_disable_streams,
503 .set_routing = ub913_set_routing,
504 .get_frame_desc = ub913_get_frame_desc,
505 .get_fmt = v4l2_subdev_get_fmt,
506 .set_fmt = ub913_set_fmt,
507 .init_cfg = ub913_init_cfg,
510 static const struct v4l2_subdev_ops ub913_subdev_ops = {
511 .core = &ub913_subdev_core_ops,
512 .pad = &ub913_pad_ops,
515 static const struct media_entity_operations ub913_entity_ops = {
516 .link_validate = v4l2_subdev_link_validate,
519 static int ub913_notify_bound(struct v4l2_async_notifier *notifier,
520 struct v4l2_subdev *source_subdev,
521 struct v4l2_async_connection *asd)
523 struct ub913_data *priv = sd_to_ub913(notifier->sd);
524 struct device *dev = &priv->client->dev;
527 ret = media_entity_get_fwnode_pad(&source_subdev->entity,
528 source_subdev->fwnode,
529 MEDIA_PAD_FL_SOURCE);
531 dev_err(dev, "Failed to find pad for %s\n",
532 source_subdev->name);
536 priv->source_sd = source_subdev;
537 priv->source_sd_pad = ret;
539 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad,
540 &priv->sd.entity, UB913_PAD_SINK,
541 MEDIA_LNK_FL_ENABLED |
542 MEDIA_LNK_FL_IMMUTABLE);
544 dev_err(dev, "Unable to link %s:%u -> %s:0\n",
545 source_subdev->name, priv->source_sd_pad,
553 static const struct v4l2_async_notifier_operations ub913_notify_ops = {
554 .bound = ub913_notify_bound,
557 static int ub913_v4l2_notifier_register(struct ub913_data *priv)
559 struct device *dev = &priv->client->dev;
560 struct v4l2_async_connection *asd;
561 struct fwnode_handle *ep_fwnode;
564 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
565 UB913_PAD_SINK, 0, 0);
567 dev_err(dev, "No graph endpoint\n");
571 v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd);
573 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode,
574 struct v4l2_async_connection);
576 fwnode_handle_put(ep_fwnode);
579 dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd));
580 v4l2_async_nf_cleanup(&priv->notifier);
584 priv->notifier.ops = &ub913_notify_ops;
586 ret = v4l2_async_nf_register(&priv->notifier);
588 dev_err(dev, "Failed to register subdev_notifier");
589 v4l2_async_nf_cleanup(&priv->notifier);
596 static void ub913_v4l2_nf_unregister(struct ub913_data *priv)
598 v4l2_async_nf_unregister(&priv->notifier);
599 v4l2_async_nf_cleanup(&priv->notifier);
602 static int ub913_register_clkout(struct ub913_data *priv)
604 struct device *dev = &priv->client->dev;
608 name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev));
612 priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name,
613 __clk_get_name(priv->clkin), 0, 1, 2);
617 if (IS_ERR(priv->clkout_clk_hw))
618 return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw),
619 "Cannot register clkout hw\n");
621 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
622 priv->clkout_clk_hw);
624 return dev_err_probe(dev, ret,
625 "Cannot add OF clock provider\n");
630 static int ub913_i2c_master_init(struct ub913_data *priv)
633 u32 scl_high = 600 + 300; /* high period + rise time, ns */
634 u32 scl_low = 1300 + 300; /* low period + fall time, ns */
638 ref = clk_get_rate(priv->clkin) / 2;
640 scl_high = div64_u64((u64)scl_high * ref, 1000000000);
641 scl_low = div64_u64((u64)scl_low * ref, 1000000000);
643 ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high);
647 ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low);
654 static int ub913_add_i2c_adapter(struct ub913_data *priv)
656 struct device *dev = &priv->client->dev;
657 struct fwnode_handle *i2c_handle;
660 i2c_handle = device_get_named_child_node(dev, "i2c");
664 ret = i2c_atr_add_adapter(priv->plat_data->atr, priv->plat_data->port,
667 fwnode_handle_put(i2c_handle);
675 static int ub913_parse_dt(struct ub913_data *priv)
677 struct device *dev = &priv->client->dev;
678 struct v4l2_fwnode_endpoint vep = {
679 .bus_type = V4L2_MBUS_PARALLEL,
681 struct fwnode_handle *ep_fwnode;
684 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
685 UB913_PAD_SINK, 0, 0);
687 return dev_err_probe(dev, -ENOENT, "No sink endpoint\n");
689 ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep);
691 fwnode_handle_put(ep_fwnode);
694 return dev_err_probe(dev, ret,
695 "failed to parse sink endpoint data\n");
697 if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
698 priv->pclk_polarity_rising = true;
699 else if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
700 priv->pclk_polarity_rising = false;
702 return dev_err_probe(dev, -EINVAL,
703 "bad value for 'pclk-sample'\n");
708 static int ub913_hw_init(struct ub913_data *priv)
710 struct device *dev = &priv->client->dev;
716 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v);
720 if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE))
721 return dev_err_probe(dev, -ENODEV,
722 "Mode value not stabilized\n");
724 mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE;
725 mode = v & UB913_REG_MODE_SEL_MODE_MASK;
727 dev_dbg(dev, "mode from %s: %#x\n",
728 mode_override ? "reg" : "deserializer", mode);
730 ret = ub913_i2c_master_init(priv);
732 return dev_err_probe(dev, ret, "i2c master init failed\n");
734 ub913_read(priv, UB913_REG_GENERAL_CFG, &v);
735 v &= ~UB913_REG_GENERAL_CFG_PCLK_RISING;
736 v |= priv->pclk_polarity_rising ? UB913_REG_GENERAL_CFG_PCLK_RISING : 0;
737 ub913_write(priv, UB913_REG_GENERAL_CFG, v);
742 static int ub913_subdev_init(struct ub913_data *priv)
744 struct device *dev = &priv->client->dev;
747 v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops);
748 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS;
749 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
750 priv->sd.entity.ops = &ub913_entity_ops;
752 priv->pads[0].flags = MEDIA_PAD_FL_SINK;
753 priv->pads[1].flags = MEDIA_PAD_FL_SOURCE;
755 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads);
757 return dev_err_probe(dev, ret, "Failed to init pads\n");
759 ret = v4l2_subdev_init_finalize(&priv->sd);
761 goto err_entity_cleanup;
763 ret = ub913_v4l2_notifier_register(priv);
765 dev_err_probe(dev, ret,
766 "v4l2 subdev notifier register failed\n");
767 goto err_subdev_cleanup;
770 ret = v4l2_async_register_subdev(&priv->sd);
772 dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n");
773 goto err_unreg_notif;
779 ub913_v4l2_nf_unregister(priv);
781 v4l2_subdev_cleanup(&priv->sd);
783 media_entity_cleanup(&priv->sd.entity);
788 static void ub913_subdev_uninit(struct ub913_data *priv)
790 v4l2_async_unregister_subdev(&priv->sd);
791 ub913_v4l2_nf_unregister(priv);
792 v4l2_subdev_cleanup(&priv->sd);
793 fwnode_handle_put(priv->sd.fwnode);
794 media_entity_cleanup(&priv->sd.entity);
797 static int ub913_probe(struct i2c_client *client)
799 struct device *dev = &client->dev;
800 struct ub913_data *priv;
803 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
807 priv->client = client;
809 priv->plat_data = dev_get_platdata(&client->dev);
810 if (!priv->plat_data)
811 return dev_err_probe(dev, -ENODEV, "Platform data missing\n");
813 priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config);
814 if (IS_ERR(priv->regmap))
815 return dev_err_probe(dev, PTR_ERR(priv->regmap),
816 "Failed to init regmap\n");
819 * ub913 can also work without ext clock, but that is not supported by
822 priv->clkin = devm_clk_get(dev, "clkin");
823 if (IS_ERR(priv->clkin))
824 return dev_err_probe(dev, PTR_ERR(priv->clkin),
825 "Cannot get CLKIN\n");
827 ret = ub913_parse_dt(priv);
831 ret = ub913_hw_init(priv);
835 ret = ub913_gpiochip_probe(priv);
837 return dev_err_probe(dev, ret, "Failed to init gpiochip\n");
839 ret = ub913_register_clkout(priv);
841 dev_err_probe(dev, ret, "Failed to register clkout\n");
842 goto err_gpiochip_remove;
845 ret = ub913_subdev_init(priv);
847 goto err_gpiochip_remove;
849 ret = ub913_add_i2c_adapter(priv);
851 dev_err_probe(dev, ret, "failed to add remote i2c adapter\n");
852 goto err_subdev_uninit;
858 ub913_subdev_uninit(priv);
860 ub913_gpiochip_remove(priv);
865 static void ub913_remove(struct i2c_client *client)
867 struct v4l2_subdev *sd = i2c_get_clientdata(client);
868 struct ub913_data *priv = sd_to_ub913(sd);
870 i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port);
872 ub913_subdev_uninit(priv);
874 ub913_gpiochip_remove(priv);
877 static const struct i2c_device_id ub913_id[] = { { "ds90ub913a-q1", 0 }, {} };
878 MODULE_DEVICE_TABLE(i2c, ub913_id);
880 static const struct of_device_id ub913_dt_ids[] = {
881 { .compatible = "ti,ds90ub913a-q1" },
884 MODULE_DEVICE_TABLE(of, ub913_dt_ids);
886 static struct i2c_driver ds90ub913_driver = {
887 .probe = ub913_probe,
888 .remove = ub913_remove,
889 .id_table = ub913_id,
891 .name = "ds90ub913a",
892 .of_match_table = ub913_dt_ids,
895 module_i2c_driver(ds90ub913_driver);
897 MODULE_LICENSE("GPL");
898 MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver");
899 MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>");
900 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>");
901 MODULE_IMPORT_NS(I2C_ATR);