2 * Analog Devices ADV7511 HDMI Transmitter Device Driver
4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * This file is named adv7511-v4l2.c so it doesn't conflict with the Analog
22 * Device ADV7511 (config fragment CONFIG_DRM_I2C_ADV7511).
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/slab.h>
29 #include <linux/i2c.h>
30 #include <linux/delay.h>
31 #include <linux/videodev2.h>
32 #include <linux/gpio.h>
33 #include <linux/workqueue.h>
34 #include <linux/hdmi.h>
35 #include <linux/v4l2-dv-timings.h>
36 #include <media/v4l2-device.h>
37 #include <media/v4l2-common.h>
38 #include <media/v4l2-ctrls.h>
39 #include <media/v4l2-dv-timings.h>
40 #include <media/i2c/adv7511.h>
41 #include <media/cec.h>
44 module_param(debug, int, 0644);
45 MODULE_PARM_DESC(debug, "debug level (0-2)");
47 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
48 MODULE_AUTHOR("Hans Verkuil");
49 MODULE_LICENSE("GPL v2");
51 #define MASK_ADV7511_EDID_RDY_INT 0x04
52 #define MASK_ADV7511_MSEN_INT 0x40
53 #define MASK_ADV7511_HPD_INT 0x80
55 #define MASK_ADV7511_HPD_DETECT 0x40
56 #define MASK_ADV7511_MSEN_DETECT 0x20
57 #define MASK_ADV7511_EDID_RDY 0x10
59 #define EDID_MAX_RETRIES (8)
60 #define EDID_DELAY 250
61 #define EDID_MAX_SEGM 8
63 #define ADV7511_MAX_WIDTH 1920
64 #define ADV7511_MAX_HEIGHT 1200
65 #define ADV7511_MIN_PIXELCLOCK 20000000
66 #define ADV7511_MAX_PIXELCLOCK 225000000
68 #define ADV7511_MAX_ADDRS (3)
71 **********************************************************************
73 * Arrays with configuration parameters for the ADV7511
75 **********************************************************************
78 struct i2c_reg_value {
83 struct adv7511_state_edid {
84 /* total number of blocks */
86 /* Number of segments read */
88 u8 data[EDID_MAX_SEGM * 256];
89 /* Number of EDID read retries left */
90 unsigned read_retries;
94 struct adv7511_state {
95 struct adv7511_platform_data pdata;
96 struct v4l2_subdev sd;
98 struct v4l2_ctrl_handler hdl;
104 struct i2c_client *i2c_cec;
105 struct cec_adapter *cec_adap;
106 u8 cec_addr[ADV7511_MAX_ADDRS];
108 bool cec_enabled_adap;
110 /* Is the adv7511 powered on? */
112 /* Did we receive hotplug and rx-sense signals? */
115 /* timings from s_dv_timings */
116 struct v4l2_dv_timings dv_timings;
124 struct v4l2_ctrl *hdmi_mode_ctrl;
125 struct v4l2_ctrl *hotplug_ctrl;
126 struct v4l2_ctrl *rx_sense_ctrl;
127 struct v4l2_ctrl *have_edid0_ctrl;
128 struct v4l2_ctrl *rgb_quantization_range_ctrl;
129 struct v4l2_ctrl *content_type_ctrl;
130 struct i2c_client *i2c_edid;
131 struct i2c_client *i2c_pktmem;
132 struct adv7511_state_edid edid;
133 /* Running counter of the number of detected EDIDs (for debugging) */
134 unsigned edid_detect_counter;
135 struct workqueue_struct *work_queue;
136 struct delayed_work edid_handler; /* work entry */
139 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
140 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
141 static void adv7511_setup(struct v4l2_subdev *sd);
142 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
143 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
146 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
147 .type = V4L2_DV_BT_656_1120,
148 /* keep this initialization for compatibility with GCC < 4.4.6 */
150 V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
151 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
152 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
153 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
154 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
155 V4L2_DV_BT_CAP_CUSTOM)
158 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
160 return container_of(sd, struct adv7511_state, sd);
163 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
165 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
168 /* ------------------------ I2C ----------------------------------------------- */
170 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
171 u8 command, bool check)
173 union i2c_smbus_data data;
175 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
176 I2C_SMBUS_READ, command,
177 I2C_SMBUS_BYTE_DATA, &data))
180 v4l_err(client, "error reading %02x, %02x\n",
181 client->addr, command);
185 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
188 for (i = 0; i < 3; i++) {
189 int ret = adv_smbus_read_byte_data_check(client, command, true);
192 v4l_err(client, "read ok after %d retries\n", i);
196 v4l_err(client, "read failed\n");
200 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
202 struct i2c_client *client = v4l2_get_subdevdata(sd);
204 return adv_smbus_read_byte_data(client, reg);
207 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
209 struct i2c_client *client = v4l2_get_subdevdata(sd);
213 for (i = 0; i < 3; i++) {
214 ret = i2c_smbus_write_byte_data(client, reg, val);
218 v4l2_err(sd, "%s: i2c write error\n", __func__);
222 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
223 and then the value-mask (to be OR-ed). */
224 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
226 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
229 static int adv_smbus_read_i2c_block_data(struct i2c_client *client,
230 u8 command, unsigned length, u8 *values)
232 union i2c_smbus_data data;
235 if (length > I2C_SMBUS_BLOCK_MAX)
236 length = I2C_SMBUS_BLOCK_MAX;
237 data.block[0] = length;
239 ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags,
240 I2C_SMBUS_READ, command,
241 I2C_SMBUS_I2C_BLOCK_DATA, &data);
242 memcpy(values, data.block + 1, length);
246 static void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
248 struct adv7511_state *state = get_adv7511_state(sd);
252 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
254 for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
255 err = adv_smbus_read_i2c_block_data(state->i2c_edid, i,
256 I2C_SMBUS_BLOCK_MAX, buf + i);
258 v4l2_err(sd, "%s: i2c read error\n", __func__);
261 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
263 struct adv7511_state *state = get_adv7511_state(sd);
265 return i2c_smbus_read_byte_data(state->i2c_cec, reg);
268 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
270 struct adv7511_state *state = get_adv7511_state(sd);
274 for (i = 0; i < 3; i++) {
275 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
279 v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
283 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
286 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
289 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
291 struct adv7511_state *state = get_adv7511_state(sd);
293 return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
296 static int adv7511_pktmem_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
298 struct adv7511_state *state = get_adv7511_state(sd);
302 for (i = 0; i < 3; i++) {
303 ret = i2c_smbus_write_byte_data(state->i2c_pktmem, reg, val);
307 v4l2_err(sd, "%s: i2c write error\n", __func__);
311 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
312 and then the value-mask (to be OR-ed). */
313 static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
315 adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask);
318 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
320 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
323 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
325 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
328 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
330 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
333 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
334 u16 A1, u16 A2, u16 A3, u16 A4,
335 u16 B1, u16 B2, u16 B3, u16 B4,
336 u16 C1, u16 C2, u16 C3, u16 C4)
339 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
340 adv7511_wr(sd, 0x19, A1);
341 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
342 adv7511_wr(sd, 0x1B, A2);
343 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
344 adv7511_wr(sd, 0x1d, A3);
345 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
346 adv7511_wr(sd, 0x1f, A4);
349 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
350 adv7511_wr(sd, 0x21, B1);
351 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
352 adv7511_wr(sd, 0x23, B2);
353 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
354 adv7511_wr(sd, 0x25, B3);
355 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
356 adv7511_wr(sd, 0x27, B4);
359 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
360 adv7511_wr(sd, 0x29, C1);
361 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
362 adv7511_wr(sd, 0x2B, C2);
363 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
364 adv7511_wr(sd, 0x2D, C3);
365 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
366 adv7511_wr(sd, 0x2F, C4);
369 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
373 adv7511_csc_conversion_mode(sd, csc_mode);
374 adv7511_csc_coeff(sd,
377 0, 0, 4096-564, 256);
379 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
380 /* AVI infoframe: Limited range RGB (16-235) */
381 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
384 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
385 /* AVI infoframe: Full range RGB (0-255) */
386 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
390 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
392 struct adv7511_state *state = get_adv7511_state(sd);
394 /* Only makes sense for RGB formats */
395 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
396 /* so just keep quantization */
397 adv7511_csc_rgb_full2limit(sd, false);
402 case V4L2_DV_RGB_RANGE_AUTO:
404 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
405 /* CE format, RGB limited range (16-235) */
406 adv7511_csc_rgb_full2limit(sd, true);
408 /* not CE format, RGB full range (0-255) */
409 adv7511_csc_rgb_full2limit(sd, false);
412 case V4L2_DV_RGB_RANGE_LIMITED:
413 /* RGB limited range (16-235) */
414 adv7511_csc_rgb_full2limit(sd, true);
416 case V4L2_DV_RGB_RANGE_FULL:
417 /* RGB full range (0-255) */
418 adv7511_csc_rgb_full2limit(sd, false);
423 /* ------------------------------ CTRL OPS ------------------------------ */
425 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
427 struct v4l2_subdev *sd = to_sd(ctrl);
428 struct adv7511_state *state = get_adv7511_state(sd);
430 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
432 if (state->hdmi_mode_ctrl == ctrl) {
433 /* Set HDMI or DVI-D */
434 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
437 if (state->rgb_quantization_range_ctrl == ctrl) {
438 adv7511_set_rgb_quantization_mode(sd, ctrl);
441 if (state->content_type_ctrl == ctrl) {
444 state->content_type = ctrl->val;
445 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
446 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
447 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
448 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
455 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
456 .s_ctrl = adv7511_s_ctrl,
459 /* ---------------------------- CORE OPS ------------------------------------------- */
461 #ifdef CONFIG_VIDEO_ADV_DEBUG
462 static void adv7511_inv_register(struct v4l2_subdev *sd)
464 struct adv7511_state *state = get_adv7511_state(sd);
466 v4l2_info(sd, "0x000-0x0ff: Main Map\n");
468 v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
471 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
473 struct adv7511_state *state = get_adv7511_state(sd);
476 switch (reg->reg >> 8) {
478 reg->val = adv7511_rd(sd, reg->reg & 0xff);
481 if (state->i2c_cec) {
482 reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
487 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
488 adv7511_inv_register(sd);
494 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
496 struct adv7511_state *state = get_adv7511_state(sd);
498 switch (reg->reg >> 8) {
500 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
503 if (state->i2c_cec) {
504 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
509 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
510 adv7511_inv_register(sd);
517 struct adv7511_cfg_read_infoframe {
525 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
530 /* compute checksum */
531 for (i = 0; i < size; i++)
537 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
539 struct i2c_client *client = v4l2_get_subdevdata(sd);
540 struct device *dev = &client->dev;
541 union hdmi_infoframe frame;
546 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
547 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
551 memcpy(buffer, cri->header, sizeof(cri->header));
555 if (len + 4 > sizeof(buffer)) {
556 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
560 if (cri->payload_addr >= 0x100) {
561 for (i = 0; i < len; i++)
562 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
564 for (i = 0; i < len; i++)
565 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
568 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
570 if (hdmi_infoframe_unpack(&frame, buffer) < 0) {
571 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
575 hdmi_infoframe_log(KERN_INFO, dev, &frame);
578 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
580 static const struct adv7511_cfg_read_infoframe cri[] = {
581 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
582 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
583 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
587 for (i = 0; i < ARRAY_SIZE(cri); i++)
588 log_infoframe(sd, &cri[i]);
591 static int adv7511_log_status(struct v4l2_subdev *sd)
593 struct adv7511_state *state = get_adv7511_state(sd);
594 struct adv7511_state_edid *edid = &state->edid;
597 static const char * const states[] = {
603 "initializing HDCP repeater",
604 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
606 static const char * const errors[] = {
613 "max repeater cascade exceeded",
616 "9", "A", "B", "C", "D", "E", "F"
619 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
620 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
621 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
622 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
623 edid->segments ? "found" : "no",
625 v4l2_info(sd, "%s output %s\n",
626 (adv7511_rd(sd, 0xaf) & 0x02) ?
628 (adv7511_rd(sd, 0xa1) & 0x3c) ?
629 "disabled" : "enabled");
630 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
631 states[adv7511_rd(sd, 0xc8) & 0xf],
632 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
633 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
634 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
635 if (adv7511_rd(sd, 0xaf) & 0x02) {
637 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
638 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
639 adv7511_rd(sd, 0x02) << 8 |
640 adv7511_rd(sd, 0x03);
641 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
642 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
646 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
647 adv7511_rd(sd, 0x08) << 8 |
648 adv7511_rd(sd, 0x09);
650 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
651 adv7511_rd(sd, 0x05) << 8 |
652 adv7511_rd(sd, 0x06);
653 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
654 manual_cts ? "manual" : "automatic", N, CTS);
655 v4l2_info(sd, "VIC: detected %d, sent %d\n",
656 vic_detect, vic_sent);
657 adv7511_log_infoframes(sd);
659 if (state->dv_timings.type == V4L2_DV_BT_656_1120)
660 v4l2_print_dv_timings(sd->name, "timings: ",
661 &state->dv_timings, false);
663 v4l2_info(sd, "no timings set\n");
664 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
666 if (state->i2c_cec == NULL)
669 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
671 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
672 "enabled" : "disabled");
673 if (state->cec_enabled_adap) {
674 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
675 bool is_valid = state->cec_valid_addrs & (1 << i);
678 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
682 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
686 /* Power up/down adv7511 */
687 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
689 struct adv7511_state *state = get_adv7511_state(sd);
690 const int retries = 20;
693 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
695 state->power_on = on;
699 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
704 /* The adv7511 does not always come up immediately.
705 Retry multiple times. */
706 for (i = 0; i < retries; i++) {
707 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
708 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
710 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
714 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
715 adv7511_s_power(sd, 0);
719 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
721 /* Reserved registers that must be set */
722 adv7511_wr(sd, 0x98, 0x03);
723 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
724 adv7511_wr(sd, 0x9c, 0x30);
725 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
726 adv7511_wr(sd, 0xa2, 0xa4);
727 adv7511_wr(sd, 0xa3, 0xa4);
728 adv7511_wr(sd, 0xe0, 0xd0);
729 adv7511_wr(sd, 0xf9, 0x00);
731 adv7511_wr(sd, 0x43, state->i2c_edid_addr);
732 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
734 /* Set number of attempts to read the EDID */
735 adv7511_wr(sd, 0xc9, 0xf);
739 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
740 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
742 struct adv7511_state *state = cec_get_drvdata(adap);
743 struct v4l2_subdev *sd = &state->sd;
745 if (state->i2c_cec == NULL)
748 if (!state->cec_enabled_adap && enable) {
749 /* power up cec section */
750 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
751 /* legacy mode and clear all rx buffers */
752 adv7511_cec_write(sd, 0x4a, 0x07);
753 adv7511_cec_write(sd, 0x4a, 0);
754 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
757 /* tx: arbitration lost */
758 /* tx: retry timeout */
760 if (state->enabled_irq)
761 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
762 } else if (state->cec_enabled_adap && !enable) {
763 if (state->enabled_irq)
764 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
765 /* disable address mask 1-3 */
766 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
767 /* power down cec section */
768 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
769 state->cec_valid_addrs = 0;
771 state->cec_enabled_adap = enable;
775 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
777 struct adv7511_state *state = cec_get_drvdata(adap);
778 struct v4l2_subdev *sd = &state->sd;
779 unsigned int i, free_idx = ADV7511_MAX_ADDRS;
781 if (!state->cec_enabled_adap)
782 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
784 if (addr == CEC_LOG_ADDR_INVALID) {
785 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
786 state->cec_valid_addrs = 0;
790 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
791 bool is_valid = state->cec_valid_addrs & (1 << i);
793 if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
795 if (is_valid && state->cec_addr[i] == addr)
798 if (i == ADV7511_MAX_ADDRS) {
800 if (i == ADV7511_MAX_ADDRS)
803 state->cec_addr[i] = addr;
804 state->cec_valid_addrs |= 1 << i;
808 /* enable address mask 0 */
809 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
810 /* set address for mask 0 */
811 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
814 /* enable address mask 1 */
815 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
816 /* set address for mask 1 */
817 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
820 /* enable address mask 2 */
821 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
822 /* set address for mask 1 */
823 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
829 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
830 u32 signal_free_time, struct cec_msg *msg)
832 struct adv7511_state *state = cec_get_drvdata(adap);
833 struct v4l2_subdev *sd = &state->sd;
837 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
840 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
845 * The number of retries is the number of attempts - 1, but retry
846 * at least once. It's not clear if a value of 0 is allowed, so
847 * let's do at least one retry.
849 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
851 /* blocking, clear cec tx irq status */
852 adv7511_wr_and_or(sd, 0x97, 0xc7, 0x38);
855 for (i = 0; i < len; i++)
856 adv7511_cec_write(sd, i, msg->msg[i]);
858 /* set length (data + header) */
859 adv7511_cec_write(sd, 0x10, len);
860 /* start transmit, enable tx */
861 adv7511_cec_write(sd, 0x11, 0x01);
865 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
867 struct adv7511_state *state = get_adv7511_state(sd);
869 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
870 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
874 if (tx_raw_status & 0x10) {
875 v4l2_dbg(1, debug, sd,
876 "%s: tx raw: arbitration lost\n", __func__);
877 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
881 if (tx_raw_status & 0x08) {
886 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
888 * We set this status bit since this hardware performs
891 status = CEC_TX_STATUS_MAX_RETRIES;
892 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
894 status |= CEC_TX_STATUS_NACK;
895 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
897 status |= CEC_TX_STATUS_LOW_DRIVE;
898 cec_transmit_done(state->cec_adap, status,
899 0, nack_cnt, low_drive_cnt, 0);
902 if (tx_raw_status & 0x20) {
903 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
904 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
909 static const struct cec_adap_ops adv7511_cec_adap_ops = {
910 .adap_enable = adv7511_cec_adap_enable,
911 .adap_log_addr = adv7511_cec_adap_log_addr,
912 .adap_transmit = adv7511_cec_adap_transmit,
916 /* Enable interrupts */
917 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
919 struct adv7511_state *state = get_adv7511_state(sd);
920 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
924 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
926 if (state->enabled_irq == enable)
928 state->enabled_irq = enable;
930 /* The datasheet says that the EDID ready interrupt should be
931 disabled if there is no hotplug. */
934 else if (adv7511_have_hotplug(sd))
935 irqs |= MASK_ADV7511_EDID_RDY_INT;
937 adv7511_wr_and_or(sd, 0x95, 0xc0,
938 (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
941 * This i2c write can fail (approx. 1 in 1000 writes). But it
942 * is essential that this register is correct, so retry it
945 * Note that the i2c write does not report an error, but the readback
946 * clearly shows the wrong value.
949 adv7511_wr(sd, 0x94, irqs);
950 irqs_rd = adv7511_rd(sd, 0x94);
951 } while (retries-- && irqs_rd != irqs);
955 v4l2_err(sd, "Could not set interrupts: hw failure?\n");
958 /* Interrupt handler */
959 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
964 /* disable interrupts to prevent a race condition */
965 adv7511_set_isr(sd, false);
966 irq_status = adv7511_rd(sd, 0x96);
967 cec_irq = adv7511_rd(sd, 0x97);
968 /* clear detected interrupts */
969 adv7511_wr(sd, 0x96, irq_status);
970 adv7511_wr(sd, 0x97, cec_irq);
972 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
973 irq_status, cec_irq);
975 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
976 adv7511_check_monitor_present_status(sd);
977 if (irq_status & MASK_ADV7511_EDID_RDY_INT)
978 adv7511_check_edid_status(sd);
980 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
982 adv_cec_tx_raw_status(sd, cec_irq);
985 struct adv7511_state *state = get_adv7511_state(sd);
988 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
990 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
999 for (i = 0; i < msg.len; i++)
1000 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
1002 adv7511_cec_write(sd, 0x4a, 1); /* toggle to re-enable rx 1 */
1003 adv7511_cec_write(sd, 0x4a, 0);
1004 cec_received_msg(state->cec_adap, &msg);
1009 /* enable interrupts */
1010 adv7511_set_isr(sd, true);
1017 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
1018 .log_status = adv7511_log_status,
1019 #ifdef CONFIG_VIDEO_ADV_DEBUG
1020 .g_register = adv7511_g_register,
1021 .s_register = adv7511_s_register,
1023 .s_power = adv7511_s_power,
1024 .interrupt_service_routine = adv7511_isr,
1027 /* ------------------------------ VIDEO OPS ------------------------------ */
1029 /* Enable/disable adv7511 output */
1030 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
1032 struct adv7511_state *state = get_adv7511_state(sd);
1034 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1035 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
1037 adv7511_check_monitor_present_status(sd);
1039 adv7511_s_power(sd, 0);
1040 state->have_monitor = false;
1045 static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
1046 struct v4l2_dv_timings *timings)
1048 struct adv7511_state *state = get_adv7511_state(sd);
1049 struct v4l2_bt_timings *bt = &timings->bt;
1052 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1054 /* quick sanity check */
1055 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1058 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1059 if the format is one of the CEA or DMT timings. */
1060 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1063 state->dv_timings = *timings;
1065 /* set h/vsync polarities */
1066 adv7511_wr_and_or(sd, 0x17, 0x9f,
1067 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1068 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1070 fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
1073 adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
1076 adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
1079 adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
1082 adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
1086 /* update quantization range based on new dv_timings */
1087 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1092 static int adv7511_g_dv_timings(struct v4l2_subdev *sd,
1093 struct v4l2_dv_timings *timings)
1095 struct adv7511_state *state = get_adv7511_state(sd);
1097 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1102 *timings = state->dv_timings;
1107 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1108 struct v4l2_enum_dv_timings *timings)
1110 if (timings->pad != 0)
1113 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1116 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1117 struct v4l2_dv_timings_cap *cap)
1122 *cap = adv7511_timings_cap;
1126 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1127 .s_stream = adv7511_s_stream,
1128 .s_dv_timings = adv7511_s_dv_timings,
1129 .g_dv_timings = adv7511_g_dv_timings,
1132 /* ------------------------------ AUDIO OPS ------------------------------ */
1133 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1135 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1138 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1140 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1145 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1150 case 32000: N = 4096; break;
1151 case 44100: N = 6272; break;
1152 case 48000: N = 6144; break;
1153 case 88200: N = 12544; break;
1154 case 96000: N = 12288; break;
1155 case 176400: N = 25088; break;
1156 case 192000: N = 24576; break;
1161 /* Set N (used with CTS to regenerate the audio clock) */
1162 adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1163 adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1164 adv7511_wr(sd, 0x03, N & 0xff);
1169 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1174 case 32000: i2s_sf = 0x30; break;
1175 case 44100: i2s_sf = 0x00; break;
1176 case 48000: i2s_sf = 0x20; break;
1177 case 88200: i2s_sf = 0x80; break;
1178 case 96000: i2s_sf = 0xa0; break;
1179 case 176400: i2s_sf = 0xc0; break;
1180 case 192000: i2s_sf = 0xe0; break;
1185 /* Set sampling frequency for I2S audio to 48 kHz */
1186 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1191 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1193 /* Only 2 channels in use for application */
1194 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1195 /* Speaker mapping */
1196 adv7511_wr(sd, 0x76, 0x00);
1198 /* 16 bit audio word length */
1199 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1204 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1205 .s_stream = adv7511_s_audio_stream,
1206 .s_clock_freq = adv7511_s_clock_freq,
1207 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1208 .s_routing = adv7511_s_routing,
1211 /* ---------------------------- PAD OPS ------------------------------------- */
1213 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1215 struct adv7511_state *state = get_adv7511_state(sd);
1217 memset(edid->reserved, 0, sizeof(edid->reserved));
1222 if (edid->start_block == 0 && edid->blocks == 0) {
1223 edid->blocks = state->edid.segments * 2;
1227 if (state->edid.segments == 0)
1230 if (edid->start_block >= state->edid.segments * 2)
1233 if (edid->start_block + edid->blocks > state->edid.segments * 2)
1234 edid->blocks = state->edid.segments * 2 - edid->start_block;
1236 memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1237 128 * edid->blocks);
1242 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1243 struct v4l2_subdev_pad_config *cfg,
1244 struct v4l2_subdev_mbus_code_enum *code)
1249 switch (code->index) {
1251 code->code = MEDIA_BUS_FMT_RGB888_1X24;
1254 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1257 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1265 static void adv7511_fill_format(struct adv7511_state *state,
1266 struct v4l2_mbus_framefmt *format)
1268 format->width = state->dv_timings.bt.width;
1269 format->height = state->dv_timings.bt.height;
1270 format->field = V4L2_FIELD_NONE;
1273 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1274 struct v4l2_subdev_pad_config *cfg,
1275 struct v4l2_subdev_format *format)
1277 struct adv7511_state *state = get_adv7511_state(sd);
1279 if (format->pad != 0)
1282 memset(&format->format, 0, sizeof(format->format));
1283 adv7511_fill_format(state, &format->format);
1285 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1286 struct v4l2_mbus_framefmt *fmt;
1288 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1289 format->format.code = fmt->code;
1290 format->format.colorspace = fmt->colorspace;
1291 format->format.ycbcr_enc = fmt->ycbcr_enc;
1292 format->format.quantization = fmt->quantization;
1293 format->format.xfer_func = fmt->xfer_func;
1295 format->format.code = state->fmt_code;
1296 format->format.colorspace = state->colorspace;
1297 format->format.ycbcr_enc = state->ycbcr_enc;
1298 format->format.quantization = state->quantization;
1299 format->format.xfer_func = state->xfer_func;
1305 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1306 struct v4l2_subdev_pad_config *cfg,
1307 struct v4l2_subdev_format *format)
1309 struct adv7511_state *state = get_adv7511_state(sd);
1311 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1312 * Video Information (AVI) InfoFrame Format"
1315 * ec = Extended Colorimetry
1317 * q = RGB Quantization Range
1318 * yq = YCC Quantization Range
1320 u8 c = HDMI_COLORIMETRY_NONE;
1321 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1322 u8 y = HDMI_COLORSPACE_RGB;
1323 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1324 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1325 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1326 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1328 if (format->pad != 0)
1330 switch (format->format.code) {
1331 case MEDIA_BUS_FMT_UYVY8_1X16:
1332 case MEDIA_BUS_FMT_YUYV8_1X16:
1333 case MEDIA_BUS_FMT_RGB888_1X24:
1339 adv7511_fill_format(state, &format->format);
1340 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1341 struct v4l2_mbus_framefmt *fmt;
1343 fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad);
1344 fmt->code = format->format.code;
1345 fmt->colorspace = format->format.colorspace;
1346 fmt->ycbcr_enc = format->format.ycbcr_enc;
1347 fmt->quantization = format->format.quantization;
1348 fmt->xfer_func = format->format.xfer_func;
1352 switch (format->format.code) {
1353 case MEDIA_BUS_FMT_UYVY8_1X16:
1354 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1355 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1356 y = HDMI_COLORSPACE_YUV422;
1358 case MEDIA_BUS_FMT_YUYV8_1X16:
1359 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1360 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1361 y = HDMI_COLORSPACE_YUV422;
1363 case MEDIA_BUS_FMT_RGB888_1X24:
1365 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1366 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1369 state->fmt_code = format->format.code;
1370 state->colorspace = format->format.colorspace;
1371 state->ycbcr_enc = format->format.ycbcr_enc;
1372 state->quantization = format->format.quantization;
1373 state->xfer_func = format->format.xfer_func;
1375 switch (format->format.colorspace) {
1376 case V4L2_COLORSPACE_ADOBERGB:
1377 c = HDMI_COLORIMETRY_EXTENDED;
1378 ec = y ? HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601 :
1379 HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB;
1381 case V4L2_COLORSPACE_SMPTE170M:
1382 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1383 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1384 c = HDMI_COLORIMETRY_EXTENDED;
1385 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1388 case V4L2_COLORSPACE_REC709:
1389 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1390 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1391 c = HDMI_COLORIMETRY_EXTENDED;
1392 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1395 case V4L2_COLORSPACE_SRGB:
1396 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1397 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1398 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1400 case V4L2_COLORSPACE_BT2020:
1401 c = HDMI_COLORIMETRY_EXTENDED;
1402 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1403 ec = 5; /* Not yet available in hdmi.h */
1405 ec = 6; /* Not yet available in hdmi.h */
1412 * CEA-861-F says that for RGB formats the YCC range must match the
1413 * RGB range, although sources should ignore the YCC range.
1415 * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1416 * have the Q bit set in the Video Capabilities Data Block, however this
1417 * isn't checked at the moment. The assumption is that the application
1418 * knows the EDID and can detect this.
1420 * The same is true for the YCC quantization range: non-standard YCC
1421 * quantization ranges should only be sent if the EDID has the YQ bit
1422 * set in the Video Capabilities Data Block.
1424 switch (format->format.quantization) {
1425 case V4L2_QUANTIZATION_FULL_RANGE:
1426 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1427 HDMI_QUANTIZATION_RANGE_FULL;
1428 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1430 case V4L2_QUANTIZATION_LIM_RANGE:
1431 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1432 HDMI_QUANTIZATION_RANGE_LIMITED;
1433 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1437 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1438 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1439 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1440 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1441 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1442 adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1443 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1448 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1449 .get_edid = adv7511_get_edid,
1450 .enum_mbus_code = adv7511_enum_mbus_code,
1451 .get_fmt = adv7511_get_fmt,
1452 .set_fmt = adv7511_set_fmt,
1453 .enum_dv_timings = adv7511_enum_dv_timings,
1454 .dv_timings_cap = adv7511_dv_timings_cap,
1457 /* --------------------- SUBDEV OPS --------------------------------------- */
1459 static const struct v4l2_subdev_ops adv7511_ops = {
1460 .core = &adv7511_core_ops,
1461 .pad = &adv7511_pad_ops,
1462 .video = &adv7511_video_ops,
1463 .audio = &adv7511_audio_ops,
1466 /* ----------------------------------------------------------------------- */
1467 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1471 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1472 for (i = 0; i < 256; i += 16) {
1476 v4l2_dbg(lvl, debug, sd, "\n");
1477 for (j = i; j < i + 16; j++) {
1478 sprintf(bp, "0x%02x, ", buf[j]);
1482 v4l2_dbg(lvl, debug, sd, "%s\n", b);
1487 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1489 struct adv7511_state *state = get_adv7511_state(sd);
1490 struct adv7511_edid_detect ed;
1492 /* We failed to read the EDID, so send an event for this. */
1494 ed.segment = adv7511_rd(sd, 0xc4);
1495 ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1496 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1497 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1498 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1501 static void adv7511_edid_handler(struct work_struct *work)
1503 struct delayed_work *dwork = to_delayed_work(work);
1504 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1505 struct v4l2_subdev *sd = &state->sd;
1507 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1509 if (adv7511_check_edid_status(sd)) {
1510 /* Return if we received the EDID. */
1514 if (adv7511_have_hotplug(sd)) {
1515 /* We must retry reading the EDID several times, it is possible
1516 * that initially the EDID couldn't be read due to i2c errors
1517 * (DVI connectors are particularly prone to this problem). */
1518 if (state->edid.read_retries) {
1519 state->edid.read_retries--;
1520 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1521 state->have_monitor = false;
1522 adv7511_s_power(sd, false);
1523 adv7511_s_power(sd, true);
1524 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1529 /* We failed to read the EDID, so send an event for this. */
1530 adv7511_notify_no_edid(sd);
1531 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1534 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1536 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1538 adv7511_s_i2s_clock_freq(sd, 48000);
1539 adv7511_s_clock_freq(sd, 48000);
1540 adv7511_s_routing(sd, 0, 0, 0);
1543 /* Configure hdmi transmitter. */
1544 static void adv7511_setup(struct v4l2_subdev *sd)
1546 struct adv7511_state *state = get_adv7511_state(sd);
1547 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1549 /* Input format: RGB 4:4:4 */
1550 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1551 /* Output format: RGB 4:4:4 */
1552 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1553 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1554 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1555 /* Disable pixel repetition */
1556 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1558 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1559 /* Output format: RGB 4:4:4, Active Format Information is valid,
1561 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1562 /* AVI Info frame packet enable, Audio Info frame disable */
1563 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1564 /* Colorimetry, Active format aspect ratio: same as picure. */
1565 adv7511_wr(sd, 0x56, 0xa8);
1567 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1569 /* Positive clk edge capture for input video clock */
1570 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1572 adv7511_audio_setup(sd);
1574 v4l2_ctrl_handler_setup(&state->hdl);
1577 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1579 struct adv7511_monitor_detect mdt;
1580 struct adv7511_state *state = get_adv7511_state(sd);
1582 mdt.present = state->have_monitor;
1583 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1586 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1588 struct adv7511_state *state = get_adv7511_state(sd);
1589 /* read hotplug and rx-sense state */
1590 u8 status = adv7511_rd(sd, 0x42);
1592 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1595 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1596 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1598 /* update read only ctrls */
1599 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1600 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1602 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1603 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1604 if (!state->have_monitor) {
1605 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1606 state->have_monitor = true;
1607 adv7511_set_isr(sd, true);
1608 if (!adv7511_s_power(sd, true)) {
1609 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1613 adv7511_notify_monitor_detect(sd);
1614 state->edid.read_retries = EDID_MAX_RETRIES;
1615 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1617 } else if (status & MASK_ADV7511_HPD_DETECT) {
1618 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1619 state->edid.read_retries = EDID_MAX_RETRIES;
1620 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1621 } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1622 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1623 if (state->have_monitor) {
1624 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1625 state->have_monitor = false;
1626 adv7511_notify_monitor_detect(sd);
1628 adv7511_s_power(sd, false);
1629 memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1630 adv7511_notify_no_edid(sd);
1634 static bool edid_block_verify_crc(u8 *edid_block)
1639 for (i = 0; i < 128; i++)
1640 sum += edid_block[i];
1644 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1646 struct adv7511_state *state = get_adv7511_state(sd);
1647 u32 blocks = state->edid.blocks;
1648 u8 *data = state->edid.data;
1650 if (!edid_block_verify_crc(&data[segment * 256]))
1652 if ((segment + 1) * 2 <= blocks)
1653 return edid_block_verify_crc(&data[segment * 256 + 128]);
1657 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1659 static const u8 hdmi_header[] = {
1660 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1662 struct adv7511_state *state = get_adv7511_state(sd);
1663 u8 *data = state->edid.data;
1667 return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1670 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1672 struct adv7511_state *state = get_adv7511_state(sd);
1673 u8 edidRdy = adv7511_rd(sd, 0xc5);
1675 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1676 __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1678 if (state->edid.complete)
1681 if (edidRdy & MASK_ADV7511_EDID_RDY) {
1682 int segment = adv7511_rd(sd, 0xc4);
1683 struct adv7511_edid_detect ed;
1685 if (segment >= EDID_MAX_SEGM) {
1686 v4l2_err(sd, "edid segment number too big\n");
1689 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1690 adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1691 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1693 state->edid.blocks = state->edid.data[0x7e] + 1;
1694 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks);
1696 if (!edid_verify_crc(sd, segment) ||
1697 !edid_verify_header(sd, segment)) {
1698 /* edid crc error, force reread of edid segment */
1699 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1700 state->have_monitor = false;
1701 adv7511_s_power(sd, false);
1702 adv7511_s_power(sd, true);
1705 /* one more segment read ok */
1706 state->edid.segments = segment + 1;
1707 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1708 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1709 /* Request next EDID segment */
1710 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1711 adv7511_wr(sd, 0xc9, 0xf);
1712 adv7511_wr(sd, 0xc4, state->edid.segments);
1713 state->edid.read_retries = EDID_MAX_RETRIES;
1714 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1718 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1719 state->edid.complete = true;
1720 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1721 state->edid.segments * 256,
1723 /* report when we have all segments
1724 but report only for segment 0
1728 state->edid_detect_counter++;
1729 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1730 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1737 static int adv7511_registered(struct v4l2_subdev *sd)
1739 struct adv7511_state *state = get_adv7511_state(sd);
1740 struct i2c_client *client = v4l2_get_subdevdata(sd);
1743 err = cec_register_adapter(state->cec_adap, &client->dev);
1745 cec_delete_adapter(state->cec_adap);
1749 static void adv7511_unregistered(struct v4l2_subdev *sd)
1751 struct adv7511_state *state = get_adv7511_state(sd);
1753 cec_unregister_adapter(state->cec_adap);
1756 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1757 .registered = adv7511_registered,
1758 .unregistered = adv7511_unregistered,
1761 /* ----------------------------------------------------------------------- */
1763 static void adv7511_init_setup(struct v4l2_subdev *sd)
1765 struct adv7511_state *state = get_adv7511_state(sd);
1766 struct adv7511_state_edid *edid = &state->edid;
1767 u32 cec_clk = state->pdata.cec_clk;
1770 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1772 /* clear all interrupts */
1773 adv7511_wr(sd, 0x96, 0xff);
1774 adv7511_wr(sd, 0x97, 0xff);
1776 * Stop HPD from resetting a lot of registers.
1777 * It might leave the chip in a partly un-initialized state,
1778 * in particular with regards to hotplug bounces.
1780 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1781 memset(edid, 0, sizeof(struct adv7511_state_edid));
1782 state->have_monitor = false;
1783 adv7511_set_isr(sd, false);
1784 adv7511_s_stream(sd, false);
1785 adv7511_s_audio_stream(sd, false);
1787 if (state->i2c_cec == NULL)
1790 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1792 /* cec soft reset */
1793 adv7511_cec_write(sd, 0x50, 0x01);
1794 adv7511_cec_write(sd, 0x50, 0x00);
1797 adv7511_cec_write(sd, 0x4a, 0x00);
1799 if (cec_clk % 750000 != 0)
1800 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1803 ratio = (cec_clk / 750000) - 1;
1804 adv7511_cec_write(sd, 0x4e, ratio << 2);
1807 static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id)
1809 struct adv7511_state *state;
1810 struct adv7511_platform_data *pdata = client->dev.platform_data;
1811 struct v4l2_ctrl_handler *hdl;
1812 struct v4l2_subdev *sd;
1816 /* Check if the adapter supports the needed features */
1817 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1820 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1826 v4l_err(client, "No platform data!\n");
1829 memcpy(&state->pdata, pdata, sizeof(state->pdata));
1830 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1831 state->colorspace = V4L2_COLORSPACE_SRGB;
1835 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1838 v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1839 sd->internal_ops = &adv7511_int_ops;
1842 v4l2_ctrl_handler_init(hdl, 10);
1843 /* add in ascending ID order */
1844 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1845 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1846 0, V4L2_DV_TX_MODE_DVI_D);
1847 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1848 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1849 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1850 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1851 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1852 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1853 state->rgb_quantization_range_ctrl =
1854 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1855 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1856 0, V4L2_DV_RGB_RANGE_AUTO);
1857 state->content_type_ctrl =
1858 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1859 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1860 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1861 sd->ctrl_handler = hdl;
1866 state->pad.flags = MEDIA_PAD_FL_SINK;
1867 err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1871 /* EDID and CEC i2c addr */
1872 state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1873 state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1874 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1876 state->chip_revision = adv7511_rd(sd, 0x0);
1877 chip_id[0] = adv7511_rd(sd, 0xf5);
1878 chip_id[1] = adv7511_rd(sd, 0xf6);
1879 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1880 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1886 state->i2c_edid = i2c_new_dummy(client->adapter,
1887 state->i2c_edid_addr >> 1);
1888 if (state->i2c_edid == NULL) {
1889 v4l2_err(sd, "failed to register edid i2c client\n");
1894 adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1895 if (state->pdata.cec_clk < 3000000 ||
1896 state->pdata.cec_clk > 100000000) {
1897 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1898 __func__, state->pdata.cec_clk);
1899 state->pdata.cec_clk = 0;
1902 if (state->pdata.cec_clk) {
1903 state->i2c_cec = i2c_new_dummy(client->adapter,
1904 state->i2c_cec_addr >> 1);
1905 if (state->i2c_cec == NULL) {
1906 v4l2_err(sd, "failed to register cec i2c client\n");
1908 goto err_unreg_edid;
1910 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1912 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1915 state->i2c_pktmem = i2c_new_dummy(client->adapter, state->i2c_pktmem_addr >> 1);
1916 if (state->i2c_pktmem == NULL) {
1917 v4l2_err(sd, "failed to register pktmem i2c client\n");
1922 state->work_queue = create_singlethread_workqueue(sd->name);
1923 if (state->work_queue == NULL) {
1924 v4l2_err(sd, "could not create workqueue\n");
1926 goto err_unreg_pktmem;
1929 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1931 adv7511_init_setup(sd);
1933 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1934 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1935 state, dev_name(&client->dev), CEC_CAP_DEFAULTS,
1937 err = PTR_ERR_OR_ZERO(state->cec_adap);
1939 destroy_workqueue(state->work_queue);
1940 goto err_unreg_pktmem;
1944 adv7511_set_isr(sd, true);
1945 adv7511_check_monitor_present_status(sd);
1947 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1948 client->addr << 1, client->adapter->name);
1952 i2c_unregister_device(state->i2c_pktmem);
1955 i2c_unregister_device(state->i2c_cec);
1957 i2c_unregister_device(state->i2c_edid);
1959 media_entity_cleanup(&sd->entity);
1961 v4l2_ctrl_handler_free(&state->hdl);
1965 /* ----------------------------------------------------------------------- */
1967 static int adv7511_remove(struct i2c_client *client)
1969 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1970 struct adv7511_state *state = get_adv7511_state(sd);
1972 state->chip_revision = -1;
1974 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1975 client->addr << 1, client->adapter->name);
1977 adv7511_set_isr(sd, false);
1978 adv7511_init_setup(sd);
1979 cancel_delayed_work_sync(&state->edid_handler);
1980 i2c_unregister_device(state->i2c_edid);
1982 i2c_unregister_device(state->i2c_cec);
1983 i2c_unregister_device(state->i2c_pktmem);
1984 destroy_workqueue(state->work_queue);
1985 v4l2_device_unregister_subdev(sd);
1986 media_entity_cleanup(&sd->entity);
1987 v4l2_ctrl_handler_free(sd->ctrl_handler);
1991 /* ----------------------------------------------------------------------- */
1993 static const struct i2c_device_id adv7511_id[] = {
1997 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1999 static struct i2c_driver adv7511_driver = {
2003 .probe = adv7511_probe,
2004 .remove = adv7511_remove,
2005 .id_table = adv7511_id,
2008 module_i2c_driver(adv7511_driver);