drivers/media/i2c/adv748x/adv748x-core.c

   1 /*
   2  * Driver for Analog Devices ADV748X HDMI receiver with AFE
   3  *
   4  * Copyright (C) 2017 Renesas Electronics Corp.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  *
  11  * Authors:
  12  *      Koji Matsuoka <koji.matsuoka.xm@renesas.com>
  13  *      Niklas Söderlund <niklas.soderlund@ragnatech.se>
  14  *      Kieran Bingham <kieran.bingham@ideasonboard.com>
  15  */
  16
  17 #include <linux/delay.h>
  18 #include <linux/errno.h>
  19 #include <linux/i2c.h>
  20 #include <linux/module.h>
  21 #include <linux/mutex.h>
  22 #include <linux/of_graph.h>
  23 #include <linux/regmap.h>
  24 #include <linux/slab.h>
  25 #include <linux/v4l2-dv-timings.h>
  26
  27 #include <media/v4l2-ctrls.h>
  28 #include <media/v4l2-device.h>
  29 #include <media/v4l2-dv-timings.h>
  30 #include <media/v4l2-ioctl.h>
  31
  32 #include "adv748x.h"
  33
  34 /* -----------------------------------------------------------------------------
  35  * Register manipulation
  36  */
  37
  38 static const struct regmap_config adv748x_regmap_cnf[] = {
  39         {
  40                 .name                   = "io",
  41                 .reg_bits               = 8,
  42                 .val_bits               = 8,
  43
  44                 .max_register           = 0xff,
  45                 .cache_type             = REGCACHE_NONE,
  46         },
  47         {
  48                 .name                   = "dpll",
  49                 .reg_bits               = 8,
  50                 .val_bits               = 8,
  51
  52                 .max_register           = 0xff,
  53                 .cache_type             = REGCACHE_NONE,
  54         },
  55         {
  56                 .name                   = "cp",
  57                 .reg_bits               = 8,
  58                 .val_bits               = 8,
  59
  60                 .max_register           = 0xff,
  61                 .cache_type             = REGCACHE_NONE,
  62         },
  63         {
  64                 .name                   = "hdmi",
  65                 .reg_bits               = 8,
  66                 .val_bits               = 8,
  67
  68                 .max_register           = 0xff,
  69                 .cache_type             = REGCACHE_NONE,
  70         },
  71         {
  72                 .name                   = "edid",
  73                 .reg_bits               = 8,
  74                 .val_bits               = 8,
  75
  76                 .max_register           = 0xff,
  77                 .cache_type             = REGCACHE_NONE,
  78         },
  79         {
  80                 .name                   = "repeater",
  81                 .reg_bits               = 8,
  82                 .val_bits               = 8,
  83
  84                 .max_register           = 0xff,
  85                 .cache_type             = REGCACHE_NONE,
  86         },
  87         {
  88                 .name                   = "infoframe",
  89                 .reg_bits               = 8,
  90                 .val_bits               = 8,
  91
  92                 .max_register           = 0xff,
  93                 .cache_type             = REGCACHE_NONE,
  94         },
  95         {
  96                 .name                   = "cec",
  97                 .reg_bits               = 8,
  98                 .val_bits               = 8,
  99
 100                 .max_register           = 0xff,
 101                 .cache_type             = REGCACHE_NONE,
 102         },
 103         {
 104                 .name                   = "sdp",
 105                 .reg_bits               = 8,
 106                 .val_bits               = 8,
 107
 108                 .max_register           = 0xff,
 109                 .cache_type             = REGCACHE_NONE,
 110         },
 111
 112         {
 113                 .name                   = "txb",
 114                 .reg_bits               = 8,
 115                 .val_bits               = 8,
 116
 117                 .max_register           = 0xff,
 118                 .cache_type             = REGCACHE_NONE,
 119         },
 120         {
 121                 .name                   = "txa",
 122                 .reg_bits               = 8,
 123                 .val_bits               = 8,
 124
 125                 .max_register           = 0xff,
 126                 .cache_type             = REGCACHE_NONE,
 127         },
 128 };
 129
 130 static int adv748x_configure_regmap(struct adv748x_state *state, int region)
 131 {
 132         int err;
 133
 134         if (!state->i2c_clients[region])
 135                 return -ENODEV;
 136
 137         state->regmap[region] =
 138                 devm_regmap_init_i2c(state->i2c_clients[region],
 139                                      &adv748x_regmap_cnf[region]);
 140
 141         if (IS_ERR(state->regmap[region])) {
 142                 err = PTR_ERR(state->regmap[region]);
 143                 adv_err(state,
 144                         "Error initializing regmap %d with error %d\n",
 145                         region, err);
 146                 return -EINVAL;
 147         }
 148
 149         return 0;
 150 }
 151
 152 /* Default addresses for the I2C pages */
 153 static int adv748x_i2c_addresses[ADV748X_PAGE_MAX] = {
 154         ADV748X_I2C_IO,
 155         ADV748X_I2C_DPLL,
 156         ADV748X_I2C_CP,
 157         ADV748X_I2C_HDMI,
 158         ADV748X_I2C_EDID,
 159         ADV748X_I2C_REPEATER,
 160         ADV748X_I2C_INFOFRAME,
 161         ADV748X_I2C_CEC,
 162         ADV748X_I2C_SDP,
 163         ADV748X_I2C_TXB,
 164         ADV748X_I2C_TXA,
 165 };
 166
 167 static int adv748x_read_check(struct adv748x_state *state,
 168                               int client_page, u8 reg)
 169 {
 170         struct i2c_client *client = state->i2c_clients[client_page];
 171         int err;
 172         unsigned int val;
 173
 174         err = regmap_read(state->regmap[client_page], reg, &val);
 175
 176         if (err) {
 177                 adv_err(state, "error reading %02x, %02x\n",
 178                                 client->addr, reg);
 179                 return err;
 180         }
 181
 182         return val;
 183 }
 184
 185 int adv748x_read(struct adv748x_state *state, u8 page, u8 reg)
 186 {
 187         return adv748x_read_check(state, page, reg);
 188 }
 189
 190 int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value)
 191 {
 192         return regmap_write(state->regmap[page], reg, value);
 193 }
 194
 195 /* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX
 196  * size to one or more registers.
 197  *
 198  * A value of zero will be returned on success, a negative errno will
 199  * be returned in error cases.
 200  */
 201 int adv748x_write_block(struct adv748x_state *state, int client_page,
 202                         unsigned int init_reg, const void *val,
 203                         size_t val_len)
 204 {
 205         struct regmap *regmap = state->regmap[client_page];
 206
 207         if (val_len > I2C_SMBUS_BLOCK_MAX)
 208                 val_len = I2C_SMBUS_BLOCK_MAX;
 209
 210         return regmap_raw_write(regmap, init_reg, val, val_len);
 211 }
 212
 213 static struct i2c_client *adv748x_dummy_client(struct adv748x_state *state,
 214                                                u8 addr, u8 io_reg)
 215 {
 216         struct i2c_client *client = state->client;
 217
 218         if (addr)
 219                 io_write(state, io_reg, addr << 1);
 220
 221         return i2c_new_dummy(client->adapter, io_read(state, io_reg) >> 1);
 222 }
 223
 224 static void adv748x_unregister_clients(struct adv748x_state *state)
 225 {
 226         unsigned int i;
 227
 228         for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i) {
 229                 if (state->i2c_clients[i])
 230                         i2c_unregister_device(state->i2c_clients[i]);
 231         }
 232 }
 233
 234 static int adv748x_initialise_clients(struct adv748x_state *state)
 235 {
 236         int i;
 237         int ret;
 238
 239         for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
 240                 state->i2c_clients[i] =
 241                         adv748x_dummy_client(state, adv748x_i2c_addresses[i],
 242                                              ADV748X_IO_SLAVE_ADDR_BASE + i);
 243                 if (state->i2c_clients[i] == NULL) {
 244                         adv_err(state, "failed to create i2c client %u\n", i);
 245                         return -ENOMEM;
 246                 }
 247
 248                 ret = adv748x_configure_regmap(state, i);
 249                 if (ret)
 250                         return ret;
 251         }
 252
 253         return 0;
 254 }
 255
 256 /**
 257  * struct adv748x_reg_value - Register write instruction
 258  * @page:               Regmap page identifier
 259  * @reg:                I2C register
 260  * @value:              value to write to @page at @reg
 261  */
 262 struct adv748x_reg_value {
 263         u8 page;
 264         u8 reg;
 265         u8 value;
 266 };
 267
 268 static int adv748x_write_regs(struct adv748x_state *state,
 269                               const struct adv748x_reg_value *regs)
 270 {
 271         int ret;
 272
 273         while (regs->page != ADV748X_PAGE_EOR) {
 274                 if (regs->page == ADV748X_PAGE_WAIT) {
 275                         msleep(regs->value);
 276                 } else {
 277                         ret = adv748x_write(state, regs->page, regs->reg,
 278                                       regs->value);
 279                         if (ret < 0) {
 280                                 adv_err(state,
 281                                         "Error regs page: 0x%02x reg: 0x%02x\n",
 282                                         regs->page, regs->reg);
 283                                 return ret;
 284                         }
 285                 }
 286                 regs++;
 287         }
 288
 289         return 0;
 290 }
 291
 292 /* -----------------------------------------------------------------------------
 293  * TXA and TXB
 294  */
 295
 296 static const struct adv748x_reg_value adv748x_power_up_txa_4lane[] = {
 297
 298         {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 299         {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */
 300
 301         {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 302         {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */
 303         {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 304         {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 305         {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */
 306         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 307         {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */
 308         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 309         {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */
 310
 311         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 312 };
 313
 314 static const struct adv748x_reg_value adv748x_power_down_txa_4lane[] = {
 315
 316         {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 317         {ADV748X_PAGE_TXA, 0x1e, 0x00}, /* ADI Required Write */
 318         {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 319         {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 320         {ADV748X_PAGE_TXA, 0xc1, 0x3b}, /* ADI Required Write */
 321
 322         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 323 };
 324
 325 static const struct adv748x_reg_value adv748x_power_up_txb_1lane[] = {
 326
 327         {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */
 328         {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */
 329
 330         {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 331         {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */
 332         {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 333         {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 334         {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */
 335         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 336         {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */
 337         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 338         {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */
 339
 340         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 341 };
 342
 343 static const struct adv748x_reg_value adv748x_power_down_txb_1lane[] = {
 344
 345         {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 346         {ADV748X_PAGE_TXB, 0x1e, 0x00}, /* ADI Required Write */
 347         {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 4-lane MIPI */
 348         {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 349         {ADV748X_PAGE_TXB, 0xc1, 0x3b}, /* ADI Required Write */
 350
 351         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 352 };
 353
 354 int adv748x_txa_power(struct adv748x_state *state, bool on)
 355 {
 356         int val;
 357
 358         val = txa_read(state, ADV748X_CSI_FS_AS_LS);
 359         if (val < 0)
 360                 return val;
 361
 362         /*
 363          * This test against BIT(6) is not documented by the datasheet, but was
 364          * specified in the downstream driver.
 365          * Track with a WARN_ONCE to determine if it is ever set by HW.
 366          */
 367         WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN),
 368                         "Enabling with unknown bit set");
 369
 370         if (on)
 371                 return adv748x_write_regs(state, adv748x_power_up_txa_4lane);
 372
 373         return adv748x_write_regs(state, adv748x_power_down_txa_4lane);
 374 }
 375
 376 int adv748x_txb_power(struct adv748x_state *state, bool on)
 377 {
 378         int val;
 379
 380         val = txb_read(state, ADV748X_CSI_FS_AS_LS);
 381         if (val < 0)
 382                 return val;
 383
 384         /*
 385          * This test against BIT(6) is not documented by the datasheet, but was
 386          * specified in the downstream driver.
 387          * Track with a WARN_ONCE to determine if it is ever set by HW.
 388          */
 389         WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN),
 390                         "Enabling with unknown bit set");
 391
 392         if (on)
 393                 return adv748x_write_regs(state, adv748x_power_up_txb_1lane);
 394
 395         return adv748x_write_regs(state, adv748x_power_down_txb_1lane);
 396 }
 397
 398 /* -----------------------------------------------------------------------------
 399  * Media Operations
 400  */
 401
 402 static const struct media_entity_operations adv748x_media_ops = {
 403         .link_validate = v4l2_subdev_link_validate,
 404 };
 405
 406 /* -----------------------------------------------------------------------------
 407  * HW setup
 408  */
 409
 410 static const struct adv748x_reg_value adv748x_sw_reset[] = {
 411
 412         {ADV748X_PAGE_IO, 0xff, 0xff},  /* SW reset */
 413         {ADV748X_PAGE_WAIT, 0x00, 0x05},/* delay 5 */
 414         {ADV748X_PAGE_IO, 0x01, 0x76},  /* ADI Required Write */
 415         {ADV748X_PAGE_IO, 0xf2, 0x01},  /* Enable I2C Read Auto-Increment */
 416         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 417 };
 418
 419 static const struct adv748x_reg_value adv748x_set_slave_address[] = {
 420         {ADV748X_PAGE_IO, 0xf3, ADV748X_I2C_DPLL << 1},
 421         {ADV748X_PAGE_IO, 0xf4, ADV748X_I2C_CP << 1},
 422         {ADV748X_PAGE_IO, 0xf5, ADV748X_I2C_HDMI << 1},
 423         {ADV748X_PAGE_IO, 0xf6, ADV748X_I2C_EDID << 1},
 424         {ADV748X_PAGE_IO, 0xf7, ADV748X_I2C_REPEATER << 1},
 425         {ADV748X_PAGE_IO, 0xf8, ADV748X_I2C_INFOFRAME << 1},
 426         {ADV748X_PAGE_IO, 0xfa, ADV748X_I2C_CEC << 1},
 427         {ADV748X_PAGE_IO, 0xfb, ADV748X_I2C_SDP << 1},
 428         {ADV748X_PAGE_IO, 0xfc, ADV748X_I2C_TXB << 1},
 429         {ADV748X_PAGE_IO, 0xfd, ADV748X_I2C_TXA << 1},
 430         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 431 };
 432
 433 /* Supported Formats For Script Below */
 434 /* - 01-29 HDMI to MIPI TxA CSI 4-Lane - RGB888: */
 435 static const struct adv748x_reg_value adv748x_init_txa_4lane[] = {
 436         /* Disable chip powerdown & Enable HDMI Rx block */
 437         {ADV748X_PAGE_IO, 0x00, 0x40},
 438
 439         {ADV748X_PAGE_REPEATER, 0x40, 0x83}, /* Enable HDCP 1.1 */
 440
 441         {ADV748X_PAGE_HDMI, 0x00, 0x08},/* Foreground Channel = A */
 442         {ADV748X_PAGE_HDMI, 0x98, 0xff},/* ADI Required Write */
 443         {ADV748X_PAGE_HDMI, 0x99, 0xa3},/* ADI Required Write */
 444         {ADV748X_PAGE_HDMI, 0x9a, 0x00},/* ADI Required Write */
 445         {ADV748X_PAGE_HDMI, 0x9b, 0x0a},/* ADI Required Write */
 446         {ADV748X_PAGE_HDMI, 0x9d, 0x40},/* ADI Required Write */
 447         {ADV748X_PAGE_HDMI, 0xcb, 0x09},/* ADI Required Write */
 448         {ADV748X_PAGE_HDMI, 0x3d, 0x10},/* ADI Required Write */
 449         {ADV748X_PAGE_HDMI, 0x3e, 0x7b},/* ADI Required Write */
 450         {ADV748X_PAGE_HDMI, 0x3f, 0x5e},/* ADI Required Write */
 451         {ADV748X_PAGE_HDMI, 0x4e, 0xfe},/* ADI Required Write */
 452         {ADV748X_PAGE_HDMI, 0x4f, 0x18},/* ADI Required Write */
 453         {ADV748X_PAGE_HDMI, 0x57, 0xa3},/* ADI Required Write */
 454         {ADV748X_PAGE_HDMI, 0x58, 0x04},/* ADI Required Write */
 455         {ADV748X_PAGE_HDMI, 0x85, 0x10},/* ADI Required Write */
 456
 457         {ADV748X_PAGE_HDMI, 0x83, 0x00},/* Enable All Terminations */
 458         {ADV748X_PAGE_HDMI, 0xa3, 0x01},/* ADI Required Write */
 459         {ADV748X_PAGE_HDMI, 0xbe, 0x00},/* ADI Required Write */
 460
 461         {ADV748X_PAGE_HDMI, 0x6c, 0x01},/* HPA Manual Enable */
 462         {ADV748X_PAGE_HDMI, 0xf8, 0x01},/* HPA Asserted */
 463         {ADV748X_PAGE_HDMI, 0x0f, 0x00},/* Audio Mute Speed Set to Fastest */
 464         /* (Smallest Step Size) */
 465
 466         {ADV748X_PAGE_IO, 0x04, 0x02},  /* RGB Out of CP */
 467         {ADV748X_PAGE_IO, 0x12, 0xf0},  /* CSC Depends on ip Packets, SDR 444 */
 468         {ADV748X_PAGE_IO, 0x17, 0x80},  /* Luma & Chroma can reach 254d */
 469         {ADV748X_PAGE_IO, 0x03, 0x86},  /* CP-Insert_AV_Code */
 470
 471         {ADV748X_PAGE_CP, 0x7c, 0x00},  /* ADI Required Write */
 472
 473         {ADV748X_PAGE_IO, 0x0c, 0xe0},  /* Enable LLC_DLL & Double LLC Timing */
 474         {ADV748X_PAGE_IO, 0x0e, 0xdd},  /* LLC/PIX/SPI PINS TRISTATED AUD */
 475         /* Outputs Enabled */
 476         {ADV748X_PAGE_IO, 0x10, 0xa0},  /* Enable 4-lane CSI Tx & Pixel Port */
 477
 478         {ADV748X_PAGE_TXA, 0x00, 0x84}, /* Enable 4-lane MIPI */
 479         {ADV748X_PAGE_TXA, 0x00, 0xa4}, /* Set Auto DPHY Timing */
 480         {ADV748X_PAGE_TXA, 0xdb, 0x10}, /* ADI Required Write */
 481         {ADV748X_PAGE_TXA, 0xd6, 0x07}, /* ADI Required Write */
 482         {ADV748X_PAGE_TXA, 0xc4, 0x0a}, /* ADI Required Write */
 483         {ADV748X_PAGE_TXA, 0x71, 0x33}, /* ADI Required Write */
 484         {ADV748X_PAGE_TXA, 0x72, 0x11}, /* ADI Required Write */
 485         {ADV748X_PAGE_TXA, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */
 486
 487         {ADV748X_PAGE_TXA, 0x31, 0x82}, /* ADI Required Write */
 488         {ADV748X_PAGE_TXA, 0x1e, 0x40}, /* ADI Required Write */
 489         {ADV748X_PAGE_TXA, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 490         {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 491         {ADV748X_PAGE_TXA, 0x00, 0x24 },/* Power-up CSI-TX */
 492         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 493         {ADV748X_PAGE_TXA, 0xc1, 0x2b}, /* ADI Required Write */
 494         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 495         {ADV748X_PAGE_TXA, 0x31, 0x80}, /* ADI Required Write */
 496
 497         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 498 };
 499
 500 /* 02-01 Analog CVBS to MIPI TX-B CSI 1-Lane - */
 501 /* Autodetect CVBS Single Ended In Ain 1 - MIPI Out */
 502 static const struct adv748x_reg_value adv748x_init_txb_1lane[] = {
 503
 504         {ADV748X_PAGE_IO, 0x00, 0x30},  /* Disable chip powerdown Rx */
 505         {ADV748X_PAGE_IO, 0xf2, 0x01},  /* Enable I2C Read Auto-Increment */
 506
 507         {ADV748X_PAGE_IO, 0x0e, 0xff},  /* LLC/PIX/AUD/SPI PINS TRISTATED */
 508
 509         {ADV748X_PAGE_SDP, 0x0f, 0x00}, /* Exit Power Down Mode */
 510         {ADV748X_PAGE_SDP, 0x52, 0xcd}, /* ADI Required Write */
 511
 512         {ADV748X_PAGE_SDP, 0x0e, 0x80}, /* ADI Required Write */
 513         {ADV748X_PAGE_SDP, 0x9c, 0x00}, /* ADI Required Write */
 514         {ADV748X_PAGE_SDP, 0x9c, 0xff}, /* ADI Required Write */
 515         {ADV748X_PAGE_SDP, 0x0e, 0x00}, /* ADI Required Write */
 516
 517         /* ADI recommended writes for improved video quality */
 518         {ADV748X_PAGE_SDP, 0x80, 0x51}, /* ADI Required Write */
 519         {ADV748X_PAGE_SDP, 0x81, 0x51}, /* ADI Required Write */
 520         {ADV748X_PAGE_SDP, 0x82, 0x68}, /* ADI Required Write */
 521
 522         {ADV748X_PAGE_SDP, 0x03, 0x42}, /* Tri-S Output , PwrDwn 656 pads */
 523         {ADV748X_PAGE_SDP, 0x04, 0xb5}, /* ITU-R BT.656-4 compatible */
 524         {ADV748X_PAGE_SDP, 0x13, 0x00}, /* ADI Required Write */
 525
 526         {ADV748X_PAGE_SDP, 0x17, 0x41}, /* Select SH1 */
 527         {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */
 528         {ADV748X_PAGE_SDP, 0xe6, 0x4f},  /* V bit end pos manually in NTSC */
 529
 530         /* Enable 1-Lane MIPI Tx, */
 531         /* enable pixel output and route SD through Pixel port */
 532         {ADV748X_PAGE_IO, 0x10, 0x70},
 533
 534         {ADV748X_PAGE_TXB, 0x00, 0x81}, /* Enable 1-lane MIPI */
 535         {ADV748X_PAGE_TXB, 0x00, 0xa1}, /* Set Auto DPHY Timing */
 536         {ADV748X_PAGE_TXB, 0xd2, 0x40}, /* ADI Required Write */
 537         {ADV748X_PAGE_TXB, 0xc4, 0x0a}, /* ADI Required Write */
 538         {ADV748X_PAGE_TXB, 0x71, 0x33}, /* ADI Required Write */
 539         {ADV748X_PAGE_TXB, 0x72, 0x11}, /* ADI Required Write */
 540         {ADV748X_PAGE_TXB, 0xf0, 0x00}, /* i2c_dphy_pwdn - 1'b0 */
 541         {ADV748X_PAGE_TXB, 0x31, 0x82}, /* ADI Required Write */
 542         {ADV748X_PAGE_TXB, 0x1e, 0x40}, /* ADI Required Write */
 543         {ADV748X_PAGE_TXB, 0xda, 0x01}, /* i2c_mipi_pll_en - 1'b1 */
 544
 545         {ADV748X_PAGE_WAIT, 0x00, 0x02},/* delay 2 */
 546         {ADV748X_PAGE_TXB, 0x00, 0x21 },/* Power-up CSI-TX */
 547         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 548         {ADV748X_PAGE_TXB, 0xc1, 0x2b}, /* ADI Required Write */
 549         {ADV748X_PAGE_WAIT, 0x00, 0x01},/* delay 1 */
 550         {ADV748X_PAGE_TXB, 0x31, 0x80}, /* ADI Required Write */
 551
 552         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
 553 };
 554
 555 static int adv748x_reset(struct adv748x_state *state)
 556 {
 557         int ret;
 558
 559         ret = adv748x_write_regs(state, adv748x_sw_reset);
 560         if (ret < 0)
 561                 return ret;
 562
 563         ret = adv748x_write_regs(state, adv748x_set_slave_address);
 564         if (ret < 0)
 565                 return ret;
 566
 567         /* Init and power down TXA */
 568         ret = adv748x_write_regs(state, adv748x_init_txa_4lane);
 569         if (ret)
 570                 return ret;
 571
 572         adv748x_txa_power(state, 0);
 573
 574         /* Init and power down TXB */
 575         ret = adv748x_write_regs(state, adv748x_init_txb_1lane);
 576         if (ret)
 577                 return ret;
 578
 579         adv748x_txb_power(state, 0);
 580
 581         /* Disable chip powerdown & Enable HDMI Rx block */
 582         io_write(state, ADV748X_IO_PD, ADV748X_IO_PD_RX_EN);
 583
 584         /* Enable 4-lane CSI Tx & Pixel Port */
 585         io_write(state, ADV748X_IO_10, ADV748X_IO_10_CSI4_EN |
 586                                        ADV748X_IO_10_CSI1_EN |
 587                                        ADV748X_IO_10_PIX_OUT_EN);
 588
 589         /* Use vid_std and v_freq as freerun resolution for CP */
 590         cp_clrset(state, ADV748X_CP_CLMP_POS, ADV748X_CP_CLMP_POS_DIS_AUTO,
 591                                               ADV748X_CP_CLMP_POS_DIS_AUTO);
 592
 593         return 0;
 594 }
 595
 596 static int adv748x_identify_chip(struct adv748x_state *state)
 597 {
 598         int msb, lsb;
 599
 600         lsb = io_read(state, ADV748X_IO_CHIP_REV_ID_1);
 601         msb = io_read(state, ADV748X_IO_CHIP_REV_ID_2);
 602
 603         if (lsb < 0 || msb < 0) {
 604                 adv_err(state, "Failed to read chip revision\n");
 605                 return -EIO;
 606         }
 607
 608         adv_info(state, "chip found @ 0x%02x revision %02x%02x\n",
 609                  state->client->addr << 1, lsb, msb);
 610
 611         return 0;
 612 }
 613
 614 /* -----------------------------------------------------------------------------
 615  * i2c driver
 616  */
 617
 618 void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state,
 619                          const struct v4l2_subdev_ops *ops, u32 function,
 620                          const char *ident)
 621 {
 622         v4l2_subdev_init(sd, ops);
 623         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 624
 625         /* the owner is the same as the i2c_client's driver owner */
 626         sd->owner = state->dev->driver->owner;
 627         sd->dev = state->dev;
 628
 629         v4l2_set_subdevdata(sd, state);
 630
 631         /* initialize name */
 632         snprintf(sd->name, sizeof(sd->name), "%s %d-%04x %s",
 633                 state->dev->driver->name,
 634                 i2c_adapter_id(state->client->adapter),
 635                 state->client->addr, ident);
 636
 637         sd->entity.function = function;
 638         sd->entity.ops = &adv748x_media_ops;
 639 }
 640
 641 static int adv748x_parse_dt(struct adv748x_state *state)
 642 {
 643         struct device_node *ep_np = NULL;
 644         struct of_endpoint ep;
 645         bool out_found = false;
 646         bool in_found = false;
 647
 648         for_each_endpoint_of_node(state->dev->of_node, ep_np) {
 649                 of_graph_parse_endpoint(ep_np, &ep);
 650                 adv_info(state, "Endpoint %s on port %d",
 651                                 of_node_full_name(ep.local_node),
 652                                 ep.port);
 653
 654                 if (ep.port >= ADV748X_PORT_MAX) {
 655                         adv_err(state, "Invalid endpoint %s on port %d",
 656                                 of_node_full_name(ep.local_node),
 657                                 ep.port);
 658
 659                         continue;
 660                 }
 661
 662                 if (state->endpoints[ep.port]) {
 663                         adv_err(state,
 664                                 "Multiple port endpoints are not supported");
 665                         continue;
 666                 }
 667
 668                 of_node_get(ep_np);
 669                 state->endpoints[ep.port] = ep_np;
 670
 671                 /*
 672                  * At least one input endpoint and one output endpoint shall
 673                  * be defined.
 674                  */
 675                 if (ep.port < ADV748X_PORT_TXA)
 676                         in_found = true;
 677                 else
 678                         out_found = true;
 679         }
 680
 681         return in_found && out_found ? 0 : -ENODEV;
 682 }
 683
 684 static void adv748x_dt_cleanup(struct adv748x_state *state)
 685 {
 686         unsigned int i;
 687
 688         for (i = 0; i < ADV748X_PORT_MAX; i++)
 689                 of_node_put(state->endpoints[i]);
 690 }
 691
 692 static int adv748x_probe(struct i2c_client *client,
 693                          const struct i2c_device_id *id)
 694 {
 695         struct adv748x_state *state;
 696         int ret;
 697
 698         /* Check if the adapter supports the needed features */
 699         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
 700                 return -EIO;
 701
 702         state = kzalloc(sizeof(struct adv748x_state), GFP_KERNEL);
 703         if (!state)
 704                 return -ENOMEM;
 705
 706         mutex_init(&state->mutex);
 707
 708         state->dev = &client->dev;
 709         state->client = client;
 710         state->i2c_clients[ADV748X_PAGE_IO] = client;
 711         i2c_set_clientdata(client, state);
 712
 713         /*
 714          * We can not use container_of to get back to the state with two TXs;
 715          * Initialize the TXs's fields unconditionally on the endpoint
 716          * presence to access them later.
 717          */
 718         state->txa.state = state->txb.state = state;
 719         state->txa.page = ADV748X_PAGE_TXA;
 720         state->txb.page = ADV748X_PAGE_TXB;
 721         state->txa.port = ADV748X_PORT_TXA;
 722         state->txb.port = ADV748X_PORT_TXB;
 723
 724         /* Discover and process ports declared by the Device tree endpoints */
 725         ret = adv748x_parse_dt(state);
 726         if (ret) {
 727                 adv_err(state, "Failed to parse device tree");
 728                 goto err_free_mutex;
 729         }
 730
 731         /* Configure IO Regmap region */
 732         ret = adv748x_configure_regmap(state, ADV748X_PAGE_IO);
 733         if (ret) {
 734                 adv_err(state, "Error configuring IO regmap region");
 735                 goto err_cleanup_dt;
 736         }
 737
 738         ret = adv748x_identify_chip(state);
 739         if (ret) {
 740                 adv_err(state, "Failed to identify chip");
 741                 goto err_cleanup_clients;
 742         }
 743
 744         /* Configure remaining pages as I2C clients with regmap access */
 745         ret = adv748x_initialise_clients(state);
 746         if (ret) {
 747                 adv_err(state, "Failed to setup client regmap pages");
 748                 goto err_cleanup_clients;
 749         }
 750
 751         /* SW reset ADV748X to its default values */
 752         ret = adv748x_reset(state);
 753         if (ret) {
 754                 adv_err(state, "Failed to reset hardware");
 755                 goto err_cleanup_clients;
 756         }
 757
 758         /* Initialise HDMI */
 759         ret = adv748x_hdmi_init(&state->hdmi);
 760         if (ret) {
 761                 adv_err(state, "Failed to probe HDMI");
 762                 goto err_cleanup_clients;
 763         }
 764
 765         /* Initialise AFE */
 766         ret = adv748x_afe_init(&state->afe);
 767         if (ret) {
 768                 adv_err(state, "Failed to probe AFE");
 769                 goto err_cleanup_hdmi;
 770         }
 771
 772         /* Initialise TXA */
 773         ret = adv748x_csi2_init(state, &state->txa);
 774         if (ret) {
 775                 adv_err(state, "Failed to probe TXA");
 776                 goto err_cleanup_afe;
 777         }
 778
 779         /* Initialise TXB */
 780         ret = adv748x_csi2_init(state, &state->txb);
 781         if (ret) {
 782                 adv_err(state, "Failed to probe TXB");
 783                 goto err_cleanup_txa;
 784         }
 785
 786         return 0;
 787
 788 err_cleanup_txa:
 789         adv748x_csi2_cleanup(&state->txa);
 790 err_cleanup_afe:
 791         adv748x_afe_cleanup(&state->afe);
 792 err_cleanup_hdmi:
 793         adv748x_hdmi_cleanup(&state->hdmi);
 794 err_cleanup_clients:
 795         adv748x_unregister_clients(state);
 796 err_cleanup_dt:
 797         adv748x_dt_cleanup(state);
 798 err_free_mutex:
 799         mutex_destroy(&state->mutex);
 800         kfree(state);
 801
 802         return ret;
 803 }
 804
 805 static int adv748x_remove(struct i2c_client *client)
 806 {
 807         struct adv748x_state *state = i2c_get_clientdata(client);
 808
 809         adv748x_afe_cleanup(&state->afe);
 810         adv748x_hdmi_cleanup(&state->hdmi);
 811
 812         adv748x_csi2_cleanup(&state->txa);
 813         adv748x_csi2_cleanup(&state->txb);
 814
 815         adv748x_unregister_clients(state);
 816         adv748x_dt_cleanup(state);
 817         mutex_destroy(&state->mutex);
 818
 819         kfree(state);
 820
 821         return 0;
 822 }
 823
 824 static const struct i2c_device_id adv748x_id[] = {
 825         { "adv7481", 0 },
 826         { "adv7482", 0 },
 827         { },
 828 };
 829 MODULE_DEVICE_TABLE(i2c, adv748x_id);
 830
 831 static const struct of_device_id adv748x_of_table[] = {
 832         { .compatible = "adi,adv7481", },
 833         { .compatible = "adi,adv7482", },
 834         { }
 835 };
 836 MODULE_DEVICE_TABLE(of, adv748x_of_table);
 837
 838 static struct i2c_driver adv748x_driver = {
 839         .driver = {
 840                 .name = "adv748x",
 841                 .of_match_table = adv748x_of_table,
 842         },
 843         .probe = adv748x_probe,
 844         .remove = adv748x_remove,
 845         .id_table = adv748x_id,
 846 };
 847
 848 module_i2c_driver(adv748x_driver);
 849
 850 MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>");
 851 MODULE_DESCRIPTION("ADV748X video decoder");
 852 MODULE_LICENSE("GPL v2");