1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X 8 channel analog front end (AFE) receiver
4 * with standard definition processor (SDP)
6 * Copyright (C) 2017 Renesas Electronics Corp.
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/mutex.h>
12 #include <linux/v4l2-dv-timings.h>
14 #include <media/v4l2-ctrls.h>
15 #include <media/v4l2-device.h>
16 #include <media/v4l2-dv-timings.h>
17 #include <media/v4l2-ioctl.h>
21 /* -----------------------------------------------------------------------------
25 #define ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM 0x0
26 #define ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1
27 #define ADV748X_AFE_STD_AD_PAL_N_NTSC_J_SECAM 0x2
28 #define ADV748X_AFE_STD_AD_PAL_N_NTSC_M_SECAM 0x3
29 #define ADV748X_AFE_STD_NTSC_J 0x4
30 #define ADV748X_AFE_STD_NTSC_M 0x5
31 #define ADV748X_AFE_STD_PAL60 0x6
32 #define ADV748X_AFE_STD_NTSC_443 0x7
33 #define ADV748X_AFE_STD_PAL_BG 0x8
34 #define ADV748X_AFE_STD_PAL_N 0x9
35 #define ADV748X_AFE_STD_PAL_M 0xa
36 #define ADV748X_AFE_STD_PAL_M_PED 0xb
37 #define ADV748X_AFE_STD_PAL_COMB_N 0xc
38 #define ADV748X_AFE_STD_PAL_COMB_N_PED 0xd
39 #define ADV748X_AFE_STD_PAL_SECAM 0xe
40 #define ADV748X_AFE_STD_PAL_SECAM_PED 0xf
42 static int adv748x_afe_read_ro_map(struct adv748x_state *state, u8 reg)
46 /* Select SDP Read-Only Main Map */
47 ret = sdp_write(state, ADV748X_SDP_MAP_SEL,
48 ADV748X_SDP_MAP_SEL_RO_MAIN);
52 return sdp_read(state, reg);
55 static int adv748x_afe_status(struct adv748x_afe *afe, u32 *signal,
58 struct adv748x_state *state = adv748x_afe_to_state(afe);
61 /* Read status from reg 0x10 of SDP RO Map */
62 info = adv748x_afe_read_ro_map(state, ADV748X_SDP_RO_10);
67 *signal = info & ADV748X_SDP_RO_10_IN_LOCK ?
68 0 : V4L2_IN_ST_NO_SIGNAL;
73 /* Standard not valid if there is no signal */
74 if (!(info & ADV748X_SDP_RO_10_IN_LOCK)) {
75 *std = V4L2_STD_UNKNOWN;
79 switch (info & 0x70) {
84 *std = V4L2_STD_NTSC_443;
87 *std = V4L2_STD_PAL_M;
90 *std = V4L2_STD_PAL_60;
96 *std = V4L2_STD_SECAM;
99 *std = V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
102 *std = V4L2_STD_SECAM;
105 *std = V4L2_STD_UNKNOWN;
112 static void adv748x_afe_fill_format(struct adv748x_afe *afe,
113 struct v4l2_mbus_framefmt *fmt)
115 memset(fmt, 0, sizeof(*fmt));
117 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
118 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
119 fmt->field = V4L2_FIELD_ALTERNATE;
122 fmt->height = afe->curr_norm & V4L2_STD_525_60 ? 480 : 576;
128 static int adv748x_afe_std(v4l2_std_id std)
130 if (std == V4L2_STD_PAL_60)
131 return ADV748X_AFE_STD_PAL60;
132 if (std == V4L2_STD_NTSC_443)
133 return ADV748X_AFE_STD_NTSC_443;
134 if (std == V4L2_STD_PAL_N)
135 return ADV748X_AFE_STD_PAL_N;
136 if (std == V4L2_STD_PAL_M)
137 return ADV748X_AFE_STD_PAL_M;
138 if (std == V4L2_STD_PAL_Nc)
139 return ADV748X_AFE_STD_PAL_COMB_N;
140 if (std & V4L2_STD_NTSC)
141 return ADV748X_AFE_STD_NTSC_M;
142 if (std & V4L2_STD_PAL)
143 return ADV748X_AFE_STD_PAL_BG;
144 if (std & V4L2_STD_SECAM)
145 return ADV748X_AFE_STD_PAL_SECAM;
150 static void adv748x_afe_set_video_standard(struct adv748x_state *state,
153 sdp_clrset(state, ADV748X_SDP_VID_SEL, ADV748X_SDP_VID_SEL_MASK,
154 (sdpstd & 0xf) << ADV748X_SDP_VID_SEL_SHIFT);
157 int adv748x_afe_s_input(struct adv748x_afe *afe, unsigned int input)
159 struct adv748x_state *state = adv748x_afe_to_state(afe);
161 return sdp_write(state, ADV748X_SDP_INSEL, input);
164 static int adv748x_afe_g_pixelaspect(struct v4l2_subdev *sd,
165 struct v4l2_fract *aspect)
167 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
169 if (afe->curr_norm & V4L2_STD_525_60) {
170 aspect->numerator = 11;
171 aspect->denominator = 10;
173 aspect->numerator = 54;
174 aspect->denominator = 59;
180 /* -----------------------------------------------------------------------------
181 * v4l2_subdev_video_ops
184 static int adv748x_afe_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
186 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
188 *norm = afe->curr_norm;
193 static int adv748x_afe_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
195 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
196 struct adv748x_state *state = adv748x_afe_to_state(afe);
197 int afe_std = adv748x_afe_std(std);
202 mutex_lock(&state->mutex);
204 adv748x_afe_set_video_standard(state, afe_std);
205 afe->curr_norm = std;
207 mutex_unlock(&state->mutex);
212 static int adv748x_afe_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
214 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
215 struct adv748x_state *state = adv748x_afe_to_state(afe);
219 mutex_lock(&state->mutex);
221 if (afe->streaming) {
226 /* Set auto detect mode */
227 adv748x_afe_set_video_standard(state,
228 ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM);
232 /* Read detected standard */
233 ret = adv748x_afe_status(afe, NULL, std);
235 afe_std = adv748x_afe_std(afe->curr_norm);
239 /* Restore original state */
240 adv748x_afe_set_video_standard(state, afe_std);
243 mutex_unlock(&state->mutex);
248 static int adv748x_afe_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm)
250 *norm = V4L2_STD_ALL;
255 static int adv748x_afe_g_input_status(struct v4l2_subdev *sd, u32 *status)
257 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
258 struct adv748x_state *state = adv748x_afe_to_state(afe);
261 mutex_lock(&state->mutex);
263 ret = adv748x_afe_status(afe, status, NULL);
265 mutex_unlock(&state->mutex);
270 static int adv748x_afe_s_stream(struct v4l2_subdev *sd, int enable)
272 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
273 struct adv748x_state *state = adv748x_afe_to_state(afe);
274 u32 signal = V4L2_IN_ST_NO_SIGNAL;
277 mutex_lock(&state->mutex);
280 ret = adv748x_afe_s_input(afe, afe->input);
285 ret = adv748x_tx_power(afe->tx, enable);
289 afe->streaming = enable;
291 adv748x_afe_status(afe, &signal, NULL);
292 if (signal != V4L2_IN_ST_NO_SIGNAL)
293 adv_dbg(state, "Detected SDP signal\n");
295 adv_dbg(state, "Couldn't detect SDP video signal\n");
298 mutex_unlock(&state->mutex);
303 static const struct v4l2_subdev_video_ops adv748x_afe_video_ops = {
304 .g_std = adv748x_afe_g_std,
305 .s_std = adv748x_afe_s_std,
306 .querystd = adv748x_afe_querystd,
307 .g_tvnorms = adv748x_afe_g_tvnorms,
308 .g_input_status = adv748x_afe_g_input_status,
309 .s_stream = adv748x_afe_s_stream,
310 .g_pixelaspect = adv748x_afe_g_pixelaspect,
313 /* -----------------------------------------------------------------------------
314 * v4l2_subdev_pad_ops
317 static int adv748x_afe_propagate_pixelrate(struct adv748x_afe *afe)
319 struct v4l2_subdev *tx;
321 tx = adv748x_get_remote_sd(&afe->pads[ADV748X_AFE_SOURCE]);
326 * The ADV748x ADC sampling frequency is twice the externally supplied
327 * clock whose frequency is required to be 28.63636 MHz. It oversamples
328 * with a factor of 4 resulting in a pixel rate of 14.3180180 MHz.
330 return adv748x_csi2_set_pixelrate(tx, 14318180);
333 static int adv748x_afe_enum_mbus_code(struct v4l2_subdev *sd,
334 struct v4l2_subdev_state *sd_state,
335 struct v4l2_subdev_mbus_code_enum *code)
337 if (code->index != 0)
340 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
345 static int adv748x_afe_get_format(struct v4l2_subdev *sd,
346 struct v4l2_subdev_state *sd_state,
347 struct v4l2_subdev_format *sdformat)
349 struct adv748x_afe *afe = adv748x_sd_to_afe(sd);
350 struct v4l2_mbus_framefmt *mbusformat;
352 /* It makes no sense to get the format of the analog sink pads */
353 if (sdformat->pad != ADV748X_AFE_SOURCE)
356 if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY) {
357 mbusformat = v4l2_subdev_get_try_format(sd, sd_state,
359 sdformat->format = *mbusformat;
361 adv748x_afe_fill_format(afe, &sdformat->format);
362 adv748x_afe_propagate_pixelrate(afe);
368 static int adv748x_afe_set_format(struct v4l2_subdev *sd,
369 struct v4l2_subdev_state *sd_state,
370 struct v4l2_subdev_format *sdformat)
372 struct v4l2_mbus_framefmt *mbusformat;
374 /* It makes no sense to get the format of the analog sink pads */
375 if (sdformat->pad != ADV748X_AFE_SOURCE)
378 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE)
379 return adv748x_afe_get_format(sd, sd_state, sdformat);
381 mbusformat = v4l2_subdev_get_try_format(sd, sd_state, sdformat->pad);
382 *mbusformat = sdformat->format;
387 static const struct v4l2_subdev_pad_ops adv748x_afe_pad_ops = {
388 .enum_mbus_code = adv748x_afe_enum_mbus_code,
389 .set_fmt = adv748x_afe_set_format,
390 .get_fmt = adv748x_afe_get_format,
393 /* -----------------------------------------------------------------------------
397 static const struct v4l2_subdev_ops adv748x_afe_ops = {
398 .video = &adv748x_afe_video_ops,
399 .pad = &adv748x_afe_pad_ops,
402 /* -----------------------------------------------------------------------------
406 static const char * const afe_ctrl_frp_menu[] = {
416 static int adv748x_afe_s_ctrl(struct v4l2_ctrl *ctrl)
418 struct adv748x_afe *afe = adv748x_ctrl_to_afe(ctrl);
419 struct adv748x_state *state = adv748x_afe_to_state(afe);
423 ret = sdp_write(state, 0x0e, 0x00);
428 case V4L2_CID_BRIGHTNESS:
429 ret = sdp_write(state, ADV748X_SDP_BRI, ctrl->val);
432 /* Hue is inverted according to HSL chart */
433 ret = sdp_write(state, ADV748X_SDP_HUE, -ctrl->val);
435 case V4L2_CID_CONTRAST:
436 ret = sdp_write(state, ADV748X_SDP_CON, ctrl->val);
438 case V4L2_CID_SATURATION:
439 ret = sdp_write(state, ADV748X_SDP_SD_SAT_U, ctrl->val);
442 ret = sdp_write(state, ADV748X_SDP_SD_SAT_V, ctrl->val);
444 case V4L2_CID_TEST_PATTERN:
445 enable = !!ctrl->val;
447 /* Enable/Disable Color bar test patterns */
448 ret = sdp_clrset(state, ADV748X_SDP_DEF, ADV748X_SDP_DEF_VAL_EN,
452 ret = sdp_clrset(state, ADV748X_SDP_FRP, ADV748X_SDP_FRP_MASK,
453 enable ? ctrl->val - 1 : 0);
462 static const struct v4l2_ctrl_ops adv748x_afe_ctrl_ops = {
463 .s_ctrl = adv748x_afe_s_ctrl,
466 static int adv748x_afe_init_controls(struct adv748x_afe *afe)
468 struct adv748x_state *state = adv748x_afe_to_state(afe);
470 v4l2_ctrl_handler_init(&afe->ctrl_hdl, 5);
472 /* Use our mutex for the controls */
473 afe->ctrl_hdl.lock = &state->mutex;
475 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops,
476 V4L2_CID_BRIGHTNESS, ADV748X_SDP_BRI_MIN,
477 ADV748X_SDP_BRI_MAX, 1, ADV748X_SDP_BRI_DEF);
478 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops,
479 V4L2_CID_CONTRAST, ADV748X_SDP_CON_MIN,
480 ADV748X_SDP_CON_MAX, 1, ADV748X_SDP_CON_DEF);
481 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops,
482 V4L2_CID_SATURATION, ADV748X_SDP_SAT_MIN,
483 ADV748X_SDP_SAT_MAX, 1, ADV748X_SDP_SAT_DEF);
484 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops,
485 V4L2_CID_HUE, ADV748X_SDP_HUE_MIN,
486 ADV748X_SDP_HUE_MAX, 1, ADV748X_SDP_HUE_DEF);
488 v4l2_ctrl_new_std_menu_items(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops,
489 V4L2_CID_TEST_PATTERN,
490 ARRAY_SIZE(afe_ctrl_frp_menu) - 1,
491 0, 0, afe_ctrl_frp_menu);
493 afe->sd.ctrl_handler = &afe->ctrl_hdl;
494 if (afe->ctrl_hdl.error) {
495 v4l2_ctrl_handler_free(&afe->ctrl_hdl);
496 return afe->ctrl_hdl.error;
499 return v4l2_ctrl_handler_setup(&afe->ctrl_hdl);
502 int adv748x_afe_init(struct adv748x_afe *afe)
504 struct adv748x_state *state = adv748x_afe_to_state(afe);
509 afe->streaming = false;
510 afe->curr_norm = V4L2_STD_NTSC_M;
512 adv748x_subdev_init(&afe->sd, state, &adv748x_afe_ops,
513 MEDIA_ENT_F_ATV_DECODER, "afe");
515 /* Identify the first connector found as a default input if set */
516 for (i = ADV748X_PORT_AIN0; i <= ADV748X_PORT_AIN7; i++) {
517 /* Inputs and ports are 1-indexed to match the data sheet */
518 if (state->endpoints[i]) {
524 adv748x_afe_s_input(afe, afe->input);
526 adv_dbg(state, "AFE Default input set to %d\n", afe->input);
528 /* Entity pads and sinks are 0-indexed to match the pads */
529 for (i = ADV748X_AFE_SINK_AIN0; i <= ADV748X_AFE_SINK_AIN7; i++)
530 afe->pads[i].flags = MEDIA_PAD_FL_SINK;
532 afe->pads[ADV748X_AFE_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
534 ret = media_entity_pads_init(&afe->sd.entity, ADV748X_AFE_NR_PADS,
539 ret = adv748x_afe_init_controls(afe);
546 media_entity_cleanup(&afe->sd.entity);
551 void adv748x_afe_cleanup(struct adv748x_afe *afe)
553 v4l2_device_unregister_subdev(&afe->sd);
554 media_entity_cleanup(&afe->sd.entity);
555 v4l2_ctrl_handler_free(&afe->ctrl_hdl);