drivers/media/i2c/adv7180.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * adv7180.c Analog Devices ADV7180 video decoder driver
   4  * Copyright (c) 2009 Intel Corporation
   5  * Copyright (C) 2013 Cogent Embedded, Inc.
   6  * Copyright (C) 2013 Renesas Solutions Corp.
   7  */
   8 #include <linux/module.h>
   9 #include <linux/init.h>
  10 #include <linux/errno.h>
  11 #include <linux/kernel.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/i2c.h>
  14 #include <linux/slab.h>
  15 #include <linux/of.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/videodev2.h>
  18 #include <media/v4l2-ioctl.h>
  19 #include <media/v4l2-event.h>
  20 #include <media/v4l2-device.h>
  21 #include <media/v4l2-ctrls.h>
  22 #include <linux/mutex.h>
  23 #include <linux/delay.h>
  24
  25 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM              0x0
  26 #define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED          0x1
  27 #define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM               0x2
  28 #define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM               0x3
  29 #define ADV7180_STD_NTSC_J                              0x4
  30 #define ADV7180_STD_NTSC_M                              0x5
  31 #define ADV7180_STD_PAL60                               0x6
  32 #define ADV7180_STD_NTSC_443                            0x7
  33 #define ADV7180_STD_PAL_BG                              0x8
  34 #define ADV7180_STD_PAL_N                               0x9
  35 #define ADV7180_STD_PAL_M                               0xa
  36 #define ADV7180_STD_PAL_M_PED                           0xb
  37 #define ADV7180_STD_PAL_COMB_N                          0xc
  38 #define ADV7180_STD_PAL_COMB_N_PED                      0xd
  39 #define ADV7180_STD_PAL_SECAM                           0xe
  40 #define ADV7180_STD_PAL_SECAM_PED                       0xf
  41
  42 #define ADV7180_REG_INPUT_CONTROL                       0x0000
  43 #define ADV7180_INPUT_CONTROL_INSEL_MASK                0x0f
  44
  45 #define ADV7182_REG_INPUT_VIDSEL                        0x0002
  46
  47 #define ADV7180_REG_OUTPUT_CONTROL                      0x0003
  48 #define ADV7180_REG_EXTENDED_OUTPUT_CONTROL             0x0004
  49 #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS         0xC5
  50
  51 #define ADV7180_REG_AUTODETECT_ENABLE                   0x0007
  52 #define ADV7180_AUTODETECT_DEFAULT                      0x7f
  53 /* Contrast */
  54 #define ADV7180_REG_CON         0x0008  /*Unsigned */
  55 #define ADV7180_CON_MIN         0
  56 #define ADV7180_CON_DEF         128
  57 #define ADV7180_CON_MAX         255
  58 /* Brightness*/
  59 #define ADV7180_REG_BRI         0x000a  /*Signed */
  60 #define ADV7180_BRI_MIN         -128
  61 #define ADV7180_BRI_DEF         0
  62 #define ADV7180_BRI_MAX         127
  63 /* Hue */
  64 #define ADV7180_REG_HUE         0x000b  /*Signed, inverted */
  65 #define ADV7180_HUE_MIN         -127
  66 #define ADV7180_HUE_DEF         0
  67 #define ADV7180_HUE_MAX         128
  68
  69 #define ADV7180_REG_CTRL                0x000e
  70 #define ADV7180_CTRL_IRQ_SPACE          0x20
  71
  72 #define ADV7180_REG_PWR_MAN             0x0f
  73 #define ADV7180_PWR_MAN_ON              0x04
  74 #define ADV7180_PWR_MAN_OFF             0x24
  75 #define ADV7180_PWR_MAN_RES             0x80
  76
  77 #define ADV7180_REG_STATUS1             0x0010
  78 #define ADV7180_STATUS1_IN_LOCK         0x01
  79 #define ADV7180_STATUS1_AUTOD_MASK      0x70
  80 #define ADV7180_STATUS1_AUTOD_NTSM_M_J  0x00
  81 #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
  82 #define ADV7180_STATUS1_AUTOD_PAL_M     0x20
  83 #define ADV7180_STATUS1_AUTOD_PAL_60    0x30
  84 #define ADV7180_STATUS1_AUTOD_PAL_B_G   0x40
  85 #define ADV7180_STATUS1_AUTOD_SECAM     0x50
  86 #define ADV7180_STATUS1_AUTOD_PAL_COMB  0x60
  87 #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
  88
  89 #define ADV7180_REG_IDENT 0x0011
  90 #define ADV7180_ID_7180 0x18
  91
  92 #define ADV7180_REG_STATUS3             0x0013
  93 #define ADV7180_REG_ANALOG_CLAMP_CTL    0x0014
  94 #define ADV7180_REG_SHAP_FILTER_CTL_1   0x0017
  95 #define ADV7180_REG_CTRL_2              0x001d
  96 #define ADV7180_REG_VSYNC_FIELD_CTL_1   0x0031
  97 #define ADV7180_REG_MANUAL_WIN_CTL_1    0x003d
  98 #define ADV7180_REG_MANUAL_WIN_CTL_2    0x003e
  99 #define ADV7180_REG_MANUAL_WIN_CTL_3    0x003f
 100 #define ADV7180_REG_LOCK_CNT            0x0051
 101 #define ADV7180_REG_CVBS_TRIM           0x0052
 102 #define ADV7180_REG_CLAMP_ADJ           0x005a
 103 #define ADV7180_REG_RES_CIR             0x005f
 104 #define ADV7180_REG_DIFF_MODE           0x0060
 105
 106 #define ADV7180_REG_ICONF1              0x2040
 107 #define ADV7180_ICONF1_ACTIVE_LOW       0x01
 108 #define ADV7180_ICONF1_PSYNC_ONLY       0x10
 109 #define ADV7180_ICONF1_ACTIVE_TO_CLR    0xC0
 110 /* Saturation */
 111 #define ADV7180_REG_SD_SAT_CB   0x00e3  /*Unsigned */
 112 #define ADV7180_REG_SD_SAT_CR   0x00e4  /*Unsigned */
 113 #define ADV7180_SAT_MIN         0
 114 #define ADV7180_SAT_DEF         128
 115 #define ADV7180_SAT_MAX         255
 116
 117 #define ADV7180_IRQ1_LOCK       0x01
 118 #define ADV7180_IRQ1_UNLOCK     0x02
 119 #define ADV7180_REG_ISR1        0x2042
 120 #define ADV7180_REG_ICR1        0x2043
 121 #define ADV7180_REG_IMR1        0x2044
 122 #define ADV7180_REG_IMR2        0x2048
 123 #define ADV7180_IRQ3_AD_CHANGE  0x08
 124 #define ADV7180_REG_ISR3        0x204A
 125 #define ADV7180_REG_ICR3        0x204B
 126 #define ADV7180_REG_IMR3        0x204C
 127 #define ADV7180_REG_IMR4        0x2050
 128
 129 #define ADV7180_REG_NTSC_V_BIT_END      0x00E6
 130 #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND     0x4F
 131
 132 #define ADV7180_REG_VPP_SLAVE_ADDR      0xFD
 133 #define ADV7180_REG_CSI_SLAVE_ADDR      0xFE
 134
 135 #define ADV7180_REG_ACE_CTRL1           0x4080
 136 #define ADV7180_REG_ACE_CTRL5           0x4084
 137 #define ADV7180_REG_FLCONTROL           0x40e0
 138 #define ADV7180_FLCONTROL_FL_ENABLE 0x1
 139
 140 #define ADV7180_REG_RST_CLAMP   0x809c
 141 #define ADV7180_REG_AGC_ADJ1    0x80b6
 142 #define ADV7180_REG_AGC_ADJ2    0x80c0
 143
 144 #define ADV7180_CSI_REG_PWRDN   0x00
 145 #define ADV7180_CSI_PWRDN       0x80
 146
 147 #define ADV7180_INPUT_CVBS_AIN1 0x00
 148 #define ADV7180_INPUT_CVBS_AIN2 0x01
 149 #define ADV7180_INPUT_CVBS_AIN3 0x02
 150 #define ADV7180_INPUT_CVBS_AIN4 0x03
 151 #define ADV7180_INPUT_CVBS_AIN5 0x04
 152 #define ADV7180_INPUT_CVBS_AIN6 0x05
 153 #define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
 154 #define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
 155 #define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
 156 #define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
 157 #define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
 158
 159 #define ADV7182_INPUT_CVBS_AIN1 0x00
 160 #define ADV7182_INPUT_CVBS_AIN2 0x01
 161 #define ADV7182_INPUT_CVBS_AIN3 0x02
 162 #define ADV7182_INPUT_CVBS_AIN4 0x03
 163 #define ADV7182_INPUT_CVBS_AIN5 0x04
 164 #define ADV7182_INPUT_CVBS_AIN6 0x05
 165 #define ADV7182_INPUT_CVBS_AIN7 0x06
 166 #define ADV7182_INPUT_CVBS_AIN8 0x07
 167 #define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
 168 #define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
 169 #define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
 170 #define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
 171 #define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
 172 #define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
 173 #define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
 174 #define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
 175 #define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
 176 #define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
 177
 178 #define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
 179 #define ADV7180_DEFAULT_VPP_I2C_ADDR 0x42
 180
 181 #define V4L2_CID_ADV_FAST_SWITCH        (V4L2_CID_USER_ADV7180_BASE + 0x00)
 182
 183 /* Initial number of frames to skip to avoid possible garbage */
 184 #define ADV7180_NUM_OF_SKIP_FRAMES       2
 185
 186 struct adv7180_state;
 187
 188 #define ADV7180_FLAG_RESET_POWERED      BIT(0)
 189 #define ADV7180_FLAG_V2                 BIT(1)
 190 #define ADV7180_FLAG_MIPI_CSI2          BIT(2)
 191 #define ADV7180_FLAG_I2P                BIT(3)
 192
 193 struct adv7180_chip_info {
 194         unsigned int flags;
 195         unsigned int valid_input_mask;
 196         int (*set_std)(struct adv7180_state *st, unsigned int std);
 197         int (*select_input)(struct adv7180_state *st, unsigned int input);
 198         int (*init)(struct adv7180_state *state);
 199 };
 200
 201 struct adv7180_state {
 202         struct v4l2_ctrl_handler ctrl_hdl;
 203         struct v4l2_subdev      sd;
 204         struct media_pad        pad;
 205         struct mutex            mutex; /* mutual excl. when accessing chip */
 206         int                     irq;
 207         struct gpio_desc        *pwdn_gpio;
 208         v4l2_std_id             curr_norm;
 209         bool                    powered;
 210         bool                    streaming;
 211         u8                      input;
 212
 213         struct i2c_client       *client;
 214         unsigned int            register_page;
 215         struct i2c_client       *csi_client;
 216         struct i2c_client       *vpp_client;
 217         const struct adv7180_chip_info *chip_info;
 218         enum v4l2_field         field;
 219 };
 220 #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler,             \
 221                                             struct adv7180_state,       \
 222                                             ctrl_hdl)->sd)
 223
 224 static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
 225 {
 226         if (state->register_page != page) {
 227                 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
 228                         page);
 229                 state->register_page = page;
 230         }
 231
 232         return 0;
 233 }
 234
 235 static int adv7180_write(struct adv7180_state *state, unsigned int reg,
 236         unsigned int value)
 237 {
 238         lockdep_assert_held(&state->mutex);
 239         adv7180_select_page(state, reg >> 8);
 240         return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
 241 }
 242
 243 static int adv7180_read(struct adv7180_state *state, unsigned int reg)
 244 {
 245         lockdep_assert_held(&state->mutex);
 246         adv7180_select_page(state, reg >> 8);
 247         return i2c_smbus_read_byte_data(state->client, reg & 0xff);
 248 }
 249
 250 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
 251         unsigned int value)
 252 {
 253         return i2c_smbus_write_byte_data(state->csi_client, reg, value);
 254 }
 255
 256 static int adv7180_set_video_standard(struct adv7180_state *state,
 257         unsigned int std)
 258 {
 259         return state->chip_info->set_std(state, std);
 260 }
 261
 262 static int adv7180_vpp_write(struct adv7180_state *state, unsigned int reg,
 263         unsigned int value)
 264 {
 265         return i2c_smbus_write_byte_data(state->vpp_client, reg, value);
 266 }
 267
 268 static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
 269 {
 270         /* in case V4L2_IN_ST_NO_SIGNAL */
 271         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 272                 return V4L2_STD_UNKNOWN;
 273
 274         switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
 275         case ADV7180_STATUS1_AUTOD_NTSM_M_J:
 276                 return V4L2_STD_NTSC;
 277         case ADV7180_STATUS1_AUTOD_NTSC_4_43:
 278                 return V4L2_STD_NTSC_443;
 279         case ADV7180_STATUS1_AUTOD_PAL_M:
 280                 return V4L2_STD_PAL_M;
 281         case ADV7180_STATUS1_AUTOD_PAL_60:
 282                 return V4L2_STD_PAL_60;
 283         case ADV7180_STATUS1_AUTOD_PAL_B_G:
 284                 return V4L2_STD_PAL;
 285         case ADV7180_STATUS1_AUTOD_SECAM:
 286                 return V4L2_STD_SECAM;
 287         case ADV7180_STATUS1_AUTOD_PAL_COMB:
 288                 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
 289         case ADV7180_STATUS1_AUTOD_SECAM_525:
 290                 return V4L2_STD_SECAM;
 291         default:
 292                 return V4L2_STD_UNKNOWN;
 293         }
 294 }
 295
 296 static int v4l2_std_to_adv7180(v4l2_std_id std)
 297 {
 298         if (std == V4L2_STD_PAL_60)
 299                 return ADV7180_STD_PAL60;
 300         if (std == V4L2_STD_NTSC_443)
 301                 return ADV7180_STD_NTSC_443;
 302         if (std == V4L2_STD_PAL_N)
 303                 return ADV7180_STD_PAL_N;
 304         if (std == V4L2_STD_PAL_M)
 305                 return ADV7180_STD_PAL_M;
 306         if (std == V4L2_STD_PAL_Nc)
 307                 return ADV7180_STD_PAL_COMB_N;
 308
 309         if (std & V4L2_STD_PAL)
 310                 return ADV7180_STD_PAL_BG;
 311         if (std & V4L2_STD_NTSC)
 312                 return ADV7180_STD_NTSC_M;
 313         if (std & V4L2_STD_SECAM)
 314                 return ADV7180_STD_PAL_SECAM;
 315
 316         return -EINVAL;
 317 }
 318
 319 static u32 adv7180_status_to_v4l2(u8 status1)
 320 {
 321         if (!(status1 & ADV7180_STATUS1_IN_LOCK))
 322                 return V4L2_IN_ST_NO_SIGNAL;
 323
 324         return 0;
 325 }
 326
 327 static int __adv7180_status(struct adv7180_state *state, u32 *status,
 328                             v4l2_std_id *std)
 329 {
 330         int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
 331
 332         if (status1 < 0)
 333                 return status1;
 334
 335         if (status)
 336                 *status = adv7180_status_to_v4l2(status1);
 337         if (std)
 338                 *std = adv7180_std_to_v4l2(status1);
 339
 340         return 0;
 341 }
 342
 343 static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
 344 {
 345         return container_of(sd, struct adv7180_state, sd);
 346 }
 347
 348 static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
 349 {
 350         struct adv7180_state *state = to_state(sd);
 351         int err = mutex_lock_interruptible(&state->mutex);
 352         if (err)
 353                 return err;
 354
 355         if (state->streaming) {
 356                 err = -EBUSY;
 357                 goto unlock;
 358         }
 359
 360         err = adv7180_set_video_standard(state,
 361                         ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
 362         if (err)
 363                 goto unlock;
 364
 365         msleep(100);
 366         __adv7180_status(state, NULL, std);
 367
 368         err = v4l2_std_to_adv7180(state->curr_norm);
 369         if (err < 0)
 370                 goto unlock;
 371
 372         err = adv7180_set_video_standard(state, err);
 373
 374 unlock:
 375         mutex_unlock(&state->mutex);
 376         return err;
 377 }
 378
 379 static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
 380                              u32 output, u32 config)
 381 {
 382         struct adv7180_state *state = to_state(sd);
 383         int ret = mutex_lock_interruptible(&state->mutex);
 384
 385         if (ret)
 386                 return ret;
 387
 388         if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
 389                 ret = -EINVAL;
 390                 goto out;
 391         }
 392
 393         ret = state->chip_info->select_input(state, input);
 394
 395         if (ret == 0)
 396                 state->input = input;
 397 out:
 398         mutex_unlock(&state->mutex);
 399         return ret;
 400 }
 401
 402 static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
 403 {
 404         struct adv7180_state *state = to_state(sd);
 405         int ret = mutex_lock_interruptible(&state->mutex);
 406         if (ret)
 407                 return ret;
 408
 409         ret = __adv7180_status(state, status, NULL);
 410         mutex_unlock(&state->mutex);
 411         return ret;
 412 }
 413
 414 static int adv7180_program_std(struct adv7180_state *state)
 415 {
 416         int ret;
 417
 418         ret = v4l2_std_to_adv7180(state->curr_norm);
 419         if (ret < 0)
 420                 return ret;
 421
 422         ret = adv7180_set_video_standard(state, ret);
 423         if (ret < 0)
 424                 return ret;
 425         return 0;
 426 }
 427
 428 static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
 429 {
 430         struct adv7180_state *state = to_state(sd);
 431         int ret = mutex_lock_interruptible(&state->mutex);
 432
 433         if (ret)
 434                 return ret;
 435
 436         /* Make sure we can support this std */
 437         ret = v4l2_std_to_adv7180(std);
 438         if (ret < 0)
 439                 goto out;
 440
 441         state->curr_norm = std;
 442
 443         ret = adv7180_program_std(state);
 444 out:
 445         mutex_unlock(&state->mutex);
 446         return ret;
 447 }
 448
 449 static int adv7180_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
 450 {
 451         struct adv7180_state *state = to_state(sd);
 452
 453         *norm = state->curr_norm;
 454
 455         return 0;
 456 }
 457
 458 static int adv7180_g_frame_interval(struct v4l2_subdev *sd,
 459                                     struct v4l2_subdev_frame_interval *fi)
 460 {
 461         struct adv7180_state *state = to_state(sd);
 462
 463         if (state->curr_norm & V4L2_STD_525_60) {
 464                 fi->interval.numerator = 1001;
 465                 fi->interval.denominator = 30000;
 466         } else {
 467                 fi->interval.numerator = 1;
 468                 fi->interval.denominator = 25;
 469         }
 470
 471         return 0;
 472 }
 473
 474 static void adv7180_set_power_pin(struct adv7180_state *state, bool on)
 475 {
 476         if (!state->pwdn_gpio)
 477                 return;
 478
 479         if (on) {
 480                 gpiod_set_value_cansleep(state->pwdn_gpio, 0);
 481                 usleep_range(5000, 10000);
 482         } else {
 483                 gpiod_set_value_cansleep(state->pwdn_gpio, 1);
 484         }
 485 }
 486
 487 static int adv7180_set_power(struct adv7180_state *state, bool on)
 488 {
 489         u8 val;
 490         int ret;
 491
 492         if (on)
 493                 val = ADV7180_PWR_MAN_ON;
 494         else
 495                 val = ADV7180_PWR_MAN_OFF;
 496
 497         ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
 498         if (ret)
 499                 return ret;
 500
 501         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 502                 if (on) {
 503                         adv7180_csi_write(state, 0xDE, 0x02);
 504                         adv7180_csi_write(state, 0xD2, 0xF7);
 505                         adv7180_csi_write(state, 0xD8, 0x65);
 506                         adv7180_csi_write(state, 0xE0, 0x09);
 507                         adv7180_csi_write(state, 0x2C, 0x00);
 508                         if (state->field == V4L2_FIELD_NONE)
 509                                 adv7180_csi_write(state, 0x1D, 0x80);
 510                         adv7180_csi_write(state, 0x00, 0x00);
 511                 } else {
 512                         adv7180_csi_write(state, 0x00, 0x80);
 513                 }
 514         }
 515
 516         return 0;
 517 }
 518
 519 static int adv7180_s_power(struct v4l2_subdev *sd, int on)
 520 {
 521         struct adv7180_state *state = to_state(sd);
 522         int ret;
 523
 524         ret = mutex_lock_interruptible(&state->mutex);
 525         if (ret)
 526                 return ret;
 527
 528         ret = adv7180_set_power(state, on);
 529         if (ret == 0)
 530                 state->powered = on;
 531
 532         mutex_unlock(&state->mutex);
 533         return ret;
 534 }
 535
 536 static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
 537 {
 538         struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
 539         struct adv7180_state *state = to_state(sd);
 540         int ret = mutex_lock_interruptible(&state->mutex);
 541         int val;
 542
 543         if (ret)
 544                 return ret;
 545         val = ctrl->val;
 546         switch (ctrl->id) {
 547         case V4L2_CID_BRIGHTNESS:
 548                 ret = adv7180_write(state, ADV7180_REG_BRI, val);
 549                 break;
 550         case V4L2_CID_HUE:
 551                 /*Hue is inverted according to HSL chart */
 552                 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
 553                 break;
 554         case V4L2_CID_CONTRAST:
 555                 ret = adv7180_write(state, ADV7180_REG_CON, val);
 556                 break;
 557         case V4L2_CID_SATURATION:
 558                 /*
 559                  *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
 560                  *Let's not confuse the user, everybody understands saturation
 561                  */
 562                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
 563                 if (ret < 0)
 564                         break;
 565                 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
 566                 break;
 567         case V4L2_CID_ADV_FAST_SWITCH:
 568                 if (ctrl->val) {
 569                         /* ADI required write */
 570                         adv7180_write(state, 0x80d9, 0x44);
 571                         adv7180_write(state, ADV7180_REG_FLCONTROL,
 572                                 ADV7180_FLCONTROL_FL_ENABLE);
 573                 } else {
 574                         /* ADI required write */
 575                         adv7180_write(state, 0x80d9, 0xc4);
 576                         adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00);
 577                 }
 578                 break;
 579         default:
 580                 ret = -EINVAL;
 581         }
 582
 583         mutex_unlock(&state->mutex);
 584         return ret;
 585 }
 586
 587 static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
 588         .s_ctrl = adv7180_s_ctrl,
 589 };
 590
 591 static const struct v4l2_ctrl_config adv7180_ctrl_fast_switch = {
 592         .ops = &adv7180_ctrl_ops,
 593         .id = V4L2_CID_ADV_FAST_SWITCH,
 594         .name = "Fast Switching",
 595         .type = V4L2_CTRL_TYPE_BOOLEAN,
 596         .min = 0,
 597         .max = 1,
 598         .step = 1,
 599 };
 600
 601 static int adv7180_init_controls(struct adv7180_state *state)
 602 {
 603         v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
 604
 605         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 606                           V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
 607                           ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
 608         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 609                           V4L2_CID_CONTRAST, ADV7180_CON_MIN,
 610                           ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
 611         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 612                           V4L2_CID_SATURATION, ADV7180_SAT_MIN,
 613                           ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
 614         v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
 615                           V4L2_CID_HUE, ADV7180_HUE_MIN,
 616                           ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
 617         v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL);
 618
 619         state->sd.ctrl_handler = &state->ctrl_hdl;
 620         if (state->ctrl_hdl.error) {
 621                 int err = state->ctrl_hdl.error;
 622
 623                 v4l2_ctrl_handler_free(&state->ctrl_hdl);
 624                 return err;
 625         }
 626         v4l2_ctrl_handler_setup(&state->ctrl_hdl);
 627
 628         return 0;
 629 }
 630 static void adv7180_exit_controls(struct adv7180_state *state)
 631 {
 632         v4l2_ctrl_handler_free(&state->ctrl_hdl);
 633 }
 634
 635 static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
 636                                   struct v4l2_subdev_pad_config *cfg,
 637                                   struct v4l2_subdev_mbus_code_enum *code)
 638 {
 639         if (code->index != 0)
 640                 return -EINVAL;
 641
 642         code->code = MEDIA_BUS_FMT_UYVY8_2X8;
 643
 644         return 0;
 645 }
 646
 647 static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
 648                             struct v4l2_mbus_framefmt *fmt)
 649 {
 650         struct adv7180_state *state = to_state(sd);
 651
 652         fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
 653         fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
 654         fmt->width = 720;
 655         fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
 656
 657         if (state->field == V4L2_FIELD_ALTERNATE)
 658                 fmt->height /= 2;
 659
 660         return 0;
 661 }
 662
 663 static int adv7180_set_field_mode(struct adv7180_state *state)
 664 {
 665         if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
 666                 return 0;
 667
 668         if (state->field == V4L2_FIELD_NONE) {
 669                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 670                         adv7180_csi_write(state, 0x01, 0x20);
 671                         adv7180_csi_write(state, 0x02, 0x28);
 672                         adv7180_csi_write(state, 0x03, 0x38);
 673                         adv7180_csi_write(state, 0x04, 0x30);
 674                         adv7180_csi_write(state, 0x05, 0x30);
 675                         adv7180_csi_write(state, 0x06, 0x80);
 676                         adv7180_csi_write(state, 0x07, 0x70);
 677                         adv7180_csi_write(state, 0x08, 0x50);
 678                 }
 679                 adv7180_vpp_write(state, 0xa3, 0x00);
 680                 adv7180_vpp_write(state, 0x5b, 0x00);
 681                 adv7180_vpp_write(state, 0x55, 0x80);
 682         } else {
 683                 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 684                         adv7180_csi_write(state, 0x01, 0x18);
 685                         adv7180_csi_write(state, 0x02, 0x18);
 686                         adv7180_csi_write(state, 0x03, 0x30);
 687                         adv7180_csi_write(state, 0x04, 0x20);
 688                         adv7180_csi_write(state, 0x05, 0x28);
 689                         adv7180_csi_write(state, 0x06, 0x40);
 690                         adv7180_csi_write(state, 0x07, 0x58);
 691                         adv7180_csi_write(state, 0x08, 0x30);
 692                 }
 693                 adv7180_vpp_write(state, 0xa3, 0x70);
 694                 adv7180_vpp_write(state, 0x5b, 0x80);
 695                 adv7180_vpp_write(state, 0x55, 0x00);
 696         }
 697
 698         return 0;
 699 }
 700
 701 static int adv7180_get_pad_format(struct v4l2_subdev *sd,
 702                                   struct v4l2_subdev_pad_config *cfg,
 703                                   struct v4l2_subdev_format *format)
 704 {
 705         struct adv7180_state *state = to_state(sd);
 706
 707         if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
 708                 format->format = *v4l2_subdev_get_try_format(sd, cfg, 0);
 709         } else {
 710                 adv7180_mbus_fmt(sd, &format->format);
 711                 format->format.field = state->field;
 712         }
 713
 714         return 0;
 715 }
 716
 717 static int adv7180_set_pad_format(struct v4l2_subdev *sd,
 718                                   struct v4l2_subdev_pad_config *cfg,
 719                                   struct v4l2_subdev_format *format)
 720 {
 721         struct adv7180_state *state = to_state(sd);
 722         struct v4l2_mbus_framefmt *framefmt;
 723         int ret;
 724
 725         switch (format->format.field) {
 726         case V4L2_FIELD_NONE:
 727                 if (state->chip_info->flags & ADV7180_FLAG_I2P)
 728                         break;
 729                 fallthrough;
 730         default:
 731                 format->format.field = V4L2_FIELD_ALTERNATE;
 732                 break;
 733         }
 734
 735         ret = adv7180_mbus_fmt(sd,  &format->format);
 736
 737         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 738                 if (state->field != format->format.field) {
 739                         state->field = format->format.field;
 740                         adv7180_set_power(state, false);
 741                         adv7180_set_field_mode(state);
 742                         adv7180_set_power(state, true);
 743                 }
 744         } else {
 745                 framefmt = v4l2_subdev_get_try_format(sd, cfg, 0);
 746                 *framefmt = format->format;
 747         }
 748
 749         return ret;
 750 }
 751
 752 static int adv7180_init_cfg(struct v4l2_subdev *sd,
 753                             struct v4l2_subdev_pad_config *cfg)
 754 {
 755         struct v4l2_subdev_format fmt = {
 756                 .which = cfg ? V4L2_SUBDEV_FORMAT_TRY
 757                         : V4L2_SUBDEV_FORMAT_ACTIVE,
 758         };
 759
 760         return adv7180_set_pad_format(sd, cfg, &fmt);
 761 }
 762
 763 static int adv7180_get_mbus_config(struct v4l2_subdev *sd,
 764                                    unsigned int pad,
 765                                    struct v4l2_mbus_config *cfg)
 766 {
 767         struct adv7180_state *state = to_state(sd);
 768
 769         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 770                 cfg->type = V4L2_MBUS_CSI2_DPHY;
 771                 cfg->flags = V4L2_MBUS_CSI2_1_LANE |
 772                                 V4L2_MBUS_CSI2_CHANNEL_0 |
 773                                 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
 774         } else {
 775                 /*
 776                  * The ADV7180 sensor supports BT.601/656 output modes.
 777                  * The BT.656 is default and not yet configurable by s/w.
 778                  */
 779                 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
 780                                  V4L2_MBUS_DATA_ACTIVE_HIGH;
 781                 cfg->type = V4L2_MBUS_BT656;
 782         }
 783
 784         return 0;
 785 }
 786
 787 static int adv7180_get_skip_frames(struct v4l2_subdev *sd, u32 *frames)
 788 {
 789         *frames = ADV7180_NUM_OF_SKIP_FRAMES;
 790
 791         return 0;
 792 }
 793
 794 static int adv7180_g_pixelaspect(struct v4l2_subdev *sd, struct v4l2_fract *aspect)
 795 {
 796         struct adv7180_state *state = to_state(sd);
 797
 798         if (state->curr_norm & V4L2_STD_525_60) {
 799                 aspect->numerator = 11;
 800                 aspect->denominator = 10;
 801         } else {
 802                 aspect->numerator = 54;
 803                 aspect->denominator = 59;
 804         }
 805
 806         return 0;
 807 }
 808
 809 static int adv7180_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm)
 810 {
 811         *norm = V4L2_STD_ALL;
 812         return 0;
 813 }
 814
 815 static int adv7180_s_stream(struct v4l2_subdev *sd, int enable)
 816 {
 817         struct adv7180_state *state = to_state(sd);
 818         int ret;
 819
 820         /* It's always safe to stop streaming, no need to take the lock */
 821         if (!enable) {
 822                 state->streaming = enable;
 823                 return 0;
 824         }
 825
 826         /* Must wait until querystd released the lock */
 827         ret = mutex_lock_interruptible(&state->mutex);
 828         if (ret)
 829                 return ret;
 830         state->streaming = enable;
 831         mutex_unlock(&state->mutex);
 832         return 0;
 833 }
 834
 835 static int adv7180_subscribe_event(struct v4l2_subdev *sd,
 836                                    struct v4l2_fh *fh,
 837                                    struct v4l2_event_subscription *sub)
 838 {
 839         switch (sub->type) {
 840         case V4L2_EVENT_SOURCE_CHANGE:
 841                 return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
 842         case V4L2_EVENT_CTRL:
 843                 return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
 844         default:
 845                 return -EINVAL;
 846         }
 847 }
 848
 849 static const struct v4l2_subdev_video_ops adv7180_video_ops = {
 850         .s_std = adv7180_s_std,
 851         .g_std = adv7180_g_std,
 852         .g_frame_interval = adv7180_g_frame_interval,
 853         .querystd = adv7180_querystd,
 854         .g_input_status = adv7180_g_input_status,
 855         .s_routing = adv7180_s_routing,
 856         .g_pixelaspect = adv7180_g_pixelaspect,
 857         .g_tvnorms = adv7180_g_tvnorms,
 858         .s_stream = adv7180_s_stream,
 859 };
 860
 861 static const struct v4l2_subdev_core_ops adv7180_core_ops = {
 862         .s_power = adv7180_s_power,
 863         .subscribe_event = adv7180_subscribe_event,
 864         .unsubscribe_event = v4l2_event_subdev_unsubscribe,
 865 };
 866
 867 static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
 868         .init_cfg = adv7180_init_cfg,
 869         .enum_mbus_code = adv7180_enum_mbus_code,
 870         .set_fmt = adv7180_set_pad_format,
 871         .get_fmt = adv7180_get_pad_format,
 872         .get_mbus_config = adv7180_get_mbus_config,
 873 };
 874
 875 static const struct v4l2_subdev_sensor_ops adv7180_sensor_ops = {
 876         .g_skip_frames = adv7180_get_skip_frames,
 877 };
 878
 879 static const struct v4l2_subdev_ops adv7180_ops = {
 880         .core = &adv7180_core_ops,
 881         .video = &adv7180_video_ops,
 882         .pad = &adv7180_pad_ops,
 883         .sensor = &adv7180_sensor_ops,
 884 };
 885
 886 static irqreturn_t adv7180_irq(int irq, void *devid)
 887 {
 888         struct adv7180_state *state = devid;
 889         u8 isr3;
 890
 891         mutex_lock(&state->mutex);
 892         isr3 = adv7180_read(state, ADV7180_REG_ISR3);
 893         /* clear */
 894         adv7180_write(state, ADV7180_REG_ICR3, isr3);
 895
 896         if (isr3 & ADV7180_IRQ3_AD_CHANGE) {
 897                 static const struct v4l2_event src_ch = {
 898                         .type = V4L2_EVENT_SOURCE_CHANGE,
 899                         .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
 900                 };
 901
 902                 v4l2_subdev_notify_event(&state->sd, &src_ch);
 903         }
 904         mutex_unlock(&state->mutex);
 905
 906         return IRQ_HANDLED;
 907 }
 908
 909 static int adv7180_init(struct adv7180_state *state)
 910 {
 911         int ret;
 912
 913         /* ITU-R BT.656-4 compatible */
 914         ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 915                         ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
 916         if (ret < 0)
 917                 return ret;
 918
 919         /* Manually set V bit end position in NTSC mode */
 920         return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
 921                                         ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
 922 }
 923
 924 static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
 925 {
 926         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
 927                 (std << 4) | state->input);
 928 }
 929
 930 static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
 931 {
 932         int ret;
 933
 934         ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
 935         if (ret < 0)
 936                 return ret;
 937
 938         ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
 939         ret |= input;
 940         return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
 941 }
 942
 943 static int adv7182_init(struct adv7180_state *state)
 944 {
 945         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
 946                 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
 947                         ADV7180_DEFAULT_CSI_I2C_ADDR << 1);
 948
 949         if (state->chip_info->flags & ADV7180_FLAG_I2P)
 950                 adv7180_write(state, ADV7180_REG_VPP_SLAVE_ADDR,
 951                         ADV7180_DEFAULT_VPP_I2C_ADDR << 1);
 952
 953         if (state->chip_info->flags & ADV7180_FLAG_V2) {
 954                 /* ADI recommended writes for improved video quality */
 955                 adv7180_write(state, 0x0080, 0x51);
 956                 adv7180_write(state, 0x0081, 0x51);
 957                 adv7180_write(state, 0x0082, 0x68);
 958         }
 959
 960         /* ADI required writes */
 961         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
 962                 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x4e);
 963                 adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 0x57);
 964                 adv7180_write(state, ADV7180_REG_CTRL_2, 0xc0);
 965         } else {
 966                 if (state->chip_info->flags & ADV7180_FLAG_V2)
 967                         adv7180_write(state,
 968                                       ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 969                                       0x17);
 970                 else
 971                         adv7180_write(state,
 972                                       ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
 973                                       0x07);
 974                 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x0c);
 975                 adv7180_write(state, ADV7180_REG_CTRL_2, 0x40);
 976         }
 977
 978         adv7180_write(state, 0x0013, 0x00);
 979
 980         return 0;
 981 }
 982
 983 static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
 984 {
 985         return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
 986 }
 987
 988 enum adv7182_input_type {
 989         ADV7182_INPUT_TYPE_CVBS,
 990         ADV7182_INPUT_TYPE_DIFF_CVBS,
 991         ADV7182_INPUT_TYPE_SVIDEO,
 992         ADV7182_INPUT_TYPE_YPBPR,
 993 };
 994
 995 static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
 996 {
 997         switch (input) {
 998         case ADV7182_INPUT_CVBS_AIN1:
 999         case ADV7182_INPUT_CVBS_AIN2:
1000         case ADV7182_INPUT_CVBS_AIN3:
1001         case ADV7182_INPUT_CVBS_AIN4:
1002         case ADV7182_INPUT_CVBS_AIN5:
1003         case ADV7182_INPUT_CVBS_AIN6:
1004         case ADV7182_INPUT_CVBS_AIN7:
1005         case ADV7182_INPUT_CVBS_AIN8:
1006                 return ADV7182_INPUT_TYPE_CVBS;
1007         case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
1008         case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
1009         case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
1010         case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
1011                 return ADV7182_INPUT_TYPE_SVIDEO;
1012         case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
1013         case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
1014                 return ADV7182_INPUT_TYPE_YPBPR;
1015         case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
1016         case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
1017         case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
1018         case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
1019                 return ADV7182_INPUT_TYPE_DIFF_CVBS;
1020         default: /* Will never happen */
1021                 return 0;
1022         }
1023 }
1024
1025 /* ADI recommended writes to registers 0x52, 0x53, 0x54 */
1026 static unsigned int adv7182_lbias_settings[][3] = {
1027         [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
1028         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
1029         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
1030         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
1031 };
1032
1033 static unsigned int adv7280_lbias_settings[][3] = {
1034         [ADV7182_INPUT_TYPE_CVBS] = { 0xCD, 0x4E, 0x80 },
1035         [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
1036         [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
1037         [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
1038 };
1039
1040 static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
1041 {
1042         enum adv7182_input_type input_type;
1043         unsigned int *lbias;
1044         unsigned int i;
1045         int ret;
1046
1047         ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
1048         if (ret)
1049                 return ret;
1050
1051         /* Reset clamp circuitry - ADI recommended writes */
1052         adv7180_write(state, ADV7180_REG_RST_CLAMP, 0x00);
1053         adv7180_write(state, ADV7180_REG_RST_CLAMP, 0xff);
1054
1055         input_type = adv7182_get_input_type(input);
1056
1057         switch (input_type) {
1058         case ADV7182_INPUT_TYPE_CVBS:
1059         case ADV7182_INPUT_TYPE_DIFF_CVBS:
1060                 /* ADI recommends to use the SH1 filter */
1061                 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x41);
1062                 break;
1063         default:
1064                 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x01);
1065                 break;
1066         }
1067
1068         if (state->chip_info->flags & ADV7180_FLAG_V2)
1069                 lbias = adv7280_lbias_settings[input_type];
1070         else
1071                 lbias = adv7182_lbias_settings[input_type];
1072
1073         for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
1074                 adv7180_write(state, ADV7180_REG_CVBS_TRIM + i, lbias[i]);
1075
1076         if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
1077                 /* ADI required writes to make differential CVBS work */
1078                 adv7180_write(state, ADV7180_REG_RES_CIR, 0xa8);
1079                 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0x90);
1080                 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0xb0);
1081                 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x08);
1082                 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0xa0);
1083         } else {
1084                 adv7180_write(state, ADV7180_REG_RES_CIR, 0xf0);
1085                 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0xd0);
1086                 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0x10);
1087                 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x9c);
1088                 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0x00);
1089         }
1090
1091         return 0;
1092 }
1093
1094 static const struct adv7180_chip_info adv7180_info = {
1095         .flags = ADV7180_FLAG_RESET_POWERED,
1096         /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
1097          * all inputs and let the card driver take care of validation
1098          */
1099         .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
1100                 BIT(ADV7180_INPUT_CVBS_AIN2) |
1101                 BIT(ADV7180_INPUT_CVBS_AIN3) |
1102                 BIT(ADV7180_INPUT_CVBS_AIN4) |
1103                 BIT(ADV7180_INPUT_CVBS_AIN5) |
1104                 BIT(ADV7180_INPUT_CVBS_AIN6) |
1105                 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
1106                 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
1107                 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
1108                 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1109                 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
1110         .init = adv7180_init,
1111         .set_std = adv7180_set_std,
1112         .select_input = adv7180_select_input,
1113 };
1114
1115 static const struct adv7180_chip_info adv7182_info = {
1116         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1117                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1118                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1119                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1120                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1121                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1122                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1123                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1124                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
1125         .init = adv7182_init,
1126         .set_std = adv7182_set_std,
1127         .select_input = adv7182_select_input,
1128 };
1129
1130 static const struct adv7180_chip_info adv7280_info = {
1131         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1132         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1133                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1134                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1135                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1136                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1137                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1138                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3),
1139         .init = adv7182_init,
1140         .set_std = adv7182_set_std,
1141         .select_input = adv7182_select_input,
1142 };
1143
1144 static const struct adv7180_chip_info adv7280_m_info = {
1145         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1146         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1147                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1148                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1149                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1150                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1151                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1152                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1153                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1154                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1155                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1156                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1157                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1158                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1159                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6),
1160         .init = adv7182_init,
1161         .set_std = adv7182_set_std,
1162         .select_input = adv7182_select_input,
1163 };
1164
1165 static const struct adv7180_chip_info adv7281_info = {
1166         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1167         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1168                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1169                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1170                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1171                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1172                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1173                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1174                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1175         .init = adv7182_init,
1176         .set_std = adv7182_set_std,
1177         .select_input = adv7182_select_input,
1178 };
1179
1180 static const struct adv7180_chip_info adv7281_m_info = {
1181         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1182         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1183                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1184                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1185                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1186                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1187                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1188                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1189                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1190                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1191                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1192                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1193                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1194                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1195         .init = adv7182_init,
1196         .set_std = adv7182_set_std,
1197         .select_input = adv7182_select_input,
1198 };
1199
1200 static const struct adv7180_chip_info adv7281_ma_info = {
1201         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2,
1202         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1203                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1204                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1205                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1206                 BIT(ADV7182_INPUT_CVBS_AIN5) |
1207                 BIT(ADV7182_INPUT_CVBS_AIN6) |
1208                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1209                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1210                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1211                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1212                 BIT(ADV7182_INPUT_SVIDEO_AIN5_AIN6) |
1213                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1214                 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
1215                 BIT(ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6) |
1216                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1217                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1218                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6) |
1219                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1220         .init = adv7182_init,
1221         .set_std = adv7182_set_std,
1222         .select_input = adv7182_select_input,
1223 };
1224
1225 static const struct adv7180_chip_info adv7282_info = {
1226         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_I2P,
1227         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1228                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1229                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1230                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1231                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1232                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1233                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1234                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1235         .init = adv7182_init,
1236         .set_std = adv7182_set_std,
1237         .select_input = adv7182_select_input,
1238 };
1239
1240 static const struct adv7180_chip_info adv7282_m_info = {
1241         .flags = ADV7180_FLAG_V2 | ADV7180_FLAG_MIPI_CSI2 | ADV7180_FLAG_I2P,
1242         .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
1243                 BIT(ADV7182_INPUT_CVBS_AIN2) |
1244                 BIT(ADV7182_INPUT_CVBS_AIN3) |
1245                 BIT(ADV7182_INPUT_CVBS_AIN4) |
1246                 BIT(ADV7182_INPUT_CVBS_AIN7) |
1247                 BIT(ADV7182_INPUT_CVBS_AIN8) |
1248                 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
1249                 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
1250                 BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) |
1251                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
1252                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) |
1253                 BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8),
1254         .init = adv7182_init,
1255         .set_std = adv7182_set_std,
1256         .select_input = adv7182_select_input,
1257 };
1258
1259 static int init_device(struct adv7180_state *state)
1260 {
1261         int ret;
1262
1263         mutex_lock(&state->mutex);
1264
1265         adv7180_set_power_pin(state, true);
1266
1267         adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
1268         usleep_range(5000, 10000);
1269
1270         ret = state->chip_info->init(state);
1271         if (ret)
1272                 goto out_unlock;
1273
1274         ret = adv7180_program_std(state);
1275         if (ret)
1276                 goto out_unlock;
1277
1278         adv7180_set_field_mode(state);
1279
1280         /* register for interrupts */
1281         if (state->irq > 0) {
1282                 /* config the Interrupt pin to be active low */
1283                 ret = adv7180_write(state, ADV7180_REG_ICONF1,
1284                                                 ADV7180_ICONF1_ACTIVE_LOW |
1285                                                 ADV7180_ICONF1_PSYNC_ONLY);
1286                 if (ret < 0)
1287                         goto out_unlock;
1288
1289                 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
1290                 if (ret < 0)
1291                         goto out_unlock;
1292
1293                 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
1294                 if (ret < 0)
1295                         goto out_unlock;
1296
1297                 /* enable AD change interrupts interrupts */
1298                 ret = adv7180_write(state, ADV7180_REG_IMR3,
1299                                                 ADV7180_IRQ3_AD_CHANGE);
1300                 if (ret < 0)
1301                         goto out_unlock;
1302
1303                 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
1304                 if (ret < 0)
1305                         goto out_unlock;
1306         }
1307
1308 out_unlock:
1309         mutex_unlock(&state->mutex);
1310
1311         return ret;
1312 }
1313
1314 static int adv7180_probe(struct i2c_client *client,
1315                          const struct i2c_device_id *id)
1316 {
1317         struct adv7180_state *state;
1318         struct v4l2_subdev *sd;
1319         int ret;
1320
1321         /* Check if the adapter supports the needed features */
1322         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1323                 return -EIO;
1324
1325         state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
1326         if (state == NULL)
1327                 return -ENOMEM;
1328
1329         state->client = client;
1330         state->field = V4L2_FIELD_ALTERNATE;
1331         state->chip_info = (struct adv7180_chip_info *)id->driver_data;
1332
1333         state->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
1334                                                    GPIOD_OUT_HIGH);
1335         if (IS_ERR(state->pwdn_gpio)) {
1336                 ret = PTR_ERR(state->pwdn_gpio);
1337                 v4l_err(client, "request for power pin failed: %d\n", ret);
1338                 return ret;
1339         }
1340
1341         if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1342                 state->csi_client = i2c_new_dummy_device(client->adapter,
1343                                 ADV7180_DEFAULT_CSI_I2C_ADDR);
1344                 if (IS_ERR(state->csi_client))
1345                         return PTR_ERR(state->csi_client);
1346         }
1347
1348         if (state->chip_info->flags & ADV7180_FLAG_I2P) {
1349                 state->vpp_client = i2c_new_dummy_device(client->adapter,
1350                                 ADV7180_DEFAULT_VPP_I2C_ADDR);
1351                 if (IS_ERR(state->vpp_client)) {
1352                         ret = PTR_ERR(state->vpp_client);
1353                         goto err_unregister_csi_client;
1354                 }
1355         }
1356
1357         state->irq = client->irq;
1358         mutex_init(&state->mutex);
1359         state->curr_norm = V4L2_STD_NTSC;
1360         if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1361                 state->powered = true;
1362         else
1363                 state->powered = false;
1364         state->input = 0;
1365         sd = &state->sd;
1366         v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
1367         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
1368
1369         ret = adv7180_init_controls(state);
1370         if (ret)
1371                 goto err_unregister_vpp_client;
1372
1373         state->pad.flags = MEDIA_PAD_FL_SOURCE;
1374         sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1375         ret = media_entity_pads_init(&sd->entity, 1, &state->pad);
1376         if (ret)
1377                 goto err_free_ctrl;
1378
1379         ret = init_device(state);
1380         if (ret)
1381                 goto err_media_entity_cleanup;
1382
1383         if (state->irq) {
1384                 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
1385                                            IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
1386                                            KBUILD_MODNAME, state);
1387                 if (ret)
1388                         goto err_media_entity_cleanup;
1389         }
1390
1391         ret = v4l2_async_register_subdev(sd);
1392         if (ret)
1393                 goto err_free_irq;
1394
1395         v4l_info(client, "chip found @ 0x%02x (%s)\n",
1396                  client->addr, client->adapter->name);
1397
1398         return 0;
1399
1400 err_free_irq:
1401         if (state->irq > 0)
1402                 free_irq(client->irq, state);
1403 err_media_entity_cleanup:
1404         media_entity_cleanup(&sd->entity);
1405 err_free_ctrl:
1406         adv7180_exit_controls(state);
1407 err_unregister_vpp_client:
1408         i2c_unregister_device(state->vpp_client);
1409 err_unregister_csi_client:
1410         i2c_unregister_device(state->csi_client);
1411         mutex_destroy(&state->mutex);
1412         return ret;
1413 }
1414
1415 static int adv7180_remove(struct i2c_client *client)
1416 {
1417         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1418         struct adv7180_state *state = to_state(sd);
1419
1420         v4l2_async_unregister_subdev(sd);
1421
1422         if (state->irq > 0)
1423                 free_irq(client->irq, state);
1424
1425         media_entity_cleanup(&sd->entity);
1426         adv7180_exit_controls(state);
1427
1428         i2c_unregister_device(state->vpp_client);
1429         i2c_unregister_device(state->csi_client);
1430
1431         adv7180_set_power_pin(state, false);
1432
1433         mutex_destroy(&state->mutex);
1434
1435         return 0;
1436 }
1437
1438 static const struct i2c_device_id adv7180_id[] = {
1439         { "adv7180", (kernel_ulong_t)&adv7180_info },
1440         { "adv7180cp", (kernel_ulong_t)&adv7180_info },
1441         { "adv7180st", (kernel_ulong_t)&adv7180_info },
1442         { "adv7182", (kernel_ulong_t)&adv7182_info },
1443         { "adv7280", (kernel_ulong_t)&adv7280_info },
1444         { "adv7280-m", (kernel_ulong_t)&adv7280_m_info },
1445         { "adv7281", (kernel_ulong_t)&adv7281_info },
1446         { "adv7281-m", (kernel_ulong_t)&adv7281_m_info },
1447         { "adv7281-ma", (kernel_ulong_t)&adv7281_ma_info },
1448         { "adv7282", (kernel_ulong_t)&adv7282_info },
1449         { "adv7282-m", (kernel_ulong_t)&adv7282_m_info },
1450         {},
1451 };
1452 MODULE_DEVICE_TABLE(i2c, adv7180_id);
1453
1454 #ifdef CONFIG_PM_SLEEP
1455 static int adv7180_suspend(struct device *dev)
1456 {
1457         struct i2c_client *client = to_i2c_client(dev);
1458         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1459         struct adv7180_state *state = to_state(sd);
1460
1461         return adv7180_set_power(state, false);
1462 }
1463
1464 static int adv7180_resume(struct device *dev)
1465 {
1466         struct i2c_client *client = to_i2c_client(dev);
1467         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1468         struct adv7180_state *state = to_state(sd);
1469         int ret;
1470
1471         ret = init_device(state);
1472         if (ret < 0)
1473                 return ret;
1474
1475         ret = adv7180_set_power(state, state->powered);
1476         if (ret)
1477                 return ret;
1478
1479         return 0;
1480 }
1481
1482 static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
1483 #define ADV7180_PM_OPS (&adv7180_pm_ops)
1484
1485 #else
1486 #define ADV7180_PM_OPS NULL
1487 #endif
1488
1489 #ifdef CONFIG_OF
1490 static const struct of_device_id adv7180_of_id[] = {
1491         { .compatible = "adi,adv7180", },
1492         { .compatible = "adi,adv7180cp", },
1493         { .compatible = "adi,adv7180st", },
1494         { .compatible = "adi,adv7182", },
1495         { .compatible = "adi,adv7280", },
1496         { .compatible = "adi,adv7280-m", },
1497         { .compatible = "adi,adv7281", },
1498         { .compatible = "adi,adv7281-m", },
1499         { .compatible = "adi,adv7281-ma", },
1500         { .compatible = "adi,adv7282", },
1501         { .compatible = "adi,adv7282-m", },
1502         { },
1503 };
1504
1505 MODULE_DEVICE_TABLE(of, adv7180_of_id);
1506 #endif
1507
1508 static struct i2c_driver adv7180_driver = {
1509         .driver = {
1510                    .name = KBUILD_MODNAME,
1511                    .pm = ADV7180_PM_OPS,
1512                    .of_match_table = of_match_ptr(adv7180_of_id),
1513                    },
1514         .probe = adv7180_probe,
1515         .remove = adv7180_remove,
1516         .id_table = adv7180_id,
1517 };
1518
1519 module_i2c_driver(adv7180_driver);
1520
1521 MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
1522 MODULE_AUTHOR("Mocean Laboratories");
1523 MODULE_LICENSE("GPL v2");