drivers/media/dvb-frontends/stv090x.c

   1 /*
   2         STV0900/0903 Multistandard Broadcast Frontend driver
   3         Copyright (C) Manu Abraham <abraham.manu@gmail.com>
   4
   5         Copyright (C) ST Microelectronics
   6
   7         This program is free software; you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation; either version 2 of the License, or
  10         (at your option) any later version.
  11
  12         This program is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with this program; if not, write to the Free Software
  19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 #include <linux/init.h>
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/mutex.h>
  28
  29 #include <linux/dvb/frontend.h>
  30 #include <media/dvb_frontend.h>
  31
  32 #include "stv6110x.h" /* for demodulator internal modes */
  33
  34 #include "stv090x_reg.h"
  35 #include "stv090x.h"
  36 #include "stv090x_priv.h"
  37
  38 /* Max transfer size done by I2C transfer functions */
  39 #define MAX_XFER_SIZE  64
  40
  41 static unsigned int verbose;
  42 module_param(verbose, int, 0644);
  43
  44 /* internal params node */
  45 struct stv090x_dev {
  46         /* pointer for internal params, one for each pair of demods */
  47         struct stv090x_internal         *internal;
  48         struct stv090x_dev              *next_dev;
  49 };
  50
  51 /* first internal params */
  52 static struct stv090x_dev *stv090x_first_dev;
  53
  54 /* find chip by i2c adapter and i2c address */
  55 static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
  56                                         u8 i2c_addr)
  57 {
  58         struct stv090x_dev *temp_dev = stv090x_first_dev;
  59
  60         /*
  61          Search of the last stv0900 chip or
  62          find it by i2c adapter and i2c address */
  63         while ((temp_dev != NULL) &&
  64                 ((temp_dev->internal->i2c_adap != i2c_adap) ||
  65                 (temp_dev->internal->i2c_addr != i2c_addr))) {
  66
  67                 temp_dev = temp_dev->next_dev;
  68         }
  69
  70         return temp_dev;
  71 }
  72
  73 /* deallocating chip */
  74 static void remove_dev(struct stv090x_internal *internal)
  75 {
  76         struct stv090x_dev *prev_dev = stv090x_first_dev;
  77         struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
  78                                                 internal->i2c_addr);
  79
  80         if (del_dev != NULL) {
  81                 if (del_dev == stv090x_first_dev) {
  82                         stv090x_first_dev = del_dev->next_dev;
  83                 } else {
  84                         while (prev_dev->next_dev != del_dev)
  85                                 prev_dev = prev_dev->next_dev;
  86
  87                         prev_dev->next_dev = del_dev->next_dev;
  88                 }
  89
  90                 kfree(del_dev);
  91         }
  92 }
  93
  94 /* allocating new chip */
  95 static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
  96 {
  97         struct stv090x_dev *new_dev;
  98         struct stv090x_dev *temp_dev;
  99
 100         new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
 101         if (new_dev != NULL) {
 102                 new_dev->internal = internal;
 103                 new_dev->next_dev = NULL;
 104
 105                 /* append to list */
 106                 if (stv090x_first_dev == NULL) {
 107                         stv090x_first_dev = new_dev;
 108                 } else {
 109                         temp_dev = stv090x_first_dev;
 110                         while (temp_dev->next_dev != NULL)
 111                                 temp_dev = temp_dev->next_dev;
 112
 113                         temp_dev->next_dev = new_dev;
 114                 }
 115         }
 116
 117         return new_dev;
 118 }
 119
 120
 121 /* DVBS1 and DSS C/N Lookup table */
 122 static const struct stv090x_tab stv090x_s1cn_tab[] = {
 123         {   0, 8917 }, /*  0.0dB */
 124         {   5, 8801 }, /*  0.5dB */
 125         {  10, 8667 }, /*  1.0dB */
 126         {  15, 8522 }, /*  1.5dB */
 127         {  20, 8355 }, /*  2.0dB */
 128         {  25, 8175 }, /*  2.5dB */
 129         {  30, 7979 }, /*  3.0dB */
 130         {  35, 7763 }, /*  3.5dB */
 131         {  40, 7530 }, /*  4.0dB */
 132         {  45, 7282 }, /*  4.5dB */
 133         {  50, 7026 }, /*  5.0dB */
 134         {  55, 6781 }, /*  5.5dB */
 135         {  60, 6514 }, /*  6.0dB */
 136         {  65, 6241 }, /*  6.5dB */
 137         {  70, 5965 }, /*  7.0dB */
 138         {  75, 5690 }, /*  7.5dB */
 139         {  80, 5424 }, /*  8.0dB */
 140         {  85, 5161 }, /*  8.5dB */
 141         {  90, 4902 }, /*  9.0dB */
 142         {  95, 4654 }, /*  9.5dB */
 143         { 100, 4417 }, /* 10.0dB */
 144         { 105, 4186 }, /* 10.5dB */
 145         { 110, 3968 }, /* 11.0dB */
 146         { 115, 3757 }, /* 11.5dB */
 147         { 120, 3558 }, /* 12.0dB */
 148         { 125, 3366 }, /* 12.5dB */
 149         { 130, 3185 }, /* 13.0dB */
 150         { 135, 3012 }, /* 13.5dB */
 151         { 140, 2850 }, /* 14.0dB */
 152         { 145, 2698 }, /* 14.5dB */
 153         { 150, 2550 }, /* 15.0dB */
 154         { 160, 2283 }, /* 16.0dB */
 155         { 170, 2042 }, /* 17.0dB */
 156         { 180, 1827 }, /* 18.0dB */
 157         { 190, 1636 }, /* 19.0dB */
 158         { 200, 1466 }, /* 20.0dB */
 159         { 210, 1315 }, /* 21.0dB */
 160         { 220, 1181 }, /* 22.0dB */
 161         { 230, 1064 }, /* 23.0dB */
 162         { 240,  960 }, /* 24.0dB */
 163         { 250,  869 }, /* 25.0dB */
 164         { 260,  792 }, /* 26.0dB */
 165         { 270,  724 }, /* 27.0dB */
 166         { 280,  665 }, /* 28.0dB */
 167         { 290,  616 }, /* 29.0dB */
 168         { 300,  573 }, /* 30.0dB */
 169         { 310,  537 }, /* 31.0dB */
 170         { 320,  507 }, /* 32.0dB */
 171         { 330,  483 }, /* 33.0dB */
 172         { 400,  398 }, /* 40.0dB */
 173         { 450,  381 }, /* 45.0dB */
 174         { 500,  377 }  /* 50.0dB */
 175 };
 176
 177 /* DVBS2 C/N Lookup table */
 178 static const struct stv090x_tab stv090x_s2cn_tab[] = {
 179         { -30, 13348 }, /* -3.0dB */
 180         { -20, 12640 }, /* -2d.0B */
 181         { -10, 11883 }, /* -1.0dB */
 182         {   0, 11101 }, /* -0.0dB */
 183         {   5, 10718 }, /*  0.5dB */
 184         {  10, 10339 }, /*  1.0dB */
 185         {  15,  9947 }, /*  1.5dB */
 186         {  20,  9552 }, /*  2.0dB */
 187         {  25,  9183 }, /*  2.5dB */
 188         {  30,  8799 }, /*  3.0dB */
 189         {  35,  8422 }, /*  3.5dB */
 190         {  40,  8062 }, /*  4.0dB */
 191         {  45,  7707 }, /*  4.5dB */
 192         {  50,  7353 }, /*  5.0dB */
 193         {  55,  7025 }, /*  5.5dB */
 194         {  60,  6684 }, /*  6.0dB */
 195         {  65,  6331 }, /*  6.5dB */
 196         {  70,  6036 }, /*  7.0dB */
 197         {  75,  5727 }, /*  7.5dB */
 198         {  80,  5437 }, /*  8.0dB */
 199         {  85,  5164 }, /*  8.5dB */
 200         {  90,  4902 }, /*  9.0dB */
 201         {  95,  4653 }, /*  9.5dB */
 202         { 100,  4408 }, /* 10.0dB */
 203         { 105,  4187 }, /* 10.5dB */
 204         { 110,  3961 }, /* 11.0dB */
 205         { 115,  3751 }, /* 11.5dB */
 206         { 120,  3558 }, /* 12.0dB */
 207         { 125,  3368 }, /* 12.5dB */
 208         { 130,  3191 }, /* 13.0dB */
 209         { 135,  3017 }, /* 13.5dB */
 210         { 140,  2862 }, /* 14.0dB */
 211         { 145,  2710 }, /* 14.5dB */
 212         { 150,  2565 }, /* 15.0dB */
 213         { 160,  2300 }, /* 16.0dB */
 214         { 170,  2058 }, /* 17.0dB */
 215         { 180,  1849 }, /* 18.0dB */
 216         { 190,  1663 }, /* 19.0dB */
 217         { 200,  1495 }, /* 20.0dB */
 218         { 210,  1349 }, /* 21.0dB */
 219         { 220,  1222 }, /* 22.0dB */
 220         { 230,  1110 }, /* 23.0dB */
 221         { 240,  1011 }, /* 24.0dB */
 222         { 250,   925 }, /* 25.0dB */
 223         { 260,   853 }, /* 26.0dB */
 224         { 270,   789 }, /* 27.0dB */
 225         { 280,   734 }, /* 28.0dB */
 226         { 290,   690 }, /* 29.0dB */
 227         { 300,   650 }, /* 30.0dB */
 228         { 310,   619 }, /* 31.0dB */
 229         { 320,   593 }, /* 32.0dB */
 230         { 330,   571 }, /* 33.0dB */
 231         { 400,   498 }, /* 40.0dB */
 232         { 450,   484 }, /* 45.0dB */
 233         { 500,   481 }  /* 50.0dB */
 234 };
 235
 236 /* RF level C/N lookup table */
 237 static const struct stv090x_tab stv090x_rf_tab[] = {
 238         {  -5, 0xcaa1 }, /*  -5dBm */
 239         { -10, 0xc229 }, /* -10dBm */
 240         { -15, 0xbb08 }, /* -15dBm */
 241         { -20, 0xb4bc }, /* -20dBm */
 242         { -25, 0xad5a }, /* -25dBm */
 243         { -30, 0xa298 }, /* -30dBm */
 244         { -35, 0x98a8 }, /* -35dBm */
 245         { -40, 0x8389 }, /* -40dBm */
 246         { -45, 0x59be }, /* -45dBm */
 247         { -50, 0x3a14 }, /* -50dBm */
 248         { -55, 0x2d11 }, /* -55dBm */
 249         { -60, 0x210d }, /* -60dBm */
 250         { -65, 0xa14f }, /* -65dBm */
 251         { -70, 0x07aa }  /* -70dBm */
 252 };
 253
 254
 255 static struct stv090x_reg stv0900_initval[] = {
 256
 257         { STV090x_OUTCFG,               0x00 },
 258         { STV090x_MODECFG,              0xff },
 259         { STV090x_AGCRF1CFG,            0x11 },
 260         { STV090x_AGCRF2CFG,            0x13 },
 261         { STV090x_TSGENERAL1X,          0x14 },
 262         { STV090x_TSTTNR2,              0x21 },
 263         { STV090x_TSTTNR4,              0x21 },
 264         { STV090x_P2_DISTXCTL,          0x22 },
 265         { STV090x_P2_F22TX,             0xc0 },
 266         { STV090x_P2_F22RX,             0xc0 },
 267         { STV090x_P2_DISRXCTL,          0x00 },
 268         { STV090x_P2_DMDCFGMD,          0xF9 },
 269         { STV090x_P2_DEMOD,             0x08 },
 270         { STV090x_P2_DMDCFG3,           0xc4 },
 271         { STV090x_P2_CARFREQ,           0xed },
 272         { STV090x_P2_LDT,               0xd0 },
 273         { STV090x_P2_LDT2,              0xb8 },
 274         { STV090x_P2_TMGCFG,            0xd2 },
 275         { STV090x_P2_TMGTHRISE,         0x20 },
 276         { STV090x_P1_TMGCFG,            0xd2 },
 277
 278         { STV090x_P2_TMGTHFALL,         0x00 },
 279         { STV090x_P2_FECSPY,            0x88 },
 280         { STV090x_P2_FSPYDATA,          0x3a },
 281         { STV090x_P2_FBERCPT4,          0x00 },
 282         { STV090x_P2_FSPYBER,           0x10 },
 283         { STV090x_P2_ERRCTRL1,          0x35 },
 284         { STV090x_P2_ERRCTRL2,          0xc1 },
 285         { STV090x_P2_CFRICFG,           0xf8 },
 286         { STV090x_P2_NOSCFG,            0x1c },
 287         { STV090x_P2_DMDTOM,            0x20 },
 288         { STV090x_P2_CORRELMANT,        0x70 },
 289         { STV090x_P2_CORRELABS,         0x88 },
 290         { STV090x_P2_AGC2O,             0x5b },
 291         { STV090x_P2_AGC2REF,           0x38 },
 292         { STV090x_P2_CARCFG,            0xe4 },
 293         { STV090x_P2_ACLC,              0x1A },
 294         { STV090x_P2_BCLC,              0x09 },
 295         { STV090x_P2_CARHDR,            0x08 },
 296         { STV090x_P2_KREFTMG,           0xc1 },
 297         { STV090x_P2_SFRUPRATIO,        0xf0 },
 298         { STV090x_P2_SFRLOWRATIO,       0x70 },
 299         { STV090x_P2_SFRSTEP,           0x58 },
 300         { STV090x_P2_TMGCFG2,           0x01 },
 301         { STV090x_P2_CAR2CFG,           0x26 },
 302         { STV090x_P2_BCLC2S2Q,          0x86 },
 303         { STV090x_P2_BCLC2S28,          0x86 },
 304         { STV090x_P2_SMAPCOEF7,         0x77 },
 305         { STV090x_P2_SMAPCOEF6,         0x85 },
 306         { STV090x_P2_SMAPCOEF5,         0x77 },
 307         { STV090x_P2_TSCFGL,            0x20 },
 308         { STV090x_P2_DMDCFG2,           0x3b },
 309         { STV090x_P2_MODCODLST0,        0xff },
 310         { STV090x_P2_MODCODLST1,        0xff },
 311         { STV090x_P2_MODCODLST2,        0xff },
 312         { STV090x_P2_MODCODLST3,        0xff },
 313         { STV090x_P2_MODCODLST4,        0xff },
 314         { STV090x_P2_MODCODLST5,        0xff },
 315         { STV090x_P2_MODCODLST6,        0xff },
 316         { STV090x_P2_MODCODLST7,        0xcc },
 317         { STV090x_P2_MODCODLST8,        0xcc },
 318         { STV090x_P2_MODCODLST9,        0xcc },
 319         { STV090x_P2_MODCODLSTA,        0xcc },
 320         { STV090x_P2_MODCODLSTB,        0xcc },
 321         { STV090x_P2_MODCODLSTC,        0xcc },
 322         { STV090x_P2_MODCODLSTD,        0xcc },
 323         { STV090x_P2_MODCODLSTE,        0xcc },
 324         { STV090x_P2_MODCODLSTF,        0xcf },
 325         { STV090x_P1_DISTXCTL,          0x22 },
 326         { STV090x_P1_F22TX,             0xc0 },
 327         { STV090x_P1_F22RX,             0xc0 },
 328         { STV090x_P1_DISRXCTL,          0x00 },
 329         { STV090x_P1_DMDCFGMD,          0xf9 },
 330         { STV090x_P1_DEMOD,             0x08 },
 331         { STV090x_P1_DMDCFG3,           0xc4 },
 332         { STV090x_P1_DMDTOM,            0x20 },
 333         { STV090x_P1_CARFREQ,           0xed },
 334         { STV090x_P1_LDT,               0xd0 },
 335         { STV090x_P1_LDT2,              0xb8 },
 336         { STV090x_P1_TMGCFG,            0xd2 },
 337         { STV090x_P1_TMGTHRISE,         0x20 },
 338         { STV090x_P1_TMGTHFALL,         0x00 },
 339         { STV090x_P1_SFRUPRATIO,        0xf0 },
 340         { STV090x_P1_SFRLOWRATIO,       0x70 },
 341         { STV090x_P1_TSCFGL,            0x20 },
 342         { STV090x_P1_FECSPY,            0x88 },
 343         { STV090x_P1_FSPYDATA,          0x3a },
 344         { STV090x_P1_FBERCPT4,          0x00 },
 345         { STV090x_P1_FSPYBER,           0x10 },
 346         { STV090x_P1_ERRCTRL1,          0x35 },
 347         { STV090x_P1_ERRCTRL2,          0xc1 },
 348         { STV090x_P1_CFRICFG,           0xf8 },
 349         { STV090x_P1_NOSCFG,            0x1c },
 350         { STV090x_P1_CORRELMANT,        0x70 },
 351         { STV090x_P1_CORRELABS,         0x88 },
 352         { STV090x_P1_AGC2O,             0x5b },
 353         { STV090x_P1_AGC2REF,           0x38 },
 354         { STV090x_P1_CARCFG,            0xe4 },
 355         { STV090x_P1_ACLC,              0x1A },
 356         { STV090x_P1_BCLC,              0x09 },
 357         { STV090x_P1_CARHDR,            0x08 },
 358         { STV090x_P1_KREFTMG,           0xc1 },
 359         { STV090x_P1_SFRSTEP,           0x58 },
 360         { STV090x_P1_TMGCFG2,           0x01 },
 361         { STV090x_P1_CAR2CFG,           0x26 },
 362         { STV090x_P1_BCLC2S2Q,          0x86 },
 363         { STV090x_P1_BCLC2S28,          0x86 },
 364         { STV090x_P1_SMAPCOEF7,         0x77 },
 365         { STV090x_P1_SMAPCOEF6,         0x85 },
 366         { STV090x_P1_SMAPCOEF5,         0x77 },
 367         { STV090x_P1_DMDCFG2,           0x3b },
 368         { STV090x_P1_MODCODLST0,        0xff },
 369         { STV090x_P1_MODCODLST1,        0xff },
 370         { STV090x_P1_MODCODLST2,        0xff },
 371         { STV090x_P1_MODCODLST3,        0xff },
 372         { STV090x_P1_MODCODLST4,        0xff },
 373         { STV090x_P1_MODCODLST5,        0xff },
 374         { STV090x_P1_MODCODLST6,        0xff },
 375         { STV090x_P1_MODCODLST7,        0xcc },
 376         { STV090x_P1_MODCODLST8,        0xcc },
 377         { STV090x_P1_MODCODLST9,        0xcc },
 378         { STV090x_P1_MODCODLSTA,        0xcc },
 379         { STV090x_P1_MODCODLSTB,        0xcc },
 380         { STV090x_P1_MODCODLSTC,        0xcc },
 381         { STV090x_P1_MODCODLSTD,        0xcc },
 382         { STV090x_P1_MODCODLSTE,        0xcc },
 383         { STV090x_P1_MODCODLSTF,        0xcf },
 384         { STV090x_GENCFG,               0x1d },
 385         { STV090x_NBITER_NF4,           0x37 },
 386         { STV090x_NBITER_NF5,           0x29 },
 387         { STV090x_NBITER_NF6,           0x37 },
 388         { STV090x_NBITER_NF7,           0x33 },
 389         { STV090x_NBITER_NF8,           0x31 },
 390         { STV090x_NBITER_NF9,           0x2f },
 391         { STV090x_NBITER_NF10,          0x39 },
 392         { STV090x_NBITER_NF11,          0x3a },
 393         { STV090x_NBITER_NF12,          0x29 },
 394         { STV090x_NBITER_NF13,          0x37 },
 395         { STV090x_NBITER_NF14,          0x33 },
 396         { STV090x_NBITER_NF15,          0x2f },
 397         { STV090x_NBITER_NF16,          0x39 },
 398         { STV090x_NBITER_NF17,          0x3a },
 399         { STV090x_NBITERNOERR,          0x04 },
 400         { STV090x_GAINLLR_NF4,          0x0C },
 401         { STV090x_GAINLLR_NF5,          0x0F },
 402         { STV090x_GAINLLR_NF6,          0x11 },
 403         { STV090x_GAINLLR_NF7,          0x14 },
 404         { STV090x_GAINLLR_NF8,          0x17 },
 405         { STV090x_GAINLLR_NF9,          0x19 },
 406         { STV090x_GAINLLR_NF10,         0x20 },
 407         { STV090x_GAINLLR_NF11,         0x21 },
 408         { STV090x_GAINLLR_NF12,         0x0D },
 409         { STV090x_GAINLLR_NF13,         0x0F },
 410         { STV090x_GAINLLR_NF14,         0x13 },
 411         { STV090x_GAINLLR_NF15,         0x1A },
 412         { STV090x_GAINLLR_NF16,         0x1F },
 413         { STV090x_GAINLLR_NF17,         0x21 },
 414         { STV090x_RCCFGH,               0x20 },
 415         { STV090x_P1_FECM,              0x01 }, /* disable DSS modes */
 416         { STV090x_P2_FECM,              0x01 }, /* disable DSS modes */
 417         { STV090x_P1_PRVIT,             0x2F }, /* disable PR 6/7 */
 418         { STV090x_P2_PRVIT,             0x2F }, /* disable PR 6/7 */
 419 };
 420
 421 static struct stv090x_reg stv0903_initval[] = {
 422         { STV090x_OUTCFG,               0x00 },
 423         { STV090x_AGCRF1CFG,            0x11 },
 424         { STV090x_STOPCLK1,             0x48 },
 425         { STV090x_STOPCLK2,             0x14 },
 426         { STV090x_TSTTNR1,              0x27 },
 427         { STV090x_TSTTNR2,              0x21 },
 428         { STV090x_P1_DISTXCTL,          0x22 },
 429         { STV090x_P1_F22TX,             0xc0 },
 430         { STV090x_P1_F22RX,             0xc0 },
 431         { STV090x_P1_DISRXCTL,          0x00 },
 432         { STV090x_P1_DMDCFGMD,          0xF9 },
 433         { STV090x_P1_DEMOD,             0x08 },
 434         { STV090x_P1_DMDCFG3,           0xc4 },
 435         { STV090x_P1_CARFREQ,           0xed },
 436         { STV090x_P1_TNRCFG2,           0x82 },
 437         { STV090x_P1_LDT,               0xd0 },
 438         { STV090x_P1_LDT2,              0xb8 },
 439         { STV090x_P1_TMGCFG,            0xd2 },
 440         { STV090x_P1_TMGTHRISE,         0x20 },
 441         { STV090x_P1_TMGTHFALL,         0x00 },
 442         { STV090x_P1_SFRUPRATIO,        0xf0 },
 443         { STV090x_P1_SFRLOWRATIO,       0x70 },
 444         { STV090x_P1_TSCFGL,            0x20 },
 445         { STV090x_P1_FECSPY,            0x88 },
 446         { STV090x_P1_FSPYDATA,          0x3a },
 447         { STV090x_P1_FBERCPT4,          0x00 },
 448         { STV090x_P1_FSPYBER,           0x10 },
 449         { STV090x_P1_ERRCTRL1,          0x35 },
 450         { STV090x_P1_ERRCTRL2,          0xc1 },
 451         { STV090x_P1_CFRICFG,           0xf8 },
 452         { STV090x_P1_NOSCFG,            0x1c },
 453         { STV090x_P1_DMDTOM,            0x20 },
 454         { STV090x_P1_CORRELMANT,        0x70 },
 455         { STV090x_P1_CORRELABS,         0x88 },
 456         { STV090x_P1_AGC2O,             0x5b },
 457         { STV090x_P1_AGC2REF,           0x38 },
 458         { STV090x_P1_CARCFG,            0xe4 },
 459         { STV090x_P1_ACLC,              0x1A },
 460         { STV090x_P1_BCLC,              0x09 },
 461         { STV090x_P1_CARHDR,            0x08 },
 462         { STV090x_P1_KREFTMG,           0xc1 },
 463         { STV090x_P1_SFRSTEP,           0x58 },
 464         { STV090x_P1_TMGCFG2,           0x01 },
 465         { STV090x_P1_CAR2CFG,           0x26 },
 466         { STV090x_P1_BCLC2S2Q,          0x86 },
 467         { STV090x_P1_BCLC2S28,          0x86 },
 468         { STV090x_P1_SMAPCOEF7,         0x77 },
 469         { STV090x_P1_SMAPCOEF6,         0x85 },
 470         { STV090x_P1_SMAPCOEF5,         0x77 },
 471         { STV090x_P1_DMDCFG2,           0x3b },
 472         { STV090x_P1_MODCODLST0,        0xff },
 473         { STV090x_P1_MODCODLST1,        0xff },
 474         { STV090x_P1_MODCODLST2,        0xff },
 475         { STV090x_P1_MODCODLST3,        0xff },
 476         { STV090x_P1_MODCODLST4,        0xff },
 477         { STV090x_P1_MODCODLST5,        0xff },
 478         { STV090x_P1_MODCODLST6,        0xff },
 479         { STV090x_P1_MODCODLST7,        0xcc },
 480         { STV090x_P1_MODCODLST8,        0xcc },
 481         { STV090x_P1_MODCODLST9,        0xcc },
 482         { STV090x_P1_MODCODLSTA,        0xcc },
 483         { STV090x_P1_MODCODLSTB,        0xcc },
 484         { STV090x_P1_MODCODLSTC,        0xcc },
 485         { STV090x_P1_MODCODLSTD,        0xcc },
 486         { STV090x_P1_MODCODLSTE,        0xcc },
 487         { STV090x_P1_MODCODLSTF,        0xcf },
 488         { STV090x_GENCFG,               0x1c },
 489         { STV090x_NBITER_NF4,           0x37 },
 490         { STV090x_NBITER_NF5,           0x29 },
 491         { STV090x_NBITER_NF6,           0x37 },
 492         { STV090x_NBITER_NF7,           0x33 },
 493         { STV090x_NBITER_NF8,           0x31 },
 494         { STV090x_NBITER_NF9,           0x2f },
 495         { STV090x_NBITER_NF10,          0x39 },
 496         { STV090x_NBITER_NF11,          0x3a },
 497         { STV090x_NBITER_NF12,          0x29 },
 498         { STV090x_NBITER_NF13,          0x37 },
 499         { STV090x_NBITER_NF14,          0x33 },
 500         { STV090x_NBITER_NF15,          0x2f },
 501         { STV090x_NBITER_NF16,          0x39 },
 502         { STV090x_NBITER_NF17,          0x3a },
 503         { STV090x_NBITERNOERR,          0x04 },
 504         { STV090x_GAINLLR_NF4,          0x0C },
 505         { STV090x_GAINLLR_NF5,          0x0F },
 506         { STV090x_GAINLLR_NF6,          0x11 },
 507         { STV090x_GAINLLR_NF7,          0x14 },
 508         { STV090x_GAINLLR_NF8,          0x17 },
 509         { STV090x_GAINLLR_NF9,          0x19 },
 510         { STV090x_GAINLLR_NF10,         0x20 },
 511         { STV090x_GAINLLR_NF11,         0x21 },
 512         { STV090x_GAINLLR_NF12,         0x0D },
 513         { STV090x_GAINLLR_NF13,         0x0F },
 514         { STV090x_GAINLLR_NF14,         0x13 },
 515         { STV090x_GAINLLR_NF15,         0x1A },
 516         { STV090x_GAINLLR_NF16,         0x1F },
 517         { STV090x_GAINLLR_NF17,         0x21 },
 518         { STV090x_RCCFGH,               0x20 },
 519         { STV090x_P1_FECM,              0x01 }, /*disable the DSS mode */
 520         { STV090x_P1_PRVIT,             0x2f }  /*disable puncture rate 6/7*/
 521 };
 522
 523 static struct stv090x_reg stv0900_cut20_val[] = {
 524
 525         { STV090x_P2_DMDCFG3,           0xe8 },
 526         { STV090x_P2_DMDCFG4,           0x10 },
 527         { STV090x_P2_CARFREQ,           0x38 },
 528         { STV090x_P2_CARHDR,            0x20 },
 529         { STV090x_P2_KREFTMG,           0x5a },
 530         { STV090x_P2_SMAPCOEF7,         0x06 },
 531         { STV090x_P2_SMAPCOEF6,         0x00 },
 532         { STV090x_P2_SMAPCOEF5,         0x04 },
 533         { STV090x_P2_NOSCFG,            0x0c },
 534         { STV090x_P1_DMDCFG3,           0xe8 },
 535         { STV090x_P1_DMDCFG4,           0x10 },
 536         { STV090x_P1_CARFREQ,           0x38 },
 537         { STV090x_P1_CARHDR,            0x20 },
 538         { STV090x_P1_KREFTMG,           0x5a },
 539         { STV090x_P1_SMAPCOEF7,         0x06 },
 540         { STV090x_P1_SMAPCOEF6,         0x00 },
 541         { STV090x_P1_SMAPCOEF5,         0x04 },
 542         { STV090x_P1_NOSCFG,            0x0c },
 543         { STV090x_GAINLLR_NF4,          0x21 },
 544         { STV090x_GAINLLR_NF5,          0x21 },
 545         { STV090x_GAINLLR_NF6,          0x20 },
 546         { STV090x_GAINLLR_NF7,          0x1F },
 547         { STV090x_GAINLLR_NF8,          0x1E },
 548         { STV090x_GAINLLR_NF9,          0x1E },
 549         { STV090x_GAINLLR_NF10,         0x1D },
 550         { STV090x_GAINLLR_NF11,         0x1B },
 551         { STV090x_GAINLLR_NF12,         0x20 },
 552         { STV090x_GAINLLR_NF13,         0x20 },
 553         { STV090x_GAINLLR_NF14,         0x20 },
 554         { STV090x_GAINLLR_NF15,         0x20 },
 555         { STV090x_GAINLLR_NF16,         0x20 },
 556         { STV090x_GAINLLR_NF17,         0x21 },
 557 };
 558
 559 static struct stv090x_reg stv0903_cut20_val[] = {
 560         { STV090x_P1_DMDCFG3,           0xe8 },
 561         { STV090x_P1_DMDCFG4,           0x10 },
 562         { STV090x_P1_CARFREQ,           0x38 },
 563         { STV090x_P1_CARHDR,            0x20 },
 564         { STV090x_P1_KREFTMG,           0x5a },
 565         { STV090x_P1_SMAPCOEF7,         0x06 },
 566         { STV090x_P1_SMAPCOEF6,         0x00 },
 567         { STV090x_P1_SMAPCOEF5,         0x04 },
 568         { STV090x_P1_NOSCFG,            0x0c },
 569         { STV090x_GAINLLR_NF4,          0x21 },
 570         { STV090x_GAINLLR_NF5,          0x21 },
 571         { STV090x_GAINLLR_NF6,          0x20 },
 572         { STV090x_GAINLLR_NF7,          0x1F },
 573         { STV090x_GAINLLR_NF8,          0x1E },
 574         { STV090x_GAINLLR_NF9,          0x1E },
 575         { STV090x_GAINLLR_NF10,         0x1D },
 576         { STV090x_GAINLLR_NF11,         0x1B },
 577         { STV090x_GAINLLR_NF12,         0x20 },
 578         { STV090x_GAINLLR_NF13,         0x20 },
 579         { STV090x_GAINLLR_NF14,         0x20 },
 580         { STV090x_GAINLLR_NF15,         0x20 },
 581         { STV090x_GAINLLR_NF16,         0x20 },
 582         { STV090x_GAINLLR_NF17,         0x21 }
 583 };
 584
 585 /* Cut 2.0 Long Frame Tracking CR loop */
 586 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
 587         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 588         { STV090x_QPSK_12,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
 589         { STV090x_QPSK_35,  0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
 590         { STV090x_QPSK_23,  0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
 591         { STV090x_QPSK_34,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 592         { STV090x_QPSK_45,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 593         { STV090x_QPSK_56,  0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 594         { STV090x_QPSK_89,  0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 595         { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
 596         { STV090x_8PSK_35,  0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
 597         { STV090x_8PSK_23,  0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
 598         { STV090x_8PSK_34,  0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
 599         { STV090x_8PSK_56,  0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
 600         { STV090x_8PSK_89,  0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
 601         { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
 602 };
 603
 604 /* Cut 3.0 Long Frame Tracking CR loop */
 605 static  struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
 606         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 607         { STV090x_QPSK_12,  0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
 608         { STV090x_QPSK_35,  0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 609         { STV090x_QPSK_23,  0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 610         { STV090x_QPSK_34,  0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
 611         { STV090x_QPSK_45,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 612         { STV090x_QPSK_56,  0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 613         { STV090x_QPSK_89,  0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 614         { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
 615         { STV090x_8PSK_35,  0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
 616         { STV090x_8PSK_23,  0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
 617         { STV090x_8PSK_34,  0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
 618         { STV090x_8PSK_56,  0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
 619         { STV090x_8PSK_89,  0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
 620         { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
 621 };
 622
 623 /* Cut 2.0 Long Frame Tracking CR Loop */
 624 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
 625         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 626         { STV090x_16APSK_23,  0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
 627         { STV090x_16APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
 628         { STV090x_16APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 629         { STV090x_16APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
 630         { STV090x_16APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 631         { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
 632         { STV090x_32APSK_34,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 633         { STV090x_32APSK_45,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 634         { STV090x_32APSK_56,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 635         { STV090x_32APSK_89,  0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
 636         { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
 637 };
 638
 639 /* Cut 3.0 Long Frame Tracking CR Loop */
 640 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
 641         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 642         { STV090x_16APSK_23,  0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
 643         { STV090x_16APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
 644         { STV090x_16APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 645         { STV090x_16APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
 646         { STV090x_16APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 647         { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
 648         { STV090x_32APSK_34,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 649         { STV090x_32APSK_45,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 650         { STV090x_32APSK_56,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 651         { STV090x_32APSK_89,  0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
 652         { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
 653 };
 654
 655 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
 656         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 657         { STV090x_QPSK_14,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
 658         { STV090x_QPSK_13,  0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
 659         { STV090x_QPSK_25,  0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
 660 };
 661
 662 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
 663         /* MODCOD  2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
 664         { STV090x_QPSK_14,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
 665         { STV090x_QPSK_13,  0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
 666         { STV090x_QPSK_25,  0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
 667 };
 668
 669 /* Cut 2.0 Short Frame Tracking CR Loop */
 670 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
 671         /* MODCOD         2M    5M    10M   20M   30M */
 672         { STV090x_QPSK,   0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
 673         { STV090x_8PSK,   0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
 674         { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
 675         { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
 676 };
 677
 678 /* Cut 3.0 Short Frame Tracking CR Loop */
 679 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
 680         /* MODCOD         2M    5M    10M   20M   30M */
 681         { STV090x_QPSK,   0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
 682         { STV090x_8PSK,   0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
 683         { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
 684         { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
 685 };
 686
 687 static inline s32 comp2(s32 __x, s32 __width)
 688 {
 689         if (__width == 32)
 690                 return __x;
 691         else
 692                 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
 693 }
 694
 695 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
 696 {
 697         const struct stv090x_config *config = state->config;
 698         int ret;
 699
 700         u8 b0[] = { reg >> 8, reg & 0xff };
 701         u8 buf;
 702
 703         struct i2c_msg msg[] = {
 704                 { .addr = config->address, .flags       = 0,            .buf = b0,   .len = 2 },
 705                 { .addr = config->address, .flags       = I2C_M_RD,     .buf = &buf, .len = 1 }
 706         };
 707
 708         ret = i2c_transfer(state->i2c, msg, 2);
 709         if (ret != 2) {
 710                 if (ret != -ERESTARTSYS)
 711                         dprintk(FE_ERROR, 1,
 712                                 "Read error, Reg=[0x%02x], Status=%d",
 713                                 reg, ret);
 714
 715                 return ret < 0 ? ret : -EREMOTEIO;
 716         }
 717         if (unlikely(*state->verbose >= FE_DEBUGREG))
 718                 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
 719                         reg, buf);
 720
 721         return (unsigned int) buf;
 722 }
 723
 724 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
 725 {
 726         const struct stv090x_config *config = state->config;
 727         int ret;
 728         u8 buf[MAX_XFER_SIZE];
 729         struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
 730
 731         if (2 + count > sizeof(buf)) {
 732                 printk(KERN_WARNING
 733                        "%s: i2c wr reg=%04x: len=%d is too big!\n",
 734                        KBUILD_MODNAME, reg, count);
 735                 return -EINVAL;
 736         }
 737
 738         buf[0] = reg >> 8;
 739         buf[1] = reg & 0xff;
 740         memcpy(&buf[2], data, count);
 741
 742         dprintk(FE_DEBUGREG, 1, "%s [0x%04x]: %*ph",
 743                 __func__, reg, count, data);
 744
 745         ret = i2c_transfer(state->i2c, &i2c_msg, 1);
 746         if (ret != 1) {
 747                 if (ret != -ERESTARTSYS)
 748                         dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
 749                                 reg, data[0], count, ret);
 750                 return ret < 0 ? ret : -EREMOTEIO;
 751         }
 752
 753         return 0;
 754 }
 755
 756 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
 757 {
 758         u8 tmp = data; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
 759
 760         return stv090x_write_regs(state, reg, &tmp, 1);
 761 }
 762
 763 static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
 764 {
 765         u32 reg;
 766
 767         /*
 768          * NOTE! A lock is used as a FSM to control the state in which
 769          * access is serialized between two tuners on the same demod.
 770          * This has nothing to do with a lock to protect a critical section
 771          * which may in some other cases be confused with protecting I/O
 772          * access to the demodulator gate.
 773          * In case of any error, the lock is unlocked and exit within the
 774          * relevant operations themselves.
 775          */
 776         if (enable) {
 777                 if (state->config->tuner_i2c_lock)
 778                         state->config->tuner_i2c_lock(&state->frontend, 1);
 779                 else
 780                         mutex_lock(&state->internal->tuner_lock);
 781         }
 782
 783         reg = STV090x_READ_DEMOD(state, I2CRPT);
 784         if (enable) {
 785                 dprintk(FE_DEBUG, 1, "Enable Gate");
 786                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
 787                 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
 788                         goto err;
 789
 790         } else {
 791                 dprintk(FE_DEBUG, 1, "Disable Gate");
 792                 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
 793                 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
 794                         goto err;
 795         }
 796
 797         if (!enable) {
 798                 if (state->config->tuner_i2c_lock)
 799                         state->config->tuner_i2c_lock(&state->frontend, 0);
 800                 else
 801                         mutex_unlock(&state->internal->tuner_lock);
 802         }
 803
 804         return 0;
 805 err:
 806         dprintk(FE_ERROR, 1, "I/O error");
 807         if (state->config->tuner_i2c_lock)
 808                 state->config->tuner_i2c_lock(&state->frontend, 0);
 809         else
 810                 mutex_unlock(&state->internal->tuner_lock);
 811         return -1;
 812 }
 813
 814 static void stv090x_get_lock_tmg(struct stv090x_state *state)
 815 {
 816         switch (state->algo) {
 817         case STV090x_BLIND_SEARCH:
 818                 dprintk(FE_DEBUG, 1, "Blind Search");
 819                 if (state->srate <= 1500000) {  /*10Msps< SR <=15Msps*/
 820                         state->DemodTimeout = 1500;
 821                         state->FecTimeout = 400;
 822                 } else if (state->srate <= 5000000) {  /*10Msps< SR <=15Msps*/
 823                         state->DemodTimeout = 1000;
 824                         state->FecTimeout = 300;
 825                 } else {  /*SR >20Msps*/
 826                         state->DemodTimeout = 700;
 827                         state->FecTimeout = 100;
 828                 }
 829                 break;
 830
 831         case STV090x_COLD_SEARCH:
 832         case STV090x_WARM_SEARCH:
 833         default:
 834                 dprintk(FE_DEBUG, 1, "Normal Search");
 835                 if (state->srate <= 1000000) {  /*SR <=1Msps*/
 836                         state->DemodTimeout = 4500;
 837                         state->FecTimeout = 1700;
 838                 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
 839                         state->DemodTimeout = 2500;
 840                         state->FecTimeout = 1100;
 841                 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
 842                         state->DemodTimeout = 1000;
 843                         state->FecTimeout = 550;
 844                 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
 845                         state->DemodTimeout = 700;
 846                         state->FecTimeout = 250;
 847                 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
 848                         state->DemodTimeout = 400;
 849                         state->FecTimeout = 130;
 850                 } else {   /*SR >20Msps*/
 851                         state->DemodTimeout = 300;
 852                         state->FecTimeout = 100;
 853                 }
 854                 break;
 855         }
 856
 857         if (state->algo == STV090x_WARM_SEARCH)
 858                 state->DemodTimeout /= 2;
 859 }
 860
 861 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
 862 {
 863         u32 sym;
 864
 865         if (srate > 60000000) {
 866                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 867                 sym /= (state->internal->mclk >> 12);
 868         } else if (srate > 6000000) {
 869                 sym  = (srate << 6);
 870                 sym /= (state->internal->mclk >> 10);
 871         } else {
 872                 sym  = (srate << 9);
 873                 sym /= (state->internal->mclk >> 7);
 874         }
 875
 876         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
 877                 goto err;
 878         if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
 879                 goto err;
 880
 881         return 0;
 882 err:
 883         dprintk(FE_ERROR, 1, "I/O error");
 884         return -1;
 885 }
 886
 887 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
 888 {
 889         u32 sym;
 890
 891         srate = 105 * (srate / 100);
 892         if (srate > 60000000) {
 893                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 894                 sym /= (state->internal->mclk >> 12);
 895         } else if (srate > 6000000) {
 896                 sym  = (srate << 6);
 897                 sym /= (state->internal->mclk >> 10);
 898         } else {
 899                 sym  = (srate << 9);
 900                 sym /= (state->internal->mclk >> 7);
 901         }
 902
 903         if (sym < 0x7fff) {
 904                 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
 905                         goto err;
 906                 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
 907                         goto err;
 908         } else {
 909                 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
 910                         goto err;
 911                 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
 912                         goto err;
 913         }
 914
 915         return 0;
 916 err:
 917         dprintk(FE_ERROR, 1, "I/O error");
 918         return -1;
 919 }
 920
 921 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
 922 {
 923         u32 sym;
 924
 925         srate = 95 * (srate / 100);
 926         if (srate > 60000000) {
 927                 sym  = (srate << 4); /* SR * 2^16 / master_clk */
 928                 sym /= (state->internal->mclk >> 12);
 929         } else if (srate > 6000000) {
 930                 sym  = (srate << 6);
 931                 sym /= (state->internal->mclk >> 10);
 932         } else {
 933                 sym  = (srate << 9);
 934                 sym /= (state->internal->mclk >> 7);
 935         }
 936
 937         if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
 938                 goto err;
 939         if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
 940                 goto err;
 941         return 0;
 942 err:
 943         dprintk(FE_ERROR, 1, "I/O error");
 944         return -1;
 945 }
 946
 947 static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
 948 {
 949         u32 ro;
 950
 951         switch (rolloff) {
 952         case STV090x_RO_20:
 953                 ro = 20;
 954                 break;
 955         case STV090x_RO_25:
 956                 ro = 25;
 957                 break;
 958         case STV090x_RO_35:
 959         default:
 960                 ro = 35;
 961                 break;
 962         }
 963
 964         return srate + (srate * ro) / 100;
 965 }
 966
 967 static int stv090x_set_vit_thacq(struct stv090x_state *state)
 968 {
 969         if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
 970                 goto err;
 971         if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
 972                 goto err;
 973         if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
 974                 goto err;
 975         if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
 976                 goto err;
 977         if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
 978                 goto err;
 979         if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
 980                 goto err;
 981         return 0;
 982 err:
 983         dprintk(FE_ERROR, 1, "I/O error");
 984         return -1;
 985 }
 986
 987 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
 988 {
 989         if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
 990                 goto err;
 991         if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
 992                 goto err;
 993         if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
 994                 goto err;
 995         if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
 996                 goto err;
 997         if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
 998                 goto err;
 999         if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
1000                 goto err;
1001         return 0;
1002 err:
1003         dprintk(FE_ERROR, 1, "I/O error");
1004         return -1;
1005 }
1006
1007 static int stv090x_set_viterbi(struct stv090x_state *state)
1008 {
1009         switch (state->search_mode) {
1010         case STV090x_SEARCH_AUTO:
1011                 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
1012                         goto err;
1013                 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
1014                         goto err;
1015                 break;
1016         case STV090x_SEARCH_DVBS1:
1017                 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
1018                         goto err;
1019                 switch (state->fec) {
1020                 case STV090x_PR12:
1021                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1022                                 goto err;
1023                         break;
1024
1025                 case STV090x_PR23:
1026                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1027                                 goto err;
1028                         break;
1029
1030                 case STV090x_PR34:
1031                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
1032                                 goto err;
1033                         break;
1034
1035                 case STV090x_PR56:
1036                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
1037                                 goto err;
1038                         break;
1039
1040                 case STV090x_PR78:
1041                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
1042                                 goto err;
1043                         break;
1044
1045                 default:
1046                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
1047                                 goto err;
1048                         break;
1049                 }
1050                 break;
1051         case STV090x_SEARCH_DSS:
1052                 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
1053                         goto err;
1054                 switch (state->fec) {
1055                 case STV090x_PR12:
1056                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1057                                 goto err;
1058                         break;
1059
1060                 case STV090x_PR23:
1061                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1062                                 goto err;
1063                         break;
1064
1065                 case STV090x_PR67:
1066                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
1067                                 goto err;
1068                         break;
1069
1070                 default:
1071                         if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
1072                                 goto err;
1073                         break;
1074                 }
1075                 break;
1076         default:
1077                 break;
1078         }
1079         return 0;
1080 err:
1081         dprintk(FE_ERROR, 1, "I/O error");
1082         return -1;
1083 }
1084
1085 static int stv090x_stop_modcod(struct stv090x_state *state)
1086 {
1087         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1088                 goto err;
1089         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
1090                 goto err;
1091         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
1092                 goto err;
1093         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
1094                 goto err;
1095         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
1096                 goto err;
1097         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
1098                 goto err;
1099         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
1100                 goto err;
1101         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
1102                 goto err;
1103         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
1104                 goto err;
1105         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
1106                 goto err;
1107         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
1108                 goto err;
1109         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1110                 goto err;
1111         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1112                 goto err;
1113         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1114                 goto err;
1115         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1116                 goto err;
1117         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1118                 goto err;
1119         return 0;
1120 err:
1121         dprintk(FE_ERROR, 1, "I/O error");
1122         return -1;
1123 }
1124
1125 static int stv090x_activate_modcod(struct stv090x_state *state)
1126 {
1127         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1128                 goto err;
1129         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1130                 goto err;
1131         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1132                 goto err;
1133         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1134                 goto err;
1135         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1136                 goto err;
1137         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1138                 goto err;
1139         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1140                 goto err;
1141         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1142                 goto err;
1143         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1144                 goto err;
1145         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1146                 goto err;
1147         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1148                 goto err;
1149         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1150                 goto err;
1151         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1152                 goto err;
1153         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1154                 goto err;
1155         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1156                 goto err;
1157         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1158                 goto err;
1159
1160         return 0;
1161 err:
1162         dprintk(FE_ERROR, 1, "I/O error");
1163         return -1;
1164 }
1165
1166 static int stv090x_activate_modcod_single(struct stv090x_state *state)
1167 {
1168
1169         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1170                 goto err;
1171         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1172                 goto err;
1173         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1174                 goto err;
1175         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1176                 goto err;
1177         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1178                 goto err;
1179         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1180                 goto err;
1181         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1182                 goto err;
1183         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1184                 goto err;
1185         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1186                 goto err;
1187         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1188                 goto err;
1189         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1190                 goto err;
1191         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1192                 goto err;
1193         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1194                 goto err;
1195         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1196                 goto err;
1197         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1198                 goto err;
1199         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1200                 goto err;
1201
1202         return 0;
1203
1204 err:
1205         dprintk(FE_ERROR, 1, "I/O error");
1206         return -1;
1207 }
1208
1209 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1210 {
1211         u32 reg;
1212
1213         switch (state->demod) {
1214         case STV090x_DEMODULATOR_0:
1215                 mutex_lock(&state->internal->demod_lock);
1216                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1217                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1218                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1219                         goto err;
1220                 mutex_unlock(&state->internal->demod_lock);
1221                 break;
1222
1223         case STV090x_DEMODULATOR_1:
1224                 mutex_lock(&state->internal->demod_lock);
1225                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1226                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1227                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1228                         goto err;
1229                 mutex_unlock(&state->internal->demod_lock);
1230                 break;
1231
1232         default:
1233                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1234                 break;
1235         }
1236         return 0;
1237 err:
1238         mutex_unlock(&state->internal->demod_lock);
1239         dprintk(FE_ERROR, 1, "I/O error");
1240         return -1;
1241 }
1242
1243 static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1244 {
1245         if (state->internal->dev_ver >= 0x30) {
1246                 /* Set ACLC BCLC optimised value vs SR */
1247                 if (state->srate >= 15000000) {
1248                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1249                                 goto err;
1250                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1251                                 goto err;
1252                 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1253                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1254                                 goto err;
1255                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1256                                 goto err;
1257                 } else if (state->srate < 7000000) {
1258                         if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1259                                 goto err;
1260                         if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1261                                 goto err;
1262                 }
1263
1264         } else {
1265                 /* Cut 2.0 */
1266                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1267                         goto err;
1268                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1269                         goto err;
1270         }
1271         return 0;
1272 err:
1273         dprintk(FE_ERROR, 1, "I/O error");
1274         return -1;
1275 }
1276
1277 static int stv090x_delivery_search(struct stv090x_state *state)
1278 {
1279         u32 reg;
1280
1281         switch (state->search_mode) {
1282         case STV090x_SEARCH_DVBS1:
1283         case STV090x_SEARCH_DSS:
1284                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1285                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1286                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1287                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1288                         goto err;
1289
1290                 /* Activate Viterbi decoder in legacy search,
1291                  * do not use FRESVIT1, might impact VITERBI2
1292                  */
1293                 if (stv090x_vitclk_ctl(state, 0) < 0)
1294                         goto err;
1295
1296                 if (stv090x_dvbs_track_crl(state) < 0)
1297                         goto err;
1298
1299                 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1300                         goto err;
1301
1302                 if (stv090x_set_vit_thacq(state) < 0)
1303                         goto err;
1304                 if (stv090x_set_viterbi(state) < 0)
1305                         goto err;
1306                 break;
1307
1308         case STV090x_SEARCH_DVBS2:
1309                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1310                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1311                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1312                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1313                         goto err;
1314                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1315                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1316                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1317                         goto err;
1318
1319                 if (stv090x_vitclk_ctl(state, 1) < 0)
1320                         goto err;
1321
1322                 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1323                         goto err;
1324                 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1325                         goto err;
1326
1327                 if (state->internal->dev_ver <= 0x20) {
1328                         /* enable S2 carrier loop */
1329                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1330                                 goto err;
1331                 } else {
1332                         /* > Cut 3: Stop carrier 3 */
1333                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1334                                 goto err;
1335                 }
1336
1337                 if (state->demod_mode != STV090x_SINGLE) {
1338                         /* Cut 2: enable link during search */
1339                         if (stv090x_activate_modcod(state) < 0)
1340                                 goto err;
1341                 } else {
1342                         /* Single demodulator
1343                          * Authorize SHORT and LONG frames,
1344                          * QPSK, 8PSK, 16APSK and 32APSK
1345                          */
1346                         if (stv090x_activate_modcod_single(state) < 0)
1347                                 goto err;
1348                 }
1349
1350                 if (stv090x_set_vit_thtracq(state) < 0)
1351                         goto err;
1352                 break;
1353
1354         case STV090x_SEARCH_AUTO:
1355         default:
1356                 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1357                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1358                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1359                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1360                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1361                         goto err;
1362                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1363                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1364                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1365                         goto err;
1366
1367                 if (stv090x_vitclk_ctl(state, 0) < 0)
1368                         goto err;
1369
1370                 if (stv090x_dvbs_track_crl(state) < 0)
1371                         goto err;
1372
1373                 if (state->internal->dev_ver <= 0x20) {
1374                         /* enable S2 carrier loop */
1375                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1376                                 goto err;
1377                 } else {
1378                         /* > Cut 3: Stop carrier 3 */
1379                         if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1380                                 goto err;
1381                 }
1382
1383                 if (state->demod_mode != STV090x_SINGLE) {
1384                         /* Cut 2: enable link during search */
1385                         if (stv090x_activate_modcod(state) < 0)
1386                                 goto err;
1387                 } else {
1388                         /* Single demodulator
1389                          * Authorize SHORT and LONG frames,
1390                          * QPSK, 8PSK, 16APSK and 32APSK
1391                          */
1392                         if (stv090x_activate_modcod_single(state) < 0)
1393                                 goto err;
1394                 }
1395
1396                 if (stv090x_set_vit_thacq(state) < 0)
1397                         goto err;
1398
1399                 if (stv090x_set_viterbi(state) < 0)
1400                         goto err;
1401                 break;
1402         }
1403         return 0;
1404 err:
1405         dprintk(FE_ERROR, 1, "I/O error");
1406         return -1;
1407 }
1408
1409 static int stv090x_start_search(struct stv090x_state *state)
1410 {
1411         u32 reg, freq_abs;
1412         s16 freq;
1413
1414         /* Reset demodulator */
1415         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1416         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1417         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1418                 goto err;
1419
1420         if (state->internal->dev_ver <= 0x20) {
1421                 if (state->srate <= 5000000) {
1422                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1423                                 goto err;
1424                         if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1425                                 goto err;
1426                         if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
1427                                 goto err;
1428                         if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1429                                 goto err;
1430                         if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1431                                 goto err;
1432
1433                         /*enlarge the timing bandwidth for Low SR*/
1434                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1435                                 goto err;
1436                 } else {
1437                         /* If the symbol rate is >5 Msps
1438                         Set The carrier search up and low to auto mode */
1439                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1440                                 goto err;
1441                         /*reduce the timing bandwidth for high SR*/
1442                         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1443                                 goto err;
1444                 }
1445         } else {
1446                 /* >= Cut 3 */
1447                 if (state->srate <= 5000000) {
1448                         /* enlarge the timing bandwidth for Low SR */
1449                         STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1450                 } else {
1451                         /* reduce timing bandwidth for high SR */
1452                         STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1453                 }
1454
1455                 /* Set CFR min and max to manual mode */
1456                 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1457
1458                 if (state->algo == STV090x_WARM_SEARCH) {
1459                         /* WARM Start
1460                          * CFR min = -1MHz,
1461                          * CFR max = +1MHz
1462                          */
1463                         freq_abs  = 1000 << 16;
1464                         freq_abs /= (state->internal->mclk / 1000);
1465                         freq      = (s16) freq_abs;
1466                 } else {
1467                         /* COLD Start
1468                          * CFR min =- (SearchRange / 2 + 600KHz)
1469                          * CFR max = +(SearchRange / 2 + 600KHz)
1470                          * (600KHz for the tuner step size)
1471                          */
1472                         freq_abs  = (state->search_range / 2000) + 600;
1473                         freq_abs  = freq_abs << 16;
1474                         freq_abs /= (state->internal->mclk / 1000);
1475                         freq      = (s16) freq_abs;
1476                 }
1477
1478                 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
1479                         goto err;
1480                 if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
1481                         goto err;
1482
1483                 freq *= -1;
1484
1485                 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
1486                         goto err;
1487                 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
1488                         goto err;
1489
1490         }
1491
1492         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1493                 goto err;
1494         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1495                 goto err;
1496
1497         if (state->internal->dev_ver >= 0x20) {
1498                 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1499                         goto err;
1500                 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1501                         goto err;
1502
1503                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
1504                         (state->search_mode == STV090x_SEARCH_DSS)      ||
1505                         (state->search_mode == STV090x_SEARCH_AUTO)) {
1506
1507                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1508                                 goto err;
1509                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1510                                 goto err;
1511                 }
1512         }
1513
1514         if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1515                 goto err;
1516         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1517                 goto err;
1518         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1519                 goto err;
1520
1521         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1522         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1523         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1524         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1525                 goto err;
1526         reg = STV090x_READ_DEMOD(state, DMDCFG2);
1527         STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1528         if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1529                 goto err;
1530
1531         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1532                 goto err;
1533
1534         if (state->internal->dev_ver >= 0x20) {
1535                 /*Frequency offset detector setting*/
1536                 if (state->srate < 2000000) {
1537                         if (state->internal->dev_ver <= 0x20) {
1538                                 /* Cut 2 */
1539                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1540                                         goto err;
1541                         } else {
1542                                 /* Cut 3 */
1543                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1544                                         goto err;
1545                         }
1546                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1547                                 goto err;
1548                 } else if (state->srate < 10000000) {
1549                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1550                                 goto err;
1551                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1552                                 goto err;
1553                 } else {
1554                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1555                                 goto err;
1556                         if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1557                                 goto err;
1558                 }
1559         } else {
1560                 if (state->srate < 10000000) {
1561                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1562                                 goto err;
1563                 } else {
1564                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1565                                 goto err;
1566                 }
1567         }
1568
1569         switch (state->algo) {
1570         case STV090x_WARM_SEARCH:
1571                 /* The symbol rate and the exact
1572                  * carrier Frequency are known
1573                  */
1574                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1575                         goto err;
1576                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1577                         goto err;
1578                 break;
1579
1580         case STV090x_COLD_SEARCH:
1581                 /* The symbol rate is known */
1582                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1583                         goto err;
1584                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1585                         goto err;
1586                 break;
1587
1588         default:
1589                 break;
1590         }
1591         return 0;
1592 err:
1593         dprintk(FE_ERROR, 1, "I/O error");
1594         return -1;
1595 }
1596
1597 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1598 {
1599         u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
1600         s32 i, j, steps, dir;
1601
1602         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1603                 goto err;
1604         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1605         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1606         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1607         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1608                 goto err;
1609
1610         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1611                 goto err;
1612         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1613                 goto err;
1614         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1615                 goto err;
1616         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1617                 goto err;
1618         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1619                 goto err;
1620         if (stv090x_set_srate(state, 1000000) < 0)
1621                 goto err;
1622
1623         steps  = state->search_range / 1000000;
1624         if (steps <= 0)
1625                 steps = 1;
1626
1627         dir = 1;
1628         freq_step = (1000000 * 256) / (state->internal->mclk / 256);
1629         freq_init = 0;
1630
1631         for (i = 0; i < steps; i++) {
1632                 if (dir > 0)
1633                         freq_init = freq_init + (freq_step * i);
1634                 else
1635                         freq_init = freq_init - (freq_step * i);
1636
1637                 dir *= -1;
1638
1639                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1640                         goto err;
1641                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1642                         goto err;
1643                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1644                         goto err;
1645                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1646                         goto err;
1647                 msleep(10);
1648
1649                 agc2 = 0;
1650                 for (j = 0; j < 10; j++) {
1651                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1652                                 STV090x_READ_DEMOD(state, AGC2I0);
1653                 }
1654                 agc2 /= 10;
1655                 if (agc2 < agc2_min)
1656                         agc2_min = agc2;
1657         }
1658
1659         return agc2_min;
1660 err:
1661         dprintk(FE_ERROR, 1, "I/O error");
1662         return -1;
1663 }
1664
1665 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1666 {
1667         u8 r3, r2, r1, r0;
1668         s32 srate, int_1, int_2, tmp_1, tmp_2;
1669
1670         r3 = STV090x_READ_DEMOD(state, SFR3);
1671         r2 = STV090x_READ_DEMOD(state, SFR2);
1672         r1 = STV090x_READ_DEMOD(state, SFR1);
1673         r0 = STV090x_READ_DEMOD(state, SFR0);
1674
1675         srate = ((r3 << 24) | (r2 << 16) | (r1 <<  8) | r0);
1676
1677         int_1 = clk >> 16;
1678         int_2 = srate >> 16;
1679
1680         tmp_1 = clk % 0x10000;
1681         tmp_2 = srate % 0x10000;
1682
1683         srate = (int_1 * int_2) +
1684                 ((int_1 * tmp_2) >> 16) +
1685                 ((int_2 * tmp_1) >> 16);
1686
1687         return srate;
1688 }
1689
1690 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1691 {
1692         struct dvb_frontend *fe = &state->frontend;
1693
1694         int tmg_lock = 0, i;
1695         s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1696         u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1697         u32 agc2th;
1698
1699         if (state->internal->dev_ver >= 0x30)
1700                 agc2th = 0x2e00;
1701         else
1702                 agc2th = 0x1f00;
1703
1704         reg = STV090x_READ_DEMOD(state, DMDISTATE);
1705         STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1706         if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1707                 goto err;
1708         if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1709                 goto err;
1710         if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
1711                 goto err;
1712         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1713                 goto err;
1714         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1715                 goto err;
1716         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1717         STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1718         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1719         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1720                 goto err;
1721
1722         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1723                 goto err;
1724         if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1725                 goto err;
1726         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1727                 goto err;
1728         if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1729                 goto err;
1730         if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1731                 goto err;
1732         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
1733                 goto err;
1734
1735         if (state->internal->dev_ver >= 0x30) {
1736                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1737                         goto err;
1738                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
1739                         goto err;
1740
1741         } else if (state->internal->dev_ver >= 0x20) {
1742                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1743                         goto err;
1744                 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1745                         goto err;
1746         }
1747
1748         if (state->srate <= 2000000)
1749                 car_step = 1000;
1750         else if (state->srate <= 5000000)
1751                 car_step = 2000;
1752         else if (state->srate <= 12000000)
1753                 car_step = 3000;
1754         else
1755                 car_step = 5000;
1756
1757         steps  = -1 + ((state->search_range / 1000) / car_step);
1758         steps /= 2;
1759         steps  = (2 * steps) + 1;
1760         if (steps < 0)
1761                 steps = 1;
1762         else if (steps > 10) {
1763                 steps = 11;
1764                 car_step = (state->search_range / 1000) / 10;
1765         }
1766         cur_step = 0;
1767         dir = 1;
1768         freq = state->frequency;
1769
1770         while ((!tmg_lock) && (cur_step < steps)) {
1771                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1772                         goto err;
1773                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1774                         goto err;
1775                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1776                         goto err;
1777                 if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
1778                         goto err;
1779                 if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
1780                         goto err;
1781                 /* trigger acquisition */
1782                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
1783                         goto err;
1784                 msleep(50);
1785                 for (i = 0; i < 10; i++) {
1786                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1787                         if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1788                                 tmg_cpt++;
1789                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1790                                 STV090x_READ_DEMOD(state, AGC2I0);
1791                 }
1792                 agc2 /= 10;
1793                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1794                 cur_step++;
1795                 dir *= -1;
1796                 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
1797                     (srate_coarse < 50000000) && (srate_coarse > 850000))
1798                         tmg_lock = 1;
1799                 else if (cur_step < steps) {
1800                         if (dir > 0)
1801                                 freq += cur_step * car_step;
1802                         else
1803                                 freq -= cur_step * car_step;
1804
1805                         /* Setup tuner */
1806                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1807                                 goto err;
1808
1809                         if (state->config->tuner_set_frequency) {
1810                                 if (state->config->tuner_set_frequency(fe, freq) < 0)
1811                                         goto err_gateoff;
1812                         }
1813
1814                         if (state->config->tuner_set_bandwidth) {
1815                                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1816                                         goto err_gateoff;
1817                         }
1818
1819                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1820                                 goto err;
1821
1822                         msleep(50);
1823
1824                         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
1825                                 goto err;
1826
1827                         if (state->config->tuner_get_status) {
1828                                 if (state->config->tuner_get_status(fe, &reg) < 0)
1829                                         goto err_gateoff;
1830                         }
1831
1832                         if (reg)
1833                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1834                         else
1835                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1836
1837                         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
1838                                 goto err;
1839
1840                 }
1841         }
1842         if (!tmg_lock)
1843                 srate_coarse = 0;
1844         else
1845                 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1846
1847         return srate_coarse;
1848
1849 err_gateoff:
1850         stv090x_i2c_gate_ctrl(state, 0);
1851 err:
1852         dprintk(FE_ERROR, 1, "I/O error");
1853         return -1;
1854 }
1855
1856 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1857 {
1858         u32 srate_coarse, freq_coarse, sym, reg;
1859
1860         srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1861         freq_coarse  = STV090x_READ_DEMOD(state, CFR2) << 8;
1862         freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1863         sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1864
1865         if (sym < state->srate)
1866                 srate_coarse = 0;
1867         else {
1868                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1869                         goto err;
1870                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
1871                         goto err;
1872                 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1873                         goto err;
1874                 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1875                         goto err;
1876                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1877                         goto err;
1878                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1879                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1880                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1881                         goto err;
1882
1883                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1884                         goto err;
1885
1886                 if (state->internal->dev_ver >= 0x30) {
1887                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1888                                 goto err;
1889                 } else if (state->internal->dev_ver >= 0x20) {
1890                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1891                                 goto err;
1892                 }
1893
1894                 if (srate_coarse > 3000000) {
1895                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1896                         sym  = (sym / 1000) * 65536;
1897                         sym /= (state->internal->mclk / 1000);
1898                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1899                                 goto err;
1900                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1901                                 goto err;
1902                         sym  = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1903                         sym  = (sym / 1000) * 65536;
1904                         sym /= (state->internal->mclk / 1000);
1905                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1906                                 goto err;
1907                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1908                                 goto err;
1909                         sym  = (srate_coarse / 1000) * 65536;
1910                         sym /= (state->internal->mclk / 1000);
1911                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1912                                 goto err;
1913                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1914                                 goto err;
1915                 } else {
1916                         sym  = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1917                         sym  = (sym / 100) * 65536;
1918                         sym /= (state->internal->mclk / 100);
1919                         if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1920                                 goto err;
1921                         if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1922                                 goto err;
1923                         sym  = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1924                         sym  = (sym / 100) * 65536;
1925                         sym /= (state->internal->mclk / 100);
1926                         if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1927                                 goto err;
1928                         if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1929                                 goto err;
1930                         sym  = (srate_coarse / 100) * 65536;
1931                         sym /= (state->internal->mclk / 100);
1932                         if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1933                                 goto err;
1934                         if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1935                                 goto err;
1936                 }
1937                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1938                         goto err;
1939                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1940                         goto err;
1941                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1942                         goto err;
1943                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1944                         goto err;
1945         }
1946
1947         return srate_coarse;
1948
1949 err:
1950         dprintk(FE_ERROR, 1, "I/O error");
1951         return -1;
1952 }
1953
1954 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1955 {
1956         s32 timer = 0, lock = 0;
1957         u32 reg;
1958         u8 stat;
1959
1960         while ((timer < timeout) && (!lock)) {
1961                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1962                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1963
1964                 switch (stat) {
1965                 case 0: /* searching */
1966                 case 1: /* first PLH detected */
1967                 default:
1968                         dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1969                         lock = 0;
1970                         break;
1971                 case 2: /* DVB-S2 mode */
1972                 case 3: /* DVB-S1/legacy mode */
1973                         reg = STV090x_READ_DEMOD(state, DSTATUS);
1974                         lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1975                         break;
1976                 }
1977
1978                 if (!lock)
1979                         msleep(10);
1980                 else
1981                         dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1982
1983                 timer += 10;
1984         }
1985         return lock;
1986 }
1987
1988 static int stv090x_blind_search(struct stv090x_state *state)
1989 {
1990         u32 agc2, reg, srate_coarse;
1991         s32 cpt_fail, agc2_ovflw, i;
1992         u8 k_ref, k_max, k_min;
1993         int coarse_fail = 0;
1994         int lock;
1995
1996         k_max = 110;
1997         k_min = 10;
1998
1999         agc2 = stv090x_get_agc2_min_level(state);
2000
2001         if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
2002                 lock = 0;
2003         } else {
2004
2005                 if (state->internal->dev_ver <= 0x20) {
2006                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
2007                                 goto err;
2008                 } else {
2009                         /* > Cut 3 */
2010                         if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
2011                                 goto err;
2012                 }
2013
2014                 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
2015                         goto err;
2016
2017                 if (state->internal->dev_ver >= 0x20) {
2018                         if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
2019                                 goto err;
2020                         if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
2021                                 goto err;
2022                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
2023                                 goto err;
2024                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
2025                                 goto err;
2026                 }
2027
2028                 k_ref = k_max;
2029                 do {
2030                         if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
2031                                 goto err;
2032                         if (stv090x_srate_srch_coarse(state) != 0) {
2033                                 srate_coarse = stv090x_srate_srch_fine(state);
2034                                 if (srate_coarse != 0) {
2035                                         stv090x_get_lock_tmg(state);
2036                                         lock = stv090x_get_dmdlock(state,
2037                                                         state->DemodTimeout);
2038                                 } else {
2039                                         lock = 0;
2040                                 }
2041                         } else {
2042                                 cpt_fail = 0;
2043                                 agc2_ovflw = 0;
2044                                 for (i = 0; i < 10; i++) {
2045                                         agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
2046                                                 STV090x_READ_DEMOD(state, AGC2I0);
2047                                         if (agc2 >= 0xff00)
2048                                                 agc2_ovflw++;
2049                                         reg = STV090x_READ_DEMOD(state, DSTATUS2);
2050                                         if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
2051                                             (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
2052
2053                                                 cpt_fail++;
2054                                 }
2055                                 if ((cpt_fail > 7) || (agc2_ovflw > 7))
2056                                         coarse_fail = 1;
2057
2058                                 lock = 0;
2059                         }
2060                         k_ref -= 20;
2061                 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
2062         }
2063
2064         return lock;
2065
2066 err:
2067         dprintk(FE_ERROR, 1, "I/O error");
2068         return -1;
2069 }
2070
2071 static int stv090x_chk_tmg(struct stv090x_state *state)
2072 {
2073         u32 reg;
2074         s32 tmg_cpt = 0, i;
2075         u8 freq, tmg_thh, tmg_thl;
2076         int tmg_lock = 0;
2077
2078         freq = STV090x_READ_DEMOD(state, CARFREQ);
2079         tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
2080         tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
2081         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
2082                 goto err;
2083         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
2084                 goto err;
2085
2086         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2087         STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
2088         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2089                 goto err;
2090         if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
2091                 goto err;
2092
2093         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
2094                 goto err;
2095         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
2096                 goto err;
2097
2098         if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
2099                 goto err;
2100         if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2101                 goto err;
2102         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
2103                 goto err;
2104
2105         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
2106                 goto err;
2107         msleep(10);
2108
2109         for (i = 0; i < 10; i++) {
2110                 reg = STV090x_READ_DEMOD(state, DSTATUS);
2111                 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
2112                         tmg_cpt++;
2113                 msleep(1);
2114         }
2115         if (tmg_cpt >= 3)
2116                 tmg_lock = 1;
2117
2118         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2119                 goto err;
2120         if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
2121                 goto err;
2122         if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
2123                 goto err;
2124
2125         if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
2126                 goto err;
2127         if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
2128                 goto err;
2129         if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
2130                 goto err;
2131
2132         return  tmg_lock;
2133
2134 err:
2135         dprintk(FE_ERROR, 1, "I/O error");
2136         return -1;
2137 }
2138
2139 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2140 {
2141         struct dvb_frontend *fe = &state->frontend;
2142
2143         u32 reg;
2144         s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2145         int lock;
2146
2147         if (state->srate >= 10000000)
2148                 timeout_lock = timeout_dmd / 3;
2149         else
2150                 timeout_lock = timeout_dmd / 2;
2151
2152         lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2153         if (lock)
2154                 return lock;
2155
2156         if (state->srate >= 10000000) {
2157                 if (stv090x_chk_tmg(state)) {
2158                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2159                                 goto err;
2160                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2161                                 goto err;
2162                         return stv090x_get_dmdlock(state, timeout_dmd);
2163                 }
2164                 return 0;
2165         }
2166
2167         if (state->srate <= 4000000)
2168                 car_step = 1000;
2169         else if (state->srate <= 7000000)
2170                 car_step = 2000;
2171         else if (state->srate <= 10000000)
2172                 car_step = 3000;
2173         else
2174                 car_step = 5000;
2175
2176         steps  = (state->search_range / 1000) / car_step;
2177         steps /= 2;
2178         steps  = 2 * (steps + 1);
2179         if (steps < 0)
2180                 steps = 2;
2181         else if (steps > 12)
2182                 steps = 12;
2183
2184         cur_step = 1;
2185         dir = 1;
2186
2187         freq = state->frequency;
2188         state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2189         while ((cur_step <= steps) && (!lock)) {
2190                 if (dir > 0)
2191                         freq += cur_step * car_step;
2192                 else
2193                         freq -= cur_step * car_step;
2194
2195                 /* Setup tuner */
2196                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2197                         goto err;
2198
2199                 if (state->config->tuner_set_frequency) {
2200                         if (state->config->tuner_set_frequency(fe, freq) < 0)
2201                                 goto err_gateoff;
2202                 }
2203
2204                 if (state->config->tuner_set_bandwidth) {
2205                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2206                                 goto err_gateoff;
2207                 }
2208
2209                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2210                         goto err;
2211
2212                 msleep(50);
2213
2214                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2215                         goto err;
2216
2217                 if (state->config->tuner_get_status) {
2218                         if (state->config->tuner_get_status(fe, &reg) < 0)
2219                                 goto err_gateoff;
2220                         if (reg)
2221                                 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2222                         else
2223                                 dprintk(FE_DEBUG, 1, "Tuner unlocked");
2224                 }
2225
2226                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2227                         goto err;
2228
2229                 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
2230                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2231                         goto err;
2232                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2233                         goto err;
2234                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2235                         goto err;
2236                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2237                         goto err;
2238                 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2239
2240                 dir *= -1;
2241                 cur_step++;
2242         }
2243
2244         return lock;
2245
2246 err_gateoff:
2247         stv090x_i2c_gate_ctrl(state, 0);
2248 err:
2249         dprintk(FE_ERROR, 1, "I/O error");
2250         return -1;
2251 }
2252
2253 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2254 {
2255         s32 timeout, inc, steps_max, srate, car_max;
2256
2257         srate = state->srate;
2258         car_max = state->search_range / 1000;
2259         car_max += car_max / 10;
2260         car_max  = 65536 * (car_max / 2);
2261         car_max /= (state->internal->mclk / 1000);
2262
2263         if (car_max > 0x4000)
2264                 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2265
2266         inc  = srate;
2267         inc /= state->internal->mclk / 1000;
2268         inc *= 256;
2269         inc *= 256;
2270         inc /= 1000;
2271
2272         switch (state->search_mode) {
2273         case STV090x_SEARCH_DVBS1:
2274         case STV090x_SEARCH_DSS:
2275                 inc *= 3; /* freq step = 3% of srate */
2276                 timeout = 20;
2277                 break;
2278
2279         case STV090x_SEARCH_DVBS2:
2280                 inc *= 4;
2281                 timeout = 25;
2282                 break;
2283
2284         case STV090x_SEARCH_AUTO:
2285         default:
2286                 inc *= 3;
2287                 timeout = 25;
2288                 break;
2289         }
2290         inc /= 100;
2291         if ((inc > car_max) || (inc < 0))
2292                 inc = car_max / 2; /* increment <= 1/8 Mclk */
2293
2294         timeout *= 27500; /* 27.5 Msps reference */
2295         if (srate > 0)
2296                 timeout /= (srate / 1000);
2297
2298         if ((timeout > 100) || (timeout < 0))
2299                 timeout = 100;
2300
2301         steps_max = (car_max / inc) + 1; /* min steps = 3 */
2302         if ((steps_max > 100) || (steps_max < 0)) {
2303                 steps_max = 100; /* max steps <= 100 */
2304                 inc = car_max / steps_max;
2305         }
2306         *freq_inc = inc;
2307         *timeout_sw = timeout;
2308         *steps = steps_max;
2309
2310         return 0;
2311 }
2312
2313 static int stv090x_chk_signal(struct stv090x_state *state)
2314 {
2315         s32 offst_car, agc2, car_max;
2316         int no_signal;
2317
2318         offst_car  = STV090x_READ_DEMOD(state, CFR2) << 8;
2319         offst_car |= STV090x_READ_DEMOD(state, CFR1);
2320         offst_car = comp2(offst_car, 16);
2321
2322         agc2  = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2323         agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2324         car_max = state->search_range / 1000;
2325
2326         car_max += (car_max / 10); /* 10% margin */
2327         car_max  = (65536 * car_max / 2);
2328         car_max /= state->internal->mclk / 1000;
2329
2330         if (car_max > 0x4000)
2331                 car_max = 0x4000;
2332
2333         if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2334                 no_signal = 1;
2335                 dprintk(FE_DEBUG, 1, "No Signal");
2336         } else {
2337                 no_signal = 0;
2338                 dprintk(FE_DEBUG, 1, "Found Signal");
2339         }
2340
2341         return no_signal;
2342 }
2343
2344 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2345 {
2346         int no_signal, lock = 0;
2347         s32 cpt_step = 0, offst_freq, car_max;
2348         u32 reg;
2349
2350         car_max  = state->search_range / 1000;
2351         car_max += (car_max / 10);
2352         car_max  = (65536 * car_max / 2);
2353         car_max /= (state->internal->mclk / 1000);
2354         if (car_max > 0x4000)
2355                 car_max = 0x4000;
2356
2357         if (zigzag)
2358                 offst_freq = 0;
2359         else
2360                 offst_freq = -car_max + inc;
2361
2362         do {
2363                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2364                         goto err;
2365                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2366                         goto err;
2367                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2368                         goto err;
2369                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2370                         goto err;
2371
2372                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2373                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2374                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2375                         goto err;
2376
2377                 if (zigzag) {
2378                         if (offst_freq >= 0)
2379                                 offst_freq = -offst_freq - 2 * inc;
2380                         else
2381                                 offst_freq = -offst_freq;
2382                 } else {
2383                         offst_freq += 2 * inc;
2384                 }
2385
2386                 cpt_step++;
2387
2388                 lock = stv090x_get_dmdlock(state, timeout);
2389                 no_signal = stv090x_chk_signal(state);
2390
2391         } while ((!lock) &&
2392                  (!no_signal) &&
2393                   ((offst_freq - inc) < car_max) &&
2394                   ((offst_freq + inc) > -car_max) &&
2395                   (cpt_step < steps_max));
2396
2397         reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2398         STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2399         if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2400                         goto err;
2401
2402         return lock;
2403 err:
2404         dprintk(FE_ERROR, 1, "I/O error");
2405         return -1;
2406 }
2407
2408 static int stv090x_sw_algo(struct stv090x_state *state)
2409 {
2410         int no_signal, zigzag, lock = 0;
2411         u32 reg;
2412
2413         s32 dvbs2_fly_wheel;
2414         s32 inc, timeout_step, trials, steps_max;
2415
2416         /* get params */
2417         stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
2418
2419         switch (state->search_mode) {
2420         case STV090x_SEARCH_DVBS1:
2421         case STV090x_SEARCH_DSS:
2422                 /* accelerate the frequency detector */
2423                 if (state->internal->dev_ver >= 0x20) {
2424                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2425                                 goto err;
2426                 }
2427
2428                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2429                         goto err;
2430                 zigzag = 0;
2431                 break;
2432
2433         case STV090x_SEARCH_DVBS2:
2434                 if (state->internal->dev_ver >= 0x20) {
2435                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2436                                 goto err;
2437                 }
2438
2439                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2440                         goto err;
2441                 zigzag = 1;
2442                 break;
2443
2444         case STV090x_SEARCH_AUTO:
2445         default:
2446                 /* accelerate the frequency detector */
2447                 if (state->internal->dev_ver >= 0x20) {
2448                         if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2449                                 goto err;
2450                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2451                                 goto err;
2452                 }
2453
2454                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2455                         goto err;
2456                 zigzag = 0;
2457                 break;
2458         }
2459
2460         trials = 0;
2461         do {
2462                 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2463                 no_signal = stv090x_chk_signal(state);
2464                 trials++;
2465
2466                 /*run the SW search 2 times maximum*/
2467                 if (lock || no_signal || (trials == 2)) {
2468                         /*Check if the demod is not losing lock in DVBS2*/
2469                         if (state->internal->dev_ver >= 0x20) {
2470                                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2471                                         goto err;
2472                                 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2473                                         goto err;
2474                         }
2475
2476                         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2477                         if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2478                                 /*Check if the demod is not losing lock in DVBS2*/
2479                                 msleep(timeout_step);
2480                                 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2481                                 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2482                                 if (dvbs2_fly_wheel < 0xd) {     /*if correct frames is decrementing */
2483                                         msleep(timeout_step);
2484                                         reg = STV090x_READ_DEMOD(state, DMDFLYW);
2485                                         dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2486                                 }
2487                                 if (dvbs2_fly_wheel < 0xd) {
2488                                         /*FALSE lock, The demod is losing lock */
2489                                         lock = 0;
2490                                         if (trials < 2) {
2491                                                 if (state->internal->dev_ver >= 0x20) {
2492                                                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2493                                                                 goto err;
2494                                                 }
2495
2496                                                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2497                                                         goto err;
2498                                         }
2499                                 }
2500                         }
2501                 }
2502         } while ((!lock) && (trials < 2) && (!no_signal));
2503
2504         return lock;
2505 err:
2506         dprintk(FE_ERROR, 1, "I/O error");
2507         return -1;
2508 }
2509
2510 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2511 {
2512         u32 reg;
2513         enum stv090x_delsys delsys;
2514
2515         reg = STV090x_READ_DEMOD(state, DMDSTATE);
2516         if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2517                 delsys = STV090x_DVBS2;
2518         else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2519                 reg = STV090x_READ_DEMOD(state, FECM);
2520                 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2521                         delsys = STV090x_DSS;
2522                 else
2523                         delsys = STV090x_DVBS1;
2524         } else {
2525                 delsys = STV090x_ERROR;
2526         }
2527
2528         return delsys;
2529 }
2530
2531 /* in Hz */
2532 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2533 {
2534         s32 derot, int_1, int_2, tmp_1, tmp_2;
2535
2536         derot  = STV090x_READ_DEMOD(state, CFR2) << 16;
2537         derot |= STV090x_READ_DEMOD(state, CFR1) <<  8;
2538         derot |= STV090x_READ_DEMOD(state, CFR0);
2539
2540         derot = comp2(derot, 24);
2541         int_1 = mclk >> 12;
2542         int_2 = derot >> 12;
2543
2544         /* carrier_frequency = MasterClock * Reg / 2^24 */
2545         tmp_1 = mclk % 0x1000;
2546         tmp_2 = derot % 0x1000;
2547
2548         derot = (int_1 * int_2) +
2549                 ((int_1 * tmp_2) >> 12) +
2550                 ((int_2 * tmp_1) >> 12);
2551
2552         return derot;
2553 }
2554
2555 static int stv090x_get_viterbi(struct stv090x_state *state)
2556 {
2557         u32 reg, rate;
2558
2559         reg = STV090x_READ_DEMOD(state, VITCURPUN);
2560         rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2561
2562         switch (rate) {
2563         case 13:
2564                 state->fec = STV090x_PR12;
2565                 break;
2566
2567         case 18:
2568                 state->fec = STV090x_PR23;
2569                 break;
2570
2571         case 21:
2572                 state->fec = STV090x_PR34;
2573                 break;
2574
2575         case 24:
2576                 state->fec = STV090x_PR56;
2577                 break;
2578
2579         case 25:
2580                 state->fec = STV090x_PR67;
2581                 break;
2582
2583         case 26:
2584                 state->fec = STV090x_PR78;
2585                 break;
2586
2587         default:
2588                 state->fec = STV090x_PRERR;
2589                 break;
2590         }
2591
2592         return 0;
2593 }
2594
2595 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2596 {
2597         struct dvb_frontend *fe = &state->frontend;
2598
2599         u8 tmg;
2600         u32 reg;
2601         s32 i = 0, offst_freq;
2602
2603         msleep(5);
2604
2605         if (state->algo == STV090x_BLIND_SEARCH) {
2606                 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2607                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2608                 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2609                         tmg = STV090x_READ_DEMOD(state, TMGREG2);
2610                         msleep(5);
2611                         i += 5;
2612                 }
2613         }
2614         state->delsys = stv090x_get_std(state);
2615
2616         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2617                 goto err;
2618
2619         if (state->config->tuner_get_frequency) {
2620                 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2621                         goto err_gateoff;
2622         }
2623
2624         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2625                 goto err;
2626
2627         offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
2628         state->frequency += offst_freq;
2629
2630         if (stv090x_get_viterbi(state) < 0)
2631                 goto err;
2632
2633         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2634         state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2635         state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2636         state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2637         reg = STV090x_READ_DEMOD(state, TMGOBS);
2638         state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2639         reg = STV090x_READ_DEMOD(state, FECM);
2640         state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2641
2642         if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2643
2644                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
2645                         goto err;
2646
2647                 if (state->config->tuner_get_frequency) {
2648                         if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2649                                 goto err_gateoff;
2650                 }
2651
2652                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
2653                         goto err;
2654
2655                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2656                         return STV090x_RANGEOK;
2657                 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2658                         return STV090x_RANGEOK;
2659         } else {
2660                 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2661                         return STV090x_RANGEOK;
2662         }
2663
2664         return STV090x_OUTOFRANGE;
2665
2666 err_gateoff:
2667         stv090x_i2c_gate_ctrl(state, 0);
2668 err:
2669         dprintk(FE_ERROR, 1, "I/O error");
2670         return -1;
2671 }
2672
2673 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2674 {
2675         s32 offst_tmg;
2676
2677         offst_tmg  = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2678         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) <<  8;
2679         offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2680
2681         offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2682         if (!offst_tmg)
2683                 offst_tmg = 1;
2684
2685         offst_tmg  = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2686         offst_tmg /= 320;
2687
2688         return offst_tmg;
2689 }
2690
2691 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2692 {
2693         u8 aclc = 0x29;
2694         s32 i;
2695         struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2696
2697         if (state->internal->dev_ver == 0x20) {
2698                 car_loop                = stv090x_s2_crl_cut20;
2699                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut20;
2700                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut20;
2701         } else {
2702                 /* >= Cut 3 */
2703                 car_loop                = stv090x_s2_crl_cut30;
2704                 car_loop_qpsk_low       = stv090x_s2_lowqpsk_crl_cut30;
2705                 car_loop_apsk_low       = stv090x_s2_apsk_crl_cut30;
2706         }
2707
2708         if (modcod < STV090x_QPSK_12) {
2709                 i = 0;
2710                 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
2711                         i++;
2712
2713                 if (i >= 3)
2714                         i = 2;
2715
2716         } else {
2717                 i = 0;
2718                 while ((i < 14) && (modcod != car_loop[i].modcod))
2719                         i++;
2720
2721                 if (i >= 14) {
2722                         i = 0;
2723                         while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
2724                                 i++;
2725
2726                         if (i >= 11)
2727                                 i = 10;
2728                 }
2729         }
2730
2731         if (modcod <= STV090x_QPSK_25) {
2732                 if (pilots) {
2733                         if (state->srate <= 3000000)
2734                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
2735                         else if (state->srate <= 7000000)
2736                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
2737                         else if (state->srate <= 15000000)
2738                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
2739                         else if (state->srate <= 25000000)
2740                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
2741                         else
2742                                 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
2743                 } else {
2744                         if (state->srate <= 3000000)
2745                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
2746                         else if (state->srate <= 7000000)
2747                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
2748                         else if (state->srate <= 15000000)
2749                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
2750                         else if (state->srate <= 25000000)
2751                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
2752                         else
2753                                 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
2754                 }
2755
2756         } else if (modcod <= STV090x_8PSK_910) {
2757                 if (pilots) {
2758                         if (state->srate <= 3000000)
2759                                 aclc = car_loop[i].crl_pilots_on_2;
2760                         else if (state->srate <= 7000000)
2761                                 aclc = car_loop[i].crl_pilots_on_5;
2762                         else if (state->srate <= 15000000)
2763                                 aclc = car_loop[i].crl_pilots_on_10;
2764                         else if (state->srate <= 25000000)
2765                                 aclc = car_loop[i].crl_pilots_on_20;
2766                         else
2767                                 aclc = car_loop[i].crl_pilots_on_30;
2768                 } else {
2769                         if (state->srate <= 3000000)
2770                                 aclc = car_loop[i].crl_pilots_off_2;
2771                         else if (state->srate <= 7000000)
2772                                 aclc = car_loop[i].crl_pilots_off_5;
2773                         else if (state->srate <= 15000000)
2774                                 aclc = car_loop[i].crl_pilots_off_10;
2775                         else if (state->srate <= 25000000)
2776                                 aclc = car_loop[i].crl_pilots_off_20;
2777                         else
2778                                 aclc = car_loop[i].crl_pilots_off_30;
2779                 }
2780         } else { /* 16APSK and 32APSK */
2781                 /*
2782                  * This should never happen in practice, except if
2783                  * something is really wrong at the car_loop table.
2784                  */
2785                 if (i >= 11)
2786                         i = 10;
2787                 if (state->srate <= 3000000)
2788                         aclc = car_loop_apsk_low[i].crl_pilots_on_2;
2789                 else if (state->srate <= 7000000)
2790                         aclc = car_loop_apsk_low[i].crl_pilots_on_5;
2791                 else if (state->srate <= 15000000)
2792                         aclc = car_loop_apsk_low[i].crl_pilots_on_10;
2793                 else if (state->srate <= 25000000)
2794                         aclc = car_loop_apsk_low[i].crl_pilots_on_20;
2795                 else
2796                         aclc = car_loop_apsk_low[i].crl_pilots_on_30;
2797         }
2798
2799         return aclc;
2800 }
2801
2802 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2803 {
2804         struct stv090x_short_frame_crloop *short_crl = NULL;
2805         s32 index = 0;
2806         u8 aclc = 0x0b;
2807
2808         switch (state->modulation) {
2809         case STV090x_QPSK:
2810         default:
2811                 index = 0;
2812                 break;
2813         case STV090x_8PSK:
2814                 index = 1;
2815                 break;
2816         case STV090x_16APSK:
2817                 index = 2;
2818                 break;
2819         case STV090x_32APSK:
2820                 index = 3;
2821                 break;
2822         }
2823
2824         if (state->internal->dev_ver >= 0x30) {
2825                 /* Cut 3.0 and up */
2826                 short_crl = stv090x_s2_short_crl_cut30;
2827         } else {
2828                 /* Cut 2.0 and up: we don't support cuts older than 2.0 */
2829                 short_crl = stv090x_s2_short_crl_cut20;
2830         }
2831
2832         if (state->srate <= 3000000)
2833                 aclc = short_crl[index].crl_2;
2834         else if (state->srate <= 7000000)
2835                 aclc = short_crl[index].crl_5;
2836         else if (state->srate <= 15000000)
2837                 aclc = short_crl[index].crl_10;
2838         else if (state->srate <= 25000000)
2839                 aclc = short_crl[index].crl_20;
2840         else
2841                 aclc = short_crl[index].crl_30;
2842
2843         return aclc;
2844 }
2845
2846 static int stv090x_optimize_track(struct stv090x_state *state)
2847 {
2848         struct dvb_frontend *fe = &state->frontend;
2849
2850         enum stv090x_modcod modcod;
2851
2852         s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2853         u32 reg;
2854
2855         srate  = stv090x_get_srate(state, state->internal->mclk);
2856         srate += stv090x_get_tmgoffst(state, srate);
2857
2858         switch (state->delsys) {
2859         case STV090x_DVBS1:
2860         case STV090x_DSS:
2861                 if (state->search_mode == STV090x_SEARCH_AUTO) {
2862                         reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2863                         STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2864                         STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2865                         if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2866                                 goto err;
2867                 }
2868                 reg = STV090x_READ_DEMOD(state, DEMOD);
2869                 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2870                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
2871                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2872                         goto err;
2873
2874                 if (state->internal->dev_ver >= 0x30) {
2875                         if (stv090x_get_viterbi(state) < 0)
2876                                 goto err;
2877
2878                         if (state->fec == STV090x_PR12) {
2879                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2880                                         goto err;
2881                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2882                                         goto err;
2883                         } else {
2884                                 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2885                                         goto err;
2886                                 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2887                                         goto err;
2888                         }
2889                 }
2890
2891                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2892                         goto err;
2893                 break;
2894
2895         case STV090x_DVBS2:
2896                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2897                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2898                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2899                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2900                         goto err;
2901                 if (state->internal->dev_ver >= 0x30) {
2902                         if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2903                                 goto err;
2904                         if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2905                                 goto err;
2906                 }
2907                 if (state->frame_len == STV090x_LONG_FRAME) {
2908                         reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2909                         modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2910                         pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2911                         aclc = stv090x_optimize_carloop(state, modcod, pilots);
2912                         if (modcod <= STV090x_QPSK_910) {
2913                                 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2914                         } else if (modcod <= STV090x_8PSK_910) {
2915                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2916                                         goto err;
2917                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2918                                         goto err;
2919                         }
2920                         if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2921                                 if (modcod <= STV090x_16APSK_910) {
2922                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2923                                                 goto err;
2924                                         if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2925                                                 goto err;
2926                                 } else {
2927                                         if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2928                                                 goto err;
2929                                         if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2930                                                 goto err;
2931                                 }
2932                         }
2933                 } else {
2934                         /*Carrier loop setting for short frame*/
2935                         aclc = stv090x_optimize_carloop_short(state);
2936                         if (state->modulation == STV090x_QPSK) {
2937                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2938                                         goto err;
2939                         } else if (state->modulation == STV090x_8PSK) {
2940                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2941                                         goto err;
2942                                 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2943                                         goto err;
2944                         } else if (state->modulation == STV090x_16APSK) {
2945                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2946                                         goto err;
2947                                 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2948                                         goto err;
2949                         } else if (state->modulation == STV090x_32APSK)  {
2950                                 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2951                                         goto err;
2952                                 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2953                                         goto err;
2954                         }
2955                 }
2956
2957                 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2958                 break;
2959
2960         case STV090x_ERROR:
2961         default:
2962                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2963                 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2964                 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2965                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2966                         goto err;
2967                 break;
2968         }
2969
2970         f_1 = STV090x_READ_DEMOD(state, CFR2);
2971         f_0 = STV090x_READ_DEMOD(state, CFR1);
2972         reg = STV090x_READ_DEMOD(state, TMGOBS);
2973
2974         if (state->algo == STV090x_BLIND_SEARCH) {
2975                 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2976                 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2977                 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2978                 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2979                 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2980                         goto err;
2981                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
2982                         goto err;
2983
2984                 if (stv090x_set_srate(state, srate) < 0)
2985                         goto err;
2986                 blind_tune = 1;
2987
2988                 if (stv090x_dvbs_track_crl(state) < 0)
2989                         goto err;
2990         }
2991
2992         if (state->internal->dev_ver >= 0x20) {
2993                 if ((state->search_mode == STV090x_SEARCH_DVBS1)        ||
2994                     (state->search_mode == STV090x_SEARCH_DSS)          ||
2995                     (state->search_mode == STV090x_SEARCH_AUTO)) {
2996
2997                         if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2998                                 goto err;
2999                         if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
3000                                 goto err;
3001                 }
3002         }
3003
3004         if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3005                 goto err;
3006
3007         /* AUTO tracking MODE */
3008         if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
3009                 goto err;
3010         /* AUTO tracking MODE */
3011         if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
3012                 goto err;
3013
3014         if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
3015             (state->srate < 10000000)) {
3016                 /* update initial carrier freq with the found freq offset */
3017                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3018                         goto err;
3019                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3020                         goto err;
3021                 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
3022
3023                 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
3024
3025                         if (state->algo != STV090x_WARM_SEARCH) {
3026
3027                                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3028                                         goto err;
3029
3030                                 if (state->config->tuner_set_bandwidth) {
3031                                         if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3032                                                 goto err_gateoff;
3033                                 }
3034
3035                                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3036                                         goto err;
3037
3038                         }
3039                 }
3040                 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
3041                         msleep(50); /* blind search: wait 50ms for SR stabilization */
3042                 else
3043                         msleep(5);
3044
3045                 stv090x_get_lock_tmg(state);
3046
3047                 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
3048                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3049                                 goto err;
3050                         if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3051                                 goto err;
3052                         if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3053                                 goto err;
3054                         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3055                                 goto err;
3056
3057                         i = 0;
3058
3059                         while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
3060
3061                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3062                                         goto err;
3063                                 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3064                                         goto err;
3065                                 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3066                                         goto err;
3067                                 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3068                                         goto err;
3069                                 i++;
3070                         }
3071                 }
3072
3073         }
3074
3075         if (state->internal->dev_ver >= 0x20) {
3076                 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
3077                         goto err;
3078         }
3079
3080         if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
3081                 stv090x_set_vit_thtracq(state);
3082
3083         return 0;
3084
3085 err_gateoff:
3086         stv090x_i2c_gate_ctrl(state, 0);
3087 err:
3088         dprintk(FE_ERROR, 1, "I/O error");
3089         return -1;
3090 }
3091
3092 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
3093 {
3094         s32 timer = 0, lock = 0, stat;
3095         u32 reg;
3096
3097         while ((timer < timeout) && (!lock)) {
3098                 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3099                 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3100
3101                 switch (stat) {
3102                 case 0: /* searching */
3103                 case 1: /* first PLH detected */
3104                 default:
3105                         lock = 0;
3106                         break;
3107
3108                 case 2: /* DVB-S2 mode */
3109                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3110                         lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
3111                         break;
3112
3113                 case 3: /* DVB-S1/legacy mode */
3114                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3115                         lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
3116                         break;
3117                 }
3118                 if (!lock) {
3119                         msleep(10);
3120                         timer += 10;
3121                 }
3122         }
3123         return lock;
3124 }
3125
3126 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
3127 {
3128         u32 reg;
3129         s32 timer = 0;
3130         int lock;
3131
3132         lock = stv090x_get_dmdlock(state, timeout_dmd);
3133         if (lock)
3134                 lock = stv090x_get_feclock(state, timeout_fec);
3135
3136         if (lock) {
3137                 lock = 0;
3138
3139                 while ((timer < timeout_fec) && (!lock)) {
3140                         reg = STV090x_READ_DEMOD(state, TSSTATUS);
3141                         lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3142                         msleep(1);
3143                         timer++;
3144                 }
3145         }
3146
3147         return lock;
3148 }
3149
3150 static int stv090x_set_s2rolloff(struct stv090x_state *state)
3151 {
3152         u32 reg;
3153
3154         if (state->internal->dev_ver <= 0x20) {
3155                 /* rolloff to auto mode if DVBS2 */
3156                 reg = STV090x_READ_DEMOD(state, DEMOD);
3157                 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
3158                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3159                         goto err;
3160         } else {
3161                 /* DVB-S2 rolloff to auto mode if DVBS2 */
3162                 reg = STV090x_READ_DEMOD(state, DEMOD);
3163                 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
3164                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3165                         goto err;
3166         }
3167         return 0;
3168 err:
3169         dprintk(FE_ERROR, 1, "I/O error");
3170         return -1;
3171 }
3172
3173
3174 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3175 {
3176         struct dvb_frontend *fe = &state->frontend;
3177         enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3178         u32 reg;
3179         s32 agc1_power, power_iq = 0, i;
3180         int lock = 0, low_sr = 0;
3181
3182         reg = STV090x_READ_DEMOD(state, TSCFGH);
3183         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3184         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3185                 goto err;
3186
3187         if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3188                 goto err;
3189
3190         if (state->internal->dev_ver >= 0x20) {
3191                 if (state->srate > 5000000) {
3192                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3193                                 goto err;
3194                 } else {
3195                         if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
3196                                 goto err;
3197                 }
3198         }
3199
3200         stv090x_get_lock_tmg(state);
3201
3202         if (state->algo == STV090x_BLIND_SEARCH) {
3203                 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
3204                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
3205                         goto err;
3206                 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3207                         goto err;
3208                 if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
3209                         goto err;
3210         } else {
3211                 /* known srate */
3212                 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3213                         goto err;
3214                 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3215                         goto err;
3216
3217                 if (state->srate < 2000000) {
3218                         /* SR < 2MSPS */
3219                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
3220                                 goto err;
3221                 } else {
3222                         /* SR >= 2Msps */
3223                         if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3224                                 goto err;
3225                 }
3226
3227                 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3228                         goto err;
3229
3230                 if (state->internal->dev_ver >= 0x20) {
3231                         if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3232                                 goto err;
3233                         if (state->algo == STV090x_COLD_SEARCH)
3234                                 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
3235                         else if (state->algo == STV090x_WARM_SEARCH)
3236                                 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
3237                 }
3238
3239                 /* if cold start or warm  (Symbolrate is known)
3240                  * use a Narrow symbol rate scan range
3241                  */
3242                 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
3243                         goto err;
3244
3245                 if (stv090x_set_srate(state, state->srate) < 0)
3246                         goto err;
3247
3248                 if (stv090x_set_max_srate(state, state->internal->mclk,
3249                                           state->srate) < 0)
3250                         goto err;
3251                 if (stv090x_set_min_srate(state, state->internal->mclk,
3252                                           state->srate) < 0)
3253                         goto err;
3254
3255                 if (state->srate >= 10000000)
3256                         low_sr = 0;
3257                 else
3258                         low_sr = 1;
3259         }
3260
3261         /* Setup tuner */
3262         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3263                 goto err;
3264
3265         if (state->config->tuner_set_bbgain) {
3266                 reg = state->config->tuner_bbgain;
3267                 if (reg == 0)
3268                         reg = 10; /* default: 10dB */
3269                 if (state->config->tuner_set_bbgain(fe, reg) < 0)
3270                         goto err_gateoff;
3271         }
3272
3273         if (state->config->tuner_set_frequency) {
3274                 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3275                         goto err_gateoff;
3276         }
3277
3278         if (state->config->tuner_set_bandwidth) {
3279                 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3280                         goto err_gateoff;
3281         }
3282
3283         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3284                 goto err;
3285
3286         msleep(50);
3287
3288         if (state->config->tuner_get_status) {
3289                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3290                         goto err;
3291                 if (state->config->tuner_get_status(fe, &reg) < 0)
3292                         goto err_gateoff;
3293                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3294                         goto err;
3295
3296                 if (reg)
3297                         dprintk(FE_DEBUG, 1, "Tuner phase locked");
3298                 else {
3299                         dprintk(FE_DEBUG, 1, "Tuner unlocked");
3300                         return STV090x_NOCARRIER;
3301                 }
3302         }
3303
3304         msleep(10);
3305         agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3306                                 STV090x_READ_DEMOD(state, AGCIQIN0));
3307
3308         if (agc1_power == 0) {
3309                 /* If AGC1 integrator value is 0
3310                  * then read POWERI, POWERQ
3311                  */
3312                 for (i = 0; i < 5; i++) {
3313                         power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3314                                      STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3315                 }
3316                 power_iq /= 5;
3317         }
3318
3319         if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3320                 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3321                 lock = 0;
3322                 signal_state = STV090x_NOAGC1;
3323         } else {
3324                 reg = STV090x_READ_DEMOD(state, DEMOD);
3325                 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3326
3327                 if (state->internal->dev_ver <= 0x20) {
3328                         /* rolloff to auto mode if DVBS2 */
3329                         STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3330                 } else {
3331                         /* DVB-S2 rolloff to auto mode if DVBS2 */
3332                         STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3333                 }
3334                 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3335                         goto err;
3336
3337                 if (stv090x_delivery_search(state) < 0)
3338                         goto err;
3339
3340                 if (state->algo != STV090x_BLIND_SEARCH) {
3341                         if (stv090x_start_search(state) < 0)
3342                                 goto err;
3343                 }
3344         }
3345
3346         if (signal_state == STV090x_NOAGC1)
3347                 return signal_state;
3348
3349         if (state->algo == STV090x_BLIND_SEARCH)
3350                 lock = stv090x_blind_search(state);
3351
3352         else if (state->algo == STV090x_COLD_SEARCH)
3353                 lock = stv090x_get_coldlock(state, state->DemodTimeout);
3354
3355         else if (state->algo == STV090x_WARM_SEARCH)
3356                 lock = stv090x_get_dmdlock(state, state->DemodTimeout);
3357
3358         if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3359                 if (!low_sr) {
3360                         if (stv090x_chk_tmg(state))
3361                                 lock = stv090x_sw_algo(state);
3362                 }
3363         }
3364
3365         if (lock)
3366                 signal_state = stv090x_get_sig_params(state);
3367
3368         if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3369                 stv090x_optimize_track(state);
3370
3371                 if (state->internal->dev_ver >= 0x20) {
3372                         /* >= Cut 2.0 :release TS reset after
3373                          * demod lock and optimized Tracking
3374                          */
3375                         reg = STV090x_READ_DEMOD(state, TSCFGH);
3376                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3377                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3378                                 goto err;
3379
3380                         msleep(3);
3381
3382                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3383                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3384                                 goto err;
3385
3386                         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3387                         if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3388                                 goto err;
3389                 }
3390
3391                 lock = stv090x_get_lock(state, state->FecTimeout,
3392                                 state->FecTimeout);
3393                 if (lock) {
3394                         if (state->delsys == STV090x_DVBS2) {
3395                                 stv090x_set_s2rolloff(state);
3396
3397                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3398                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3399                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3400                                         goto err;
3401                                 /* Reset DVBS2 packet delinator error counter */
3402                                 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3403                                 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3404                                 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3405                                         goto err;
3406
3407                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3408                                         goto err;
3409                         } else {
3410                                 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3411                                         goto err;
3412                         }
3413                         /* Reset the Total packet counter */
3414                         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3415                                 goto err;
3416                         /* Reset the packet Error counter2 */
3417                         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3418                                 goto err;
3419                 } else {
3420                         signal_state = STV090x_NODATA;
3421                         stv090x_chk_signal(state);
3422                 }
3423         }
3424         return signal_state;
3425
3426 err_gateoff:
3427         stv090x_i2c_gate_ctrl(state, 0);
3428 err:
3429         dprintk(FE_ERROR, 1, "I/O error");
3430         return -1;
3431 }
3432
3433 static int stv090x_set_pls(struct stv090x_state *state, u32 pls_code)
3434 {
3435         dprintk(FE_DEBUG, 1, "Set Gold PLS code %d", pls_code);
3436         if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
3437                 goto err;
3438         if (STV090x_WRITE_DEMOD(state, PLROOT1, (pls_code >> 8) & 0xff) < 0)
3439                 goto err;
3440         if (STV090x_WRITE_DEMOD(state, PLROOT2, 0x04 | (pls_code >> 16)) < 0)
3441                 goto err;
3442         return 0;
3443 err:
3444         dprintk(FE_ERROR, 1, "I/O error");
3445         return -1;
3446 }
3447
3448 static int stv090x_set_mis(struct stv090x_state *state, int mis)
3449 {
3450         u32 reg;
3451
3452         if (mis < 0 || mis > 255) {
3453                 dprintk(FE_DEBUG, 1, "Disable MIS filtering");
3454                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3455                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
3456                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3457                         goto err;
3458         } else {
3459                 dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
3460                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3461                 STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
3462                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3463                         goto err;
3464                 if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
3465                         goto err;
3466                 if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
3467                         goto err;
3468         }
3469         return 0;
3470 err:
3471         dprintk(FE_ERROR, 1, "I/O error");
3472         return -1;
3473 }
3474
3475 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
3476 {
3477         struct stv090x_state *state = fe->demodulator_priv;
3478         struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3479
3480         if (props->frequency == 0)
3481                 return DVBFE_ALGO_SEARCH_INVALID;
3482
3483         switch (props->delivery_system) {
3484         case SYS_DSS:
3485                 state->delsys = STV090x_DSS;
3486                 break;
3487         case SYS_DVBS:
3488                 state->delsys = STV090x_DVBS1;
3489                 break;
3490         case SYS_DVBS2:
3491                 state->delsys = STV090x_DVBS2;
3492                 break;
3493         default:
3494                 return DVBFE_ALGO_SEARCH_INVALID;
3495         }
3496
3497         state->frequency = props->frequency;
3498         state->srate = props->symbol_rate;
3499         state->search_mode = STV090x_SEARCH_AUTO;
3500         state->algo = STV090x_COLD_SEARCH;
3501         state->fec = STV090x_PRERR;
3502         if (state->srate > 10000000) {
3503                 dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
3504                 state->search_range = 10000000;
3505         } else {
3506                 dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
3507                 state->search_range = 5000000;
3508         }
3509
3510         stv090x_set_pls(state, props->scrambling_sequence_index);
3511         stv090x_set_mis(state, props->stream_id);
3512
3513         if (stv090x_algo(state) == STV090x_RANGEOK) {
3514                 dprintk(FE_DEBUG, 1, "Search success!");
3515                 return DVBFE_ALGO_SEARCH_SUCCESS;
3516         } else {
3517                 dprintk(FE_DEBUG, 1, "Search failed!");
3518                 return DVBFE_ALGO_SEARCH_FAILED;
3519         }
3520
3521         return DVBFE_ALGO_SEARCH_ERROR;
3522 }
3523
3524 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3525 {
3526         struct stv090x_state *state = fe->demodulator_priv;
3527         u32 reg, dstatus;
3528         u8 search_state;
3529
3530         *status = 0;
3531
3532         dstatus = STV090x_READ_DEMOD(state, DSTATUS);
3533         if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
3534                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
3535
3536         reg = STV090x_READ_DEMOD(state, DMDSTATE);
3537         search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3538
3539         switch (search_state) {
3540         case 0: /* searching */
3541         case 1: /* first PLH detected */
3542         default:
3543                 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3544                 break;
3545
3546         case 2: /* DVB-S2 mode */
3547                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3548                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3549                         reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3550                         if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3551                                 *status |= FE_HAS_VITERBI;
3552                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3553                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3554                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3555                         }
3556                 }
3557                 break;
3558
3559         case 3: /* DVB-S1/legacy mode */
3560                 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3561                 if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
3562                         reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3563                         if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3564                                 *status |= FE_HAS_VITERBI;
3565                                 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3566                                 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
3567                                         *status |= FE_HAS_SYNC | FE_HAS_LOCK;
3568                         }
3569                 }
3570                 break;
3571         }
3572
3573         return 0;
3574 }
3575
3576 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3577 {
3578         struct stv090x_state *state = fe->demodulator_priv;
3579
3580         s32 count_4, count_3, count_2, count_1, count_0, count;
3581         u32 reg, h, m, l;
3582         enum fe_status status;
3583
3584         stv090x_read_status(fe, &status);
3585         if (!(status & FE_HAS_LOCK)) {
3586                 *per = 1 << 23; /* Max PER */
3587         } else {
3588                 /* Counter 2 */
3589                 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3590                 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3591
3592                 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3593                 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3594
3595                 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3596                 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3597
3598                 *per = ((h << 16) | (m << 8) | l);
3599
3600                 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3601                 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3602                 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3603                 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3604                 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3605
3606                 if ((!count_4) && (!count_3)) {
3607                         count  = (count_2 & 0xff) << 16;
3608                         count |= (count_1 & 0xff) <<  8;
3609                         count |=  count_0 & 0xff;
3610                 } else {
3611                         count = 1 << 24;
3612                 }
3613                 if (count == 0)
3614                         *per = 1;
3615         }
3616         if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3617                 goto err;
3618         if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3619                 goto err;
3620
3621         return 0;
3622 err:
3623         dprintk(FE_ERROR, 1, "I/O error");
3624         return -1;
3625 }
3626
3627 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3628 {
3629         int res = 0;
3630         int min = 0, med;
3631
3632         if ((val >= tab[min].read && val < tab[max].read) ||
3633             (val >= tab[max].read && val < tab[min].read)) {
3634                 while ((max - min) > 1) {
3635                         med = (max + min) / 2;
3636                         if ((val >= tab[min].read && val < tab[med].read) ||
3637                             (val >= tab[med].read && val < tab[min].read))
3638                                 max = med;
3639                         else
3640                                 min = med;
3641                 }
3642                 res = ((val - tab[min].read) *
3643                        (tab[max].real - tab[min].real) /
3644                        (tab[max].read - tab[min].read)) +
3645                         tab[min].real;
3646         } else {
3647                 if (tab[min].read < tab[max].read) {
3648                         if (val < tab[min].read)
3649                                 res = tab[min].real;
3650                         else if (val >= tab[max].read)
3651                                 res = tab[max].real;
3652                 } else {
3653                         if (val >= tab[min].read)
3654                                 res = tab[min].real;
3655                         else if (val < tab[max].read)
3656                                 res = tab[max].real;
3657                 }
3658         }
3659
3660         return res;
3661 }
3662
3663 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3664 {
3665         struct stv090x_state *state = fe->demodulator_priv;
3666         u32 reg;
3667         s32 agc_0, agc_1, agc;
3668         s32 str;
3669
3670         reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3671         agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3672         reg = STV090x_READ_DEMOD(state, AGCIQIN0);
3673         agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3674         agc = MAKEWORD16(agc_1, agc_0);
3675
3676         str = stv090x_table_lookup(stv090x_rf_tab,
3677                 ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3678         if (agc > stv090x_rf_tab[0].read)
3679                 str = 0;
3680         else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3681                 str = -100;
3682         *strength = (str + 100) * 0xFFFF / 100;
3683
3684         return 0;
3685 }
3686
3687 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3688 {
3689         struct stv090x_state *state = fe->demodulator_priv;
3690         u32 reg_0, reg_1, reg, i;
3691         s32 val_0, val_1, val = 0;
3692         u8 lock_f;
3693         s32 div;
3694         u32 last;
3695
3696         switch (state->delsys) {
3697         case STV090x_DVBS2:
3698                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3699                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3700                 if (lock_f) {
3701                         msleep(5);
3702                         for (i = 0; i < 16; i++) {
3703                                 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3704                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3705                                 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3706                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
3707                                 val  += MAKEWORD16(val_1, val_0);
3708                                 msleep(1);
3709                         }
3710                         val /= 16;
3711                         last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
3712                         div = stv090x_s2cn_tab[last].real -
3713                               stv090x_s2cn_tab[3].real;
3714                         val = stv090x_table_lookup(stv090x_s2cn_tab, last, val);
3715                         if (val < 0)
3716                                 val = 0;
3717                         *cnr = val * 0xFFFF / div;
3718                 }
3719                 break;
3720
3721         case STV090x_DVBS1:
3722         case STV090x_DSS:
3723                 reg = STV090x_READ_DEMOD(state, DSTATUS);
3724                 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3725                 if (lock_f) {
3726                         msleep(5);
3727                         for (i = 0; i < 16; i++) {
3728                                 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3729                                 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3730                                 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3731                                 val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
3732                                 val  += MAKEWORD16(val_1, val_0);
3733                                 msleep(1);
3734                         }
3735                         val /= 16;
3736                         last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
3737                         div = stv090x_s1cn_tab[last].real -
3738                               stv090x_s1cn_tab[0].real;
3739                         val = stv090x_table_lookup(stv090x_s1cn_tab, last, val);
3740                         *cnr = val * 0xFFFF / div;
3741                 }
3742                 break;
3743         default:
3744                 break;
3745         }
3746
3747         return 0;
3748 }
3749
3750 static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
3751 {
3752         struct stv090x_state *state = fe->demodulator_priv;
3753         u32 reg;
3754
3755         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3756         switch (tone) {
3757         case SEC_TONE_ON:
3758                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3759                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3760                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3761                         goto err;
3762                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3763                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3764                         goto err;
3765                 break;
3766
3767         case SEC_TONE_OFF:
3768                 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3769                 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3770                 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3771                         goto err;
3772                 break;
3773         default:
3774                 return -EINVAL;
3775         }
3776
3777         return 0;
3778 err:
3779         dprintk(FE_ERROR, 1, "I/O error");
3780         return -1;
3781 }
3782
3783
3784 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3785 {
3786         return DVBFE_ALGO_CUSTOM;
3787 }
3788
3789 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3790 {
3791         struct stv090x_state *state = fe->demodulator_priv;
3792         u32 reg, idle = 0, fifo_full = 1;
3793         int i;
3794
3795         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3796
3797         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
3798                 (state->config->diseqc_envelope_mode) ? 4 : 2);
3799         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3800         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3801                 goto err;
3802         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3803         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3804                 goto err;
3805
3806         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3807         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3808                 goto err;
3809
3810         for (i = 0; i < cmd->msg_len; i++) {
3811
3812                 while (fifo_full) {
3813                         reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3814                         fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3815                 }
3816
3817                 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3818                         goto err;
3819         }
3820         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3821         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3822         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3823                 goto err;
3824
3825         i = 0;
3826
3827         while ((!idle) && (i < 10)) {
3828                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3829                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3830                 msleep(10);
3831                 i++;
3832         }
3833
3834         return 0;
3835 err:
3836         dprintk(FE_ERROR, 1, "I/O error");
3837         return -1;
3838 }
3839
3840 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
3841                                      enum fe_sec_mini_cmd burst)
3842 {
3843         struct stv090x_state *state = fe->demodulator_priv;
3844         u32 reg, idle = 0, fifo_full = 1;
3845         u8 mode, value;
3846         int i;
3847
3848         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3849
3850         if (burst == SEC_MINI_A) {
3851                 mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
3852                 value = 0x00;
3853         } else {
3854                 mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
3855                 value = 0xFF;
3856         }
3857
3858         STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3859         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3860         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3861                 goto err;
3862         STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3863         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3864                 goto err;
3865
3866         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3867         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3868                 goto err;
3869
3870         while (fifo_full) {
3871                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3872                 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3873         }
3874
3875         if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3876                 goto err;
3877
3878         reg = STV090x_READ_DEMOD(state, DISTXCTL);
3879         STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3880         if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3881                 goto err;
3882
3883         i = 0;
3884
3885         while ((!idle) && (i < 10)) {
3886                 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3887                 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3888                 msleep(10);
3889                 i++;
3890         }
3891
3892         return 0;
3893 err:
3894         dprintk(FE_ERROR, 1, "I/O error");
3895         return -1;
3896 }
3897
3898 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3899 {
3900         struct stv090x_state *state = fe->demodulator_priv;
3901         u32 reg = 0, i = 0, rx_end = 0;
3902
3903         while ((rx_end != 1) && (i < 10)) {
3904                 msleep(10);
3905                 i++;
3906                 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3907                 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3908         }
3909
3910         if (rx_end) {
3911                 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3912                 for (i = 0; i < reply->msg_len; i++)
3913                         reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3914         }
3915
3916         return 0;
3917 }
3918
3919 static int stv090x_sleep(struct dvb_frontend *fe)
3920 {
3921         struct stv090x_state *state = fe->demodulator_priv;
3922         u32 reg;
3923         u8 full_standby = 0;
3924
3925         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
3926                 goto err;
3927
3928         if (state->config->tuner_sleep) {
3929                 if (state->config->tuner_sleep(fe) < 0)
3930                         goto err_gateoff;
3931         }
3932
3933         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
3934                 goto err;
3935
3936         dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
3937                 state->device == STV0900 ? "STV0900" : "STV0903",
3938                 state->demod);
3939
3940         mutex_lock(&state->internal->demod_lock);
3941
3942         switch (state->demod) {
3943         case STV090x_DEMODULATOR_0:
3944                 /* power off ADC 1 */
3945                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3946                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3947                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3948                         goto err_unlock;
3949                 /* power off DiSEqC 1 */
3950                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
3951                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
3952                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
3953                         goto err_unlock;
3954
3955                 /* check whether path 2 is already sleeping, that is when
3956                    ADC2 is off */
3957                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3958                 if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
3959                         full_standby = 1;
3960
3961                 /* stop clocks */
3962                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
3963                 /* packet delineator 1 clock */
3964                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
3965                 /* ADC 1 clock */
3966                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
3967                 /* FEC clock is shared between the two paths, only stop it
3968                    when full standby is possible */
3969                 if (full_standby)
3970                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
3971                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
3972                         goto err_unlock;
3973                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
3974                 /* sampling 1 clock */
3975                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
3976                 /* viterbi 1 clock */
3977                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
3978                 /* TS clock is shared between the two paths, only stop it
3979                    when full standby is possible */
3980                 if (full_standby)
3981                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
3982                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
3983                         goto err_unlock;
3984                 break;
3985
3986         case STV090x_DEMODULATOR_1:
3987                 /* power off ADC 2 */
3988                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
3989                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
3990                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
3991                         goto err_unlock;
3992                 /* power off DiSEqC 2 */
3993                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
3994                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
3995                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
3996                         goto err_unlock;
3997
3998                 /* check whether path 1 is already sleeping, that is when
3999                    ADC1 is off */
4000                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4001                 if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
4002                         full_standby = 1;
4003
4004                 /* stop clocks */
4005                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4006                 /* packet delineator 2 clock */
4007                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
4008                 /* ADC 2 clock */
4009                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
4010                 /* FEC clock is shared between the two paths, only stop it
4011                    when full standby is possible */
4012                 if (full_standby)
4013                         STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
4014                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4015                         goto err_unlock;
4016                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4017                 /* sampling 2 clock */
4018                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
4019                 /* viterbi 2 clock */
4020                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
4021                 /* TS clock is shared between the two paths, only stop it
4022                    when full standby is possible */
4023                 if (full_standby)
4024                         STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
4025                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4026                         goto err_unlock;
4027                 break;
4028
4029         default:
4030                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4031                 break;
4032         }
4033
4034         if (full_standby) {
4035                 /* general power off */
4036                 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4037                 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
4038                 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4039                         goto err_unlock;
4040         }
4041
4042         mutex_unlock(&state->internal->demod_lock);
4043         return 0;
4044
4045 err_gateoff:
4046         stv090x_i2c_gate_ctrl(state, 0);
4047         goto err;
4048 err_unlock:
4049         mutex_unlock(&state->internal->demod_lock);
4050 err:
4051         dprintk(FE_ERROR, 1, "I/O error");
4052         return -1;
4053 }
4054
4055 static int stv090x_wakeup(struct dvb_frontend *fe)
4056 {
4057         struct stv090x_state *state = fe->demodulator_priv;
4058         u32 reg;
4059
4060         dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
4061                 state->device == STV0900 ? "STV0900" : "STV0903",
4062                 state->demod);
4063
4064         mutex_lock(&state->internal->demod_lock);
4065
4066         /* general power on */
4067         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4068         STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
4069         if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
4070                 goto err;
4071
4072         switch (state->demod) {
4073         case STV090x_DEMODULATOR_0:
4074                 /* power on ADC 1 */
4075                 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4076                 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
4077                 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4078                         goto err;
4079                 /* power on DiSEqC 1 */
4080                 reg = stv090x_read_reg(state, STV090x_TSTTNR2);
4081                 STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
4082                 if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
4083                         goto err;
4084
4085                 /* activate clocks */
4086                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4087                 /* packet delineator 1 clock */
4088                 STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
4089                 /* ADC 1 clock */
4090                 STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
4091                 /* FEC clock */
4092                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4093                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4094                         goto err;
4095                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4096                 /* sampling 1 clock */
4097                 STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
4098                 /* viterbi 1 clock */
4099                 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
4100                 /* TS clock */
4101                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4102                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4103                         goto err;
4104                 break;
4105
4106         case STV090x_DEMODULATOR_1:
4107                 /* power on ADC 2 */
4108                 reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4109                 STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
4110                 if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4111                         goto err;
4112                 /* power on DiSEqC 2 */
4113                 reg = stv090x_read_reg(state, STV090x_TSTTNR4);
4114                 STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
4115                 if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
4116                         goto err;
4117
4118                 /* activate clocks */
4119                 reg = stv090x_read_reg(state, STV090x_STOPCLK1);
4120                 /* packet delineator 2 clock */
4121                 STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
4122                 /* ADC 2 clock */
4123                 STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
4124                 /* FEC clock */
4125                 STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
4126                 if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
4127                         goto err;
4128                 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
4129                 /* sampling 2 clock */
4130                 STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
4131                 /* viterbi 2 clock */
4132                 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
4133                 /* TS clock */
4134                 STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
4135                 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
4136                         goto err;
4137                 break;
4138
4139         default:
4140                 dprintk(FE_ERROR, 1, "Wrong demodulator!");
4141                 break;
4142         }
4143
4144         mutex_unlock(&state->internal->demod_lock);
4145         return 0;
4146 err:
4147         mutex_unlock(&state->internal->demod_lock);
4148         dprintk(FE_ERROR, 1, "I/O error");
4149         return -1;
4150 }
4151
4152 static void stv090x_release(struct dvb_frontend *fe)
4153 {
4154         struct stv090x_state *state = fe->demodulator_priv;
4155
4156         state->internal->num_used--;
4157         if (state->internal->num_used <= 0) {
4158
4159                 dprintk(FE_ERROR, 1, "Actually removing");
4160
4161                 remove_dev(state->internal);
4162                 kfree(state->internal);
4163         }
4164
4165         kfree(state);
4166 }
4167
4168 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
4169 {
4170         u32 reg = 0;
4171
4172         reg = stv090x_read_reg(state, STV090x_GENCFG);
4173
4174         switch (ldpc_mode) {
4175         case STV090x_DUAL:
4176         default:
4177                 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
4178                         /* set LDPC to dual mode */
4179                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
4180                                 goto err;
4181
4182                         state->demod_mode = STV090x_DUAL;
4183
4184                         reg = stv090x_read_reg(state, STV090x_TSTRES0);
4185                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4186                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4187                                 goto err;
4188                         STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4189                         if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4190                                 goto err;
4191
4192                         if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
4193                                 goto err;
4194                         if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
4195                                 goto err;
4196                         if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
4197                                 goto err;
4198                         if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
4199                                 goto err;
4200                         if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
4201                                 goto err;
4202                         if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
4203                                 goto err;
4204                         if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
4205                                 goto err;
4206
4207                         if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
4208                                 goto err;
4209                         if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
4210                                 goto err;
4211                         if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
4212                                 goto err;
4213                         if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
4214                                 goto err;
4215                         if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
4216                                 goto err;
4217                         if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
4218                                 goto err;
4219                         if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
4220                                 goto err;
4221
4222                         if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
4223                                 goto err;
4224                         if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
4225                                 goto err;
4226                 }
4227                 break;
4228
4229         case STV090x_SINGLE:
4230                 if (stv090x_stop_modcod(state) < 0)
4231                         goto err;
4232                 if (stv090x_activate_modcod_single(state) < 0)
4233                         goto err;
4234
4235                 if (state->demod == STV090x_DEMODULATOR_1) {
4236                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
4237                                 goto err;
4238                 } else {
4239                         if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
4240                                 goto err;
4241                 }
4242
4243                 reg = stv090x_read_reg(state, STV090x_TSTRES0);
4244                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
4245                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4246                         goto err;
4247                 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
4248                 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
4249                         goto err;
4250
4251                 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
4252                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
4253                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4254                         goto err;
4255                 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
4256                 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
4257                         goto err;
4258                 break;
4259         }
4260
4261         return 0;
4262 err:
4263         dprintk(FE_ERROR, 1, "I/O error");
4264         return -1;
4265 }
4266
4267 /* return (Hz), clk in Hz*/
4268 static u32 stv090x_get_mclk(struct stv090x_state *state)
4269 {
4270         const struct stv090x_config *config = state->config;
4271         u32 div, reg;
4272         u8 ratio;
4273
4274         div = stv090x_read_reg(state, STV090x_NCOARSE);
4275         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4276         ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
4277
4278         return (div + 1) * config->xtal / ratio; /* kHz */
4279 }
4280
4281 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
4282 {
4283         const struct stv090x_config *config = state->config;
4284         u32 reg, div, clk_sel;
4285
4286         reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
4287         clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
4288
4289         div = ((clk_sel * mclk) / config->xtal) - 1;
4290
4291         reg = stv090x_read_reg(state, STV090x_NCOARSE);
4292         STV090x_SETFIELD(reg, M_DIV_FIELD, div);
4293         if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
4294                 goto err;
4295
4296         state->internal->mclk = stv090x_get_mclk(state);
4297
4298         /*Set the DiseqC frequency to 22KHz */
4299         div = state->internal->mclk / 704000;
4300         if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
4301                 goto err;
4302         if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
4303                 goto err;
4304
4305         return 0;
4306 err:
4307         dprintk(FE_ERROR, 1, "I/O error");
4308         return -1;
4309 }
4310
4311 static int stv0900_set_tspath(struct stv090x_state *state)
4312 {
4313         u32 reg;
4314
4315         if (state->internal->dev_ver >= 0x20) {
4316                 switch (state->config->ts1_mode) {
4317                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4318                 case STV090x_TSMODE_DVBCI:
4319                         switch (state->config->ts2_mode) {
4320                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4321                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4322                         default:
4323                                 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4324                                 break;
4325
4326                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4327                         case STV090x_TSMODE_DVBCI:
4328                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
4329                                         goto err;
4330                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4331                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4332                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4333                                         goto err;
4334                                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4335                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4336                                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4337                                         goto err;
4338                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4339                                         goto err;
4340                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4341                                         goto err;
4342                                 break;
4343                         }
4344                         break;
4345
4346                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4347                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4348                 default:
4349                         switch (state->config->ts2_mode) {
4350                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4351                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4352                         default:
4353                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4354                                         goto err;
4355                                 break;
4356
4357                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4358                         case STV090x_TSMODE_DVBCI:
4359                                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
4360                                         goto err;
4361                                 break;
4362                         }
4363                         break;
4364                 }
4365         } else {
4366                 switch (state->config->ts1_mode) {
4367                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4368                 case STV090x_TSMODE_DVBCI:
4369                         switch (state->config->ts2_mode) {
4370                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4371                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4372                         default:
4373                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4374                                 break;
4375
4376                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4377                         case STV090x_TSMODE_DVBCI:
4378                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
4379                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4380                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4381                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4382                                         goto err;
4383                                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4384                                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
4385                                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4386                                         goto err;
4387                                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4388                                         goto err;
4389                                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4390                                         goto err;
4391                                 break;
4392                         }
4393                         break;
4394
4395                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4396                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4397                 default:
4398                         switch (state->config->ts2_mode) {
4399                         case STV090x_TSMODE_SERIAL_PUNCTURED:
4400                         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4401                         default:
4402                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4403                                 break;
4404
4405                         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4406                         case STV090x_TSMODE_DVBCI:
4407                                 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
4408                                 break;
4409                         }
4410                         break;
4411                 }
4412         }
4413
4414         switch (state->config->ts1_mode) {
4415         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4416                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4417                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4418                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4419                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4420                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4421                         goto err;
4422                 break;
4423
4424         case STV090x_TSMODE_DVBCI:
4425                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4426                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4427                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4428                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4429                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4430                         goto err;
4431                 break;
4432
4433         case STV090x_TSMODE_SERIAL_PUNCTURED:
4434                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4435                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4436                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4437                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4438                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4439                         goto err;
4440                 break;
4441
4442         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4443                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4444                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
4445                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4446                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4447                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4448                         goto err;
4449                 break;
4450
4451         default:
4452                 break;
4453         }
4454
4455         switch (state->config->ts2_mode) {
4456         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4457                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4458                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4459                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4460                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4461                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4462                         goto err;
4463                 break;
4464
4465         case STV090x_TSMODE_DVBCI:
4466                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4467                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4468                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4469                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4470                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4471                         goto err;
4472                 break;
4473
4474         case STV090x_TSMODE_SERIAL_PUNCTURED:
4475                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4476                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4477                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4478                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4479                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4480                         goto err;
4481                 break;
4482
4483         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4484                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4485                 STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
4486                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4487                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4488                 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4489                         goto err;
4490                 break;
4491
4492         default:
4493                 break;
4494         }
4495
4496         if (state->config->ts1_clk > 0) {
4497                 u32 speed;
4498
4499                 switch (state->config->ts1_mode) {
4500                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4501                 case STV090x_TSMODE_DVBCI:
4502                 default:
4503                         speed = state->internal->mclk /
4504                                 (state->config->ts1_clk / 4);
4505                         if (speed < 0x08)
4506                                 speed = 0x08;
4507                         if (speed > 0xFF)
4508                                 speed = 0xFF;
4509                         break;
4510                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4511                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4512                         speed = state->internal->mclk /
4513                                 (state->config->ts1_clk / 32);
4514                         if (speed < 0x20)
4515                                 speed = 0x20;
4516                         if (speed > 0xFF)
4517                                 speed = 0xFF;
4518                         break;
4519                 }
4520                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4521                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4522                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4523                         goto err;
4524                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4525                         goto err;
4526         }
4527
4528         if (state->config->ts2_clk > 0) {
4529                 u32 speed;
4530
4531                 switch (state->config->ts2_mode) {
4532                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4533                 case STV090x_TSMODE_DVBCI:
4534                 default:
4535                         speed = state->internal->mclk /
4536                                 (state->config->ts2_clk / 4);
4537                         if (speed < 0x08)
4538                                 speed = 0x08;
4539                         if (speed > 0xFF)
4540                                 speed = 0xFF;
4541                         break;
4542                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4543                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4544                         speed = state->internal->mclk /
4545                                 (state->config->ts2_clk / 32);
4546                         if (speed < 0x20)
4547                                 speed = 0x20;
4548                         if (speed > 0xFF)
4549                                 speed = 0xFF;
4550                         break;
4551                 }
4552                 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4553                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4554                 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4555                         goto err;
4556                 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
4557                         goto err;
4558         }
4559
4560         reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4561         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4562         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4563                 goto err;
4564         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4565         if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4566                 goto err;
4567
4568         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4569         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4570         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4571                 goto err;
4572         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4573         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4574                 goto err;
4575
4576         return 0;
4577 err:
4578         dprintk(FE_ERROR, 1, "I/O error");
4579         return -1;
4580 }
4581
4582 static int stv0903_set_tspath(struct stv090x_state *state)
4583 {
4584         u32 reg;
4585
4586         if (state->internal->dev_ver >= 0x20) {
4587                 switch (state->config->ts1_mode) {
4588                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4589                 case STV090x_TSMODE_DVBCI:
4590                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4591                         break;
4592
4593                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4594                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4595                 default:
4596                         stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
4597                         break;
4598                 }
4599         } else {
4600                 switch (state->config->ts1_mode) {
4601                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4602                 case STV090x_TSMODE_DVBCI:
4603                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4604                         break;
4605
4606                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4607                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4608                 default:
4609                         stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4610                         break;
4611                 }
4612         }
4613
4614         switch (state->config->ts1_mode) {
4615         case STV090x_TSMODE_PARALLEL_PUNCTURED:
4616                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4617                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4618                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4619                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4620                         goto err;
4621                 break;
4622
4623         case STV090x_TSMODE_DVBCI:
4624                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4625                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4626                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4627                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4628                         goto err;
4629                 break;
4630
4631         case STV090x_TSMODE_SERIAL_PUNCTURED:
4632                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4633                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4634                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4635                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4636                         goto err;
4637                 break;
4638
4639         case STV090x_TSMODE_SERIAL_CONTINUOUS:
4640                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4641                 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4642                 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4643                 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4644                         goto err;
4645                 break;
4646
4647         default:
4648                 break;
4649         }
4650
4651         if (state->config->ts1_clk > 0) {
4652                 u32 speed;
4653
4654                 switch (state->config->ts1_mode) {
4655                 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4656                 case STV090x_TSMODE_DVBCI:
4657                 default:
4658                         speed = state->internal->mclk /
4659                                 (state->config->ts1_clk / 4);
4660                         if (speed < 0x08)
4661                                 speed = 0x08;
4662                         if (speed > 0xFF)
4663                                 speed = 0xFF;
4664                         break;
4665                 case STV090x_TSMODE_SERIAL_PUNCTURED:
4666                 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4667                         speed = state->internal->mclk /
4668                                 (state->config->ts1_clk / 32);
4669                         if (speed < 0x20)
4670                                 speed = 0x20;
4671                         if (speed > 0xFF)
4672                                 speed = 0xFF;
4673                         break;
4674                 }
4675                 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4676                 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4677                 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4678                         goto err;
4679                 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
4680                         goto err;
4681         }
4682
4683         reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4684         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4685         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4686                 goto err;
4687         STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4688         if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4689                 goto err;
4690
4691         return 0;
4692 err:
4693         dprintk(FE_ERROR, 1, "I/O error");
4694         return -1;
4695 }
4696
4697 static int stv090x_init(struct dvb_frontend *fe)
4698 {
4699         struct stv090x_state *state = fe->demodulator_priv;
4700         const struct stv090x_config *config = state->config;
4701         u32 reg;
4702
4703         if (state->internal->mclk == 0) {
4704                 /* call tuner init to configure the tuner's clock output
4705                    divider directly before setting up the master clock of
4706                    the stv090x. */
4707                 if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4708                         goto err;
4709
4710                 if (config->tuner_init) {
4711                         if (config->tuner_init(fe) < 0)
4712                                 goto err_gateoff;
4713                 }
4714
4715                 if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4716                         goto err;
4717
4718                 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4719                 msleep(5);
4720                 if (stv090x_write_reg(state, STV090x_SYNTCTRL,
4721                                       0x20 | config->clk_mode) < 0)
4722                         goto err;
4723                 stv090x_get_mclk(state);
4724         }
4725
4726         if (stv090x_wakeup(fe) < 0) {
4727                 dprintk(FE_ERROR, 1, "Error waking device");
4728                 goto err;
4729         }
4730
4731         if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4732                 goto err;
4733
4734         reg = STV090x_READ_DEMOD(state, TNRCFG2);
4735         STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4736         if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4737                 goto err;
4738         reg = STV090x_READ_DEMOD(state, DEMOD);
4739         STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4740         if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4741                 goto err;
4742
4743         if (stv090x_i2c_gate_ctrl(state, 1) < 0)
4744                 goto err;
4745
4746         if (config->tuner_set_mode) {
4747                 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4748                         goto err_gateoff;
4749         }
4750
4751         if (config->tuner_init) {
4752                 if (config->tuner_init(fe) < 0)
4753                         goto err_gateoff;
4754         }
4755
4756         if (stv090x_i2c_gate_ctrl(state, 0) < 0)
4757                 goto err;
4758
4759         if (state->device == STV0900) {
4760                 if (stv0900_set_tspath(state) < 0)
4761                         goto err;
4762         } else {
4763                 if (stv0903_set_tspath(state) < 0)
4764                         goto err;
4765         }
4766
4767         return 0;
4768
4769 err_gateoff:
4770         stv090x_i2c_gate_ctrl(state, 0);
4771 err:
4772         dprintk(FE_ERROR, 1, "I/O error");
4773         return -1;
4774 }
4775
4776 static int stv090x_setup(struct dvb_frontend *fe)
4777 {
4778         struct stv090x_state *state = fe->demodulator_priv;
4779         const struct stv090x_config *config = state->config;
4780         const struct stv090x_reg *stv090x_initval = NULL;
4781         const struct stv090x_reg *stv090x_cut20_val = NULL;
4782         unsigned long t1_size = 0, t2_size = 0;
4783         u32 reg = 0;
4784
4785         int i;
4786
4787         if (state->device == STV0900) {
4788                 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4789                 stv090x_initval = stv0900_initval;
4790                 t1_size = ARRAY_SIZE(stv0900_initval);
4791                 stv090x_cut20_val = stv0900_cut20_val;
4792                 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4793         } else if (state->device == STV0903) {
4794                 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4795                 stv090x_initval = stv0903_initval;
4796                 t1_size = ARRAY_SIZE(stv0903_initval);
4797                 stv090x_cut20_val = stv0903_cut20_val;
4798                 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4799         }
4800
4801         /* STV090x init */
4802
4803         /* Stop Demod */
4804         if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
4805                 goto err;
4806         if (state->device == STV0900)
4807                 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
4808                         goto err;
4809
4810         msleep(5);
4811
4812         /* Set No Tuner Mode */
4813         if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
4814                 goto err;
4815         if (state->device == STV0900)
4816                 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
4817                         goto err;
4818
4819         /* I2C repeater OFF */
4820         STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4821         if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
4822                 goto err;
4823         if (state->device == STV0900)
4824                 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
4825                         goto err;
4826
4827         if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4828                 goto err;
4829         msleep(5);
4830         if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4831                 goto err;
4832         if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4833                 goto err;
4834         msleep(5);
4835
4836         /* write initval */
4837         dprintk(FE_DEBUG, 1, "Setting up initial values");
4838         for (i = 0; i < t1_size; i++) {
4839                 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4840                         goto err;
4841         }
4842
4843         state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
4844         if (state->internal->dev_ver >= 0x20) {
4845                 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4846                         goto err;
4847
4848                 /* write cut20_val*/
4849                 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4850                 for (i = 0; i < t2_size; i++) {
4851                         if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4852                                 goto err;
4853                 }
4854
4855         } else if (state->internal->dev_ver < 0x20) {
4856                 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4857                         state->internal->dev_ver);
4858
4859                 goto err;
4860         } else if (state->internal->dev_ver > 0x30) {
4861                 /* we shouldn't bail out from here */
4862                 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4863                         state->internal->dev_ver);
4864         }
4865
4866         /* ADC1 range */
4867         reg = stv090x_read_reg(state, STV090x_TSTTNR1);
4868         STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
4869                 (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
4870         if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
4871                 goto err;
4872
4873         /* ADC2 range */
4874         reg = stv090x_read_reg(state, STV090x_TSTTNR3);
4875         STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
4876                 (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
4877         if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
4878                 goto err;
4879
4880         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4881                 goto err;
4882         if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4883                 goto err;
4884
4885         return 0;
4886 err:
4887         dprintk(FE_ERROR, 1, "I/O error");
4888         return -1;
4889 }
4890
4891 static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
4892                             u8 value, u8 xor_value)
4893 {
4894         struct stv090x_state *state = fe->demodulator_priv;
4895         u8 reg = 0;
4896
4897         STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
4898         STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
4899         STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
4900
4901         return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
4902 }
4903
4904 static const struct dvb_frontend_ops stv090x_ops = {
4905         .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
4906         .info = {
4907                 .name                   = "STV090x Multistandard",
4908                 .frequency_min_hz       =  950 * MHz,
4909                 .frequency_max_hz       = 2150 * MHz,
4910                 .symbol_rate_min        = 1000000,
4911                 .symbol_rate_max        = 45000000,
4912                 .caps                   = FE_CAN_INVERSION_AUTO |
4913                                           FE_CAN_FEC_AUTO       |
4914                                           FE_CAN_QPSK           |
4915                                           FE_CAN_2G_MODULATION
4916         },
4917
4918         .release                        = stv090x_release,
4919         .init                           = stv090x_init,
4920
4921         .sleep                          = stv090x_sleep,
4922         .get_frontend_algo              = stv090x_frontend_algo,
4923
4924         .diseqc_send_master_cmd         = stv090x_send_diseqc_msg,
4925         .diseqc_send_burst              = stv090x_send_diseqc_burst,
4926         .diseqc_recv_slave_reply        = stv090x_recv_slave_reply,
4927         .set_tone                       = stv090x_set_tone,
4928
4929         .search                         = stv090x_search,
4930         .read_status                    = stv090x_read_status,
4931         .read_ber                       = stv090x_read_per,
4932         .read_signal_strength           = stv090x_read_signal_strength,
4933         .read_snr                       = stv090x_read_cnr,
4934 };
4935
4936
4937 struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
4938                                     struct i2c_adapter *i2c,
4939                                     enum stv090x_demodulator demod)
4940 {
4941         struct stv090x_state *state = NULL;
4942         struct stv090x_dev *temp_int;
4943
4944         state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4945         if (state == NULL)
4946                 goto error;
4947
4948         state->verbose                          = &verbose;
4949         state->config                           = config;
4950         state->i2c                              = i2c;
4951         state->frontend.ops                     = stv090x_ops;
4952         state->frontend.demodulator_priv        = state;
4953         state->demod                            = demod;
4954         state->demod_mode                       = config->demod_mode; /* Single or Dual mode */
4955         state->device                           = config->device;
4956         state->rolloff                          = STV090x_RO_35; /* default */
4957
4958         temp_int = find_dev(state->i2c,
4959                                 state->config->address);
4960
4961         if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
4962                 state->internal = temp_int->internal;
4963                 state->internal->num_used++;
4964                 dprintk(FE_INFO, 1, "Found Internal Structure!");
4965         } else {
4966                 state->internal = kmalloc(sizeof(struct stv090x_internal),
4967                                           GFP_KERNEL);
4968                 if (!state->internal)
4969                         goto error;
4970                 temp_int = append_internal(state->internal);
4971                 if (!temp_int) {
4972                         kfree(state->internal);
4973                         goto error;
4974                 }
4975                 state->internal->num_used = 1;
4976                 state->internal->mclk = 0;
4977                 state->internal->dev_ver = 0;
4978                 state->internal->i2c_adap = state->i2c;
4979                 state->internal->i2c_addr = state->config->address;
4980                 dprintk(FE_INFO, 1, "Create New Internal Structure!");
4981
4982                 mutex_init(&state->internal->demod_lock);
4983                 mutex_init(&state->internal->tuner_lock);
4984
4985                 if (stv090x_setup(&state->frontend) < 0) {
4986                         dprintk(FE_ERROR, 1, "Error setting up device");
4987                         goto err_remove;
4988                 }
4989         }
4990
4991         if (state->internal->dev_ver >= 0x30)
4992                 state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
4993
4994         /* workaround for stuck DiSEqC output */
4995         if (config->diseqc_envelope_mode)
4996                 stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
4997
4998         config->set_gpio = stv090x_set_gpio;
4999
5000         dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
5001                state->device == STV0900 ? "STV0900" : "STV0903",
5002                demod,
5003                state->internal->dev_ver);
5004
5005         return &state->frontend;
5006
5007 err_remove:
5008         remove_dev(state->internal);
5009         kfree(state->internal);
5010 error:
5011         kfree(state);
5012         return NULL;
5013 }
5014 EXPORT_SYMBOL(stv090x_attach);
5015 MODULE_PARM_DESC(verbose, "Set Verbosity level");
5016 MODULE_AUTHOR("Manu Abraham");
5017 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
5018 MODULE_LICENSE("GPL");