1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for NXT2002 and NXT2004 - VSB/QAM
5 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
6 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
7 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
8 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 /* Max transfer size done by I2C transfer functions */
15 #define MAX_XFER_SIZE 256
19 #define CRC_CCIT_MASK 0x1021
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/slab.h>
25 #include <linux/string.h>
27 #include <media/dvb_frontend.h>
30 struct nxt200x_state {
32 struct i2c_adapter* i2c;
33 const struct nxt200x_config* config;
34 struct dvb_frontend frontend;
36 /* demodulator private data */
37 nxt_chip_type demod_chip;
42 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
44 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
47 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
49 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
50 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
57 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
60 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
62 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
63 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
70 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
71 const u8 *buf, u8 len)
73 u8 buf2[MAX_XFER_SIZE];
75 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
77 if (1 + len > sizeof(buf2)) {
78 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
84 memcpy(&buf2[1], buf, len);
86 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
87 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
88 __func__, state->config->demod_address, err);
94 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
98 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
99 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
103 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
104 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
105 __func__, state->config->demod_address, err);
111 static u16 nxt200x_crc(u16 crc, u8 c)
114 u16 input = (u16) c & 0xFF;
118 if((crc^input) & 0x8000)
119 crc=(crc<<1)^CRC_CCIT_MASK;
127 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
130 dprintk("%s\n", __func__);
132 /* set multi register register */
133 nxt200x_writebytes(state, 0x35, ®, 1);
135 /* send the actual data */
136 nxt200x_writebytes(state, 0x36, data, len);
138 switch (state->demod_chip) {
144 /* probably not right, but gives correct values */
152 len2 = ((attr << 4) | 0x10) | len;
160 /* set multi register length */
161 nxt200x_writebytes(state, 0x34, &len2, 1);
163 /* toggle the multireg write bit */
164 nxt200x_writebytes(state, 0x21, &buf, 1);
166 nxt200x_readbytes(state, 0x21, &buf, 1);
168 switch (state->demod_chip) {
170 if ((buf & 0x02) == 0)
182 pr_warn("Error writing multireg register 0x%02X\n", reg);
187 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
191 dprintk("%s\n", __func__);
193 /* set multi register register */
194 nxt200x_writebytes(state, 0x35, ®, 1);
196 switch (state->demod_chip) {
198 /* set multi register length */
200 nxt200x_writebytes(state, 0x34, &len2, 1);
202 /* read the actual data */
203 nxt200x_readbytes(state, reg, data, len);
207 /* probably not right, but gives correct values */
215 /* set multi register length */
216 len2 = (attr << 4) | len;
217 nxt200x_writebytes(state, 0x34, &len2, 1);
219 /* toggle the multireg bit*/
221 nxt200x_writebytes(state, 0x21, &buf, 1);
223 /* read the actual data */
224 for(i = 0; i < len; i++) {
225 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
235 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
237 u8 buf, stopval, counter = 0;
238 dprintk("%s\n", __func__);
240 /* set correct stop value */
241 switch (state->demod_chip) {
254 nxt200x_writebytes(state, 0x22, &buf, 1);
256 while (counter < 20) {
257 nxt200x_readbytes(state, 0x31, &buf, 1);
264 pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
268 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
271 dprintk("%s\n", __func__);
274 nxt200x_writebytes(state, 0x22, &buf, 1);
277 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
281 dprintk("%s\n", __func__);
284 nxt200x_writebytes(state, 0x2b, buf, 1);
286 nxt200x_writebytes(state, 0x34, buf, 1);
288 nxt200x_writebytes(state, 0x35, buf, 1);
289 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
290 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
291 nxt200x_writebytes(state, 0x36, buf, 9);
293 nxt200x_writebytes(state, 0x21, buf, 1);
295 while (counter < 20) {
296 nxt200x_readbytes(state, 0x21, buf, 1);
303 pr_warn("Timeout waiting for nxt2004 to init.\n");
308 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
312 dprintk("%s\n", __func__);
314 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
316 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
317 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
318 switch (state->demod_chip) {
320 if (i2c_writebytes(state, data[0], data+1, 4))
321 pr_warn("error writing to tuner\n");
322 /* wait until we have a lock */
324 i2c_readbytes(state, data[0], &buf, 1);
330 pr_warn("timeout waiting for tuner lock\n");
333 /* set the i2c transfer speed to the tuner */
335 nxt200x_writebytes(state, 0x20, &buf, 1);
337 /* setup to transfer 4 bytes via i2c */
339 nxt200x_writebytes(state, 0x34, &buf, 1);
341 /* write actual tuner bytes */
342 nxt200x_writebytes(state, 0x36, data+1, 4);
344 /* set tuner i2c address */
346 nxt200x_writebytes(state, 0x35, &buf, 1);
348 /* write UC Opmode to begin transfer */
350 nxt200x_writebytes(state, 0x21, &buf, 1);
353 nxt200x_readbytes(state, 0x21, &buf, 1);
354 if ((buf & 0x80)== 0x00)
359 pr_warn("timeout error writing to tuner\n");
368 static void nxt200x_agc_reset(struct nxt200x_state* state)
371 dprintk("%s\n", __func__);
373 switch (state->demod_chip) {
376 nxt200x_writebytes(state, 0x08, &buf, 1);
378 nxt200x_writebytes(state, 0x08, &buf, 1);
381 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
383 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
385 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
393 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
396 struct nxt200x_state* state = fe->demodulator_priv;
397 u8 buf[3], written = 0, chunkpos = 0;
398 u16 rambase, position, crc = 0;
400 dprintk("%s\n", __func__);
401 dprintk("Firmware is %zu bytes\n", fw->size);
403 /* Get the RAM base for this nxt2002 */
404 nxt200x_readbytes(state, 0x10, buf, 1);
411 dprintk("rambase on this nxt2002 is %04X\n", rambase);
413 /* Hold the micro in reset while loading firmware */
415 nxt200x_writebytes(state, 0x2B, buf, 1);
417 for (position = 0; position < fw->size; position++) {
421 buf[0] = ((rambase + position) >> 8);
422 buf[1] = (rambase + position) & 0xFF;
424 /* write starting address */
425 nxt200x_writebytes(state, 0x29, buf, 3);
430 if ((written % 4) == 0)
431 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
433 crc = nxt200x_crc(crc, fw->data[position]);
435 if ((written == 255) || (position+1 == fw->size)) {
436 /* write remaining bytes of firmware */
437 nxt200x_writebytes(state, chunkpos+4-(written %4),
438 &fw->data[position-(written %4) + 1],
444 nxt200x_writebytes(state, 0x2C, buf, 2);
446 /* do a read to stop things */
447 nxt200x_readbytes(state, 0x2A, buf, 1);
449 /* set transfer mode to complete */
451 nxt200x_writebytes(state, 0x2B, buf, 1);
460 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
463 struct nxt200x_state* state = fe->demodulator_priv;
465 u16 rambase, position, crc=0;
467 dprintk("%s\n", __func__);
468 dprintk("Firmware is %zu bytes\n", fw->size);
473 /* hold the micro in reset while loading firmware */
475 nxt200x_writebytes(state, 0x2B, buf,1);
477 /* calculate firmware CRC */
478 for (position = 0; position < fw->size; position++) {
479 crc = nxt200x_crc(crc, fw->data[position]);
482 buf[0] = rambase >> 8;
483 buf[1] = rambase & 0xFF;
485 /* write starting address */
486 nxt200x_writebytes(state,0x29,buf,3);
488 for (position = 0; position < fw->size;) {
489 nxt200x_writebytes(state, 0x2C, &fw->data[position],
490 fw->size-position > 255 ? 255 : fw->size-position);
491 position += (fw->size-position > 255 ? 255 : fw->size-position);
496 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
499 nxt200x_writebytes(state, 0x2C, buf,2);
501 /* do a read to stop things */
502 nxt200x_readbytes(state, 0x2C, buf, 1);
504 /* set transfer mode to complete */
506 nxt200x_writebytes(state, 0x2B, buf,1);
511 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
513 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
514 struct nxt200x_state* state = fe->demodulator_priv;
517 /* stop the micro first */
518 nxt200x_microcontroller_stop(state);
520 if (state->demod_chip == NXT2004) {
521 /* make sure demod is set to digital */
523 nxt200x_writebytes(state, 0x14, buf, 1);
525 nxt200x_writebytes(state, 0x17, buf, 1);
528 /* set additional params */
529 switch (p->modulation) {
532 /* Set punctured clock for QAM */
533 /* This is just a guess since I am unable to test it */
534 if (state->config->set_ts_params)
535 state->config->set_ts_params(fe, 1);
538 /* Set non-punctured clock for VSB */
539 if (state->config->set_ts_params)
540 state->config->set_ts_params(fe, 0);
547 if (fe->ops.tuner_ops.calc_regs) {
548 /* get tuning information */
549 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
551 /* write frequency information */
552 nxt200x_writetuner(state, buf);
555 /* reset the agc now that tuning has been completed */
556 nxt200x_agc_reset(state);
558 /* set target power level */
559 switch (p->modulation) {
571 nxt200x_writebytes(state, 0x42, buf, 1);
574 switch (state->demod_chip) {
585 nxt200x_writebytes(state, 0x57, buf, 1);
587 /* write sdm1 input */
590 switch (state->demod_chip) {
592 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
595 nxt200x_writebytes(state, 0x58, buf, 2);
602 /* write sdmx input */
603 switch (p->modulation) {
618 switch (state->demod_chip) {
620 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
623 nxt200x_writebytes(state, 0x5C, buf, 2);
630 /* write adc power lpf fc */
632 nxt200x_writebytes(state, 0x43, buf, 1);
634 if (state->demod_chip == NXT2004) {
638 nxt200x_writebytes(state, 0x46, buf, 2);
641 /* write accumulator2 input */
644 switch (state->demod_chip) {
646 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
649 nxt200x_writebytes(state, 0x4B, buf, 2);
658 nxt200x_writebytes(state, 0x4D, buf, 1);
660 /* write sdm12 lpf fc */
662 nxt200x_writebytes(state, 0x55, buf, 1);
664 /* write agc control reg */
666 nxt200x_writebytes(state, 0x41, buf, 1);
668 if (state->demod_chip == NXT2004) {
669 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
671 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
674 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
676 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
677 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
679 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
681 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
683 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
685 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
686 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
687 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
688 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
690 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
691 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
693 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
696 /* write agc ucgp0 */
697 switch (p->modulation) {
711 nxt200x_writebytes(state, 0x30, buf, 1);
713 /* write agc control reg */
715 nxt200x_writebytes(state, 0x41, buf, 1);
717 /* write accumulator2 input */
720 switch (state->demod_chip) {
722 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
723 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
726 nxt200x_writebytes(state, 0x49, buf, 2);
727 nxt200x_writebytes(state, 0x4B, buf, 2);
734 /* write agc control reg */
736 nxt200x_writebytes(state, 0x41, buf, 1);
738 nxt200x_microcontroller_start(state);
740 if (state->demod_chip == NXT2004) {
741 nxt2004_microcontroller_init(state);
746 nxt200x_writebytes(state, 0x5C, buf, 2);
749 /* adjacent channel detection should be done here, but I don't
750 have any stations with this need so I cannot test it */
755 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
757 struct nxt200x_state* state = fe->demodulator_priv;
759 nxt200x_readbytes(state, 0x31, &lock, 1);
763 *status |= FE_HAS_SIGNAL;
764 *status |= FE_HAS_CARRIER;
765 *status |= FE_HAS_VITERBI;
766 *status |= FE_HAS_SYNC;
767 *status |= FE_HAS_LOCK;
772 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
774 struct nxt200x_state* state = fe->demodulator_priv;
777 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
779 *ber = ((b[0] << 8) + b[1]) * 8;
784 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
786 struct nxt200x_state* state = fe->demodulator_priv;
790 /* setup to read cluster variance */
792 nxt200x_writebytes(state, 0xA1, b, 1);
794 /* get multreg val */
795 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
797 temp = (b[0] << 8) | b[1];
798 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
803 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
806 struct nxt200x_state* state = fe->demodulator_priv;
811 /* setup to read cluster variance */
813 nxt200x_writebytes(state, 0xA1, b, 1);
815 /* get multreg val from 0xA6 */
816 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
818 temp = (b[0] << 8) | b[1];
819 temp2 = 0x7FFF - temp;
821 /* snr will be in db */
823 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
824 else if (temp2 > 0x7EC0)
825 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
826 else if (temp2 > 0x7C00)
827 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
829 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
831 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
832 *snr = snrdb * (0xFFFF/32000);
837 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
839 struct nxt200x_state* state = fe->demodulator_priv;
842 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
848 static int nxt200x_sleep(struct dvb_frontend* fe)
853 static int nxt2002_init(struct dvb_frontend* fe)
855 struct nxt200x_state* state = fe->demodulator_priv;
856 const struct firmware *fw;
860 /* request the firmware, this will block until someone uploads it */
861 pr_debug("%s: Waiting for firmware upload (%s)...\n",
862 __func__, "/*(DEBLOBBED)*/");
863 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
864 state->i2c->dev.parent);
865 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
867 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
872 ret = nxt2002_load_firmware(fe, fw);
873 release_firmware(fw);
875 pr_err("%s: Writing firmware to device failed\n", __func__);
878 pr_info("%s: Firmware upload complete\n", __func__);
880 /* Put the micro into reset */
881 nxt200x_microcontroller_stop(state);
883 /* ensure transfer is complete */
885 nxt200x_writebytes(state, 0x2B, buf, 1);
887 /* Put the micro into reset for real this time */
888 nxt200x_microcontroller_stop(state);
890 /* soft reset everything (agc,frontend,eq,fec)*/
892 nxt200x_writebytes(state, 0x08, buf, 1);
894 nxt200x_writebytes(state, 0x08, buf, 1);
896 /* write agc sdm configure */
898 nxt200x_writebytes(state, 0x57, buf, 1);
900 /* write mod output format */
902 nxt200x_writebytes(state, 0x09, buf, 1);
904 /* write fec mpeg mode */
907 nxt200x_writebytes(state, 0xE9, buf, 2);
909 /* write mux selection */
911 nxt200x_writebytes(state, 0xCC, buf, 1);
916 static int nxt2004_init(struct dvb_frontend* fe)
918 struct nxt200x_state* state = fe->demodulator_priv;
919 const struct firmware *fw;
925 nxt200x_writebytes(state, 0x1E, buf, 1);
927 /* request the firmware, this will block until someone uploads it */
928 pr_debug("%s: Waiting for firmware upload (%s)...\n",
929 __func__, "/*(DEBLOBBED)*/");
930 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
931 state->i2c->dev.parent);
932 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
934 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
939 ret = nxt2004_load_firmware(fe, fw);
940 release_firmware(fw);
942 pr_err("%s: Writing firmware to device failed\n", __func__);
945 pr_info("%s: Firmware upload complete\n", __func__);
947 /* ensure transfer is complete */
949 nxt200x_writebytes(state, 0x19, buf, 1);
951 nxt2004_microcontroller_init(state);
952 nxt200x_microcontroller_stop(state);
953 nxt200x_microcontroller_stop(state);
954 nxt2004_microcontroller_init(state);
955 nxt200x_microcontroller_stop(state);
957 /* soft reset everything (agc,frontend,eq,fec)*/
959 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
961 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
963 /* write agc sdm configure */
965 nxt200x_writebytes(state, 0x57, buf, 1);
970 nxt200x_writebytes(state, 0x35, buf, 2);
972 nxt200x_writebytes(state, 0x34, buf, 1);
974 nxt200x_writebytes(state, 0x21, buf, 1);
978 nxt200x_writebytes(state, 0x0A, buf, 1);
982 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
984 /* write fec mpeg mode */
987 nxt200x_writebytes(state, 0xE9, buf, 2);
989 /* write mux selection */
991 nxt200x_writebytes(state, 0xCC, buf, 1);
994 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
996 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
999 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1001 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1002 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1004 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1007 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1009 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1011 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1012 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1013 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1015 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1017 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1018 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1020 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1022 nxt200x_readbytes(state, 0x10, buf, 1);
1024 nxt200x_writebytes(state, 0x10, buf, 1);
1025 nxt200x_readbytes(state, 0x0A, buf, 1);
1027 nxt200x_writebytes(state, 0x0A, buf, 1);
1029 nxt2004_microcontroller_init(state);
1032 nxt200x_writebytes(state, 0x0A, buf, 1);
1034 nxt200x_writebytes(state, 0xE9, buf, 1);
1036 nxt200x_writebytes(state, 0xEA, buf, 1);
1038 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1040 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1041 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1043 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1046 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1048 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1049 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1051 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1053 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1055 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1057 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1058 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1059 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1061 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1063 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1065 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1067 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1069 /* initialize tuner */
1070 nxt200x_readbytes(state, 0x10, buf, 1);
1072 nxt200x_writebytes(state, 0x10, buf, 1);
1074 nxt200x_writebytes(state, 0x13, buf, 1);
1076 nxt200x_writebytes(state, 0x16, buf, 1);
1078 nxt200x_writebytes(state, 0x14, buf, 1);
1080 nxt200x_writebytes(state, 0x14, buf, 1);
1081 nxt200x_writebytes(state, 0x17, buf, 1);
1082 nxt200x_writebytes(state, 0x14, buf, 1);
1083 nxt200x_writebytes(state, 0x17, buf, 1);
1088 static int nxt200x_init(struct dvb_frontend* fe)
1090 struct nxt200x_state* state = fe->demodulator_priv;
1093 if (!state->initialised) {
1094 switch (state->demod_chip) {
1096 ret = nxt2002_init(fe);
1099 ret = nxt2004_init(fe);
1105 state->initialised = 1;
1110 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1112 fesettings->min_delay_ms = 500;
1113 fesettings->step_size = 0;
1114 fesettings->max_drift = 0;
1118 static void nxt200x_release(struct dvb_frontend* fe)
1120 struct nxt200x_state* state = fe->demodulator_priv;
1124 static const struct dvb_frontend_ops nxt200x_ops;
1126 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1127 struct i2c_adapter* i2c)
1129 struct nxt200x_state* state = NULL;
1130 u8 buf [] = {0,0,0,0,0};
1132 /* allocate memory for the internal state */
1133 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1137 /* setup the state */
1138 state->config = config;
1140 state->initialised = 0;
1143 nxt200x_readbytes(state, 0x00, buf, 5);
1144 dprintk("NXT info: %*ph\n", 5, buf);
1146 /* set demod chip */
1149 state->demod_chip = NXT2002;
1150 pr_info("NXT2002 Detected\n");
1153 state->demod_chip = NXT2004;
1154 pr_info("NXT2004 Detected\n");
1160 /* make sure demod chip is supported */
1161 switch (state->demod_chip) {
1163 if (buf[0] != 0x04) goto error; /* device id */
1164 if (buf[1] != 0x02) goto error; /* fab id */
1165 if (buf[2] != 0x11) goto error; /* month */
1166 if (buf[3] != 0x20) goto error; /* year msb */
1167 if (buf[4] != 0x00) goto error; /* year lsb */
1170 if (buf[0] != 0x05) goto error; /* device id */
1176 /* create dvb_frontend */
1177 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1178 state->frontend.demodulator_priv = state;
1179 return &state->frontend;
1183 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1187 static const struct dvb_frontend_ops nxt200x_ops = {
1188 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1190 .name = "Nextwave NXT200X VSB/QAM frontend",
1191 .frequency_min_hz = 54 * MHz,
1192 .frequency_max_hz = 860 * MHz,
1193 .frequency_stepsize_hz = 166666, /* stepsize is just a guess */
1194 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1195 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1196 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1199 .release = nxt200x_release,
1201 .init = nxt200x_init,
1202 .sleep = nxt200x_sleep,
1204 .set_frontend = nxt200x_setup_frontend_parameters,
1205 .get_tune_settings = nxt200x_get_tune_settings,
1207 .read_status = nxt200x_read_status,
1208 .read_ber = nxt200x_read_ber,
1209 .read_signal_strength = nxt200x_read_signal_strength,
1210 .read_snr = nxt200x_read_snr,
1211 .read_ucblocks = nxt200x_read_ucblocks,
1214 module_param(debug, int, 0644);
1215 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1217 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1218 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1219 MODULE_LICENSE("GPL");
1221 EXPORT_SYMBOL_GPL(nxt200x_attach);