1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for NXT2002 and NXT2004 - VSB/QAM
5 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
6 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
7 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
8 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 /* Max transfer size done by I2C transfer functions */
15 #define MAX_XFER_SIZE 256
19 #define CRC_CCIT_MASK 0x1021
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/slab.h>
25 #include <linux/string.h>
27 #include <media/dvb_frontend.h>
30 struct nxt200x_state {
32 struct i2c_adapter* i2c;
33 const struct nxt200x_config* config;
34 struct dvb_frontend frontend;
36 /* demodulator private data */
37 nxt_chip_type demod_chip;
42 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
44 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
47 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
49 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
50 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
57 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
60 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
62 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
63 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
70 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
71 const u8 *buf, u8 len)
73 u8 buf2[MAX_XFER_SIZE];
75 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
77 if (1 + len > sizeof(buf2)) {
78 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
84 memcpy(&buf2[1], buf, len);
86 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
87 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
88 __func__, state->config->demod_address, err);
94 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
98 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
99 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
103 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
104 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
105 __func__, state->config->demod_address, err);
111 static u16 nxt200x_crc(u16 crc, u8 c)
114 u16 input = (u16) c & 0xFF;
118 if((crc^input) & 0x8000)
119 crc=(crc<<1)^CRC_CCIT_MASK;
127 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
130 dprintk("%s\n", __func__);
132 /* set multi register register */
133 nxt200x_writebytes(state, 0x35, ®, 1);
135 /* send the actual data */
136 nxt200x_writebytes(state, 0x36, data, len);
138 switch (state->demod_chip) {
144 /* probably not right, but gives correct values */
152 len2 = ((attr << 4) | 0x10) | len;
159 /* set multi register length */
160 nxt200x_writebytes(state, 0x34, &len2, 1);
162 /* toggle the multireg write bit */
163 nxt200x_writebytes(state, 0x21, &buf, 1);
165 nxt200x_readbytes(state, 0x21, &buf, 1);
167 switch (state->demod_chip) {
169 if ((buf & 0x02) == 0)
180 pr_warn("Error writing multireg register 0x%02X\n", reg);
185 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
189 dprintk("%s\n", __func__);
191 /* set multi register register */
192 nxt200x_writebytes(state, 0x35, ®, 1);
194 switch (state->demod_chip) {
196 /* set multi register length */
198 nxt200x_writebytes(state, 0x34, &len2, 1);
200 /* read the actual data */
201 nxt200x_readbytes(state, reg, data, len);
204 /* probably not right, but gives correct values */
212 /* set multi register length */
213 len2 = (attr << 4) | len;
214 nxt200x_writebytes(state, 0x34, &len2, 1);
216 /* toggle the multireg bit*/
218 nxt200x_writebytes(state, 0x21, &buf, 1);
220 /* read the actual data */
221 for(i = 0; i < len; i++) {
222 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
230 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
232 u8 buf, stopval, counter = 0;
233 dprintk("%s\n", __func__);
235 /* set correct stop value */
236 switch (state->demod_chip) {
249 nxt200x_writebytes(state, 0x22, &buf, 1);
251 while (counter < 20) {
252 nxt200x_readbytes(state, 0x31, &buf, 1);
259 pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
263 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
266 dprintk("%s\n", __func__);
269 nxt200x_writebytes(state, 0x22, &buf, 1);
272 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
276 dprintk("%s\n", __func__);
279 nxt200x_writebytes(state, 0x2b, buf, 1);
281 nxt200x_writebytes(state, 0x34, buf, 1);
283 nxt200x_writebytes(state, 0x35, buf, 1);
284 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
285 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
286 nxt200x_writebytes(state, 0x36, buf, 9);
288 nxt200x_writebytes(state, 0x21, buf, 1);
290 while (counter < 20) {
291 nxt200x_readbytes(state, 0x21, buf, 1);
298 pr_warn("Timeout waiting for nxt2004 to init.\n");
303 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
307 dprintk("%s\n", __func__);
309 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
311 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
312 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
313 switch (state->demod_chip) {
315 if (i2c_writebytes(state, data[0], data+1, 4))
316 pr_warn("error writing to tuner\n");
317 /* wait until we have a lock */
319 i2c_readbytes(state, data[0], &buf, 1);
325 pr_warn("timeout waiting for tuner lock\n");
328 /* set the i2c transfer speed to the tuner */
330 nxt200x_writebytes(state, 0x20, &buf, 1);
332 /* setup to transfer 4 bytes via i2c */
334 nxt200x_writebytes(state, 0x34, &buf, 1);
336 /* write actual tuner bytes */
337 nxt200x_writebytes(state, 0x36, data+1, 4);
339 /* set tuner i2c address */
341 nxt200x_writebytes(state, 0x35, &buf, 1);
343 /* write UC Opmode to begin transfer */
345 nxt200x_writebytes(state, 0x21, &buf, 1);
348 nxt200x_readbytes(state, 0x21, &buf, 1);
349 if ((buf & 0x80)== 0x00)
354 pr_warn("timeout error writing to tuner\n");
362 static void nxt200x_agc_reset(struct nxt200x_state* state)
365 dprintk("%s\n", __func__);
367 switch (state->demod_chip) {
370 nxt200x_writebytes(state, 0x08, &buf, 1);
372 nxt200x_writebytes(state, 0x08, &buf, 1);
375 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
377 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
379 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
387 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
390 struct nxt200x_state* state = fe->demodulator_priv;
391 u8 buf[3], written = 0, chunkpos = 0;
392 u16 rambase, position, crc = 0;
394 dprintk("%s\n", __func__);
395 dprintk("Firmware is %zu bytes\n", fw->size);
397 /* Get the RAM base for this nxt2002 */
398 nxt200x_readbytes(state, 0x10, buf, 1);
405 dprintk("rambase on this nxt2002 is %04X\n", rambase);
407 /* Hold the micro in reset while loading firmware */
409 nxt200x_writebytes(state, 0x2B, buf, 1);
411 for (position = 0; position < fw->size; position++) {
415 buf[0] = ((rambase + position) >> 8);
416 buf[1] = (rambase + position) & 0xFF;
418 /* write starting address */
419 nxt200x_writebytes(state, 0x29, buf, 3);
424 if ((written % 4) == 0)
425 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
427 crc = nxt200x_crc(crc, fw->data[position]);
429 if ((written == 255) || (position+1 == fw->size)) {
430 /* write remaining bytes of firmware */
431 nxt200x_writebytes(state, chunkpos+4-(written %4),
432 &fw->data[position-(written %4) + 1],
438 nxt200x_writebytes(state, 0x2C, buf, 2);
440 /* do a read to stop things */
441 nxt200x_readbytes(state, 0x2A, buf, 1);
443 /* set transfer mode to complete */
445 nxt200x_writebytes(state, 0x2B, buf, 1);
454 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
457 struct nxt200x_state* state = fe->demodulator_priv;
459 u16 rambase, position, crc=0;
461 dprintk("%s\n", __func__);
462 dprintk("Firmware is %zu bytes\n", fw->size);
467 /* hold the micro in reset while loading firmware */
469 nxt200x_writebytes(state, 0x2B, buf,1);
471 /* calculate firmware CRC */
472 for (position = 0; position < fw->size; position++) {
473 crc = nxt200x_crc(crc, fw->data[position]);
476 buf[0] = rambase >> 8;
477 buf[1] = rambase & 0xFF;
479 /* write starting address */
480 nxt200x_writebytes(state,0x29,buf,3);
482 for (position = 0; position < fw->size;) {
483 nxt200x_writebytes(state, 0x2C, &fw->data[position],
484 fw->size-position > 255 ? 255 : fw->size-position);
485 position += (fw->size-position > 255 ? 255 : fw->size-position);
490 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
493 nxt200x_writebytes(state, 0x2C, buf,2);
495 /* do a read to stop things */
496 nxt200x_readbytes(state, 0x2C, buf, 1);
498 /* set transfer mode to complete */
500 nxt200x_writebytes(state, 0x2B, buf,1);
505 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
507 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
508 struct nxt200x_state* state = fe->demodulator_priv;
511 /* stop the micro first */
512 nxt200x_microcontroller_stop(state);
514 if (state->demod_chip == NXT2004) {
515 /* make sure demod is set to digital */
517 nxt200x_writebytes(state, 0x14, buf, 1);
519 nxt200x_writebytes(state, 0x17, buf, 1);
522 /* set additional params */
523 switch (p->modulation) {
526 /* Set punctured clock for QAM */
527 /* This is just a guess since I am unable to test it */
528 if (state->config->set_ts_params)
529 state->config->set_ts_params(fe, 1);
532 /* Set non-punctured clock for VSB */
533 if (state->config->set_ts_params)
534 state->config->set_ts_params(fe, 0);
540 if (fe->ops.tuner_ops.calc_regs) {
541 /* get tuning information */
542 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
544 /* write frequency information */
545 nxt200x_writetuner(state, buf);
548 /* reset the agc now that tuning has been completed */
549 nxt200x_agc_reset(state);
551 /* set target power level */
552 switch (p->modulation) {
563 nxt200x_writebytes(state, 0x42, buf, 1);
566 switch (state->demod_chip) {
576 nxt200x_writebytes(state, 0x57, buf, 1);
578 /* write sdm1 input */
581 switch (state->demod_chip) {
583 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
586 nxt200x_writebytes(state, 0x58, buf, 2);
592 /* write sdmx input */
593 switch (p->modulation) {
607 switch (state->demod_chip) {
609 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
612 nxt200x_writebytes(state, 0x5C, buf, 2);
618 /* write adc power lpf fc */
620 nxt200x_writebytes(state, 0x43, buf, 1);
622 if (state->demod_chip == NXT2004) {
626 nxt200x_writebytes(state, 0x46, buf, 2);
629 /* write accumulator2 input */
632 switch (state->demod_chip) {
634 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
637 nxt200x_writebytes(state, 0x4B, buf, 2);
645 nxt200x_writebytes(state, 0x4D, buf, 1);
647 /* write sdm12 lpf fc */
649 nxt200x_writebytes(state, 0x55, buf, 1);
651 /* write agc control reg */
653 nxt200x_writebytes(state, 0x41, buf, 1);
655 if (state->demod_chip == NXT2004) {
656 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
658 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
661 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
663 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
664 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
666 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
668 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
670 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
672 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
673 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
674 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
675 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
677 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
678 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
680 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
683 /* write agc ucgp0 */
684 switch (p->modulation) {
697 nxt200x_writebytes(state, 0x30, buf, 1);
699 /* write agc control reg */
701 nxt200x_writebytes(state, 0x41, buf, 1);
703 /* write accumulator2 input */
706 switch (state->demod_chip) {
708 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
709 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
712 nxt200x_writebytes(state, 0x49, buf, 2);
713 nxt200x_writebytes(state, 0x4B, buf, 2);
719 /* write agc control reg */
721 nxt200x_writebytes(state, 0x41, buf, 1);
723 nxt200x_microcontroller_start(state);
725 if (state->demod_chip == NXT2004) {
726 nxt2004_microcontroller_init(state);
731 nxt200x_writebytes(state, 0x5C, buf, 2);
734 /* adjacent channel detection should be done here, but I don't
735 have any stations with this need so I cannot test it */
740 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
742 struct nxt200x_state* state = fe->demodulator_priv;
744 nxt200x_readbytes(state, 0x31, &lock, 1);
748 *status |= FE_HAS_SIGNAL;
749 *status |= FE_HAS_CARRIER;
750 *status |= FE_HAS_VITERBI;
751 *status |= FE_HAS_SYNC;
752 *status |= FE_HAS_LOCK;
757 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
759 struct nxt200x_state* state = fe->demodulator_priv;
762 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
764 *ber = ((b[0] << 8) + b[1]) * 8;
769 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
771 struct nxt200x_state* state = fe->demodulator_priv;
775 /* setup to read cluster variance */
777 nxt200x_writebytes(state, 0xA1, b, 1);
779 /* get multreg val */
780 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
782 temp = (b[0] << 8) | b[1];
783 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
788 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
791 struct nxt200x_state* state = fe->demodulator_priv;
796 /* setup to read cluster variance */
798 nxt200x_writebytes(state, 0xA1, b, 1);
800 /* get multreg val from 0xA6 */
801 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
803 temp = (b[0] << 8) | b[1];
804 temp2 = 0x7FFF - temp;
806 /* snr will be in db */
808 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
809 else if (temp2 > 0x7EC0)
810 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
811 else if (temp2 > 0x7C00)
812 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
814 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
816 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
817 *snr = snrdb * (0xFFFF/32000);
822 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
824 struct nxt200x_state* state = fe->demodulator_priv;
827 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
833 static int nxt200x_sleep(struct dvb_frontend* fe)
838 static int nxt2002_init(struct dvb_frontend* fe)
840 struct nxt200x_state* state = fe->demodulator_priv;
841 const struct firmware *fw;
845 /* request the firmware, this will block until someone uploads it */
846 pr_debug("%s: Waiting for firmware upload (%s)...\n",
847 __func__, "/*(DEBLOBBED)*/");
848 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
849 state->i2c->dev.parent);
850 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
852 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
857 ret = nxt2002_load_firmware(fe, fw);
858 release_firmware(fw);
860 pr_err("%s: Writing firmware to device failed\n", __func__);
863 pr_info("%s: Firmware upload complete\n", __func__);
865 /* Put the micro into reset */
866 nxt200x_microcontroller_stop(state);
868 /* ensure transfer is complete */
870 nxt200x_writebytes(state, 0x2B, buf, 1);
872 /* Put the micro into reset for real this time */
873 nxt200x_microcontroller_stop(state);
875 /* soft reset everything (agc,frontend,eq,fec)*/
877 nxt200x_writebytes(state, 0x08, buf, 1);
879 nxt200x_writebytes(state, 0x08, buf, 1);
881 /* write agc sdm configure */
883 nxt200x_writebytes(state, 0x57, buf, 1);
885 /* write mod output format */
887 nxt200x_writebytes(state, 0x09, buf, 1);
889 /* write fec mpeg mode */
892 nxt200x_writebytes(state, 0xE9, buf, 2);
894 /* write mux selection */
896 nxt200x_writebytes(state, 0xCC, buf, 1);
901 static int nxt2004_init(struct dvb_frontend* fe)
903 struct nxt200x_state* state = fe->demodulator_priv;
904 const struct firmware *fw;
910 nxt200x_writebytes(state, 0x1E, buf, 1);
912 /* request the firmware, this will block until someone uploads it */
913 pr_debug("%s: Waiting for firmware upload (%s)...\n",
914 __func__, "/*(DEBLOBBED)*/");
915 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
916 state->i2c->dev.parent);
917 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
919 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
924 ret = nxt2004_load_firmware(fe, fw);
925 release_firmware(fw);
927 pr_err("%s: Writing firmware to device failed\n", __func__);
930 pr_info("%s: Firmware upload complete\n", __func__);
932 /* ensure transfer is complete */
934 nxt200x_writebytes(state, 0x19, buf, 1);
936 nxt2004_microcontroller_init(state);
937 nxt200x_microcontroller_stop(state);
938 nxt200x_microcontroller_stop(state);
939 nxt2004_microcontroller_init(state);
940 nxt200x_microcontroller_stop(state);
942 /* soft reset everything (agc,frontend,eq,fec)*/
944 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
946 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
948 /* write agc sdm configure */
950 nxt200x_writebytes(state, 0x57, buf, 1);
955 nxt200x_writebytes(state, 0x35, buf, 2);
957 nxt200x_writebytes(state, 0x34, buf, 1);
959 nxt200x_writebytes(state, 0x21, buf, 1);
963 nxt200x_writebytes(state, 0x0A, buf, 1);
967 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
969 /* write fec mpeg mode */
972 nxt200x_writebytes(state, 0xE9, buf, 2);
974 /* write mux selection */
976 nxt200x_writebytes(state, 0xCC, buf, 1);
979 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
981 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
984 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
986 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
987 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
989 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
992 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
994 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
996 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
997 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
998 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1000 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1002 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1003 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1005 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1007 nxt200x_readbytes(state, 0x10, buf, 1);
1009 nxt200x_writebytes(state, 0x10, buf, 1);
1010 nxt200x_readbytes(state, 0x0A, buf, 1);
1012 nxt200x_writebytes(state, 0x0A, buf, 1);
1014 nxt2004_microcontroller_init(state);
1017 nxt200x_writebytes(state, 0x0A, buf, 1);
1019 nxt200x_writebytes(state, 0xE9, buf, 1);
1021 nxt200x_writebytes(state, 0xEA, buf, 1);
1023 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1025 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1026 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1028 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1031 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1033 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1034 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1036 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1038 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1040 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1042 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1043 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1044 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1046 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1048 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1050 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1052 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1054 /* initialize tuner */
1055 nxt200x_readbytes(state, 0x10, buf, 1);
1057 nxt200x_writebytes(state, 0x10, buf, 1);
1059 nxt200x_writebytes(state, 0x13, buf, 1);
1061 nxt200x_writebytes(state, 0x16, buf, 1);
1063 nxt200x_writebytes(state, 0x14, buf, 1);
1065 nxt200x_writebytes(state, 0x14, buf, 1);
1066 nxt200x_writebytes(state, 0x17, buf, 1);
1067 nxt200x_writebytes(state, 0x14, buf, 1);
1068 nxt200x_writebytes(state, 0x17, buf, 1);
1073 static int nxt200x_init(struct dvb_frontend* fe)
1075 struct nxt200x_state* state = fe->demodulator_priv;
1078 if (!state->initialised) {
1079 switch (state->demod_chip) {
1081 ret = nxt2002_init(fe);
1084 ret = nxt2004_init(fe);
1089 state->initialised = 1;
1094 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1096 fesettings->min_delay_ms = 500;
1097 fesettings->step_size = 0;
1098 fesettings->max_drift = 0;
1102 static void nxt200x_release(struct dvb_frontend* fe)
1104 struct nxt200x_state* state = fe->demodulator_priv;
1108 static const struct dvb_frontend_ops nxt200x_ops;
1110 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1111 struct i2c_adapter* i2c)
1113 struct nxt200x_state* state = NULL;
1114 u8 buf [] = {0,0,0,0,0};
1116 /* allocate memory for the internal state */
1117 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1121 /* setup the state */
1122 state->config = config;
1124 state->initialised = 0;
1127 nxt200x_readbytes(state, 0x00, buf, 5);
1128 dprintk("NXT info: %*ph\n", 5, buf);
1130 /* set demod chip */
1133 state->demod_chip = NXT2002;
1134 pr_info("NXT2002 Detected\n");
1137 state->demod_chip = NXT2004;
1138 pr_info("NXT2004 Detected\n");
1144 /* make sure demod chip is supported */
1145 switch (state->demod_chip) {
1147 if (buf[0] != 0x04) goto error; /* device id */
1148 if (buf[1] != 0x02) goto error; /* fab id */
1149 if (buf[2] != 0x11) goto error; /* month */
1150 if (buf[3] != 0x20) goto error; /* year msb */
1151 if (buf[4] != 0x00) goto error; /* year lsb */
1154 if (buf[0] != 0x05) goto error; /* device id */
1160 /* create dvb_frontend */
1161 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1162 state->frontend.demodulator_priv = state;
1163 return &state->frontend;
1167 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1171 static const struct dvb_frontend_ops nxt200x_ops = {
1172 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1174 .name = "Nextwave NXT200X VSB/QAM frontend",
1175 .frequency_min_hz = 54 * MHz,
1176 .frequency_max_hz = 860 * MHz,
1177 .frequency_stepsize_hz = 166666, /* stepsize is just a guess */
1178 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1179 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1180 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1183 .release = nxt200x_release,
1185 .init = nxt200x_init,
1186 .sleep = nxt200x_sleep,
1188 .set_frontend = nxt200x_setup_frontend_parameters,
1189 .get_tune_settings = nxt200x_get_tune_settings,
1191 .read_status = nxt200x_read_status,
1192 .read_ber = nxt200x_read_ber,
1193 .read_signal_strength = nxt200x_read_signal_strength,
1194 .read_snr = nxt200x_read_snr,
1195 .read_ucblocks = nxt200x_read_ucblocks,
1198 module_param(debug, int, 0644);
1199 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1201 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1202 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1203 MODULE_LICENSE("GPL");
1205 EXPORT_SYMBOL(nxt200x_attach);