2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 /* Max transfer size done by I2C transfer functions */
25 #define MAX_XFER_SIZE 256
29 #define CRC_CCIT_MASK 0x1021
31 #include <linux/kernel.h>
32 #include <linux/init.h>
33 #include <linux/module.h>
34 #include <linux/slab.h>
35 #include <linux/string.h>
37 #include "dvb_frontend.h"
40 struct nxt200x_state {
42 struct i2c_adapter* i2c;
43 const struct nxt200x_config* config;
44 struct dvb_frontend frontend;
46 /* demodulator private data */
47 nxt_chip_type demod_chip;
52 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
54 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
57 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
59 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
60 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
67 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
70 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
72 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
73 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
80 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
81 const u8 *buf, u8 len)
83 u8 buf2[MAX_XFER_SIZE];
85 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
87 if (1 + len > sizeof(buf2)) {
88 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
94 memcpy(&buf2[1], buf, len);
96 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
97 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
98 __func__, state->config->demod_address, err);
104 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
106 u8 reg2 [] = { reg };
108 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
109 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
113 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
114 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
115 __func__, state->config->demod_address, err);
121 static u16 nxt200x_crc(u16 crc, u8 c)
124 u16 input = (u16) c & 0xFF;
128 if((crc^input) & 0x8000)
129 crc=(crc<<1)^CRC_CCIT_MASK;
137 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
140 dprintk("%s\n", __func__);
142 /* set mutli register register */
143 nxt200x_writebytes(state, 0x35, ®, 1);
145 /* send the actual data */
146 nxt200x_writebytes(state, 0x36, data, len);
148 switch (state->demod_chip) {
154 /* probably not right, but gives correct values */
162 len2 = ((attr << 4) | 0x10) | len;
170 /* set multi register length */
171 nxt200x_writebytes(state, 0x34, &len2, 1);
173 /* toggle the multireg write bit */
174 nxt200x_writebytes(state, 0x21, &buf, 1);
176 nxt200x_readbytes(state, 0x21, &buf, 1);
178 switch (state->demod_chip) {
180 if ((buf & 0x02) == 0)
192 pr_warn("Error writing multireg register 0x%02X\n", reg);
197 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
201 dprintk("%s\n", __func__);
203 /* set mutli register register */
204 nxt200x_writebytes(state, 0x35, ®, 1);
206 switch (state->demod_chip) {
208 /* set multi register length */
210 nxt200x_writebytes(state, 0x34, &len2, 1);
212 /* read the actual data */
213 nxt200x_readbytes(state, reg, data, len);
217 /* probably not right, but gives correct values */
225 /* set multi register length */
226 len2 = (attr << 4) | len;
227 nxt200x_writebytes(state, 0x34, &len2, 1);
229 /* toggle the multireg bit*/
231 nxt200x_writebytes(state, 0x21, &buf, 1);
233 /* read the actual data */
234 for(i = 0; i < len; i++) {
235 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
245 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
247 u8 buf, stopval, counter = 0;
248 dprintk("%s\n", __func__);
250 /* set correct stop value */
251 switch (state->demod_chip) {
264 nxt200x_writebytes(state, 0x22, &buf, 1);
266 while (counter < 20) {
267 nxt200x_readbytes(state, 0x31, &buf, 1);
274 pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
278 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
281 dprintk("%s\n", __func__);
284 nxt200x_writebytes(state, 0x22, &buf, 1);
287 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
291 dprintk("%s\n", __func__);
294 nxt200x_writebytes(state, 0x2b, buf, 1);
296 nxt200x_writebytes(state, 0x34, buf, 1);
298 nxt200x_writebytes(state, 0x35, buf, 1);
299 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
300 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
301 nxt200x_writebytes(state, 0x36, buf, 9);
303 nxt200x_writebytes(state, 0x21, buf, 1);
305 while (counter < 20) {
306 nxt200x_readbytes(state, 0x21, buf, 1);
313 pr_warn("Timeout waiting for nxt2004 to init.\n");
318 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
322 dprintk("%s\n", __func__);
324 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
326 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
327 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
328 switch (state->demod_chip) {
330 if (i2c_writebytes(state, data[0], data+1, 4))
331 pr_warn("error writing to tuner\n");
332 /* wait until we have a lock */
334 i2c_readbytes(state, data[0], &buf, 1);
340 pr_warn("timeout waiting for tuner lock\n");
343 /* set the i2c transfer speed to the tuner */
345 nxt200x_writebytes(state, 0x20, &buf, 1);
347 /* setup to transfer 4 bytes via i2c */
349 nxt200x_writebytes(state, 0x34, &buf, 1);
351 /* write actual tuner bytes */
352 nxt200x_writebytes(state, 0x36, data+1, 4);
354 /* set tuner i2c address */
356 nxt200x_writebytes(state, 0x35, &buf, 1);
358 /* write UC Opmode to begin transfer */
360 nxt200x_writebytes(state, 0x21, &buf, 1);
363 nxt200x_readbytes(state, 0x21, &buf, 1);
364 if ((buf & 0x80)== 0x00)
369 pr_warn("timeout error writing to tuner\n");
378 static void nxt200x_agc_reset(struct nxt200x_state* state)
381 dprintk("%s\n", __func__);
383 switch (state->demod_chip) {
386 nxt200x_writebytes(state, 0x08, &buf, 1);
388 nxt200x_writebytes(state, 0x08, &buf, 1);
391 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
393 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
395 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
403 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
406 struct nxt200x_state* state = fe->demodulator_priv;
407 u8 buf[3], written = 0, chunkpos = 0;
408 u16 rambase, position, crc = 0;
410 dprintk("%s\n", __func__);
411 dprintk("Firmware is %zu bytes\n", fw->size);
413 /* Get the RAM base for this nxt2002 */
414 nxt200x_readbytes(state, 0x10, buf, 1);
421 dprintk("rambase on this nxt2002 is %04X\n", rambase);
423 /* Hold the micro in reset while loading firmware */
425 nxt200x_writebytes(state, 0x2B, buf, 1);
427 for (position = 0; position < fw->size; position++) {
431 buf[0] = ((rambase + position) >> 8);
432 buf[1] = (rambase + position) & 0xFF;
434 /* write starting address */
435 nxt200x_writebytes(state, 0x29, buf, 3);
440 if ((written % 4) == 0)
441 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
443 crc = nxt200x_crc(crc, fw->data[position]);
445 if ((written == 255) || (position+1 == fw->size)) {
446 /* write remaining bytes of firmware */
447 nxt200x_writebytes(state, chunkpos+4-(written %4),
448 &fw->data[position-(written %4) + 1],
454 nxt200x_writebytes(state, 0x2C, buf, 2);
456 /* do a read to stop things */
457 nxt200x_readbytes(state, 0x2A, buf, 1);
459 /* set transfer mode to complete */
461 nxt200x_writebytes(state, 0x2B, buf, 1);
470 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
473 struct nxt200x_state* state = fe->demodulator_priv;
475 u16 rambase, position, crc=0;
477 dprintk("%s\n", __func__);
478 dprintk("Firmware is %zu bytes\n", fw->size);
483 /* hold the micro in reset while loading firmware */
485 nxt200x_writebytes(state, 0x2B, buf,1);
487 /* calculate firmware CRC */
488 for (position = 0; position < fw->size; position++) {
489 crc = nxt200x_crc(crc, fw->data[position]);
492 buf[0] = rambase >> 8;
493 buf[1] = rambase & 0xFF;
495 /* write starting address */
496 nxt200x_writebytes(state,0x29,buf,3);
498 for (position = 0; position < fw->size;) {
499 nxt200x_writebytes(state, 0x2C, &fw->data[position],
500 fw->size-position > 255 ? 255 : fw->size-position);
501 position += (fw->size-position > 255 ? 255 : fw->size-position);
506 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
509 nxt200x_writebytes(state, 0x2C, buf,2);
511 /* do a read to stop things */
512 nxt200x_readbytes(state, 0x2C, buf, 1);
514 /* set transfer mode to complete */
516 nxt200x_writebytes(state, 0x2B, buf,1);
521 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
523 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
524 struct nxt200x_state* state = fe->demodulator_priv;
527 /* stop the micro first */
528 nxt200x_microcontroller_stop(state);
530 if (state->demod_chip == NXT2004) {
531 /* make sure demod is set to digital */
533 nxt200x_writebytes(state, 0x14, buf, 1);
535 nxt200x_writebytes(state, 0x17, buf, 1);
538 /* set additional params */
539 switch (p->modulation) {
542 /* Set punctured clock for QAM */
543 /* This is just a guess since I am unable to test it */
544 if (state->config->set_ts_params)
545 state->config->set_ts_params(fe, 1);
548 /* Set non-punctured clock for VSB */
549 if (state->config->set_ts_params)
550 state->config->set_ts_params(fe, 0);
557 if (fe->ops.tuner_ops.calc_regs) {
558 /* get tuning information */
559 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
561 /* write frequency information */
562 nxt200x_writetuner(state, buf);
565 /* reset the agc now that tuning has been completed */
566 nxt200x_agc_reset(state);
568 /* set target power level */
569 switch (p->modulation) {
581 nxt200x_writebytes(state, 0x42, buf, 1);
584 switch (state->demod_chip) {
595 nxt200x_writebytes(state, 0x57, buf, 1);
597 /* write sdm1 input */
600 switch (state->demod_chip) {
602 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
605 nxt200x_writebytes(state, 0x58, buf, 2);
612 /* write sdmx input */
613 switch (p->modulation) {
628 switch (state->demod_chip) {
630 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
633 nxt200x_writebytes(state, 0x5C, buf, 2);
640 /* write adc power lpf fc */
642 nxt200x_writebytes(state, 0x43, buf, 1);
644 if (state->demod_chip == NXT2004) {
648 nxt200x_writebytes(state, 0x46, buf, 2);
651 /* write accumulator2 input */
654 switch (state->demod_chip) {
656 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
659 nxt200x_writebytes(state, 0x4B, buf, 2);
668 nxt200x_writebytes(state, 0x4D, buf, 1);
670 /* write sdm12 lpf fc */
672 nxt200x_writebytes(state, 0x55, buf, 1);
674 /* write agc control reg */
676 nxt200x_writebytes(state, 0x41, buf, 1);
678 if (state->demod_chip == NXT2004) {
679 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
681 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
684 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
686 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
687 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
689 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
691 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
693 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
695 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
696 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
697 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
698 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
700 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
701 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
703 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
706 /* write agc ucgp0 */
707 switch (p->modulation) {
721 nxt200x_writebytes(state, 0x30, buf, 1);
723 /* write agc control reg */
725 nxt200x_writebytes(state, 0x41, buf, 1);
727 /* write accumulator2 input */
730 switch (state->demod_chip) {
732 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
733 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
736 nxt200x_writebytes(state, 0x49, buf, 2);
737 nxt200x_writebytes(state, 0x4B, buf, 2);
744 /* write agc control reg */
746 nxt200x_writebytes(state, 0x41, buf, 1);
748 nxt200x_microcontroller_start(state);
750 if (state->demod_chip == NXT2004) {
751 nxt2004_microcontroller_init(state);
756 nxt200x_writebytes(state, 0x5C, buf, 2);
759 /* adjacent channel detection should be done here, but I don't
760 have any stations with this need so I cannot test it */
765 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
767 struct nxt200x_state* state = fe->demodulator_priv;
769 nxt200x_readbytes(state, 0x31, &lock, 1);
773 *status |= FE_HAS_SIGNAL;
774 *status |= FE_HAS_CARRIER;
775 *status |= FE_HAS_VITERBI;
776 *status |= FE_HAS_SYNC;
777 *status |= FE_HAS_LOCK;
782 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
784 struct nxt200x_state* state = fe->demodulator_priv;
787 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
789 *ber = ((b[0] << 8) + b[1]) * 8;
794 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
796 struct nxt200x_state* state = fe->demodulator_priv;
800 /* setup to read cluster variance */
802 nxt200x_writebytes(state, 0xA1, b, 1);
804 /* get multreg val */
805 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
807 temp = (b[0] << 8) | b[1];
808 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
813 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
816 struct nxt200x_state* state = fe->demodulator_priv;
821 /* setup to read cluster variance */
823 nxt200x_writebytes(state, 0xA1, b, 1);
825 /* get multreg val from 0xA6 */
826 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
828 temp = (b[0] << 8) | b[1];
829 temp2 = 0x7FFF - temp;
831 /* snr will be in db */
833 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
834 else if (temp2 > 0x7EC0)
835 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
836 else if (temp2 > 0x7C00)
837 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
839 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
841 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
842 *snr = snrdb * (0xFFFF/32000);
847 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
849 struct nxt200x_state* state = fe->demodulator_priv;
852 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
858 static int nxt200x_sleep(struct dvb_frontend* fe)
863 static int nxt2002_init(struct dvb_frontend* fe)
865 struct nxt200x_state* state = fe->demodulator_priv;
866 const struct firmware *fw;
870 /* request the firmware, this will block until someone uploads it */
871 pr_debug("%s: Waiting for firmware upload (%s)...\n",
872 __func__, "/*(DEBLOBBED)*/");
873 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
874 state->i2c->dev.parent);
875 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
877 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
882 ret = nxt2002_load_firmware(fe, fw);
883 release_firmware(fw);
885 pr_err("%s: Writing firmware to device failed\n", __func__);
888 pr_info("%s: Firmware upload complete\n", __func__);
890 /* Put the micro into reset */
891 nxt200x_microcontroller_stop(state);
893 /* ensure transfer is complete */
895 nxt200x_writebytes(state, 0x2B, buf, 1);
897 /* Put the micro into reset for real this time */
898 nxt200x_microcontroller_stop(state);
900 /* soft reset everything (agc,frontend,eq,fec)*/
902 nxt200x_writebytes(state, 0x08, buf, 1);
904 nxt200x_writebytes(state, 0x08, buf, 1);
906 /* write agc sdm configure */
908 nxt200x_writebytes(state, 0x57, buf, 1);
910 /* write mod output format */
912 nxt200x_writebytes(state, 0x09, buf, 1);
914 /* write fec mpeg mode */
917 nxt200x_writebytes(state, 0xE9, buf, 2);
919 /* write mux selection */
921 nxt200x_writebytes(state, 0xCC, buf, 1);
926 static int nxt2004_init(struct dvb_frontend* fe)
928 struct nxt200x_state* state = fe->demodulator_priv;
929 const struct firmware *fw;
935 nxt200x_writebytes(state, 0x1E, buf, 1);
937 /* request the firmware, this will block until someone uploads it */
938 pr_debug("%s: Waiting for firmware upload (%s)...\n",
939 __func__, "/*(DEBLOBBED)*/");
940 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
941 state->i2c->dev.parent);
942 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
944 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
949 ret = nxt2004_load_firmware(fe, fw);
950 release_firmware(fw);
952 pr_err("%s: Writing firmware to device failed\n", __func__);
955 pr_info("%s: Firmware upload complete\n", __func__);
957 /* ensure transfer is complete */
959 nxt200x_writebytes(state, 0x19, buf, 1);
961 nxt2004_microcontroller_init(state);
962 nxt200x_microcontroller_stop(state);
963 nxt200x_microcontroller_stop(state);
964 nxt2004_microcontroller_init(state);
965 nxt200x_microcontroller_stop(state);
967 /* soft reset everything (agc,frontend,eq,fec)*/
969 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
971 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
973 /* write agc sdm configure */
975 nxt200x_writebytes(state, 0x57, buf, 1);
980 nxt200x_writebytes(state, 0x35, buf, 2);
982 nxt200x_writebytes(state, 0x34, buf, 1);
984 nxt200x_writebytes(state, 0x21, buf, 1);
988 nxt200x_writebytes(state, 0x0A, buf, 1);
992 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
994 /* write fec mpeg mode */
997 nxt200x_writebytes(state, 0xE9, buf, 2);
999 /* write mux selection */
1001 nxt200x_writebytes(state, 0xCC, buf, 1);
1004 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1006 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1009 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1011 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1012 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1014 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1017 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1019 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1021 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1022 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1023 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1025 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1027 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1028 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1030 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1032 nxt200x_readbytes(state, 0x10, buf, 1);
1034 nxt200x_writebytes(state, 0x10, buf, 1);
1035 nxt200x_readbytes(state, 0x0A, buf, 1);
1037 nxt200x_writebytes(state, 0x0A, buf, 1);
1039 nxt2004_microcontroller_init(state);
1042 nxt200x_writebytes(state, 0x0A, buf, 1);
1044 nxt200x_writebytes(state, 0xE9, buf, 1);
1046 nxt200x_writebytes(state, 0xEA, buf, 1);
1048 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1050 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1051 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1053 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1056 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1058 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1059 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1061 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1063 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1065 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1067 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1068 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1069 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1071 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1073 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1075 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1077 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1079 /* initialize tuner */
1080 nxt200x_readbytes(state, 0x10, buf, 1);
1082 nxt200x_writebytes(state, 0x10, buf, 1);
1084 nxt200x_writebytes(state, 0x13, buf, 1);
1086 nxt200x_writebytes(state, 0x16, buf, 1);
1088 nxt200x_writebytes(state, 0x14, buf, 1);
1090 nxt200x_writebytes(state, 0x14, buf, 1);
1091 nxt200x_writebytes(state, 0x17, buf, 1);
1092 nxt200x_writebytes(state, 0x14, buf, 1);
1093 nxt200x_writebytes(state, 0x17, buf, 1);
1098 static int nxt200x_init(struct dvb_frontend* fe)
1100 struct nxt200x_state* state = fe->demodulator_priv;
1103 if (!state->initialised) {
1104 switch (state->demod_chip) {
1106 ret = nxt2002_init(fe);
1109 ret = nxt2004_init(fe);
1115 state->initialised = 1;
1120 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1122 fesettings->min_delay_ms = 500;
1123 fesettings->step_size = 0;
1124 fesettings->max_drift = 0;
1128 static void nxt200x_release(struct dvb_frontend* fe)
1130 struct nxt200x_state* state = fe->demodulator_priv;
1134 static const struct dvb_frontend_ops nxt200x_ops;
1136 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1137 struct i2c_adapter* i2c)
1139 struct nxt200x_state* state = NULL;
1140 u8 buf [] = {0,0,0,0,0};
1142 /* allocate memory for the internal state */
1143 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1147 /* setup the state */
1148 state->config = config;
1150 state->initialised = 0;
1153 nxt200x_readbytes(state, 0x00, buf, 5);
1154 dprintk("NXT info: %*ph\n", 5, buf);
1156 /* set demod chip */
1159 state->demod_chip = NXT2002;
1160 pr_info("NXT2002 Detected\n");
1163 state->demod_chip = NXT2004;
1164 pr_info("NXT2004 Detected\n");
1170 /* make sure demod chip is supported */
1171 switch (state->demod_chip) {
1173 if (buf[0] != 0x04) goto error; /* device id */
1174 if (buf[1] != 0x02) goto error; /* fab id */
1175 if (buf[2] != 0x11) goto error; /* month */
1176 if (buf[3] != 0x20) goto error; /* year msb */
1177 if (buf[4] != 0x00) goto error; /* year lsb */
1180 if (buf[0] != 0x05) goto error; /* device id */
1186 /* create dvb_frontend */
1187 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1188 state->frontend.demodulator_priv = state;
1189 return &state->frontend;
1193 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1197 static const struct dvb_frontend_ops nxt200x_ops = {
1198 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1200 .name = "Nextwave NXT200X VSB/QAM frontend",
1201 .frequency_min = 54000000,
1202 .frequency_max = 860000000,
1203 .frequency_stepsize = 166666, /* stepsize is just a guess */
1204 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1205 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1206 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1209 .release = nxt200x_release,
1211 .init = nxt200x_init,
1212 .sleep = nxt200x_sleep,
1214 .set_frontend = nxt200x_setup_frontend_parameters,
1215 .get_tune_settings = nxt200x_get_tune_settings,
1217 .read_status = nxt200x_read_status,
1218 .read_ber = nxt200x_read_ber,
1219 .read_signal_strength = nxt200x_read_signal_strength,
1220 .read_snr = nxt200x_read_snr,
1221 .read_ucblocks = nxt200x_read_ucblocks,
1224 module_param(debug, int, 0644);
1225 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1227 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1228 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1229 MODULE_LICENSE("GPL");
1231 EXPORT_SYMBOL(nxt200x_attach);