2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28 /* Max transfer size done by I2C transfer functions */
29 #define MAX_XFER_SIZE 256
33 #define CRC_CCIT_MASK 0x1021
35 #include <linux/kernel.h>
36 #include <linux/init.h>
37 #include <linux/module.h>
38 #include <linux/slab.h>
39 #include <linux/string.h>
41 #include "dvb_frontend.h"
44 struct nxt200x_state {
46 struct i2c_adapter* i2c;
47 const struct nxt200x_config* config;
48 struct dvb_frontend frontend;
50 /* demodulator private data */
51 nxt_chip_type demod_chip;
56 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
58 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
61 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
63 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
64 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
71 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
74 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
76 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
77 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
84 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
85 const u8 *buf, u8 len)
87 u8 buf2[MAX_XFER_SIZE];
89 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
91 if (1 + len > sizeof(buf2)) {
92 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
98 memcpy(&buf2[1], buf, len);
100 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
101 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
102 __func__, state->config->demod_address, err);
108 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
110 u8 reg2 [] = { reg };
112 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
113 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
117 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
118 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
119 __func__, state->config->demod_address, err);
125 static u16 nxt200x_crc(u16 crc, u8 c)
128 u16 input = (u16) c & 0xFF;
132 if((crc^input) & 0x8000)
133 crc=(crc<<1)^CRC_CCIT_MASK;
141 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
144 dprintk("%s\n", __func__);
146 /* set mutli register register */
147 nxt200x_writebytes(state, 0x35, ®, 1);
149 /* send the actual data */
150 nxt200x_writebytes(state, 0x36, data, len);
152 switch (state->demod_chip) {
158 /* probably not right, but gives correct values */
166 len2 = ((attr << 4) | 0x10) | len;
174 /* set multi register length */
175 nxt200x_writebytes(state, 0x34, &len2, 1);
177 /* toggle the multireg write bit */
178 nxt200x_writebytes(state, 0x21, &buf, 1);
180 nxt200x_readbytes(state, 0x21, &buf, 1);
182 switch (state->demod_chip) {
184 if ((buf & 0x02) == 0)
196 pr_warn("Error writing multireg register 0x%02X\n", reg);
201 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
205 dprintk("%s\n", __func__);
207 /* set mutli register register */
208 nxt200x_writebytes(state, 0x35, ®, 1);
210 switch (state->demod_chip) {
212 /* set multi register length */
214 nxt200x_writebytes(state, 0x34, &len2, 1);
216 /* read the actual data */
217 nxt200x_readbytes(state, reg, data, len);
221 /* probably not right, but gives correct values */
229 /* set multi register length */
230 len2 = (attr << 4) | len;
231 nxt200x_writebytes(state, 0x34, &len2, 1);
233 /* toggle the multireg bit*/
235 nxt200x_writebytes(state, 0x21, &buf, 1);
237 /* read the actual data */
238 for(i = 0; i < len; i++) {
239 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
249 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
251 u8 buf, stopval, counter = 0;
252 dprintk("%s\n", __func__);
254 /* set correct stop value */
255 switch (state->demod_chip) {
268 nxt200x_writebytes(state, 0x22, &buf, 1);
270 while (counter < 20) {
271 nxt200x_readbytes(state, 0x31, &buf, 1);
278 pr_warn("Timeout waiting for nxt200x to stop. This is ok after "
279 "firmware upload.\n");
283 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
286 dprintk("%s\n", __func__);
289 nxt200x_writebytes(state, 0x22, &buf, 1);
292 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
296 dprintk("%s\n", __func__);
299 nxt200x_writebytes(state, 0x2b, buf, 1);
301 nxt200x_writebytes(state, 0x34, buf, 1);
303 nxt200x_writebytes(state, 0x35, buf, 1);
304 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
305 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
306 nxt200x_writebytes(state, 0x36, buf, 9);
308 nxt200x_writebytes(state, 0x21, buf, 1);
310 while (counter < 20) {
311 nxt200x_readbytes(state, 0x21, buf, 1);
318 pr_warn("Timeout waiting for nxt2004 to init.\n");
323 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
327 dprintk("%s\n", __func__);
329 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
331 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
332 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
333 switch (state->demod_chip) {
335 if (i2c_writebytes(state, data[0], data+1, 4))
336 pr_warn("error writing to tuner\n");
337 /* wait until we have a lock */
339 i2c_readbytes(state, data[0], &buf, 1);
345 pr_warn("timeout waiting for tuner lock\n");
348 /* set the i2c transfer speed to the tuner */
350 nxt200x_writebytes(state, 0x20, &buf, 1);
352 /* setup to transfer 4 bytes via i2c */
354 nxt200x_writebytes(state, 0x34, &buf, 1);
356 /* write actual tuner bytes */
357 nxt200x_writebytes(state, 0x36, data+1, 4);
359 /* set tuner i2c address */
361 nxt200x_writebytes(state, 0x35, &buf, 1);
363 /* write UC Opmode to begin transfer */
365 nxt200x_writebytes(state, 0x21, &buf, 1);
368 nxt200x_readbytes(state, 0x21, &buf, 1);
369 if ((buf & 0x80)== 0x00)
374 pr_warn("timeout error writing to tuner\n");
383 static void nxt200x_agc_reset(struct nxt200x_state* state)
386 dprintk("%s\n", __func__);
388 switch (state->demod_chip) {
391 nxt200x_writebytes(state, 0x08, &buf, 1);
393 nxt200x_writebytes(state, 0x08, &buf, 1);
396 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
398 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
400 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
408 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
411 struct nxt200x_state* state = fe->demodulator_priv;
412 u8 buf[3], written = 0, chunkpos = 0;
413 u16 rambase, position, crc = 0;
415 dprintk("%s\n", __func__);
416 dprintk("Firmware is %zu bytes\n", fw->size);
418 /* Get the RAM base for this nxt2002 */
419 nxt200x_readbytes(state, 0x10, buf, 1);
426 dprintk("rambase on this nxt2002 is %04X\n", rambase);
428 /* Hold the micro in reset while loading firmware */
430 nxt200x_writebytes(state, 0x2B, buf, 1);
432 for (position = 0; position < fw->size; position++) {
436 buf[0] = ((rambase + position) >> 8);
437 buf[1] = (rambase + position) & 0xFF;
439 /* write starting address */
440 nxt200x_writebytes(state, 0x29, buf, 3);
445 if ((written % 4) == 0)
446 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
448 crc = nxt200x_crc(crc, fw->data[position]);
450 if ((written == 255) || (position+1 == fw->size)) {
451 /* write remaining bytes of firmware */
452 nxt200x_writebytes(state, chunkpos+4-(written %4),
453 &fw->data[position-(written %4) + 1],
459 nxt200x_writebytes(state, 0x2C, buf, 2);
461 /* do a read to stop things */
462 nxt200x_readbytes(state, 0x2A, buf, 1);
464 /* set transfer mode to complete */
466 nxt200x_writebytes(state, 0x2B, buf, 1);
475 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
478 struct nxt200x_state* state = fe->demodulator_priv;
480 u16 rambase, position, crc=0;
482 dprintk("%s\n", __func__);
483 dprintk("Firmware is %zu bytes\n", fw->size);
488 /* hold the micro in reset while loading firmware */
490 nxt200x_writebytes(state, 0x2B, buf,1);
492 /* calculate firmware CRC */
493 for (position = 0; position < fw->size; position++) {
494 crc = nxt200x_crc(crc, fw->data[position]);
497 buf[0] = rambase >> 8;
498 buf[1] = rambase & 0xFF;
500 /* write starting address */
501 nxt200x_writebytes(state,0x29,buf,3);
503 for (position = 0; position < fw->size;) {
504 nxt200x_writebytes(state, 0x2C, &fw->data[position],
505 fw->size-position > 255 ? 255 : fw->size-position);
506 position += (fw->size-position > 255 ? 255 : fw->size-position);
511 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
514 nxt200x_writebytes(state, 0x2C, buf,2);
516 /* do a read to stop things */
517 nxt200x_readbytes(state, 0x2C, buf, 1);
519 /* set transfer mode to complete */
521 nxt200x_writebytes(state, 0x2B, buf,1);
526 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
528 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
529 struct nxt200x_state* state = fe->demodulator_priv;
532 /* stop the micro first */
533 nxt200x_microcontroller_stop(state);
535 if (state->demod_chip == NXT2004) {
536 /* make sure demod is set to digital */
538 nxt200x_writebytes(state, 0x14, buf, 1);
540 nxt200x_writebytes(state, 0x17, buf, 1);
543 /* set additional params */
544 switch (p->modulation) {
547 /* Set punctured clock for QAM */
548 /* This is just a guess since I am unable to test it */
549 if (state->config->set_ts_params)
550 state->config->set_ts_params(fe, 1);
553 /* Set non-punctured clock for VSB */
554 if (state->config->set_ts_params)
555 state->config->set_ts_params(fe, 0);
562 if (fe->ops.tuner_ops.calc_regs) {
563 /* get tuning information */
564 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
566 /* write frequency information */
567 nxt200x_writetuner(state, buf);
570 /* reset the agc now that tuning has been completed */
571 nxt200x_agc_reset(state);
573 /* set target power level */
574 switch (p->modulation) {
586 nxt200x_writebytes(state, 0x42, buf, 1);
589 switch (state->demod_chip) {
600 nxt200x_writebytes(state, 0x57, buf, 1);
602 /* write sdm1 input */
605 switch (state->demod_chip) {
607 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
610 nxt200x_writebytes(state, 0x58, buf, 2);
617 /* write sdmx input */
618 switch (p->modulation) {
633 switch (state->demod_chip) {
635 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
638 nxt200x_writebytes(state, 0x5C, buf, 2);
645 /* write adc power lpf fc */
647 nxt200x_writebytes(state, 0x43, buf, 1);
649 if (state->demod_chip == NXT2004) {
653 nxt200x_writebytes(state, 0x46, buf, 2);
656 /* write accumulator2 input */
659 switch (state->demod_chip) {
661 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
664 nxt200x_writebytes(state, 0x4B, buf, 2);
673 nxt200x_writebytes(state, 0x4D, buf, 1);
675 /* write sdm12 lpf fc */
677 nxt200x_writebytes(state, 0x55, buf, 1);
679 /* write agc control reg */
681 nxt200x_writebytes(state, 0x41, buf, 1);
683 if (state->demod_chip == NXT2004) {
684 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
686 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
689 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
691 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
692 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
694 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
696 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
698 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
700 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
701 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
702 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
703 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
705 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
706 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
708 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
711 /* write agc ucgp0 */
712 switch (p->modulation) {
726 nxt200x_writebytes(state, 0x30, buf, 1);
728 /* write agc control reg */
730 nxt200x_writebytes(state, 0x41, buf, 1);
732 /* write accumulator2 input */
735 switch (state->demod_chip) {
737 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
738 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
741 nxt200x_writebytes(state, 0x49, buf, 2);
742 nxt200x_writebytes(state, 0x4B, buf, 2);
749 /* write agc control reg */
751 nxt200x_writebytes(state, 0x41, buf, 1);
753 nxt200x_microcontroller_start(state);
755 if (state->demod_chip == NXT2004) {
756 nxt2004_microcontroller_init(state);
761 nxt200x_writebytes(state, 0x5C, buf, 2);
764 /* adjacent channel detection should be done here, but I don't
765 have any stations with this need so I cannot test it */
770 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
772 struct nxt200x_state* state = fe->demodulator_priv;
774 nxt200x_readbytes(state, 0x31, &lock, 1);
778 *status |= FE_HAS_SIGNAL;
779 *status |= FE_HAS_CARRIER;
780 *status |= FE_HAS_VITERBI;
781 *status |= FE_HAS_SYNC;
782 *status |= FE_HAS_LOCK;
787 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
789 struct nxt200x_state* state = fe->demodulator_priv;
792 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
794 *ber = ((b[0] << 8) + b[1]) * 8;
799 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
801 struct nxt200x_state* state = fe->demodulator_priv;
805 /* setup to read cluster variance */
807 nxt200x_writebytes(state, 0xA1, b, 1);
809 /* get multreg val */
810 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
812 temp = (b[0] << 8) | b[1];
813 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
818 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
821 struct nxt200x_state* state = fe->demodulator_priv;
826 /* setup to read cluster variance */
828 nxt200x_writebytes(state, 0xA1, b, 1);
830 /* get multreg val from 0xA6 */
831 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
833 temp = (b[0] << 8) | b[1];
834 temp2 = 0x7FFF - temp;
836 /* snr will be in db */
838 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
839 else if (temp2 > 0x7EC0)
840 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
841 else if (temp2 > 0x7C00)
842 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
844 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
846 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
847 *snr = snrdb * (0xFFFF/32000);
852 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
854 struct nxt200x_state* state = fe->demodulator_priv;
857 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
863 static int nxt200x_sleep(struct dvb_frontend* fe)
868 static int nxt2002_init(struct dvb_frontend* fe)
870 struct nxt200x_state* state = fe->demodulator_priv;
871 const struct firmware *fw;
875 /* request the firmware, this will block until someone uploads it */
876 pr_debug("%s: Waiting for firmware upload (%s)...\n",
877 __func__, "/*(DEBLOBBED)*/");
878 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
879 state->i2c->dev.parent);
880 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
882 pr_err("%s: No firmware uploaded (timeout or file not found?)"
887 ret = nxt2002_load_firmware(fe, fw);
888 release_firmware(fw);
890 pr_err("%s: Writing firmware to device failed\n", __func__);
893 pr_info("%s: Firmware upload complete\n", __func__);
895 /* Put the micro into reset */
896 nxt200x_microcontroller_stop(state);
898 /* ensure transfer is complete */
900 nxt200x_writebytes(state, 0x2B, buf, 1);
902 /* Put the micro into reset for real this time */
903 nxt200x_microcontroller_stop(state);
905 /* soft reset everything (agc,frontend,eq,fec)*/
907 nxt200x_writebytes(state, 0x08, buf, 1);
909 nxt200x_writebytes(state, 0x08, buf, 1);
911 /* write agc sdm configure */
913 nxt200x_writebytes(state, 0x57, buf, 1);
915 /* write mod output format */
917 nxt200x_writebytes(state, 0x09, buf, 1);
919 /* write fec mpeg mode */
922 nxt200x_writebytes(state, 0xE9, buf, 2);
924 /* write mux selection */
926 nxt200x_writebytes(state, 0xCC, buf, 1);
931 static int nxt2004_init(struct dvb_frontend* fe)
933 struct nxt200x_state* state = fe->demodulator_priv;
934 const struct firmware *fw;
940 nxt200x_writebytes(state, 0x1E, buf, 1);
942 /* request the firmware, this will block until someone uploads it */
943 pr_debug("%s: Waiting for firmware upload (%s)...\n",
944 __func__, "/*(DEBLOBBED)*/");
945 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
946 state->i2c->dev.parent);
947 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
949 pr_err("%s: No firmware uploaded (timeout or file not found?)"
954 ret = nxt2004_load_firmware(fe, fw);
955 release_firmware(fw);
957 pr_err("%s: Writing firmware to device failed\n", __func__);
960 pr_info("%s: Firmware upload complete\n", __func__);
962 /* ensure transfer is complete */
964 nxt200x_writebytes(state, 0x19, buf, 1);
966 nxt2004_microcontroller_init(state);
967 nxt200x_microcontroller_stop(state);
968 nxt200x_microcontroller_stop(state);
969 nxt2004_microcontroller_init(state);
970 nxt200x_microcontroller_stop(state);
972 /* soft reset everything (agc,frontend,eq,fec)*/
974 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
976 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
978 /* write agc sdm configure */
980 nxt200x_writebytes(state, 0x57, buf, 1);
985 nxt200x_writebytes(state, 0x35, buf, 2);
987 nxt200x_writebytes(state, 0x34, buf, 1);
989 nxt200x_writebytes(state, 0x21, buf, 1);
993 nxt200x_writebytes(state, 0x0A, buf, 1);
997 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
999 /* write fec mpeg mode */
1002 nxt200x_writebytes(state, 0xE9, buf, 2);
1004 /* write mux selection */
1006 nxt200x_writebytes(state, 0xCC, buf, 1);
1009 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1011 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1014 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1016 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1017 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1019 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1022 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1024 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1026 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1027 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1028 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1030 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1032 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1033 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1035 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1037 nxt200x_readbytes(state, 0x10, buf, 1);
1039 nxt200x_writebytes(state, 0x10, buf, 1);
1040 nxt200x_readbytes(state, 0x0A, buf, 1);
1042 nxt200x_writebytes(state, 0x0A, buf, 1);
1044 nxt2004_microcontroller_init(state);
1047 nxt200x_writebytes(state, 0x0A, buf, 1);
1049 nxt200x_writebytes(state, 0xE9, buf, 1);
1051 nxt200x_writebytes(state, 0xEA, buf, 1);
1053 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1055 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1056 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1058 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1061 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1063 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1064 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1066 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1068 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1070 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1072 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1073 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1074 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1076 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1078 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1080 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1082 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1084 /* initialize tuner */
1085 nxt200x_readbytes(state, 0x10, buf, 1);
1087 nxt200x_writebytes(state, 0x10, buf, 1);
1089 nxt200x_writebytes(state, 0x13, buf, 1);
1091 nxt200x_writebytes(state, 0x16, buf, 1);
1093 nxt200x_writebytes(state, 0x14, buf, 1);
1095 nxt200x_writebytes(state, 0x14, buf, 1);
1096 nxt200x_writebytes(state, 0x17, buf, 1);
1097 nxt200x_writebytes(state, 0x14, buf, 1);
1098 nxt200x_writebytes(state, 0x17, buf, 1);
1103 static int nxt200x_init(struct dvb_frontend* fe)
1105 struct nxt200x_state* state = fe->demodulator_priv;
1108 if (!state->initialised) {
1109 switch (state->demod_chip) {
1111 ret = nxt2002_init(fe);
1114 ret = nxt2004_init(fe);
1120 state->initialised = 1;
1125 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1127 fesettings->min_delay_ms = 500;
1128 fesettings->step_size = 0;
1129 fesettings->max_drift = 0;
1133 static void nxt200x_release(struct dvb_frontend* fe)
1135 struct nxt200x_state* state = fe->demodulator_priv;
1139 static struct dvb_frontend_ops nxt200x_ops;
1141 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1142 struct i2c_adapter* i2c)
1144 struct nxt200x_state* state = NULL;
1145 u8 buf [] = {0,0,0,0,0};
1147 /* allocate memory for the internal state */
1148 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1152 /* setup the state */
1153 state->config = config;
1155 state->initialised = 0;
1158 nxt200x_readbytes(state, 0x00, buf, 5);
1159 dprintk("NXT info: %*ph\n", 5, buf);
1161 /* set demod chip */
1164 state->demod_chip = NXT2002;
1165 pr_info("NXT2002 Detected\n");
1168 state->demod_chip = NXT2004;
1169 pr_info("NXT2004 Detected\n");
1175 /* make sure demod chip is supported */
1176 switch (state->demod_chip) {
1178 if (buf[0] != 0x04) goto error; /* device id */
1179 if (buf[1] != 0x02) goto error; /* fab id */
1180 if (buf[2] != 0x11) goto error; /* month */
1181 if (buf[3] != 0x20) goto error; /* year msb */
1182 if (buf[4] != 0x00) goto error; /* year lsb */
1185 if (buf[0] != 0x05) goto error; /* device id */
1191 /* create dvb_frontend */
1192 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1193 state->frontend.demodulator_priv = state;
1194 return &state->frontend;
1198 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1202 static struct dvb_frontend_ops nxt200x_ops = {
1203 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1205 .name = "Nextwave NXT200X VSB/QAM frontend",
1206 .frequency_min = 54000000,
1207 .frequency_max = 860000000,
1208 .frequency_stepsize = 166666, /* stepsize is just a guess */
1209 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1210 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1211 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1214 .release = nxt200x_release,
1216 .init = nxt200x_init,
1217 .sleep = nxt200x_sleep,
1219 .set_frontend = nxt200x_setup_frontend_parameters,
1220 .get_tune_settings = nxt200x_get_tune_settings,
1222 .read_status = nxt200x_read_status,
1223 .read_ber = nxt200x_read_ber,
1224 .read_signal_strength = nxt200x_read_signal_strength,
1225 .read_snr = nxt200x_read_snr,
1226 .read_ucblocks = nxt200x_read_ucblocks,
1229 module_param(debug, int, 0644);
1230 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1232 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1233 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1234 MODULE_LICENSE("GPL");
1236 EXPORT_SYMBOL(nxt200x_attach);