drivers/media/dvb-frontends/nxt200x.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *    Support for NXT2002 and NXT2004 - VSB/QAM
   4  *
   5  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   6  *    Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
   7  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   8  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   9 */
  10
  11 /*(DEBLOBBED)*/
  12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  13
  14 /* Max transfer size done by I2C transfer functions */
  15 #define MAX_XFER_SIZE  256
  16
  17 /*(DEBLOBBED)*/
  18 /*(DEBLOBBED)*/
  19 #define CRC_CCIT_MASK 0x1021
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/slab.h>
  25 #include <linux/string.h>
  26
  27 #include <media/dvb_frontend.h>
  28 #include "nxt200x.h"
  29
  30 struct nxt200x_state {
  31
  32         struct i2c_adapter* i2c;
  33         const struct nxt200x_config* config;
  34         struct dvb_frontend frontend;
  35
  36         /* demodulator private data */
  37         nxt_chip_type demod_chip;
  38         u8 initialised:1;
  39 };
  40
  41 static int debug;
  42 #define dprintk(args...)        do { if (debug) pr_debug(args); } while (0)
  43
  44 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  45 {
  46         int err;
  47         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  48
  49         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  50                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  51                         __func__, addr, err);
  52                 return -EREMOTEIO;
  53         }
  54         return 0;
  55 }
  56
  57 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  58 {
  59         int err;
  60         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  61
  62         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  63                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
  64                         __func__, addr, err);
  65                 return -EREMOTEIO;
  66         }
  67         return 0;
  68 }
  69
  70 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  71                                const u8 *buf, u8 len)
  72 {
  73         u8 buf2[MAX_XFER_SIZE];
  74         int err;
  75         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
  76
  77         if (1 + len > sizeof(buf2)) {
  78                 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
  79                          __func__, reg, len);
  80                 return -EINVAL;
  81         }
  82
  83         buf2[0] = reg;
  84         memcpy(&buf2[1], buf, len);
  85
  86         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  87                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  88                         __func__, state->config->demod_address, err);
  89                 return -EREMOTEIO;
  90         }
  91         return 0;
  92 }
  93
  94 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
  95 {
  96         u8 reg2 [] = { reg };
  97
  98         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
  99                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 100
 101         int err;
 102
 103         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 104                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
 105                         __func__, state->config->demod_address, err);
 106                 return -EREMOTEIO;
 107         }
 108         return 0;
 109 }
 110
 111 static u16 nxt200x_crc(u16 crc, u8 c)
 112 {
 113         u8 i;
 114         u16 input = (u16) c & 0xFF;
 115
 116         input<<=8;
 117         for(i=0; i<8; i++) {
 118                 if((crc^input) & 0x8000)
 119                         crc=(crc<<1)^CRC_CCIT_MASK;
 120                 else
 121                         crc<<=1;
 122                 input<<=1;
 123         }
 124         return crc;
 125 }
 126
 127 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 128 {
 129         u8 attr, len2, buf;
 130         dprintk("%s\n", __func__);
 131
 132         /* set multi register register */
 133         nxt200x_writebytes(state, 0x35, &reg, 1);
 134
 135         /* send the actual data */
 136         nxt200x_writebytes(state, 0x36, data, len);
 137
 138         switch (state->demod_chip) {
 139                 case NXT2002:
 140                         len2 = len;
 141                         buf = 0x02;
 142                         break;
 143                 case NXT2004:
 144                         /* probably not right, but gives correct values */
 145                         attr = 0x02;
 146                         if (reg & 0x80) {
 147                                 attr = attr << 1;
 148                                 if (reg & 0x04)
 149                                         attr = attr >> 1;
 150                         }
 151                         /* set write bit */
 152                         len2 = ((attr << 4) | 0x10) | len;
 153                         buf = 0x80;
 154                         break;
 155                 default:
 156                         return -EINVAL;
 157         }
 158
 159         /* set multi register length */
 160         nxt200x_writebytes(state, 0x34, &len2, 1);
 161
 162         /* toggle the multireg write bit */
 163         nxt200x_writebytes(state, 0x21, &buf, 1);
 164
 165         nxt200x_readbytes(state, 0x21, &buf, 1);
 166
 167         switch (state->demod_chip) {
 168                 case NXT2002:
 169                         if ((buf & 0x02) == 0)
 170                                 return 0;
 171                         break;
 172                 case NXT2004:
 173                         if (buf == 0)
 174                                 return 0;
 175                         break;
 176                 default:
 177                         return -EINVAL;
 178         }
 179
 180         pr_warn("Error writing multireg register 0x%02X\n", reg);
 181
 182         return 0;
 183 }
 184
 185 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 186 {
 187         int i;
 188         u8 buf, len2, attr;
 189         dprintk("%s\n", __func__);
 190
 191         /* set multi register register */
 192         nxt200x_writebytes(state, 0x35, &reg, 1);
 193
 194         switch (state->demod_chip) {
 195                 case NXT2002:
 196                         /* set multi register length */
 197                         len2 = len & 0x80;
 198                         nxt200x_writebytes(state, 0x34, &len2, 1);
 199
 200                         /* read the actual data */
 201                         nxt200x_readbytes(state, reg, data, len);
 202                         return 0;
 203                 case NXT2004:
 204                         /* probably not right, but gives correct values */
 205                         attr = 0x02;
 206                         if (reg & 0x80) {
 207                                 attr = attr << 1;
 208                                 if (reg & 0x04)
 209                                         attr = attr >> 1;
 210                         }
 211
 212                         /* set multi register length */
 213                         len2 = (attr << 4) | len;
 214                         nxt200x_writebytes(state, 0x34, &len2, 1);
 215
 216                         /* toggle the multireg bit*/
 217                         buf = 0x80;
 218                         nxt200x_writebytes(state, 0x21, &buf, 1);
 219
 220                         /* read the actual data */
 221                         for(i = 0; i < len; i++) {
 222                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 223                         }
 224                         return 0;
 225                 default:
 226                         return -EINVAL;
 227         }
 228 }
 229
 230 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 231 {
 232         u8 buf, stopval, counter = 0;
 233         dprintk("%s\n", __func__);
 234
 235         /* set correct stop value */
 236         switch (state->demod_chip) {
 237                 case NXT2002:
 238                         stopval = 0x40;
 239                         break;
 240                 case NXT2004:
 241                         stopval = 0x10;
 242                         break;
 243                 default:
 244                         stopval = 0;
 245                         break;
 246         }
 247
 248         buf = 0x80;
 249         nxt200x_writebytes(state, 0x22, &buf, 1);
 250
 251         while (counter < 20) {
 252                 nxt200x_readbytes(state, 0x31, &buf, 1);
 253                 if (buf & stopval)
 254                         return;
 255                 msleep(10);
 256                 counter++;
 257         }
 258
 259         pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 260         return;
 261 }
 262
 263 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 264 {
 265         u8 buf;
 266         dprintk("%s\n", __func__);
 267
 268         buf = 0x00;
 269         nxt200x_writebytes(state, 0x22, &buf, 1);
 270 }
 271
 272 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 273 {
 274         u8 buf[9];
 275         u8 counter = 0;
 276         dprintk("%s\n", __func__);
 277
 278         buf[0] = 0x00;
 279         nxt200x_writebytes(state, 0x2b, buf, 1);
 280         buf[0] = 0x70;
 281         nxt200x_writebytes(state, 0x34, buf, 1);
 282         buf[0] = 0x04;
 283         nxt200x_writebytes(state, 0x35, buf, 1);
 284         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 285         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 286         nxt200x_writebytes(state, 0x36, buf, 9);
 287         buf[0] = 0x80;
 288         nxt200x_writebytes(state, 0x21, buf, 1);
 289
 290         while (counter < 20) {
 291                 nxt200x_readbytes(state, 0x21, buf, 1);
 292                 if (buf[0] == 0)
 293                         return;
 294                 msleep(10);
 295                 counter++;
 296         }
 297
 298         pr_warn("Timeout waiting for nxt2004 to init.\n");
 299
 300         return;
 301 }
 302
 303 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 304 {
 305         u8 buf, count = 0;
 306
 307         dprintk("%s\n", __func__);
 308
 309         dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
 310
 311         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 312          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 313         switch (state->demod_chip) {
 314                 case NXT2004:
 315                         if (i2c_writebytes(state, data[0], data+1, 4))
 316                                 pr_warn("error writing to tuner\n");
 317                         /* wait until we have a lock */
 318                         while (count < 20) {
 319                                 i2c_readbytes(state, data[0], &buf, 1);
 320                                 if (buf & 0x40)
 321                                         return 0;
 322                                 msleep(100);
 323                                 count++;
 324                         }
 325                         pr_warn("timeout waiting for tuner lock\n");
 326                         break;
 327                 case NXT2002:
 328                         /* set the i2c transfer speed to the tuner */
 329                         buf = 0x03;
 330                         nxt200x_writebytes(state, 0x20, &buf, 1);
 331
 332                         /* setup to transfer 4 bytes via i2c */
 333                         buf = 0x04;
 334                         nxt200x_writebytes(state, 0x34, &buf, 1);
 335
 336                         /* write actual tuner bytes */
 337                         nxt200x_writebytes(state, 0x36, data+1, 4);
 338
 339                         /* set tuner i2c address */
 340                         buf = data[0] << 1;
 341                         nxt200x_writebytes(state, 0x35, &buf, 1);
 342
 343                         /* write UC Opmode to begin transfer */
 344                         buf = 0x80;
 345                         nxt200x_writebytes(state, 0x21, &buf, 1);
 346
 347                         while (count < 20) {
 348                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 349                                 if ((buf & 0x80)== 0x00)
 350                                         return 0;
 351                                 msleep(100);
 352                                 count++;
 353                         }
 354                         pr_warn("timeout error writing to tuner\n");
 355                         break;
 356                 default:
 357                         return -EINVAL;
 358         }
 359         return 0;
 360 }
 361
 362 static void nxt200x_agc_reset(struct nxt200x_state* state)
 363 {
 364         u8 buf;
 365         dprintk("%s\n", __func__);
 366
 367         switch (state->demod_chip) {
 368                 case NXT2002:
 369                         buf = 0x08;
 370                         nxt200x_writebytes(state, 0x08, &buf, 1);
 371                         buf = 0x00;
 372                         nxt200x_writebytes(state, 0x08, &buf, 1);
 373                         break;
 374                 case NXT2004:
 375                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 376                         buf = 0x08;
 377                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 378                         buf = 0x00;
 379                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 380                         break;
 381                 default:
 382                         break;
 383         }
 384         return;
 385 }
 386
 387 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 388 {
 389
 390         struct nxt200x_state* state = fe->demodulator_priv;
 391         u8 buf[3], written = 0, chunkpos = 0;
 392         u16 rambase, position, crc = 0;
 393
 394         dprintk("%s\n", __func__);
 395         dprintk("Firmware is %zu bytes\n", fw->size);
 396
 397         /* Get the RAM base for this nxt2002 */
 398         nxt200x_readbytes(state, 0x10, buf, 1);
 399
 400         if (buf[0] & 0x10)
 401                 rambase = 0x1000;
 402         else
 403                 rambase = 0x0000;
 404
 405         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 406
 407         /* Hold the micro in reset while loading firmware */
 408         buf[0] = 0x80;
 409         nxt200x_writebytes(state, 0x2B, buf, 1);
 410
 411         for (position = 0; position < fw->size; position++) {
 412                 if (written == 0) {
 413                         crc = 0;
 414                         chunkpos = 0x28;
 415                         buf[0] = ((rambase + position) >> 8);
 416                         buf[1] = (rambase + position) & 0xFF;
 417                         buf[2] = 0x81;
 418                         /* write starting address */
 419                         nxt200x_writebytes(state, 0x29, buf, 3);
 420                 }
 421                 written++;
 422                 chunkpos++;
 423
 424                 if ((written % 4) == 0)
 425                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 426
 427                 crc = nxt200x_crc(crc, fw->data[position]);
 428
 429                 if ((written == 255) || (position+1 == fw->size)) {
 430                         /* write remaining bytes of firmware */
 431                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 432                                 &fw->data[position-(written %4) + 1],
 433                                 written %4);
 434                         buf[0] = crc << 8;
 435                         buf[1] = crc & 0xFF;
 436
 437                         /* write crc */
 438                         nxt200x_writebytes(state, 0x2C, buf, 2);
 439
 440                         /* do a read to stop things */
 441                         nxt200x_readbytes(state, 0x2A, buf, 1);
 442
 443                         /* set transfer mode to complete */
 444                         buf[0] = 0x80;
 445                         nxt200x_writebytes(state, 0x2B, buf, 1);
 446
 447                         written = 0;
 448                 }
 449         }
 450
 451         return 0;
 452 };
 453
 454 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 455 {
 456
 457         struct nxt200x_state* state = fe->demodulator_priv;
 458         u8 buf[3];
 459         u16 rambase, position, crc=0;
 460
 461         dprintk("%s\n", __func__);
 462         dprintk("Firmware is %zu bytes\n", fw->size);
 463
 464         /* set rambase */
 465         rambase = 0x1000;
 466
 467         /* hold the micro in reset while loading firmware */
 468         buf[0] = 0x80;
 469         nxt200x_writebytes(state, 0x2B, buf,1);
 470
 471         /* calculate firmware CRC */
 472         for (position = 0; position < fw->size; position++) {
 473                 crc = nxt200x_crc(crc, fw->data[position]);
 474         }
 475
 476         buf[0] = rambase >> 8;
 477         buf[1] = rambase & 0xFF;
 478         buf[2] = 0x81;
 479         /* write starting address */
 480         nxt200x_writebytes(state,0x29,buf,3);
 481
 482         for (position = 0; position < fw->size;) {
 483                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 484                         fw->size-position > 255 ? 255 : fw->size-position);
 485                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 486         }
 487         buf[0] = crc >> 8;
 488         buf[1] = crc & 0xFF;
 489
 490         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 491
 492         /* write crc */
 493         nxt200x_writebytes(state, 0x2C, buf,2);
 494
 495         /* do a read to stop things */
 496         nxt200x_readbytes(state, 0x2C, buf, 1);
 497
 498         /* set transfer mode to complete */
 499         buf[0] = 0x80;
 500         nxt200x_writebytes(state, 0x2B, buf,1);
 501
 502         return 0;
 503 };
 504
 505 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 506 {
 507         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 508         struct nxt200x_state* state = fe->demodulator_priv;
 509         u8 buf[5];
 510
 511         /* stop the micro first */
 512         nxt200x_microcontroller_stop(state);
 513
 514         if (state->demod_chip == NXT2004) {
 515                 /* make sure demod is set to digital */
 516                 buf[0] = 0x04;
 517                 nxt200x_writebytes(state, 0x14, buf, 1);
 518                 buf[0] = 0x00;
 519                 nxt200x_writebytes(state, 0x17, buf, 1);
 520         }
 521
 522         /* set additional params */
 523         switch (p->modulation) {
 524                 case QAM_64:
 525                 case QAM_256:
 526                         /* Set punctured clock for QAM */
 527                         /* This is just a guess since I am unable to test it */
 528                         if (state->config->set_ts_params)
 529                                 state->config->set_ts_params(fe, 1);
 530                         break;
 531                 case VSB_8:
 532                         /* Set non-punctured clock for VSB */
 533                         if (state->config->set_ts_params)
 534                                 state->config->set_ts_params(fe, 0);
 535                         break;
 536                 default:
 537                         return -EINVAL;
 538         }
 539
 540         if (fe->ops.tuner_ops.calc_regs) {
 541                 /* get tuning information */
 542                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 543
 544                 /* write frequency information */
 545                 nxt200x_writetuner(state, buf);
 546         }
 547
 548         /* reset the agc now that tuning has been completed */
 549         nxt200x_agc_reset(state);
 550
 551         /* set target power level */
 552         switch (p->modulation) {
 553                 case QAM_64:
 554                 case QAM_256:
 555                         buf[0] = 0x74;
 556                         break;
 557                 case VSB_8:
 558                         buf[0] = 0x70;
 559                         break;
 560                 default:
 561                         return -EINVAL;
 562         }
 563         nxt200x_writebytes(state, 0x42, buf, 1);
 564
 565         /* configure sdm */
 566         switch (state->demod_chip) {
 567                 case NXT2002:
 568                         buf[0] = 0x87;
 569                         break;
 570                 case NXT2004:
 571                         buf[0] = 0x07;
 572                         break;
 573                 default:
 574                         return -EINVAL;
 575         }
 576         nxt200x_writebytes(state, 0x57, buf, 1);
 577
 578         /* write sdm1 input */
 579         buf[0] = 0x10;
 580         buf[1] = 0x00;
 581         switch (state->demod_chip) {
 582                 case NXT2002:
 583                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 584                         break;
 585                 case NXT2004:
 586                         nxt200x_writebytes(state, 0x58, buf, 2);
 587                         break;
 588                 default:
 589                         return -EINVAL;
 590         }
 591
 592         /* write sdmx input */
 593         switch (p->modulation) {
 594                 case QAM_64:
 595                                 buf[0] = 0x68;
 596                                 break;
 597                 case QAM_256:
 598                                 buf[0] = 0x64;
 599                                 break;
 600                 case VSB_8:
 601                                 buf[0] = 0x60;
 602                                 break;
 603                 default:
 604                                 return -EINVAL;
 605         }
 606         buf[1] = 0x00;
 607         switch (state->demod_chip) {
 608                 case NXT2002:
 609                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 610                         break;
 611                 case NXT2004:
 612                         nxt200x_writebytes(state, 0x5C, buf, 2);
 613                         break;
 614                 default:
 615                         return -EINVAL;
 616         }
 617
 618         /* write adc power lpf fc */
 619         buf[0] = 0x05;
 620         nxt200x_writebytes(state, 0x43, buf, 1);
 621
 622         if (state->demod_chip == NXT2004) {
 623                 /* write ??? */
 624                 buf[0] = 0x00;
 625                 buf[1] = 0x00;
 626                 nxt200x_writebytes(state, 0x46, buf, 2);
 627         }
 628
 629         /* write accumulator2 input */
 630         buf[0] = 0x80;
 631         buf[1] = 0x00;
 632         switch (state->demod_chip) {
 633                 case NXT2002:
 634                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 635                         break;
 636                 case NXT2004:
 637                         nxt200x_writebytes(state, 0x4B, buf, 2);
 638                         break;
 639                 default:
 640                         return -EINVAL;
 641         }
 642
 643         /* write kg1 */
 644         buf[0] = 0x00;
 645         nxt200x_writebytes(state, 0x4D, buf, 1);
 646
 647         /* write sdm12 lpf fc */
 648         buf[0] = 0x44;
 649         nxt200x_writebytes(state, 0x55, buf, 1);
 650
 651         /* write agc control reg */
 652         buf[0] = 0x04;
 653         nxt200x_writebytes(state, 0x41, buf, 1);
 654
 655         if (state->demod_chip == NXT2004) {
 656                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 657                 buf[0] = 0x24;
 658                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 659
 660                 /* soft reset? */
 661                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 662                 buf[0] = 0x10;
 663                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 664                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 665                 buf[0] = 0x00;
 666                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 667
 668                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 669                 buf[0] = 0x04;
 670                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 671                 buf[0] = 0x00;
 672                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 673                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 674                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 675                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 676                 buf[0] = 0x11;
 677                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 678                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 679                 buf[0] = 0x44;
 680                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 681         }
 682
 683         /* write agc ucgp0 */
 684         switch (p->modulation) {
 685                 case QAM_64:
 686                                 buf[0] = 0x02;
 687                                 break;
 688                 case QAM_256:
 689                                 buf[0] = 0x03;
 690                                 break;
 691                 case VSB_8:
 692                                 buf[0] = 0x00;
 693                                 break;
 694                 default:
 695                                 return -EINVAL;
 696         }
 697         nxt200x_writebytes(state, 0x30, buf, 1);
 698
 699         /* write agc control reg */
 700         buf[0] = 0x00;
 701         nxt200x_writebytes(state, 0x41, buf, 1);
 702
 703         /* write accumulator2 input */
 704         buf[0] = 0x80;
 705         buf[1] = 0x00;
 706         switch (state->demod_chip) {
 707                 case NXT2002:
 708                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 709                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 710                         break;
 711                 case NXT2004:
 712                         nxt200x_writebytes(state, 0x49, buf, 2);
 713                         nxt200x_writebytes(state, 0x4B, buf, 2);
 714                         break;
 715                 default:
 716                         return -EINVAL;
 717         }
 718
 719         /* write agc control reg */
 720         buf[0] = 0x04;
 721         nxt200x_writebytes(state, 0x41, buf, 1);
 722
 723         nxt200x_microcontroller_start(state);
 724
 725         if (state->demod_chip == NXT2004) {
 726                 nxt2004_microcontroller_init(state);
 727
 728                 /* ???? */
 729                 buf[0] = 0xF0;
 730                 buf[1] = 0x00;
 731                 nxt200x_writebytes(state, 0x5C, buf, 2);
 732         }
 733
 734         /* adjacent channel detection should be done here, but I don't
 735         have any stations with this need so I cannot test it */
 736
 737         return 0;
 738 }
 739
 740 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 741 {
 742         struct nxt200x_state* state = fe->demodulator_priv;
 743         u8 lock;
 744         nxt200x_readbytes(state, 0x31, &lock, 1);
 745
 746         *status = 0;
 747         if (lock & 0x20) {
 748                 *status |= FE_HAS_SIGNAL;
 749                 *status |= FE_HAS_CARRIER;
 750                 *status |= FE_HAS_VITERBI;
 751                 *status |= FE_HAS_SYNC;
 752                 *status |= FE_HAS_LOCK;
 753         }
 754         return 0;
 755 }
 756
 757 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 758 {
 759         struct nxt200x_state* state = fe->demodulator_priv;
 760         u8 b[3];
 761
 762         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 763
 764         *ber = ((b[0] << 8) + b[1]) * 8;
 765
 766         return 0;
 767 }
 768
 769 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 770 {
 771         struct nxt200x_state* state = fe->demodulator_priv;
 772         u8 b[2];
 773         u16 temp = 0;
 774
 775         /* setup to read cluster variance */
 776         b[0] = 0x00;
 777         nxt200x_writebytes(state, 0xA1, b, 1);
 778
 779         /* get multreg val */
 780         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 781
 782         temp = (b[0] << 8) | b[1];
 783         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 784
 785         return 0;
 786 }
 787
 788 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 789 {
 790
 791         struct nxt200x_state* state = fe->demodulator_priv;
 792         u8 b[2];
 793         u16 temp = 0, temp2;
 794         u32 snrdb = 0;
 795
 796         /* setup to read cluster variance */
 797         b[0] = 0x00;
 798         nxt200x_writebytes(state, 0xA1, b, 1);
 799
 800         /* get multreg val from 0xA6 */
 801         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 802
 803         temp = (b[0] << 8) | b[1];
 804         temp2 = 0x7FFF - temp;
 805
 806         /* snr will be in db */
 807         if (temp2 > 0x7F00)
 808                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 809         else if (temp2 > 0x7EC0)
 810                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 811         else if (temp2 > 0x7C00)
 812                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 813         else
 814                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 815
 816         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 817         *snr = snrdb * (0xFFFF/32000);
 818
 819         return 0;
 820 }
 821
 822 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 823 {
 824         struct nxt200x_state* state = fe->demodulator_priv;
 825         u8 b[3];
 826
 827         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 828         *ucblocks = b[2];
 829
 830         return 0;
 831 }
 832
 833 static int nxt200x_sleep(struct dvb_frontend* fe)
 834 {
 835         return 0;
 836 }
 837
 838 static int nxt2002_init(struct dvb_frontend* fe)
 839 {
 840         struct nxt200x_state* state = fe->demodulator_priv;
 841         const struct firmware *fw;
 842         int ret;
 843         u8 buf[2];
 844
 845         /* request the firmware, this will block until someone uploads it */
 846         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 847                  __func__, "/*(DEBLOBBED)*/");
 848         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 849                                state->i2c->dev.parent);
 850         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 851         if (ret) {
 852                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 853                        __func__);
 854                 return ret;
 855         }
 856
 857         ret = nxt2002_load_firmware(fe, fw);
 858         release_firmware(fw);
 859         if (ret) {
 860                 pr_err("%s: Writing firmware to device failed\n", __func__);
 861                 return ret;
 862         }
 863         pr_info("%s: Firmware upload complete\n", __func__);
 864
 865         /* Put the micro into reset */
 866         nxt200x_microcontroller_stop(state);
 867
 868         /* ensure transfer is complete */
 869         buf[0]=0x00;
 870         nxt200x_writebytes(state, 0x2B, buf, 1);
 871
 872         /* Put the micro into reset for real this time */
 873         nxt200x_microcontroller_stop(state);
 874
 875         /* soft reset everything (agc,frontend,eq,fec)*/
 876         buf[0] = 0x0F;
 877         nxt200x_writebytes(state, 0x08, buf, 1);
 878         buf[0] = 0x00;
 879         nxt200x_writebytes(state, 0x08, buf, 1);
 880
 881         /* write agc sdm configure */
 882         buf[0] = 0xF1;
 883         nxt200x_writebytes(state, 0x57, buf, 1);
 884
 885         /* write mod output format */
 886         buf[0] = 0x20;
 887         nxt200x_writebytes(state, 0x09, buf, 1);
 888
 889         /* write fec mpeg mode */
 890         buf[0] = 0x7E;
 891         buf[1] = 0x00;
 892         nxt200x_writebytes(state, 0xE9, buf, 2);
 893
 894         /* write mux selection */
 895         buf[0] = 0x00;
 896         nxt200x_writebytes(state, 0xCC, buf, 1);
 897
 898         return 0;
 899 }
 900
 901 static int nxt2004_init(struct dvb_frontend* fe)
 902 {
 903         struct nxt200x_state* state = fe->demodulator_priv;
 904         const struct firmware *fw;
 905         int ret;
 906         u8 buf[3];
 907
 908         /* ??? */
 909         buf[0]=0x00;
 910         nxt200x_writebytes(state, 0x1E, buf, 1);
 911
 912         /* request the firmware, this will block until someone uploads it */
 913         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 914                  __func__, "/*(DEBLOBBED)*/");
 915         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 916                                state->i2c->dev.parent);
 917         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 918         if (ret) {
 919                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 920                        __func__);
 921                 return ret;
 922         }
 923
 924         ret = nxt2004_load_firmware(fe, fw);
 925         release_firmware(fw);
 926         if (ret) {
 927                 pr_err("%s: Writing firmware to device failed\n", __func__);
 928                 return ret;
 929         }
 930         pr_info("%s: Firmware upload complete\n", __func__);
 931
 932         /* ensure transfer is complete */
 933         buf[0] = 0x01;
 934         nxt200x_writebytes(state, 0x19, buf, 1);
 935
 936         nxt2004_microcontroller_init(state);
 937         nxt200x_microcontroller_stop(state);
 938         nxt200x_microcontroller_stop(state);
 939         nxt2004_microcontroller_init(state);
 940         nxt200x_microcontroller_stop(state);
 941
 942         /* soft reset everything (agc,frontend,eq,fec)*/
 943         buf[0] = 0xFF;
 944         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 945         buf[0] = 0x00;
 946         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 947
 948         /* write agc sdm configure */
 949         buf[0] = 0xD7;
 950         nxt200x_writebytes(state, 0x57, buf, 1);
 951
 952         /* ???*/
 953         buf[0] = 0x07;
 954         buf[1] = 0xfe;
 955         nxt200x_writebytes(state, 0x35, buf, 2);
 956         buf[0] = 0x12;
 957         nxt200x_writebytes(state, 0x34, buf, 1);
 958         buf[0] = 0x80;
 959         nxt200x_writebytes(state, 0x21, buf, 1);
 960
 961         /* ???*/
 962         buf[0] = 0x21;
 963         nxt200x_writebytes(state, 0x0A, buf, 1);
 964
 965         /* ???*/
 966         buf[0] = 0x01;
 967         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 968
 969         /* write fec mpeg mode */
 970         buf[0] = 0x7E;
 971         buf[1] = 0x00;
 972         nxt200x_writebytes(state, 0xE9, buf, 2);
 973
 974         /* write mux selection */
 975         buf[0] = 0x00;
 976         nxt200x_writebytes(state, 0xCC, buf, 1);
 977
 978         /* ???*/
 979         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 980         buf[0] = 0x00;
 981         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 982
 983         /* soft reset? */
 984         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 985         buf[0] = 0x10;
 986         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 987         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 988         buf[0] = 0x00;
 989         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 990
 991         /* ???*/
 992         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 993         buf[0] = 0x01;
 994         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 995         buf[0] = 0x70;
 996         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 997         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
 998         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 999
1000         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1001         buf[0] = 0x11;
1002         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1003         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1004         buf[0] = 0x40;
1005         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1006
1007         nxt200x_readbytes(state, 0x10, buf, 1);
1008         buf[0] = 0x10;
1009         nxt200x_writebytes(state, 0x10, buf, 1);
1010         nxt200x_readbytes(state, 0x0A, buf, 1);
1011         buf[0] = 0x21;
1012         nxt200x_writebytes(state, 0x0A, buf, 1);
1013
1014         nxt2004_microcontroller_init(state);
1015
1016         buf[0] = 0x21;
1017         nxt200x_writebytes(state, 0x0A, buf, 1);
1018         buf[0] = 0x7E;
1019         nxt200x_writebytes(state, 0xE9, buf, 1);
1020         buf[0] = 0x00;
1021         nxt200x_writebytes(state, 0xEA, buf, 1);
1022
1023         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1024         buf[0] = 0x00;
1025         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1026         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1027         buf[0] = 0x00;
1028         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1029
1030         /* soft reset? */
1031         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1032         buf[0] = 0x10;
1033         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1034         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1035         buf[0] = 0x00;
1036         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1037
1038         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1039         buf[0] = 0x04;
1040         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1041         buf[0] = 0x00;
1042         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1043         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1044         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1045
1046         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1047         buf[0] = 0x11;
1048         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1049
1050         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1051         buf[0] = 0x44;
1052         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1053
1054         /* initialize tuner */
1055         nxt200x_readbytes(state, 0x10, buf, 1);
1056         buf[0] = 0x12;
1057         nxt200x_writebytes(state, 0x10, buf, 1);
1058         buf[0] = 0x04;
1059         nxt200x_writebytes(state, 0x13, buf, 1);
1060         buf[0] = 0x00;
1061         nxt200x_writebytes(state, 0x16, buf, 1);
1062         buf[0] = 0x04;
1063         nxt200x_writebytes(state, 0x14, buf, 1);
1064         buf[0] = 0x00;
1065         nxt200x_writebytes(state, 0x14, buf, 1);
1066         nxt200x_writebytes(state, 0x17, buf, 1);
1067         nxt200x_writebytes(state, 0x14, buf, 1);
1068         nxt200x_writebytes(state, 0x17, buf, 1);
1069
1070         return 0;
1071 }
1072
1073 static int nxt200x_init(struct dvb_frontend* fe)
1074 {
1075         struct nxt200x_state* state = fe->demodulator_priv;
1076         int ret = 0;
1077
1078         if (!state->initialised) {
1079                 switch (state->demod_chip) {
1080                         case NXT2002:
1081                                 ret = nxt2002_init(fe);
1082                                 break;
1083                         case NXT2004:
1084                                 ret = nxt2004_init(fe);
1085                                 break;
1086                         default:
1087                                 return -EINVAL;
1088                 }
1089                 state->initialised = 1;
1090         }
1091         return ret;
1092 }
1093
1094 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1095 {
1096         fesettings->min_delay_ms = 500;
1097         fesettings->step_size = 0;
1098         fesettings->max_drift = 0;
1099         return 0;
1100 }
1101
1102 static void nxt200x_release(struct dvb_frontend* fe)
1103 {
1104         struct nxt200x_state* state = fe->demodulator_priv;
1105         kfree(state);
1106 }
1107
1108 static const struct dvb_frontend_ops nxt200x_ops;
1109
1110 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1111                                    struct i2c_adapter* i2c)
1112 {
1113         struct nxt200x_state* state = NULL;
1114         u8 buf [] = {0,0,0,0,0};
1115
1116         /* allocate memory for the internal state */
1117         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1118         if (state == NULL)
1119                 goto error;
1120
1121         /* setup the state */
1122         state->config = config;
1123         state->i2c = i2c;
1124         state->initialised = 0;
1125
1126         /* read card id */
1127         nxt200x_readbytes(state, 0x00, buf, 5);
1128         dprintk("NXT info: %*ph\n", 5, buf);
1129
1130         /* set demod chip */
1131         switch (buf[0]) {
1132                 case 0x04:
1133                         state->demod_chip = NXT2002;
1134                         pr_info("NXT2002 Detected\n");
1135                         break;
1136                 case 0x05:
1137                         state->demod_chip = NXT2004;
1138                         pr_info("NXT2004 Detected\n");
1139                         break;
1140                 default:
1141                         goto error;
1142         }
1143
1144         /* make sure demod chip is supported */
1145         switch (state->demod_chip) {
1146                 case NXT2002:
1147                         if (buf[0] != 0x04) goto error;         /* device id */
1148                         if (buf[1] != 0x02) goto error;         /* fab id */
1149                         if (buf[2] != 0x11) goto error;         /* month */
1150                         if (buf[3] != 0x20) goto error;         /* year msb */
1151                         if (buf[4] != 0x00) goto error;         /* year lsb */
1152                         break;
1153                 case NXT2004:
1154                         if (buf[0] != 0x05) goto error;         /* device id */
1155                         break;
1156                 default:
1157                         goto error;
1158         }
1159
1160         /* create dvb_frontend */
1161         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1162         state->frontend.demodulator_priv = state;
1163         return &state->frontend;
1164
1165 error:
1166         kfree(state);
1167         pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1168         return NULL;
1169 }
1170
1171 static const struct dvb_frontend_ops nxt200x_ops = {
1172         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1173         .info = {
1174                 .name = "Nextwave NXT200X VSB/QAM frontend",
1175                 .frequency_min_hz =  54 * MHz,
1176                 .frequency_max_hz = 860 * MHz,
1177                 .frequency_stepsize_hz = 166666,        /* stepsize is just a guess */
1178                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1179                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1180                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1181         },
1182
1183         .release = nxt200x_release,
1184
1185         .init = nxt200x_init,
1186         .sleep = nxt200x_sleep,
1187
1188         .set_frontend = nxt200x_setup_frontend_parameters,
1189         .get_tune_settings = nxt200x_get_tune_settings,
1190
1191         .read_status = nxt200x_read_status,
1192         .read_ber = nxt200x_read_ber,
1193         .read_signal_strength = nxt200x_read_signal_strength,
1194         .read_snr = nxt200x_read_snr,
1195         .read_ucblocks = nxt200x_read_ucblocks,
1196 };
1197
1198 module_param(debug, int, 0644);
1199 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1200
1201 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1202 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1203 MODULE_LICENSE("GPL");
1204
1205 EXPORT_SYMBOL(nxt200x_attach);
1206