GNU Linux-libre 4.4.285-gnu1
[releases.git] / drivers / media / dvb-frontends / horus3a.c
1 /*
2  * horus3a.h
3  *
4  * Sony Horus3A DVB-S/S2 tuner driver
5  *
6  * Copyright 2012 Sony Corporation
7  * Copyright (C) 2014 NetUP Inc.
8  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
9  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  */
21
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/dvb/frontend.h>
25 #include <linux/types.h>
26 #include "horus3a.h"
27 #include "dvb_frontend.h"
28
29 #define MAX_WRITE_REGSIZE      5
30
31 enum horus3a_state {
32         STATE_UNKNOWN,
33         STATE_SLEEP,
34         STATE_ACTIVE
35 };
36
37 struct horus3a_priv {
38         u32                     frequency;
39         u8                      i2c_address;
40         struct i2c_adapter      *i2c;
41         enum horus3a_state      state;
42         void                    *set_tuner_data;
43         int                     (*set_tuner)(void *, int);
44 };
45
46 static void horus3a_i2c_debug(struct horus3a_priv *priv,
47                               u8 reg, u8 write, const u8 *data, u32 len)
48 {
49         dev_dbg(&priv->i2c->dev, "horus3a: I2C %s reg 0x%02x size %d\n",
50                 (write == 0 ? "read" : "write"), reg, len);
51         print_hex_dump_bytes("horus3a: I2C data: ",
52                 DUMP_PREFIX_OFFSET, data, len);
53 }
54
55 static int horus3a_write_regs(struct horus3a_priv *priv,
56                               u8 reg, const u8 *data, u32 len)
57 {
58         int ret;
59         u8 buf[MAX_WRITE_REGSIZE + 1];
60         struct i2c_msg msg[1] = {
61                 {
62                         .addr = priv->i2c_address,
63                         .flags = 0,
64                         .len = len + 1,
65                         .buf = buf,
66                 }
67         };
68
69         if (len + 1 >= sizeof(buf)) {
70                 dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
71                          reg, len + 1);
72                 return -E2BIG;
73         }
74
75         horus3a_i2c_debug(priv, reg, 1, data, len);
76         buf[0] = reg;
77         memcpy(&buf[1], data, len);
78         ret = i2c_transfer(priv->i2c, msg, 1);
79         if (ret >= 0 && ret != 1)
80                 ret = -EREMOTEIO;
81         if (ret < 0) {
82                 dev_warn(&priv->i2c->dev,
83                         "%s: i2c wr failed=%d reg=%02x len=%d\n",
84                         KBUILD_MODNAME, ret, reg, len);
85                 return ret;
86         }
87         return 0;
88 }
89
90 static int horus3a_write_reg(struct horus3a_priv *priv, u8 reg, u8 val)
91 {
92         u8 tmp = val; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
93
94         return horus3a_write_regs(priv, reg, &tmp, 1);
95 }
96
97 static int horus3a_enter_power_save(struct horus3a_priv *priv)
98 {
99         u8 data[2];
100
101         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
102         if (priv->state == STATE_SLEEP)
103                 return 0;
104         /* IQ Generator disable */
105         horus3a_write_reg(priv, 0x2a, 0x79);
106         /* MDIV_EN = 0 */
107         horus3a_write_reg(priv, 0x29, 0x70);
108         /* VCO disable preparation */
109         horus3a_write_reg(priv, 0x28, 0x3e);
110         /* VCO buffer disable */
111         horus3a_write_reg(priv, 0x2a, 0x19);
112         /* VCO calibration disable */
113         horus3a_write_reg(priv, 0x1c, 0x00);
114         /* Power save setting (xtal is not stopped) */
115         data[0] = 0xC0;
116         /* LNA is Disabled */
117         data[1] = 0xA7;
118         /* 0x11 - 0x12 */
119         horus3a_write_regs(priv, 0x11, data, sizeof(data));
120         priv->state = STATE_SLEEP;
121         return 0;
122 }
123
124 static int horus3a_leave_power_save(struct horus3a_priv *priv)
125 {
126         u8 data[2];
127
128         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
129         if (priv->state == STATE_ACTIVE)
130                 return 0;
131         /* Leave power save */
132         data[0] = 0x00;
133         /* LNA is Disabled */
134         data[1] = 0xa7;
135         /* 0x11 - 0x12 */
136         horus3a_write_regs(priv, 0x11, data, sizeof(data));
137         /* VCO buffer enable */
138         horus3a_write_reg(priv, 0x2a, 0x79);
139         /* VCO calibration enable */
140         horus3a_write_reg(priv, 0x1c, 0xc0);
141         /* MDIV_EN = 1 */
142         horus3a_write_reg(priv, 0x29, 0x71);
143         usleep_range(5000, 7000);
144         priv->state = STATE_ACTIVE;
145         return 0;
146 }
147
148 static int horus3a_init(struct dvb_frontend *fe)
149 {
150         struct horus3a_priv *priv = fe->tuner_priv;
151
152         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
153         return 0;
154 }
155
156 static int horus3a_release(struct dvb_frontend *fe)
157 {
158         struct horus3a_priv *priv = fe->tuner_priv;
159
160         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
161         kfree(fe->tuner_priv);
162         fe->tuner_priv = NULL;
163         return 0;
164 }
165
166 static int horus3a_sleep(struct dvb_frontend *fe)
167 {
168         struct horus3a_priv *priv = fe->tuner_priv;
169
170         dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
171         horus3a_enter_power_save(priv);
172         return 0;
173 }
174
175 static int horus3a_set_params(struct dvb_frontend *fe)
176 {
177         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
178         struct horus3a_priv *priv = fe->tuner_priv;
179         u32 frequency = p->frequency;
180         u32 symbol_rate = p->symbol_rate/1000;
181         u8 mixdiv = 0;
182         u8 mdiv = 0;
183         u32 ms = 0;
184         u8 f_ctl = 0;
185         u8 g_ctl = 0;
186         u8 fc_lpf = 0;
187         u8 data[5];
188
189         dev_dbg(&priv->i2c->dev, "%s(): frequency %dkHz symbol_rate %dksps\n",
190                 __func__, frequency, symbol_rate);
191         if (priv->set_tuner)
192                 priv->set_tuner(priv->set_tuner_data, 0);
193         if (priv->state == STATE_SLEEP)
194                 horus3a_leave_power_save(priv);
195
196         /* frequency should be X MHz (X : integer) */
197         frequency = DIV_ROUND_CLOSEST(frequency, 1000) * 1000;
198         if (frequency <= 1155000) {
199                 mixdiv = 4;
200                 mdiv = 1;
201         } else {
202                 mixdiv = 2;
203                 mdiv = 0;
204         }
205         /* Assumed that fREF == 1MHz (1000kHz) */
206         ms = DIV_ROUND_CLOSEST((frequency * mixdiv) / 2, 1000);
207         if (ms > 0x7FFF) { /* 15 bit */
208                 dev_err(&priv->i2c->dev, "horus3a: invalid frequency %d\n",
209                         frequency);
210                 return -EINVAL;
211         }
212         if (frequency < 975000) {
213                 /* F_CTL=11100 G_CTL=001 */
214                 f_ctl = 0x1C;
215                 g_ctl = 0x01;
216         } else if (frequency < 1050000) {
217                 /* F_CTL=11000 G_CTL=010 */
218                 f_ctl = 0x18;
219                 g_ctl = 0x02;
220         } else if (frequency < 1150000) {
221                 /* F_CTL=10100 G_CTL=010 */
222                 f_ctl = 0x14;
223                 g_ctl = 0x02;
224         } else if (frequency < 1250000) {
225                 /* F_CTL=10000 G_CTL=011 */
226                 f_ctl = 0x10;
227                 g_ctl = 0x03;
228         } else if (frequency < 1350000) {
229                 /* F_CTL=01100 G_CTL=100 */
230                 f_ctl = 0x0C;
231                 g_ctl = 0x04;
232         } else if (frequency < 1450000) {
233                 /* F_CTL=01010 G_CTL=100 */
234                 f_ctl = 0x0A;
235                 g_ctl = 0x04;
236         } else if (frequency < 1600000) {
237                 /* F_CTL=00111 G_CTL=101 */
238                 f_ctl = 0x07;
239                 g_ctl = 0x05;
240         } else if (frequency < 1800000) {
241                 /* F_CTL=00100 G_CTL=010 */
242                 f_ctl = 0x04;
243                 g_ctl = 0x02;
244         } else if (frequency < 2000000) {
245                 /* F_CTL=00010 G_CTL=001 */
246                 f_ctl = 0x02;
247                 g_ctl = 0x01;
248         } else {
249                 /* F_CTL=00000 G_CTL=000 */
250                 f_ctl = 0x00;
251                 g_ctl = 0x00;
252         }
253         /* LPF cutoff frequency setting */
254         if (p->delivery_system == SYS_DVBS) {
255                 /*
256                  * rolloff = 0.35
257                  * SR <= 4.3
258                  * fc_lpf = 5
259                  * 4.3 < SR <= 10
260                  * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 =
261                  *      SR * 1.175 = SR * (47/40)
262                  * 10 < SR
263                  * fc_lpf = SR * (1 + rolloff) / 2 + 5 =
264                  *      SR * 0.675 + 5 = SR * (27/40) + 5
265                  * NOTE: The result should be round up.
266                  */
267                 if (symbol_rate <= 4300)
268                         fc_lpf = 5;
269                 else if (symbol_rate <= 10000)
270                         fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 47, 40000);
271                 else
272                         fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 27, 40000) + 5;
273                 /* 5 <= fc_lpf <= 36 */
274                 if (fc_lpf > 36)
275                         fc_lpf = 36;
276         } else if (p->delivery_system == SYS_DVBS2) {
277                 int rolloff;
278
279                 switch (p->rolloff) {
280                 case ROLLOFF_35:
281                         rolloff = 35;
282                         break;
283                 case ROLLOFF_25:
284                         rolloff = 25;
285                         break;
286                 case ROLLOFF_20:
287                         rolloff = 20;
288                         break;
289                 case ROLLOFF_AUTO:
290                 default:
291                         dev_err(&priv->i2c->dev,
292                                 "horus3a: auto roll-off is not supported\n");
293                         return -EINVAL;
294                 }
295                 /*
296                  * SR <= 4.5:
297                  * fc_lpf = 5
298                  * 4.5 < SR <= 10:
299                  * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2
300                  * 10 < SR:
301                  * fc_lpf = SR * (1 + rolloff) / 2 + 5
302                  * NOTE: The result should be round up.
303                  */
304                 if (symbol_rate <= 4500)
305                         fc_lpf = 5;
306                 else if (symbol_rate <= 10000)
307                         fc_lpf = (u8)DIV_ROUND_UP(
308                                 symbol_rate * (200 + rolloff), 200000);
309                 else
310                         fc_lpf = (u8)DIV_ROUND_UP(
311                                 symbol_rate * (100 + rolloff), 200000) + 5;
312                 /* 5 <= fc_lpf <= 36 is valid */
313                 if (fc_lpf > 36)
314                         fc_lpf = 36;
315         } else {
316                 dev_err(&priv->i2c->dev,
317                         "horus3a: invalid delivery system %d\n",
318                         p->delivery_system);
319                 return -EINVAL;
320         }
321         /* 0x00 - 0x04 */
322         data[0] = (u8)((ms >> 7) & 0xFF);
323         data[1] = (u8)((ms << 1) & 0xFF);
324         data[2] = 0x00;
325         data[3] = 0x00;
326         data[4] = (u8)(mdiv << 7);
327         horus3a_write_regs(priv, 0x00, data, sizeof(data));
328         /* Write G_CTL, F_CTL */
329         horus3a_write_reg(priv, 0x09, (u8)((g_ctl << 5) | f_ctl));
330         /* Write LPF cutoff frequency */
331         horus3a_write_reg(priv, 0x37, (u8)(0x80 | (fc_lpf << 1)));
332         /* Start Calibration */
333         horus3a_write_reg(priv, 0x05, 0x80);
334         /* IQ Generator enable */
335         horus3a_write_reg(priv, 0x2a, 0x7b);
336         /* tuner stabilization time */
337         msleep(60);
338         /* Store tuned frequency to the struct */
339         priv->frequency = ms * 2 * 1000 / mixdiv;
340         return 0;
341 }
342
343 static int horus3a_get_frequency(struct dvb_frontend *fe, u32 *frequency)
344 {
345         struct horus3a_priv *priv = fe->tuner_priv;
346
347         *frequency = priv->frequency;
348         return 0;
349 }
350
351 static struct dvb_tuner_ops horus3a_tuner_ops = {
352         .info = {
353                 .name = "Sony Horus3a",
354                 .frequency_min = 950000,
355                 .frequency_max = 2150000,
356                 .frequency_step = 1000,
357         },
358         .init = horus3a_init,
359         .release = horus3a_release,
360         .sleep = horus3a_sleep,
361         .set_params = horus3a_set_params,
362         .get_frequency = horus3a_get_frequency,
363 };
364
365 struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
366                                     const struct horus3a_config *config,
367                                     struct i2c_adapter *i2c)
368 {
369         u8 buf[3], val;
370         struct horus3a_priv *priv = NULL;
371
372         priv = kzalloc(sizeof(struct horus3a_priv), GFP_KERNEL);
373         if (priv == NULL)
374                 return NULL;
375         priv->i2c_address = (config->i2c_address >> 1);
376         priv->i2c = i2c;
377         priv->set_tuner_data = config->set_tuner_priv;
378         priv->set_tuner = config->set_tuner_callback;
379
380         if (fe->ops.i2c_gate_ctrl)
381                 fe->ops.i2c_gate_ctrl(fe, 1);
382
383         /* wait 4ms after power on */
384         usleep_range(4000, 6000);
385         /* IQ Generator disable */
386         horus3a_write_reg(priv, 0x2a, 0x79);
387         /* REF_R = Xtal Frequency */
388         buf[0] = config->xtal_freq_mhz;
389         buf[1] = config->xtal_freq_mhz;
390         buf[2] = 0;
391         /* 0x6 - 0x8 */
392         horus3a_write_regs(priv, 0x6, buf, 3);
393         /* IQ Out = Single Ended */
394         horus3a_write_reg(priv, 0x0a, 0x40);
395         switch (config->xtal_freq_mhz) {
396         case 27:
397                 val = 0x1f;
398                 break;
399         case 24:
400                 val = 0x10;
401                 break;
402         case 16:
403                 val = 0xc;
404                 break;
405         default:
406                 val = 0;
407                 dev_warn(&priv->i2c->dev,
408                         "horus3a: invalid xtal frequency %dMHz\n",
409                         config->xtal_freq_mhz);
410                 break;
411         }
412         val <<= 2;
413         horus3a_write_reg(priv, 0x0e, val);
414         horus3a_enter_power_save(priv);
415         usleep_range(3000, 5000);
416
417         if (fe->ops.i2c_gate_ctrl)
418                 fe->ops.i2c_gate_ctrl(fe, 0);
419
420         memcpy(&fe->ops.tuner_ops, &horus3a_tuner_ops,
421                                 sizeof(struct dvb_tuner_ops));
422         fe->tuner_priv = priv;
423         dev_info(&priv->i2c->dev,
424                 "Sony HORUS3A attached on addr=%x at I2C adapter %p\n",
425                 priv->i2c_address, priv->i2c);
426         return fe;
427 }
428 EXPORT_SYMBOL(horus3a_attach);
429
430 MODULE_DESCRIPTION("Sony HORUS3A sattelite tuner driver");
431 MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>");
432 MODULE_LICENSE("GPL");