4 * Sony HELENE DVB-S/S2 DVB-T/T2 DVB-C/C2 ISDB-T/S tuner driver (CXD2858ER)
6 * Copyright 2012 Sony Corporation
7 * Copyright (C) 2014 NetUP Inc.
8 * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <linux/dvb/frontend.h>
24 #include <linux/types.h>
26 #include "dvb_frontend.h"
28 #define MAX_WRITE_REGSIZE 20
39 struct i2c_adapter *i2c;
40 enum helene_state state;
42 int (*set_tuner)(void *, int);
43 enum helene_xtal xtal;
46 #define TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system) \
47 (((tv_system) != SONY_HELENE_DTV_DVBC_6) && \
48 ((tv_system) != SONY_HELENE_DTV_DVBC_8)\
49 && ((tv_system) != SONY_HELENE_DTV_DVBC2_6) && \
50 ((tv_system) != SONY_HELENE_DTV_DVBC2_8))
52 #define HELENE_AUTO 0xff
53 #define HELENE_OFFSET(ofs) ((u8)(ofs) & 0x1F)
54 #define HELENE_BW_6 0x00
55 #define HELENE_BW_7 0x01
56 #define HELENE_BW_8 0x02
57 #define HELENE_BW_1_7 0x03
59 enum helene_tv_system_t {
60 SONY_HELENE_TV_SYSTEM_UNKNOWN,
61 /* Terrestrial Analog */
62 SONY_HELENE_ATV_MN_EIAJ,
63 /**< System-M (Japan) (IF: Fp=5.75MHz in default) */
64 SONY_HELENE_ATV_MN_SAP,
65 /**< System-M (US) (IF: Fp=5.75MHz in default) */
66 SONY_HELENE_ATV_MN_A2,
67 /**< System-M (Korea) (IF: Fp=5.9MHz in default) */
69 /**< System-B/G (IF: Fp=7.3MHz in default) */
71 /**< System-I (IF: Fp=7.85MHz in default) */
73 /**< System-D/K (IF: Fp=7.85MHz in default) */
75 /**< System-L (IF: Fp=7.85MHz in default) */
76 SONY_HELENE_ATV_L_DASH,
77 /**< System-L DASH (IF: Fp=2.2MHz in default) */
78 /* Terrestrial/Cable Digital */
80 /**< ATSC 8VSB (IF: Fc=3.7MHz in default) */
82 /**< US QAM (IF: Fc=3.7MHz in default) */
83 SONY_HELENE_DTV_ISDBT_6,
84 /**< ISDB-T 6MHzBW (IF: Fc=3.55MHz in default) */
85 SONY_HELENE_DTV_ISDBT_7,
86 /**< ISDB-T 7MHzBW (IF: Fc=4.15MHz in default) */
87 SONY_HELENE_DTV_ISDBT_8,
88 /**< ISDB-T 8MHzBW (IF: Fc=4.75MHz in default) */
89 SONY_HELENE_DTV_DVBT_5,
90 /**< DVB-T 5MHzBW (IF: Fc=3.6MHz in default) */
91 SONY_HELENE_DTV_DVBT_6,
92 /**< DVB-T 6MHzBW (IF: Fc=3.6MHz in default) */
93 SONY_HELENE_DTV_DVBT_7,
94 /**< DVB-T 7MHzBW (IF: Fc=4.2MHz in default) */
95 SONY_HELENE_DTV_DVBT_8,
96 /**< DVB-T 8MHzBW (IF: Fc=4.8MHz in default) */
97 SONY_HELENE_DTV_DVBT2_1_7,
98 /**< DVB-T2 1.7MHzBW (IF: Fc=3.5MHz in default) */
99 SONY_HELENE_DTV_DVBT2_5,
100 /**< DVB-T2 5MHzBW (IF: Fc=3.6MHz in default) */
101 SONY_HELENE_DTV_DVBT2_6,
102 /**< DVB-T2 6MHzBW (IF: Fc=3.6MHz in default) */
103 SONY_HELENE_DTV_DVBT2_7,
104 /**< DVB-T2 7MHzBW (IF: Fc=4.2MHz in default) */
105 SONY_HELENE_DTV_DVBT2_8,
106 /**< DVB-T2 8MHzBW (IF: Fc=4.8MHz in default) */
107 SONY_HELENE_DTV_DVBC_6,
108 /**< DVB-C 6MHzBW (IF: Fc=3.7MHz in default) */
109 SONY_HELENE_DTV_DVBC_8,
110 /**< DVB-C 8MHzBW (IF: Fc=4.9MHz in default) */
111 SONY_HELENE_DTV_DVBC2_6,
112 /**< DVB-C2 6MHzBW (IF: Fc=3.7MHz in default) */
113 SONY_HELENE_DTV_DVBC2_8,
114 /**< DVB-C2 8MHzBW (IF: Fc=4.9MHz in default) */
115 SONY_HELENE_DTV_DTMB,
116 /**< DTMB (IF: Fc=5.1MHz in default) */
118 SONY_HELENE_STV_ISDBS,
120 SONY_HELENE_STV_DVBS,
122 SONY_HELENE_STV_DVBS2,
125 SONY_HELENE_ATV_MIN = SONY_HELENE_ATV_MN_EIAJ,
126 /**< Minimum analog terrestrial system */
127 SONY_HELENE_ATV_MAX = SONY_HELENE_ATV_L_DASH,
128 /**< Maximum analog terrestrial system */
129 SONY_HELENE_DTV_MIN = SONY_HELENE_DTV_8VSB,
130 /**< Minimum digital terrestrial system */
131 SONY_HELENE_DTV_MAX = SONY_HELENE_DTV_DTMB,
132 /**< Maximum digital terrestrial system */
133 SONY_HELENE_TERR_TV_SYSTEM_NUM,
134 /**< Number of supported terrestrial broadcasting system */
135 SONY_HELENE_STV_MIN = SONY_HELENE_STV_ISDBS,
136 /**< Minimum satellite system */
137 SONY_HELENE_STV_MAX = SONY_HELENE_STV_DVBS2
138 /**< Maximum satellite system */
141 struct helene_terr_adjust_param_t {
142 /* < Addr:0x69 Bit[6:4] : RFVGA gain.
143 * 0xFF means Auto. (RF_GAIN_SEL = 1)
146 /* < Addr:0x69 Bit[3:0] : IF_BPF gain.
149 /* < Addr:0x6B Bit[3:0] : RF overload
150 * RF input detect level. (FRF <= 172MHz)
152 uint8_t RFOVLD_DET_LV1_VL;
153 /* < Addr:0x6B Bit[3:0] : RF overload
154 * RF input detect level. (172MHz < FRF <= 464MHz)
156 uint8_t RFOVLD_DET_LV1_VH;
157 /* < Addr:0x6B Bit[3:0] : RF overload
158 * RF input detect level. (FRF > 464MHz)
160 uint8_t RFOVLD_DET_LV1_U;
161 /* < Addr:0x6C Bit[2:0] :
162 * Internal RFAGC detect level. (FRF <= 172MHz)
164 uint8_t IFOVLD_DET_LV_VL;
165 /* < Addr:0x6C Bit[2:0] :
166 * Internal RFAGC detect level. (172MHz < FRF <= 464MHz)
168 uint8_t IFOVLD_DET_LV_VH;
169 /* < Addr:0x6C Bit[2:0] :
170 * Internal RFAGC detect level. (FRF > 464MHz)
172 uint8_t IFOVLD_DET_LV_U;
173 /* < Addr:0x6D Bit[5:4] :
174 * IF filter center offset.
177 /* < Addr:0x6D Bit[1:0] :
178 * 6MHzBW(0x00) or 7MHzBW(0x01)
179 * or 8MHzBW(0x02) or 1.7MHzBW(0x03)
182 /* < Addr:0x6E Bit[4:0] :
183 * 5bit signed. IF offset (kHz) = FIF_OFFSET x 50
186 /* < Addr:0x6F Bit[4:0] :
187 * 5bit signed. BW offset (kHz) =
188 * BW_OFFSET x 50 (BW_OFFSET x 10 in 1.7MHzBW)
191 /* < Addr:0x9C Bit[0] :
192 * Local polarity. (0: Upper Local, 1: Lower Local)
194 uint8_t IS_LOWERLOCAL;
197 static const struct helene_terr_adjust_param_t
198 terr_params[SONY_HELENE_TERR_TV_SYSTEM_NUM] = {
199 /*< SONY_HELENE_TV_SYSTEM_UNKNOWN */
200 {HELENE_AUTO, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
201 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(0), 0x00},
203 /**< SONY_HELENE_ATV_MN_EIAJ (System-M (Japan)) */
204 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
205 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00},
206 /**< SONY_HELENE_ATV_MN_SAP (System-M (US)) */
207 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
208 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00},
209 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
210 HELENE_BW_6, HELENE_OFFSET(3), HELENE_OFFSET(1), 0x00},
211 /**< SONY_HELENE_ATV_MN_A2 (System-M (Korea)) */
212 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
213 HELENE_BW_7, HELENE_OFFSET(11), HELENE_OFFSET(5), 0x00},
214 /**< SONY_HELENE_ATV_BG (System-B/G) */
215 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
216 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
217 /**< SONY_HELENE_ATV_I (System-I) */
218 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00,
219 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
220 /**< SONY_HELENE_ATV_DK (System-D/K) */
221 {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00,
222 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00},
223 /**< SONY_HELENE_ATV_L (System-L) */
224 {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00,
225 HELENE_BW_8, HELENE_OFFSET(-1), HELENE_OFFSET(4), 0x00},
226 /**< SONY_HELENE_ATV_L_DASH (System-L DASH) */
228 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x03, 0x03, 0x03, 0x00,
229 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00},
230 /**< SONY_HELENE_DTV_8VSB (ATSC 8VSB) */
231 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
232 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00},
233 /**< SONY_HELENE_DTV_QAM (US QAM) */
234 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
235 HELENE_BW_6, HELENE_OFFSET(-9), HELENE_OFFSET(-5), 0x00},
236 /**< SONY_HELENE_DTV_ISDBT_6 (ISDB-T 6MHzBW) */
237 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
238 HELENE_BW_7, HELENE_OFFSET(-7), HELENE_OFFSET(-6), 0x00},
239 /**< SONY_HELENE_DTV_ISDBT_7 (ISDB-T 7MHzBW) */
240 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
241 HELENE_BW_8, HELENE_OFFSET(-5), HELENE_OFFSET(-7), 0x00},
242 /**< SONY_HELENE_DTV_ISDBT_8 (ISDB-T 8MHzBW) */
243 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
244 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
245 /**< SONY_HELENE_DTV_DVBT_5 (DVB-T 5MHzBW) */
246 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
247 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
248 /**< SONY_HELENE_DTV_DVBT_6 (DVB-T 6MHzBW) */
249 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
250 HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00},
251 /**< SONY_HELENE_DTV_DVBT_7 (DVB-T 7MHzBW) */
252 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
253 HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00},
254 /**< SONY_HELENE_DTV_DVBT_8 (DVB-T 8MHzBW) */
255 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
256 HELENE_BW_1_7, HELENE_OFFSET(-10), HELENE_OFFSET(-10), 0x00},
257 /**< SONY_HELENE_DTV_DVBT2_1_7 (DVB-T2 1.7MHzBW) */
258 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
259 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
260 /**< SONY_HELENE_DTV_DVBT2_5 (DVB-T2 5MHzBW) */
261 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
262 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00},
263 /**< SONY_HELENE_DTV_DVBT2_6 (DVB-T2 6MHzBW) */
264 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
265 HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00},
266 /**< SONY_HELENE_DTV_DVBT2_7 (DVB-T2 7MHzBW) */
267 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
268 HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00},
269 /**< SONY_HELENE_DTV_DVBT2_8 (DVB-T2 8MHzBW) */
270 {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00,
271 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-4), 0x00},
272 /**< SONY_HELENE_DTV_DVBC_6 (DVB-C 6MHzBW) */
273 {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00,
274 HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(-3), 0x00},
275 /**< SONY_HELENE_DTV_DVBC_8 (DVB-C 8MHzBW) */
276 {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00,
277 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-2), 0x00},
278 /**< SONY_HELENE_DTV_DVBC2_6 (DVB-C2 6MHzBW) */
279 {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00,
280 HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(0), 0x00},
281 /**< SONY_HELENE_DTV_DVBC2_8 (DVB-C2 8MHzBW) */
282 {HELENE_AUTO, 0x04, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00,
283 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(1), 0x00}
284 /**< SONY_HELENE_DTV_DTMB (DTMB) */
287 static void helene_i2c_debug(struct helene_priv *priv,
288 u8 reg, u8 write, const u8 *data, u32 len)
290 dev_dbg(&priv->i2c->dev, "helene: I2C %s reg 0x%02x size %d\n",
291 (write == 0 ? "read" : "write"), reg, len);
292 print_hex_dump_bytes("helene: I2C data: ",
293 DUMP_PREFIX_OFFSET, data, len);
296 static int helene_write_regs(struct helene_priv *priv,
297 u8 reg, const u8 *data, u32 len)
300 u8 buf[MAX_WRITE_REGSIZE + 1];
301 struct i2c_msg msg[1] = {
303 .addr = priv->i2c_address,
310 if (len + 1 > sizeof(buf)) {
311 dev_warn(&priv->i2c->dev,
312 "wr reg=%04x: len=%d vs %Zu is too big!\n",
313 reg, len + 1, sizeof(buf));
317 helene_i2c_debug(priv, reg, 1, data, len);
319 memcpy(&buf[1], data, len);
320 ret = i2c_transfer(priv->i2c, msg, 1);
321 if (ret >= 0 && ret != 1)
324 dev_warn(&priv->i2c->dev,
325 "%s: i2c wr failed=%d reg=%02x len=%d\n",
326 KBUILD_MODNAME, ret, reg, len);
332 static int helene_write_reg(struct helene_priv *priv, u8 reg, u8 val)
334 u8 tmp = val; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
336 return helene_write_regs(priv, reg, &tmp, 1);
339 static int helene_read_regs(struct helene_priv *priv,
340 u8 reg, u8 *val, u32 len)
343 struct i2c_msg msg[2] = {
345 .addr = priv->i2c_address,
350 .addr = priv->i2c_address,
357 ret = i2c_transfer(priv->i2c, &msg[0], 1);
358 if (ret >= 0 && ret != 1)
361 dev_warn(&priv->i2c->dev,
362 "%s: I2C rw failed=%d addr=%02x reg=%02x\n",
363 KBUILD_MODNAME, ret, priv->i2c_address, reg);
366 ret = i2c_transfer(priv->i2c, &msg[1], 1);
367 if (ret >= 0 && ret != 1)
370 dev_warn(&priv->i2c->dev,
371 "%s: i2c rd failed=%d addr=%02x reg=%02x\n",
372 KBUILD_MODNAME, ret, priv->i2c_address, reg);
375 helene_i2c_debug(priv, reg, 0, val, len);
379 static int helene_read_reg(struct helene_priv *priv, u8 reg, u8 *val)
381 return helene_read_regs(priv, reg, val, 1);
384 static int helene_set_reg_bits(struct helene_priv *priv,
385 u8 reg, u8 data, u8 mask)
391 res = helene_read_reg(priv, reg, &rdata);
394 data = ((data & mask) | (rdata & (mask ^ 0xFF)));
396 return helene_write_reg(priv, reg, data);
399 static int helene_enter_power_save(struct helene_priv *priv)
401 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
402 if (priv->state == STATE_SLEEP)
405 /* Standby setting for CPU */
406 helene_write_reg(priv, 0x88, 0x0);
408 /* Standby setting for internal logic block */
409 helene_write_reg(priv, 0x87, 0xC0);
411 priv->state = STATE_SLEEP;
415 static int helene_leave_power_save(struct helene_priv *priv)
417 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
418 if (priv->state == STATE_ACTIVE)
421 /* Standby setting for internal logic block */
422 helene_write_reg(priv, 0x87, 0xC4);
424 /* Standby setting for CPU */
425 helene_write_reg(priv, 0x88, 0x40);
427 priv->state = STATE_ACTIVE;
431 static int helene_init(struct dvb_frontend *fe)
433 struct helene_priv *priv = fe->tuner_priv;
435 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
436 return helene_leave_power_save(priv);
439 static int helene_release(struct dvb_frontend *fe)
441 struct helene_priv *priv = fe->tuner_priv;
443 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
444 kfree(fe->tuner_priv);
445 fe->tuner_priv = NULL;
449 static int helene_sleep(struct dvb_frontend *fe)
451 struct helene_priv *priv = fe->tuner_priv;
453 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
454 helene_enter_power_save(priv);
458 static enum helene_tv_system_t helene_get_tv_system(struct dvb_frontend *fe)
460 enum helene_tv_system_t system = SONY_HELENE_TV_SYSTEM_UNKNOWN;
461 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
462 struct helene_priv *priv = fe->tuner_priv;
464 if (p->delivery_system == SYS_DVBT) {
465 if (p->bandwidth_hz <= 5000000)
466 system = SONY_HELENE_DTV_DVBT_5;
467 else if (p->bandwidth_hz <= 6000000)
468 system = SONY_HELENE_DTV_DVBT_6;
469 else if (p->bandwidth_hz <= 7000000)
470 system = SONY_HELENE_DTV_DVBT_7;
471 else if (p->bandwidth_hz <= 8000000)
472 system = SONY_HELENE_DTV_DVBT_8;
474 system = SONY_HELENE_DTV_DVBT_8;
475 p->bandwidth_hz = 8000000;
477 } else if (p->delivery_system == SYS_DVBT2) {
478 if (p->bandwidth_hz <= 5000000)
479 system = SONY_HELENE_DTV_DVBT2_5;
480 else if (p->bandwidth_hz <= 6000000)
481 system = SONY_HELENE_DTV_DVBT2_6;
482 else if (p->bandwidth_hz <= 7000000)
483 system = SONY_HELENE_DTV_DVBT2_7;
484 else if (p->bandwidth_hz <= 8000000)
485 system = SONY_HELENE_DTV_DVBT2_8;
487 system = SONY_HELENE_DTV_DVBT2_8;
488 p->bandwidth_hz = 8000000;
490 } else if (p->delivery_system == SYS_DVBS) {
491 system = SONY_HELENE_STV_DVBS;
492 } else if (p->delivery_system == SYS_DVBS2) {
493 system = SONY_HELENE_STV_DVBS2;
494 } else if (p->delivery_system == SYS_ISDBS) {
495 system = SONY_HELENE_STV_ISDBS;
496 } else if (p->delivery_system == SYS_ISDBT) {
497 if (p->bandwidth_hz <= 6000000)
498 system = SONY_HELENE_DTV_ISDBT_6;
499 else if (p->bandwidth_hz <= 7000000)
500 system = SONY_HELENE_DTV_ISDBT_7;
501 else if (p->bandwidth_hz <= 8000000)
502 system = SONY_HELENE_DTV_ISDBT_8;
504 system = SONY_HELENE_DTV_ISDBT_8;
505 p->bandwidth_hz = 8000000;
507 } else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
508 if (p->bandwidth_hz <= 6000000)
509 system = SONY_HELENE_DTV_DVBC_6;
510 else if (p->bandwidth_hz <= 8000000)
511 system = SONY_HELENE_DTV_DVBC_8;
513 dev_dbg(&priv->i2c->dev,
514 "%s(): HELENE DTV system %d (delsys %d, bandwidth %d)\n",
515 __func__, (int)system, p->delivery_system,
520 static int helene_set_params_s(struct dvb_frontend *fe)
522 u8 data[MAX_WRITE_REGSIZE];
524 enum helene_tv_system_t tv_system;
525 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
526 struct helene_priv *priv = fe->tuner_priv;
527 int frequencykHz = p->frequency;
528 uint32_t frequency4kHz = 0;
529 u32 symbol_rate = p->symbol_rate/1000;
531 dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz sr=%uKsps\n",
532 __func__, frequencykHz, symbol_rate);
533 tv_system = helene_get_tv_system(fe);
535 if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) {
536 dev_err(&priv->i2c->dev, "%s(): unknown DTV system\n",
540 /* RF switch turn to satellite */
542 priv->set_tuner(priv->set_tuner_data, 0);
543 frequency = roundup(p->frequency / 1000, 1);
545 /* Disable IF signal output */
546 helene_write_reg(priv, 0x15, 0x02);
548 /* RFIN matching in power save (Sat) reset */
549 helene_write_reg(priv, 0x43, 0x06);
551 /* Analog block setting (0x6A, 0x6B) */
554 helene_write_regs(priv, 0x6A, data, 2);
555 helene_write_reg(priv, 0x75, 0x99);
556 helene_write_reg(priv, 0x9D, 0x00);
558 /* Tuning setting for CPU (0x61) */
559 helene_write_reg(priv, 0x61, 0x07);
561 /* Satellite mode select (0x01) */
562 helene_write_reg(priv, 0x01, 0x01);
564 /* Clock enable for internal logic block, CPU wake-up (0x04, 0x05) */
568 switch (priv->xtal) {
569 case SONY_HELENE_XTAL_16000:
572 case SONY_HELENE_XTAL_20500:
575 case SONY_HELENE_XTAL_24000:
578 case SONY_HELENE_XTAL_41000:
582 dev_err(&priv->i2c->dev, "%s(): unknown xtal %d\n",
583 __func__, priv->xtal);
587 /* Setting for analog block (0x07). LOOPFILTER INTERNAL */
590 /* Tuning setting for analog block
591 * (0x08, 0x09, 0x0A, 0x0B). LOOPFILTER INTERNAL
593 if (priv->xtal == SONY_HELENE_XTAL_20500)
602 /* Enable for analog block (0x0C, 0x0D, 0x0E). SAT LNA ON */
604 data[8] |= 0xE0; /* POWERSAVE_TERR_RF_ACTIVE */
608 /* Setting for LPF cutoff frequency (0x0F) */
610 case SONY_HELENE_STV_ISDBS:
611 data[11] = 0x22; /* 22MHz */
613 case SONY_HELENE_STV_DVBS:
614 if (symbol_rate <= 4000)
616 else if (symbol_rate <= 10000)
617 data[11] = (uint8_t)((symbol_rate * 47
618 + (40000-1)) / 40000);
620 data[11] = (uint8_t)((symbol_rate * 27
621 + (40000-1)) / 40000 + 5);
624 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
626 case SONY_HELENE_STV_DVBS2:
627 if (symbol_rate <= 4000)
629 else if (symbol_rate <= 10000)
630 data[11] = (uint8_t)((symbol_rate * 11
631 + (10000-1)) / 10000);
633 data[11] = (uint8_t)((symbol_rate * 3
634 + (5000-1)) / 5000 + 5);
637 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */
640 dev_err(&priv->i2c->dev, "%s(): unknown standard %d\n",
641 __func__, tv_system);
645 /* RF tuning frequency setting (0x10, 0x11, 0x12) */
646 frequency4kHz = (frequencykHz + 2) / 4;
647 data[12] = (uint8_t)(frequency4kHz & 0xFF); /* FRF_L */
648 data[13] = (uint8_t)((frequency4kHz >> 8) & 0xFF); /* FRF_M */
649 /* FRF_H (bit[3:0]) */
650 data[14] = (uint8_t)((frequency4kHz >> 16) & 0x0F);
652 /* Tuning command (0x13) */
655 /* Setting for IQOUT_LIMIT (0x14) 0.75Vpp */
658 /* Enable IQ output (0x15) */
661 helene_write_regs(priv, 0x04, data, 18);
663 dev_dbg(&priv->i2c->dev, "%s(): tune done\n",
666 priv->frequency = frequency;
670 static int helene_set_params(struct dvb_frontend *fe)
672 u8 data[MAX_WRITE_REGSIZE];
674 enum helene_tv_system_t tv_system;
675 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
676 struct helene_priv *priv = fe->tuner_priv;
677 int frequencykHz = p->frequency / 1000;
679 dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n",
680 __func__, frequencykHz);
681 tv_system = helene_get_tv_system(fe);
683 if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) {
684 dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n",
689 priv->set_tuner(priv->set_tuner_data, 1);
690 frequency = roundup(p->frequency / 1000, 25);
693 helene_write_reg(priv, 0x01, 0x00);
695 /* Disable IF signal output */
696 helene_write_reg(priv, 0x74, 0x02);
698 if (priv->state == STATE_SLEEP)
699 helene_leave_power_save(priv);
701 /* Initial setting for internal analog block (0x91, 0x92) */
702 if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
703 (tv_system == SONY_HELENE_DTV_DVBC_8)) {
710 helene_write_regs(priv, 0x91, data, 2);
712 /* Setting for analog block */
713 if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system))
718 /* Setting for local polarity (0x9D) */
719 data[1] = (uint8_t)(terr_params[tv_system].IS_LOWERLOCAL & 0x01);
720 helene_write_regs(priv, 0x9C, data, 2);
722 /* Enable for analog block */
726 data[3] = 0x67; /* Tuning setting for CPU */
728 /* Setting for PLL reference divider for xtal=24MHz */
729 if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
730 (tv_system == SONY_HELENE_DTV_DVBC_8))
735 /* Tuning setting for analog block */
736 if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system)) {
741 } else if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
742 (tv_system == SONY_HELENE_DTV_DVBC_8)) {
753 helene_write_regs(priv, 0x5E, data, 9);
755 /* LT_AMP_EN should be 0 */
756 helene_set_reg_bits(priv, 0x67, 0x0, 0x02);
758 /* Setting for IFOUT_LIMIT */
759 data[0] = 0x00; /* 1.5Vpp */
761 /* RF_GAIN setting */
762 if (terr_params[tv_system].RF_GAIN == HELENE_AUTO)
763 data[1] = 0x80; /* RF_GAIN_SEL = 1 */
765 data[1] = (uint8_t)((terr_params[tv_system].RF_GAIN
768 /* IF_BPF_GC setting */
769 data[1] |= (uint8_t)(terr_params[tv_system].IF_BPF_GC & 0x0F);
771 /* Setting for internal RFAGC (0x6A, 0x6B, 0x6C) */
773 if (frequencykHz <= 172000) {
774 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VL
776 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VL
778 } else if (frequencykHz <= 464000) {
779 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VH
781 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VH
784 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_U
786 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_U
791 /* Setting for IF frequency and bandwidth */
793 /* IF filter center frequency offset (IF_BPF_F0) (0x6D) */
794 data[5] = (uint8_t)((terr_params[tv_system].IF_BPF_F0 << 4) & 0x30);
796 /* IF filter band width (BW) (0x6D) */
797 data[5] |= (uint8_t)(terr_params[tv_system].BW & 0x03);
799 /* IF frequency offset value (FIF_OFFSET) (0x6E) */
800 data[6] = (uint8_t)(terr_params[tv_system].FIF_OFFSET & 0x1F);
802 /* IF band width offset value (BW_OFFSET) (0x6F) */
803 data[7] = (uint8_t)(terr_params[tv_system].BW_OFFSET & 0x1F);
805 /* RF tuning frequency setting (0x70, 0x71, 0x72) */
806 data[8] = (uint8_t)(frequencykHz & 0xFF); /* FRF_L */
807 data[9] = (uint8_t)((frequencykHz >> 8) & 0xFF); /* FRF_M */
808 data[10] = (uint8_t)((frequencykHz >> 16)
809 & 0x0F); /* FRF_H (bit[3:0]) */
814 /* Enable IF output, AGC and IFOUT pin selection (0x74) */
817 if ((tv_system == SONY_HELENE_DTV_DVBC_6) ||
818 (tv_system == SONY_HELENE_DTV_DVBC_8)) {
830 helene_write_regs(priv, 0x68, data, 17);
832 dev_dbg(&priv->i2c->dev, "%s(): tune done\n",
835 priv->frequency = frequency;
839 static int helene_get_frequency(struct dvb_frontend *fe, u32 *frequency)
841 struct helene_priv *priv = fe->tuner_priv;
843 *frequency = priv->frequency * 1000;
847 static const struct dvb_tuner_ops helene_tuner_ops = {
849 .name = "Sony HELENE Ter tuner",
850 .frequency_min = 1000000,
851 .frequency_max = 1200000000,
852 .frequency_step = 25000,
855 .release = helene_release,
856 .sleep = helene_sleep,
857 .set_params = helene_set_params,
858 .get_frequency = helene_get_frequency,
861 static const struct dvb_tuner_ops helene_tuner_ops_s = {
863 .name = "Sony HELENE Sat tuner",
864 .frequency_min = 500000,
865 .frequency_max = 2500000,
866 .frequency_step = 1000,
869 .release = helene_release,
870 .sleep = helene_sleep,
871 .set_params = helene_set_params_s,
872 .get_frequency = helene_get_frequency,
876 * call once after reset
878 static int helene_x_pon(struct helene_priv *priv)
880 /* RFIN matching in power save (terrestrial) = ACTIVE */
881 /* RFIN matching in power save (satellite) = ACTIVE */
882 u8 dataT[] = { 0x06, 0x00, 0x02, 0x00 };
883 /* SAT_RF_ACTIVE = true, lnaOff = false, terrRfActive = true */
884 u8 dataS[] = { 0x05, 0x06 };
885 u8 cdata[] = {0x7A, 0x01};
890 helene_write_reg(priv, 0x01, 0x00);
892 helene_write_reg(priv, 0x67, dataT[3]);
893 helene_write_reg(priv, 0x43, dataS[1]);
894 helene_write_regs(priv, 0x5E, dataT, 3);
895 helene_write_reg(priv, 0x0C, dataS[0]);
897 /* Initial setting for internal logic block */
898 helene_write_regs(priv, 0x99, cdata, sizeof(cdata));
901 if (priv->xtal == SONY_HELENE_XTAL_16000)
902 data[0] = 0x10; /* xtal 16 MHz */
904 data[0] = 0x18; /* xtal 24 MHz */
905 data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */
906 data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */
907 data[3] = 0x80; /* REFOUT signal output 500mVpp */
908 data[4] = 0x00; /* GPIO settings */
909 data[5] = 0x00; /* GPIO settings */
910 data[6] = 0xC4; /* Clock enable for internal logic block */
911 data[7] = 0x40; /* Start CPU boot-up */
912 data[8] = 0x10; /* For burst-write */
914 /* Setting for internal RFAGC */
919 data[12] = 0x07; /* Setting for analog block */
921 /* Initial setting for internal analog block */
930 helene_write_regs(priv, 0x81, data, sizeof(data));
932 /* Setting for internal RFAGC */
933 helene_write_reg(priv, 0x9B, 0x00);
937 /* Check CPU_STT/CPU_ERR */
938 helene_read_regs(priv, 0x1A, rdata, sizeof(rdata));
940 if (rdata[0] != 0x00) {
941 dev_err(&priv->i2c->dev,
942 "HELENE tuner CPU error 0x%x\n", rdata[0]);
946 /* VCO current setting */
949 helene_write_regs(priv, 0x17, cdata, sizeof(cdata));
951 helene_read_reg(priv, 0x19, data);
952 helene_write_reg(priv, 0x95, (uint8_t)((data[0] >> 4) & 0x0F));
954 /* Disable IF signal output */
955 helene_write_reg(priv, 0x74, 0x02);
957 /* Standby setting for CPU */
958 helene_write_reg(priv, 0x88, 0x00);
960 /* Standby setting for internal logic block */
961 helene_write_reg(priv, 0x87, 0xC0);
963 /* Load capacitance control setting for crystal oscillator */
964 helene_write_reg(priv, 0x80, 0x01);
966 /* Satellite initial setting */
969 helene_write_regs(priv, 0x41, cdata, sizeof(cdata));
971 dev_info(&priv->i2c->dev,
972 "HELENE tuner x_pon done\n");
977 struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe,
978 const struct helene_config *config,
979 struct i2c_adapter *i2c)
981 struct helene_priv *priv = NULL;
983 priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL);
986 priv->i2c_address = (config->i2c_address >> 1);
988 priv->set_tuner_data = config->set_tuner_priv;
989 priv->set_tuner = config->set_tuner_callback;
990 priv->xtal = config->xtal;
992 if (fe->ops.i2c_gate_ctrl)
993 fe->ops.i2c_gate_ctrl(fe, 1);
995 if (helene_x_pon(priv) != 0) {
1000 if (fe->ops.i2c_gate_ctrl)
1001 fe->ops.i2c_gate_ctrl(fe, 0);
1003 memcpy(&fe->ops.tuner_ops, &helene_tuner_ops_s,
1004 sizeof(struct dvb_tuner_ops));
1005 fe->tuner_priv = priv;
1006 dev_info(&priv->i2c->dev,
1007 "Sony HELENE Sat attached on addr=%x at I2C adapter %p\n",
1008 priv->i2c_address, priv->i2c);
1011 EXPORT_SYMBOL(helene_attach_s);
1013 struct dvb_frontend *helene_attach(struct dvb_frontend *fe,
1014 const struct helene_config *config,
1015 struct i2c_adapter *i2c)
1017 struct helene_priv *priv = NULL;
1019 priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL);
1022 priv->i2c_address = (config->i2c_address >> 1);
1024 priv->set_tuner_data = config->set_tuner_priv;
1025 priv->set_tuner = config->set_tuner_callback;
1026 priv->xtal = config->xtal;
1028 if (fe->ops.i2c_gate_ctrl)
1029 fe->ops.i2c_gate_ctrl(fe, 1);
1031 if (helene_x_pon(priv) != 0) {
1036 if (fe->ops.i2c_gate_ctrl)
1037 fe->ops.i2c_gate_ctrl(fe, 0);
1039 memcpy(&fe->ops.tuner_ops, &helene_tuner_ops,
1040 sizeof(struct dvb_tuner_ops));
1041 fe->tuner_priv = priv;
1042 dev_info(&priv->i2c->dev,
1043 "Sony HELENE Ter attached on addr=%x at I2C adapter %p\n",
1044 priv->i2c_address, priv->i2c);
1047 EXPORT_SYMBOL(helene_attach);
1049 MODULE_DESCRIPTION("Sony HELENE Sat/Ter tuner driver");
1050 MODULE_AUTHOR("Abylay Ospan <aospan@netup.ru>");
1051 MODULE_LICENSE("GPL");