1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Montage Technology DS3000 - DVBS/S2 Demodulator driver
4 Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
6 Copyright (C) 2009-2012 TurboSight.com
10 #include <linux/slab.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/firmware.h>
17 #include <media/dvb_frontend.h>
23 #define dprintk(args...) \
31 #define DS3000_SAMPLE_RATE 96000 /* in kHz */
33 /* Register values to initialise the demod in DVB-S mode */
34 static u8 ds3000_dvbs_init_tab[] = {
118 /* Register values to initialise the demod in DVB-S2 mode */
119 static u8 ds3000_dvbs2_init_tab[] = {
218 struct ds3000_state {
219 struct i2c_adapter *i2c;
220 const struct ds3000_config *config;
221 struct dvb_frontend frontend;
222 /* previous uncorrected block counter for DVB-S2 */
226 static int ds3000_writereg(struct ds3000_state *state, int reg, int data)
228 u8 buf[] = { reg, data };
229 struct i2c_msg msg = { .addr = state->config->demod_address,
230 .flags = 0, .buf = buf, .len = 2 };
233 dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
235 err = i2c_transfer(state->i2c, &msg, 1);
237 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n",
238 __func__, err, reg, data);
245 static int ds3000_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
247 struct ds3000_state *state = fe->demodulator_priv;
250 ds3000_writereg(state, 0x03, 0x12);
252 ds3000_writereg(state, 0x03, 0x02);
257 /* I2C write for 8k firmware load */
258 static int ds3000_writeFW(struct ds3000_state *state, int reg,
259 const u8 *data, u16 len)
265 buf = kmalloc(33, GFP_KERNEL);
271 msg.addr = state->config->demod_address;
276 for (i = 0; i < len; i += 32) {
277 memcpy(buf + 1, data + i, 32);
279 dprintk("%s: write reg 0x%02x, len = %d\n", __func__, reg, len);
281 ret = i2c_transfer(state->i2c, &msg, 1);
283 printk(KERN_ERR "%s: write error(err == %i, reg == 0x%02x\n",
297 static int ds3000_readreg(struct ds3000_state *state, u8 reg)
302 struct i2c_msg msg[] = {
304 .addr = state->config->demod_address,
309 .addr = state->config->demod_address,
316 ret = i2c_transfer(state->i2c, msg, 2);
319 printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
323 dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
328 static int ds3000_load_firmware(struct dvb_frontend *fe,
329 const struct firmware *fw);
331 static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
333 struct ds3000_state *state = fe->demodulator_priv;
334 const struct firmware *fw;
337 dprintk("%s()\n", __func__);
339 ret = ds3000_readreg(state, 0xb2);
344 /* request the firmware, this will block until someone uploads it */
345 printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__,
347 ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
348 state->i2c->dev.parent);
349 printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__);
351 printk(KERN_ERR "%s: No firmware uploaded (timeout or file not found?)\n",
356 ret = ds3000_load_firmware(fe, fw);
358 printk("%s: Writing firmware to device failed\n", __func__);
360 release_firmware(fw);
362 dprintk("%s: Firmware upload %s\n", __func__,
363 ret == 0 ? "complete" : "failed");
368 static int ds3000_load_firmware(struct dvb_frontend *fe,
369 const struct firmware *fw)
371 struct ds3000_state *state = fe->demodulator_priv;
374 dprintk("%s\n", __func__);
375 dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n",
379 fw->data[fw->size - 2],
380 fw->data[fw->size - 1]);
382 /* Begin the firmware load process */
383 ds3000_writereg(state, 0xb2, 0x01);
384 /* write the entire firmware */
385 ret = ds3000_writeFW(state, 0xb0, fw->data, fw->size);
386 ds3000_writereg(state, 0xb2, 0x00);
391 static int ds3000_set_voltage(struct dvb_frontend *fe,
392 enum fe_sec_voltage voltage)
394 struct ds3000_state *state = fe->demodulator_priv;
397 dprintk("%s(%d)\n", __func__, voltage);
399 data = ds3000_readreg(state, 0xa2);
400 data |= 0x03; /* bit0 V/H, bit1 off/on */
410 case SEC_VOLTAGE_OFF:
414 ds3000_writereg(state, 0xa2, data);
419 static int ds3000_read_status(struct dvb_frontend *fe, enum fe_status *status)
421 struct ds3000_state *state = fe->demodulator_priv;
422 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
427 switch (c->delivery_system) {
429 lock = ds3000_readreg(state, 0xd1);
430 if ((lock & 0x07) == 0x07)
431 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
432 FE_HAS_VITERBI | FE_HAS_SYNC |
437 lock = ds3000_readreg(state, 0x0d);
438 if ((lock & 0x8f) == 0x8f)
439 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
440 FE_HAS_VITERBI | FE_HAS_SYNC |
448 if (state->config->set_lock_led)
449 state->config->set_lock_led(fe, *status == 0 ? 0 : 1);
451 dprintk("%s: status = 0x%02x\n", __func__, lock);
456 /* read DS3000 BER value */
457 static int ds3000_read_ber(struct dvb_frontend *fe, u32* ber)
459 struct ds3000_state *state = fe->demodulator_priv;
460 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
462 u32 ber_reading, lpdc_frames;
464 dprintk("%s()\n", __func__);
466 switch (c->delivery_system) {
468 /* set the number of bytes checked during
470 ds3000_writereg(state, 0xf9, 0x04);
471 /* read BER estimation status */
472 data = ds3000_readreg(state, 0xf8);
473 /* check if BER estimation is ready */
474 if ((data & 0x10) == 0) {
475 /* this is the number of error bits,
476 to calculate the bit error rate
478 *ber = (ds3000_readreg(state, 0xf7) << 8) |
479 ds3000_readreg(state, 0xf6);
480 /* start counting error bits */
481 /* need to be set twice
482 otherwise it fails sometimes */
484 ds3000_writereg(state, 0xf8, data);
485 ds3000_writereg(state, 0xf8, data);
487 /* used to indicate that BER estimation
488 is not ready, i.e. BER is unknown */
492 /* read the number of LPDC decoded frames */
493 lpdc_frames = (ds3000_readreg(state, 0xd7) << 16) |
494 (ds3000_readreg(state, 0xd6) << 8) |
495 ds3000_readreg(state, 0xd5);
496 /* read the number of packets with bad CRC */
497 ber_reading = (ds3000_readreg(state, 0xf8) << 8) |
498 ds3000_readreg(state, 0xf7);
499 if (lpdc_frames > 750) {
500 /* clear LPDC frame counters */
501 ds3000_writereg(state, 0xd1, 0x01);
502 /* clear bad packets counter */
503 ds3000_writereg(state, 0xf9, 0x01);
504 /* enable bad packets counter */
505 ds3000_writereg(state, 0xf9, 0x00);
506 /* enable LPDC frame counters */
507 ds3000_writereg(state, 0xd1, 0x00);
510 /* used to indicate that BER estimation is not ready,
511 i.e. BER is unknown */
521 static int ds3000_read_signal_strength(struct dvb_frontend *fe,
522 u16 *signal_strength)
524 if (fe->ops.tuner_ops.get_rf_strength)
525 fe->ops.tuner_ops.get_rf_strength(fe, signal_strength);
530 /* calculate DS3000 snr value in dB */
531 static int ds3000_read_snr(struct dvb_frontend *fe, u16 *snr)
533 struct ds3000_state *state = fe->demodulator_priv;
534 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
535 u8 snr_reading, snr_value;
536 u32 dvbs2_signal_reading, dvbs2_noise_reading, tmp;
537 static const u16 dvbs_snr_tab[] = { /* 20 x Table (rounded up) */
538 0x0000, 0x1b13, 0x2aea, 0x3627, 0x3ede, 0x45fe, 0x4c03,
539 0x513a, 0x55d4, 0x59f2, 0x5dab, 0x6111, 0x6431, 0x6717,
540 0x69c9, 0x6c4e, 0x6eac, 0x70e8, 0x7304, 0x7505
542 static const u16 dvbs2_snr_tab[] = { /* 80 x Table (rounded up) */
543 0x0000, 0x0bc2, 0x12a3, 0x1785, 0x1b4e, 0x1e65, 0x2103,
544 0x2347, 0x2546, 0x2710, 0x28ae, 0x2a28, 0x2b83, 0x2cc5,
545 0x2df1, 0x2f09, 0x3010, 0x3109, 0x31f4, 0x32d2, 0x33a6,
546 0x3470, 0x3531, 0x35ea, 0x369b, 0x3746, 0x37ea, 0x3888,
547 0x3920, 0x39b3, 0x3a42, 0x3acc, 0x3b51, 0x3bd3, 0x3c51,
548 0x3ccb, 0x3d42, 0x3db6, 0x3e27, 0x3e95, 0x3f00, 0x3f68,
549 0x3fcf, 0x4033, 0x4094, 0x40f4, 0x4151, 0x41ac, 0x4206,
550 0x425e, 0x42b4, 0x4308, 0x435b, 0x43ac, 0x43fc, 0x444a,
551 0x4497, 0x44e2, 0x452d, 0x4576, 0x45bd, 0x4604, 0x4649,
552 0x468e, 0x46d1, 0x4713, 0x4755, 0x4795, 0x47d4, 0x4813,
553 0x4851, 0x488d, 0x48c9, 0x4904, 0x493f, 0x4978, 0x49b1,
554 0x49e9, 0x4a20, 0x4a57
557 dprintk("%s()\n", __func__);
559 switch (c->delivery_system) {
561 snr_reading = ds3000_readreg(state, 0xff);
563 if (snr_reading == 0)
566 if (snr_reading > 20)
568 snr_value = dvbs_snr_tab[snr_reading - 1] * 10 / 23026;
569 /* cook the value to be suitable for szap-s2
570 human readable output */
571 *snr = snr_value * 8 * 655;
573 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
577 dvbs2_noise_reading = (ds3000_readreg(state, 0x8c) & 0x3f) +
578 (ds3000_readreg(state, 0x8d) << 4);
579 dvbs2_signal_reading = ds3000_readreg(state, 0x8e);
580 tmp = dvbs2_signal_reading * dvbs2_signal_reading >> 1;
585 if (dvbs2_noise_reading == 0) {
587 /* cook the value to be suitable for szap-s2
588 human readable output */
592 if (tmp > dvbs2_noise_reading) {
593 snr_reading = tmp / dvbs2_noise_reading;
594 if (snr_reading > 80)
596 snr_value = dvbs2_snr_tab[snr_reading - 1] / 1000;
597 /* cook the value to be suitable for szap-s2
598 human readable output */
599 *snr = snr_value * 5 * 655;
601 snr_reading = dvbs2_noise_reading / tmp;
602 if (snr_reading > 80)
604 *snr = -(dvbs2_snr_tab[snr_reading - 1] / 1000);
606 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
616 /* read DS3000 uncorrected blocks */
617 static int ds3000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
619 struct ds3000_state *state = fe->demodulator_priv;
620 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
624 dprintk("%s()\n", __func__);
626 switch (c->delivery_system) {
628 *ucblocks = (ds3000_readreg(state, 0xf5) << 8) |
629 ds3000_readreg(state, 0xf4);
630 data = ds3000_readreg(state, 0xf8);
631 /* clear packet counters */
633 ds3000_writereg(state, 0xf8, data);
634 /* enable packet counters */
636 ds3000_writereg(state, 0xf8, data);
639 _ucblocks = (ds3000_readreg(state, 0xe2) << 8) |
640 ds3000_readreg(state, 0xe1);
641 if (_ucblocks > state->prevUCBS2)
642 *ucblocks = _ucblocks - state->prevUCBS2;
644 *ucblocks = state->prevUCBS2 - _ucblocks;
645 state->prevUCBS2 = _ucblocks;
654 static int ds3000_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
656 struct ds3000_state *state = fe->demodulator_priv;
659 dprintk("%s(%d)\n", __func__, tone);
660 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
661 printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone);
665 data = ds3000_readreg(state, 0xa2);
667 ds3000_writereg(state, 0xa2, data);
671 dprintk("%s: setting tone on\n", __func__);
672 data = ds3000_readreg(state, 0xa1);
675 ds3000_writereg(state, 0xa1, data);
678 dprintk("%s: setting tone off\n", __func__);
679 data = ds3000_readreg(state, 0xa2);
681 ds3000_writereg(state, 0xa2, data);
688 static int ds3000_send_diseqc_msg(struct dvb_frontend *fe,
689 struct dvb_diseqc_master_cmd *d)
691 struct ds3000_state *state = fe->demodulator_priv;
695 /* Dump DiSEqC message */
696 dprintk("%s(", __func__);
697 for (i = 0 ; i < d->msg_len;) {
698 dprintk("0x%02x", d->msg[i]);
699 if (++i < d->msg_len)
703 /* enable DiSEqC message send pin */
704 data = ds3000_readreg(state, 0xa2);
706 ds3000_writereg(state, 0xa2, data);
709 for (i = 0; i < d->msg_len; i++)
710 ds3000_writereg(state, 0xa3 + i, d->msg[i]);
712 data = ds3000_readreg(state, 0xa1);
713 /* clear DiSEqC message length and status,
714 enable DiSEqC message send */
716 /* set DiSEqC mode, modulation active during 33 pulses,
717 set DiSEqC message length */
718 data |= ((d->msg_len - 1) << 3) | 0x07;
719 ds3000_writereg(state, 0xa1, data);
721 /* wait up to 150ms for DiSEqC transmission to complete */
722 for (i = 0; i < 15; i++) {
723 data = ds3000_readreg(state, 0xa1);
724 if ((data & 0x40) == 0)
729 /* DiSEqC timeout after 150ms */
731 data = ds3000_readreg(state, 0xa1);
734 ds3000_writereg(state, 0xa1, data);
736 data = ds3000_readreg(state, 0xa2);
739 ds3000_writereg(state, 0xa2, data);
744 data = ds3000_readreg(state, 0xa2);
747 ds3000_writereg(state, 0xa2, data);
752 /* Send DiSEqC burst */
753 static int ds3000_diseqc_send_burst(struct dvb_frontend *fe,
754 enum fe_sec_mini_cmd burst)
756 struct ds3000_state *state = fe->demodulator_priv;
760 dprintk("%s()\n", __func__);
762 data = ds3000_readreg(state, 0xa2);
764 ds3000_writereg(state, 0xa2, data);
767 if (burst == SEC_MINI_A)
768 /* Unmodulated tone burst */
769 ds3000_writereg(state, 0xa1, 0x02);
770 else if (burst == SEC_MINI_B)
771 /* Modulated tone burst */
772 ds3000_writereg(state, 0xa1, 0x01);
777 for (i = 0; i < 5; i++) {
778 data = ds3000_readreg(state, 0xa1);
779 if ((data & 0x40) == 0)
785 data = ds3000_readreg(state, 0xa1);
788 ds3000_writereg(state, 0xa1, data);
790 data = ds3000_readreg(state, 0xa2);
793 ds3000_writereg(state, 0xa2, data);
798 data = ds3000_readreg(state, 0xa2);
801 ds3000_writereg(state, 0xa2, data);
806 static void ds3000_release(struct dvb_frontend *fe)
808 struct ds3000_state *state = fe->demodulator_priv;
810 if (state->config->set_lock_led)
811 state->config->set_lock_led(fe, 0);
813 dprintk("%s\n", __func__);
817 static const struct dvb_frontend_ops ds3000_ops;
819 struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
820 struct i2c_adapter *i2c)
822 struct ds3000_state *state;
825 dprintk("%s\n", __func__);
827 /* allocate memory for the internal state */
828 state = kzalloc(sizeof(*state), GFP_KERNEL);
832 state->config = config;
834 state->prevUCBS2 = 0;
836 /* check if the demod is present */
837 ret = ds3000_readreg(state, 0x00) & 0xfe;
840 printk(KERN_ERR "Invalid probe, probably not a DS3000\n");
844 printk(KERN_INFO "DS3000 chip version: %d.%d attached.\n",
845 ds3000_readreg(state, 0x02),
846 ds3000_readreg(state, 0x01));
848 memcpy(&state->frontend.ops, &ds3000_ops,
849 sizeof(struct dvb_frontend_ops));
850 state->frontend.demodulator_priv = state;
853 * Some devices like T480 starts with voltage on. Be sure
854 * to turn voltage off during init, as this can otherwise
855 * interfere with Unicable SCR systems.
857 ds3000_set_voltage(&state->frontend, SEC_VOLTAGE_OFF);
858 return &state->frontend;
860 EXPORT_SYMBOL(ds3000_attach);
862 static int ds3000_set_carrier_offset(struct dvb_frontend *fe,
863 s32 carrier_offset_khz)
865 struct ds3000_state *state = fe->demodulator_priv;
868 tmp = carrier_offset_khz;
870 tmp = (2 * tmp + DS3000_SAMPLE_RATE) / (2 * DS3000_SAMPLE_RATE);
875 ds3000_writereg(state, 0x5f, tmp >> 8);
876 ds3000_writereg(state, 0x5e, tmp & 0xff);
881 static int ds3000_set_frontend(struct dvb_frontend *fe)
883 struct ds3000_state *state = fe->demodulator_priv;
884 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
887 enum fe_status status;
892 dprintk("%s() ", __func__);
894 if (state->config->set_ts_params)
895 state->config->set_ts_params(fe, 0);
897 if (fe->ops.tuner_ops.set_params)
898 fe->ops.tuner_ops.set_params(fe);
900 /* ds3000 global reset */
901 ds3000_writereg(state, 0x07, 0x80);
902 ds3000_writereg(state, 0x07, 0x00);
903 /* ds3000 built-in uC reset */
904 ds3000_writereg(state, 0xb2, 0x01);
905 /* ds3000 software reset */
906 ds3000_writereg(state, 0x00, 0x01);
908 switch (c->delivery_system) {
910 /* initialise the demod in DVB-S mode */
911 for (i = 0; i < sizeof(ds3000_dvbs_init_tab); i += 2)
912 ds3000_writereg(state,
913 ds3000_dvbs_init_tab[i],
914 ds3000_dvbs_init_tab[i + 1]);
915 value = ds3000_readreg(state, 0xfe);
918 ds3000_writereg(state, 0xfe, value);
921 /* initialise the demod in DVB-S2 mode */
922 for (i = 0; i < sizeof(ds3000_dvbs2_init_tab); i += 2)
923 ds3000_writereg(state,
924 ds3000_dvbs2_init_tab[i],
925 ds3000_dvbs2_init_tab[i + 1]);
926 if (c->symbol_rate >= 30000000)
927 ds3000_writereg(state, 0xfe, 0x54);
929 ds3000_writereg(state, 0xfe, 0x98);
935 /* enable 27MHz clock output */
936 ds3000_writereg(state, 0x29, 0x80);
937 /* enable ac coupling */
938 ds3000_writereg(state, 0x25, 0x8a);
940 if ((c->symbol_rate < ds3000_ops.info.symbol_rate_min) ||
941 (c->symbol_rate > ds3000_ops.info.symbol_rate_max)) {
942 dprintk("%s() symbol_rate %u out of range (%u ... %u)\n",
943 __func__, c->symbol_rate,
944 ds3000_ops.info.symbol_rate_min,
945 ds3000_ops.info.symbol_rate_max);
949 /* enhance symbol rate performance */
950 if ((c->symbol_rate / 1000) <= 5000) {
951 value = 29777 / (c->symbol_rate / 1000) + 1;
954 ds3000_writereg(state, 0xc3, 0x0d);
955 ds3000_writereg(state, 0xc8, value);
956 ds3000_writereg(state, 0xc4, 0x10);
957 ds3000_writereg(state, 0xc7, 0x0e);
958 } else if ((c->symbol_rate / 1000) <= 10000) {
959 value = 92166 / (c->symbol_rate / 1000) + 1;
962 ds3000_writereg(state, 0xc3, 0x07);
963 ds3000_writereg(state, 0xc8, value);
964 ds3000_writereg(state, 0xc4, 0x09);
965 ds3000_writereg(state, 0xc7, 0x12);
966 } else if ((c->symbol_rate / 1000) <= 20000) {
967 value = 64516 / (c->symbol_rate / 1000) + 1;
968 ds3000_writereg(state, 0xc3, value);
969 ds3000_writereg(state, 0xc8, 0x0e);
970 ds3000_writereg(state, 0xc4, 0x07);
971 ds3000_writereg(state, 0xc7, 0x18);
973 value = 129032 / (c->symbol_rate / 1000) + 1;
974 ds3000_writereg(state, 0xc3, value);
975 ds3000_writereg(state, 0xc8, 0x0a);
976 ds3000_writereg(state, 0xc4, 0x05);
977 ds3000_writereg(state, 0xc7, 0x24);
980 /* normalized symbol rate rounded to the closest integer */
981 value = (((c->symbol_rate / 1000) << 16) +
982 (DS3000_SAMPLE_RATE / 2)) / DS3000_SAMPLE_RATE;
983 ds3000_writereg(state, 0x61, value & 0x00ff);
984 ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
986 /* co-channel interference cancellation disabled */
987 ds3000_writereg(state, 0x56, 0x00);
989 /* equalizer disabled */
990 ds3000_writereg(state, 0x76, 0x00);
992 /*ds3000_writereg(state, 0x08, 0x03);
993 ds3000_writereg(state, 0xfd, 0x22);
994 ds3000_writereg(state, 0x08, 0x07);
995 ds3000_writereg(state, 0xfd, 0x42);
996 ds3000_writereg(state, 0x08, 0x07);*/
998 if (state->config->ci_mode) {
999 switch (c->delivery_system) {
1002 ds3000_writereg(state, 0xfd, 0x80);
1005 ds3000_writereg(state, 0xfd, 0x01);
1010 /* ds3000 out of software reset */
1011 ds3000_writereg(state, 0x00, 0x00);
1012 /* start ds3000 built-in uC */
1013 ds3000_writereg(state, 0xb2, 0x00);
1015 if (fe->ops.tuner_ops.get_frequency) {
1016 fe->ops.tuner_ops.get_frequency(fe, &frequency);
1017 offset_khz = frequency - c->frequency;
1018 ds3000_set_carrier_offset(fe, offset_khz);
1021 for (i = 0; i < 30 ; i++) {
1022 ds3000_read_status(fe, &status);
1023 if (status & FE_HAS_LOCK)
1032 static int ds3000_tune(struct dvb_frontend *fe,
1034 unsigned int mode_flags,
1035 unsigned int *delay,
1036 enum fe_status *status)
1039 int ret = ds3000_set_frontend(fe);
1046 return ds3000_read_status(fe, status);
1049 static enum dvbfe_algo ds3000_get_algo(struct dvb_frontend *fe)
1051 struct ds3000_state *state = fe->demodulator_priv;
1053 if (state->config->set_lock_led)
1054 state->config->set_lock_led(fe, 0);
1056 dprintk("%s()\n", __func__);
1057 return DVBFE_ALGO_HW;
1061 * Initialise or wake up device
1063 * Power config will reset and load initial firmware if required
1065 static int ds3000_initfe(struct dvb_frontend *fe)
1067 struct ds3000_state *state = fe->demodulator_priv;
1070 dprintk("%s()\n", __func__);
1072 ds3000_writereg(state, 0x08, 0x01 | ds3000_readreg(state, 0x08));
1075 /* Load the firmware if required */
1076 ret = ds3000_firmware_ondemand(fe);
1078 printk(KERN_ERR "%s: Unable initialize firmware\n", __func__);
1085 static const struct dvb_frontend_ops ds3000_ops = {
1086 .delsys = { SYS_DVBS, SYS_DVBS2 },
1088 .name = "Montage Technology DS3000",
1089 .frequency_min_hz = 950 * MHz,
1090 .frequency_max_hz = 2150 * MHz,
1091 .frequency_stepsize_hz = 1011 * kHz,
1092 .frequency_tolerance_hz = 5 * MHz,
1093 .symbol_rate_min = 1000000,
1094 .symbol_rate_max = 45000000,
1095 .caps = FE_CAN_INVERSION_AUTO |
1096 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1097 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1098 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1099 FE_CAN_2G_MODULATION |
1100 FE_CAN_QPSK | FE_CAN_RECOVER
1103 .release = ds3000_release,
1105 .init = ds3000_initfe,
1106 .i2c_gate_ctrl = ds3000_i2c_gate_ctrl,
1107 .read_status = ds3000_read_status,
1108 .read_ber = ds3000_read_ber,
1109 .read_signal_strength = ds3000_read_signal_strength,
1110 .read_snr = ds3000_read_snr,
1111 .read_ucblocks = ds3000_read_ucblocks,
1112 .set_voltage = ds3000_set_voltage,
1113 .set_tone = ds3000_set_tone,
1114 .diseqc_send_master_cmd = ds3000_send_diseqc_msg,
1115 .diseqc_send_burst = ds3000_diseqc_send_burst,
1116 .get_frontend_algo = ds3000_get_algo,
1118 .set_frontend = ds3000_set_frontend,
1119 .tune = ds3000_tune,
1122 module_param(debug, int, 0644);
1123 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
1125 MODULE_DESCRIPTION("DVB Frontend module for Montage Technology DS3000 hardware");
1126 MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
1127 MODULE_LICENSE("GPL");