1 // SPDX-License-Identifier: GPL-2.0
3 * cxd2099.c: Driver for the Sony CXD2099AR Common Interface Controller
5 * Copyright (C) 2010-2013 Digital Devices GmbH
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 only, as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/slab.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/i2c.h>
21 #include <linux/regmap.h>
22 #include <linux/wait.h>
23 #include <linux/delay.h>
24 #include <linux/mutex.h>
29 static int buffermode;
30 module_param(buffermode, int, 0444);
31 MODULE_PARM_DESC(buffermode, "Enable CXD2099AR buffer mode (default: disabled)");
33 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount);
36 struct dvb_ca_en50221 en;
38 struct cxd2099_cfg cfg;
39 struct i2c_client *client;
40 struct regmap *regmap;
56 struct mutex lock; /* device access lock */
62 static int read_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
66 if (ci->lastaddress != adr)
67 status = regmap_write(ci->regmap, 0, adr);
69 ci->lastaddress = adr;
74 if (ci->cfg.max_i2c && len > ci->cfg.max_i2c)
75 len = ci->cfg.max_i2c;
76 status = regmap_raw_read(ci->regmap, 1, data, len);
86 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
88 return read_block(ci, reg, val, 1);
91 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
94 u8 addr[2] = {address & 0xff, address >> 8};
96 status = regmap_raw_write(ci->regmap, 2, addr, 2);
98 status = regmap_raw_read(ci->regmap, 3, data, n);
102 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
105 u8 addr[2] = {address & 0xff, address >> 8};
107 status = regmap_raw_write(ci->regmap, 2, addr, 2);
111 memcpy(buf, data, n);
112 status = regmap_raw_write(ci->regmap, 3, buf, n);
117 static int read_io(struct cxd *ci, u16 address, unsigned int *val)
120 u8 addr[2] = {address & 0xff, address >> 8};
122 status = regmap_raw_write(ci->regmap, 2, addr, 2);
124 status = regmap_read(ci->regmap, 3, val);
128 static int write_io(struct cxd *ci, u16 address, u8 val)
131 u8 addr[2] = {address & 0xff, address >> 8};
133 status = regmap_raw_write(ci->regmap, 2, addr, 2);
135 status = regmap_write(ci->regmap, 3, val);
139 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
144 if (ci->lastaddress != reg)
145 status = regmap_write(ci->regmap, 0, reg);
146 if (!status && reg >= 6 && reg <= 8 && mask != 0xff) {
147 status = regmap_read(ci->regmap, 1, ®val);
148 ci->regs[reg] = regval;
150 ci->lastaddress = reg;
151 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
153 status = regmap_write(ci->regmap, 1, ci->regs[reg]);
155 ci->regs[reg] &= 0x7f;
159 static int write_reg(struct cxd *ci, u8 reg, u8 val)
161 return write_regm(ci, reg, val, 0xff);
164 static int write_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
169 if (ci->lastaddress != adr)
170 status = regmap_write(ci->regmap, 0, adr);
174 ci->lastaddress = adr;
178 if (ci->cfg.max_i2c && (len + 1 > ci->cfg.max_i2c))
179 len = ci->cfg.max_i2c - 1;
180 memcpy(buf, data, len);
181 status = regmap_raw_write(ci->regmap, 1, buf, len);
190 static void set_mode(struct cxd *ci, int mode)
192 if (mode == ci->mode)
196 case 0x00: /* IO mem */
197 write_regm(ci, 0x06, 0x00, 0x07);
199 case 0x01: /* ATT mem */
200 write_regm(ci, 0x06, 0x02, 0x07);
208 static void cam_mode(struct cxd *ci, int mode)
212 if (mode == ci->cammode)
217 write_regm(ci, 0x20, 0x80, 0x80);
220 if (!ci->en.read_data)
223 dev_info(&ci->client->dev, "enable cam buffer mode\n");
224 write_reg(ci, 0x0d, 0x00);
225 write_reg(ci, 0x0e, 0x01);
226 write_regm(ci, 0x08, 0x40, 0x40);
227 read_reg(ci, 0x12, &dummy);
228 write_regm(ci, 0x08, 0x80, 0x80);
236 static int init(struct cxd *ci)
240 mutex_lock(&ci->lock);
243 status = write_reg(ci, 0x00, 0x00);
246 status = write_reg(ci, 0x01, 0x00);
249 status = write_reg(ci, 0x02, 0x10);
252 status = write_reg(ci, 0x03, 0x00);
255 status = write_reg(ci, 0x05, 0xFF);
258 status = write_reg(ci, 0x06, 0x1F);
261 status = write_reg(ci, 0x07, 0x1F);
264 status = write_reg(ci, 0x08, 0x28);
267 status = write_reg(ci, 0x14, 0x20);
271 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
272 * Serial, POL=HIGH, MSB
274 status = write_reg(ci, 0x0A, 0xA7);
278 status = write_reg(ci, 0x0B, 0x33);
281 status = write_reg(ci, 0x0C, 0x33);
285 status = write_regm(ci, 0x14, 0x00, 0x0F);
288 status = write_reg(ci, 0x15, ci->clk_reg_b);
291 status = write_regm(ci, 0x16, 0x00, 0x0F);
294 status = write_reg(ci, 0x17, ci->clk_reg_f);
298 if (ci->cfg.clock_mode == 2) {
299 /* bitrate*2^13/ 72000 */
300 u32 reg = ((ci->cfg.bitrate << 13) + 71999) / 72000;
302 if (ci->cfg.polarity) {
303 status = write_reg(ci, 0x09, 0x6f);
307 status = write_reg(ci, 0x09, 0x6d);
311 status = write_reg(ci, 0x20, 0x08);
314 status = write_reg(ci, 0x21, (reg >> 8) & 0xff);
317 status = write_reg(ci, 0x22, reg & 0xff);
320 } else if (ci->cfg.clock_mode == 1) {
321 if (ci->cfg.polarity) {
322 status = write_reg(ci, 0x09, 0x6f); /* D */
326 status = write_reg(ci, 0x09, 0x6d);
330 status = write_reg(ci, 0x20, 0x68);
333 status = write_reg(ci, 0x21, 0x00);
336 status = write_reg(ci, 0x22, 0x02);
340 if (ci->cfg.polarity) {
341 status = write_reg(ci, 0x09, 0x4f); /* C */
345 status = write_reg(ci, 0x09, 0x4d);
349 status = write_reg(ci, 0x20, 0x28);
352 status = write_reg(ci, 0x21, 0x00);
355 status = write_reg(ci, 0x22, 0x07);
360 status = write_regm(ci, 0x20, 0x80, 0x80);
363 status = write_regm(ci, 0x03, 0x02, 0x02);
366 status = write_reg(ci, 0x01, 0x04);
369 status = write_reg(ci, 0x00, 0x31);
373 /* Put TS in bypass */
374 status = write_regm(ci, 0x09, 0x08, 0x08);
380 mutex_unlock(&ci->lock);
385 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
386 int slot, int address)
388 struct cxd *ci = ca->data;
391 mutex_lock(&ci->lock);
393 read_pccard(ci, address, &val, 1);
394 mutex_unlock(&ci->lock);
398 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
399 int address, u8 value)
401 struct cxd *ci = ca->data;
403 mutex_lock(&ci->lock);
405 write_pccard(ci, address, &value, 1);
406 mutex_unlock(&ci->lock);
410 static int read_cam_control(struct dvb_ca_en50221 *ca,
411 int slot, u8 address)
413 struct cxd *ci = ca->data;
416 mutex_lock(&ci->lock);
418 read_io(ci, address, &val);
419 mutex_unlock(&ci->lock);
423 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
424 u8 address, u8 value)
426 struct cxd *ci = ca->data;
428 mutex_lock(&ci->lock);
430 write_io(ci, address, value);
431 mutex_unlock(&ci->lock);
435 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
437 struct cxd *ci = ca->data;
440 read_data(ca, slot, ci->rbuf, 0);
442 mutex_lock(&ci->lock);
444 write_reg(ci, 0x00, 0x21);
445 write_reg(ci, 0x06, 0x1F);
446 write_reg(ci, 0x00, 0x31);
447 write_regm(ci, 0x20, 0x80, 0x80);
448 write_reg(ci, 0x03, 0x02);
454 for (i = 0; i < 100; i++) {
455 usleep_range(10000, 11000);
460 mutex_unlock(&ci->lock);
464 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
466 struct cxd *ci = ca->data;
468 dev_dbg(&ci->client->dev, "%s\n", __func__);
470 read_data(ca, slot, ci->rbuf, 0);
471 mutex_lock(&ci->lock);
472 write_reg(ci, 0x00, 0x21);
473 write_reg(ci, 0x06, 0x1F);
476 write_regm(ci, 0x09, 0x08, 0x08);
477 write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
478 write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
482 mutex_unlock(&ci->lock);
486 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
488 struct cxd *ci = ca->data;
490 mutex_lock(&ci->lock);
491 write_regm(ci, 0x09, 0x00, 0x08);
494 mutex_unlock(&ci->lock);
498 static int campoll(struct cxd *ci)
502 read_reg(ci, 0x04, &istat);
505 write_reg(ci, 0x05, istat);
515 read_reg(ci, 0x01, &slotstat);
516 if (!(2 & slotstat)) {
517 if (!ci->slot_stat) {
519 DVB_CA_EN50221_POLL_CAM_PRESENT;
520 write_regm(ci, 0x03, 0x08, 0x08);
526 write_regm(ci, 0x03, 0x00, 0x08);
527 dev_info(&ci->client->dev, "NO CAM\n");
532 ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
534 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
540 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
542 struct cxd *ci = ca->data;
545 mutex_lock(&ci->lock);
547 read_reg(ci, 0x01, &slotstat);
548 mutex_unlock(&ci->lock);
550 return ci->slot_stat;
553 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
555 struct cxd *ci = ca->data;
559 mutex_lock(&ci->lock);
561 mutex_unlock(&ci->lock);
566 mutex_lock(&ci->lock);
567 read_reg(ci, 0x0f, &msb);
568 read_reg(ci, 0x10, &lsb);
569 len = ((u16)msb << 8) | lsb;
570 if (len > ecount || len < 2) {
571 /* read it anyway or cxd may hang */
572 read_block(ci, 0x12, ci->rbuf, len);
573 mutex_unlock(&ci->lock);
576 read_block(ci, 0x12, ebuf, len);
578 mutex_unlock(&ci->lock);
582 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
584 struct cxd *ci = ca->data;
588 mutex_lock(&ci->lock);
589 write_reg(ci, 0x0d, ecount >> 8);
590 write_reg(ci, 0x0e, ecount & 0xff);
591 write_block(ci, 0x11, ebuf, ecount);
593 mutex_unlock(&ci->lock);
597 static const struct dvb_ca_en50221 en_templ = {
598 .read_attribute_mem = read_attribute_mem,
599 .write_attribute_mem = write_attribute_mem,
600 .read_cam_control = read_cam_control,
601 .write_cam_control = write_cam_control,
602 .slot_reset = slot_reset,
603 .slot_shutdown = slot_shutdown,
604 .slot_ts_enable = slot_ts_enable,
605 .poll_slot_status = poll_slot_status,
606 .read_data = read_data,
607 .write_data = write_data,
610 static int cxd2099_probe(struct i2c_client *client,
611 const struct i2c_device_id *id)
614 struct cxd2099_cfg *cfg = client->dev.platform_data;
615 static const struct regmap_config rm_cfg = {
622 ci = kzalloc(sizeof(*ci), GFP_KERNEL);
629 memcpy(&ci->cfg, cfg, sizeof(ci->cfg));
631 ci->regmap = regmap_init_i2c(client, &rm_cfg);
632 if (IS_ERR(ci->regmap)) {
633 ret = PTR_ERR(ci->regmap);
637 ret = regmap_read(ci->regmap, 0x00, &val);
639 dev_info(&client->dev, "No CXD2099AR detected at 0x%02x\n",
644 mutex_init(&ci->lock);
645 ci->lastaddress = 0xff;
646 ci->clk_reg_b = 0x4a;
647 ci->clk_reg_f = 0x1b;
652 dev_info(&client->dev, "Attached CXD2099AR at 0x%02x\n", client->addr);
657 ci->en.read_data = NULL;
658 ci->en.write_data = NULL;
660 dev_info(&client->dev, "Using CXD2099AR buffer mode");
663 i2c_set_clientdata(client, ci);
668 regmap_exit(ci->regmap);
676 static int cxd2099_remove(struct i2c_client *client)
678 struct cxd *ci = i2c_get_clientdata(client);
680 regmap_exit(ci->regmap);
686 static const struct i2c_device_id cxd2099_id[] = {
690 MODULE_DEVICE_TABLE(i2c, cxd2099_id);
692 static struct i2c_driver cxd2099_driver = {
696 .probe = cxd2099_probe,
697 .remove = cxd2099_remove,
698 .id_table = cxd2099_id,
701 module_i2c_driver(cxd2099_driver);
703 MODULE_DESCRIPTION("Sony CXD2099AR Common Interface controller driver");
704 MODULE_AUTHOR("Ralph Metzler");
705 MODULE_LICENSE("GPL v2");