2 * cxd2099.c: Driver for the Sony CXD2099AR Common Interface Controller
4 * Copyright (C) 2010-2013 Digital Devices GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/slab.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/wait.h>
22 #include <linux/delay.h>
23 #include <linux/mutex.h>
28 static int buffermode;
29 module_param(buffermode, int, 0444);
30 MODULE_PARM_DESC(buffermode, "Enable CXD2099AR buffer mode (default: disabled)");
32 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount);
35 struct dvb_ca_en50221 en;
37 struct cxd2099_cfg cfg;
38 struct i2c_client *client;
39 struct regmap *regmap;
55 struct mutex lock; /* device access lock */
61 static int read_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
65 if (ci->lastaddress != adr)
66 status = regmap_write(ci->regmap, 0, adr);
68 ci->lastaddress = adr;
73 if (ci->cfg.max_i2c && len > ci->cfg.max_i2c)
74 len = ci->cfg.max_i2c;
75 status = regmap_raw_read(ci->regmap, 1, data, len);
85 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
87 return read_block(ci, reg, val, 1);
90 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
93 u8 addr[2] = {address & 0xff, address >> 8};
95 status = regmap_raw_write(ci->regmap, 2, addr, 2);
97 status = regmap_raw_read(ci->regmap, 3, data, n);
101 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
104 u8 addr[2] = {address & 0xff, address >> 8};
106 status = regmap_raw_write(ci->regmap, 2, addr, 2);
110 memcpy(buf, data, n);
111 status = regmap_raw_write(ci->regmap, 3, buf, n);
116 static int read_io(struct cxd *ci, u16 address, unsigned int *val)
119 u8 addr[2] = {address & 0xff, address >> 8};
121 status = regmap_raw_write(ci->regmap, 2, addr, 2);
123 status = regmap_read(ci->regmap, 3, val);
127 static int write_io(struct cxd *ci, u16 address, u8 val)
130 u8 addr[2] = {address & 0xff, address >> 8};
132 status = regmap_raw_write(ci->regmap, 2, addr, 2);
134 status = regmap_write(ci->regmap, 3, val);
138 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
143 if (ci->lastaddress != reg)
144 status = regmap_write(ci->regmap, 0, reg);
145 if (!status && reg >= 6 && reg <= 8 && mask != 0xff) {
146 status = regmap_read(ci->regmap, 1, ®val);
147 ci->regs[reg] = regval;
149 ci->lastaddress = reg;
150 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
152 status = regmap_write(ci->regmap, 1, ci->regs[reg]);
154 ci->regs[reg] &= 0x7f;
158 static int write_reg(struct cxd *ci, u8 reg, u8 val)
160 return write_regm(ci, reg, val, 0xff);
163 static int write_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
168 if (ci->lastaddress != adr)
169 status = regmap_write(ci->regmap, 0, adr);
173 ci->lastaddress = adr;
177 if (ci->cfg.max_i2c && (len + 1 > ci->cfg.max_i2c))
178 len = ci->cfg.max_i2c - 1;
179 memcpy(buf, data, len);
180 status = regmap_raw_write(ci->regmap, 1, buf, len);
189 static void set_mode(struct cxd *ci, int mode)
191 if (mode == ci->mode)
195 case 0x00: /* IO mem */
196 write_regm(ci, 0x06, 0x00, 0x07);
198 case 0x01: /* ATT mem */
199 write_regm(ci, 0x06, 0x02, 0x07);
207 static void cam_mode(struct cxd *ci, int mode)
211 if (mode == ci->cammode)
216 write_regm(ci, 0x20, 0x80, 0x80);
219 if (!ci->en.read_data)
222 dev_info(&ci->client->dev, "enable cam buffer mode\n");
223 write_reg(ci, 0x0d, 0x00);
224 write_reg(ci, 0x0e, 0x01);
225 write_regm(ci, 0x08, 0x40, 0x40);
226 read_reg(ci, 0x12, &dummy);
227 write_regm(ci, 0x08, 0x80, 0x80);
235 static int init(struct cxd *ci)
239 mutex_lock(&ci->lock);
242 status = write_reg(ci, 0x00, 0x00);
245 status = write_reg(ci, 0x01, 0x00);
248 status = write_reg(ci, 0x02, 0x10);
251 status = write_reg(ci, 0x03, 0x00);
254 status = write_reg(ci, 0x05, 0xFF);
257 status = write_reg(ci, 0x06, 0x1F);
260 status = write_reg(ci, 0x07, 0x1F);
263 status = write_reg(ci, 0x08, 0x28);
266 status = write_reg(ci, 0x14, 0x20);
270 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
271 * Serial, POL=HIGH, MSB
273 status = write_reg(ci, 0x0A, 0xA7);
277 status = write_reg(ci, 0x0B, 0x33);
280 status = write_reg(ci, 0x0C, 0x33);
284 status = write_regm(ci, 0x14, 0x00, 0x0F);
287 status = write_reg(ci, 0x15, ci->clk_reg_b);
290 status = write_regm(ci, 0x16, 0x00, 0x0F);
293 status = write_reg(ci, 0x17, ci->clk_reg_f);
297 if (ci->cfg.clock_mode == 2) {
298 /* bitrate*2^13/ 72000 */
299 u32 reg = ((ci->cfg.bitrate << 13) + 71999) / 72000;
301 if (ci->cfg.polarity) {
302 status = write_reg(ci, 0x09, 0x6f);
306 status = write_reg(ci, 0x09, 0x6d);
310 status = write_reg(ci, 0x20, 0x08);
313 status = write_reg(ci, 0x21, (reg >> 8) & 0xff);
316 status = write_reg(ci, 0x22, reg & 0xff);
319 } else if (ci->cfg.clock_mode == 1) {
320 if (ci->cfg.polarity) {
321 status = write_reg(ci, 0x09, 0x6f); /* D */
325 status = write_reg(ci, 0x09, 0x6d);
329 status = write_reg(ci, 0x20, 0x68);
332 status = write_reg(ci, 0x21, 0x00);
335 status = write_reg(ci, 0x22, 0x02);
339 if (ci->cfg.polarity) {
340 status = write_reg(ci, 0x09, 0x4f); /* C */
344 status = write_reg(ci, 0x09, 0x4d);
348 status = write_reg(ci, 0x20, 0x28);
351 status = write_reg(ci, 0x21, 0x00);
354 status = write_reg(ci, 0x22, 0x07);
359 status = write_regm(ci, 0x20, 0x80, 0x80);
362 status = write_regm(ci, 0x03, 0x02, 0x02);
365 status = write_reg(ci, 0x01, 0x04);
368 status = write_reg(ci, 0x00, 0x31);
372 /* Put TS in bypass */
373 status = write_regm(ci, 0x09, 0x08, 0x08);
379 mutex_unlock(&ci->lock);
384 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
385 int slot, int address)
387 struct cxd *ci = ca->data;
390 mutex_lock(&ci->lock);
392 read_pccard(ci, address, &val, 1);
393 mutex_unlock(&ci->lock);
397 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
398 int address, u8 value)
400 struct cxd *ci = ca->data;
402 mutex_lock(&ci->lock);
404 write_pccard(ci, address, &value, 1);
405 mutex_unlock(&ci->lock);
409 static int read_cam_control(struct dvb_ca_en50221 *ca,
410 int slot, u8 address)
412 struct cxd *ci = ca->data;
415 mutex_lock(&ci->lock);
417 read_io(ci, address, &val);
418 mutex_unlock(&ci->lock);
422 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
423 u8 address, u8 value)
425 struct cxd *ci = ca->data;
427 mutex_lock(&ci->lock);
429 write_io(ci, address, value);
430 mutex_unlock(&ci->lock);
434 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
436 struct cxd *ci = ca->data;
439 read_data(ca, slot, ci->rbuf, 0);
441 mutex_lock(&ci->lock);
443 write_reg(ci, 0x00, 0x21);
444 write_reg(ci, 0x06, 0x1F);
445 write_reg(ci, 0x00, 0x31);
446 write_regm(ci, 0x20, 0x80, 0x80);
447 write_reg(ci, 0x03, 0x02);
453 for (i = 0; i < 100; i++) {
454 usleep_range(10000, 11000);
459 mutex_unlock(&ci->lock);
463 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
465 struct cxd *ci = ca->data;
467 dev_dbg(&ci->client->dev, "%s\n", __func__);
469 read_data(ca, slot, ci->rbuf, 0);
470 mutex_lock(&ci->lock);
471 write_reg(ci, 0x00, 0x21);
472 write_reg(ci, 0x06, 0x1F);
475 write_regm(ci, 0x09, 0x08, 0x08);
476 write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
477 write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
481 mutex_unlock(&ci->lock);
485 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
487 struct cxd *ci = ca->data;
489 mutex_lock(&ci->lock);
490 write_regm(ci, 0x09, 0x00, 0x08);
493 mutex_unlock(&ci->lock);
497 static int campoll(struct cxd *ci)
501 read_reg(ci, 0x04, &istat);
504 write_reg(ci, 0x05, istat);
514 read_reg(ci, 0x01, &slotstat);
515 if (!(2 & slotstat)) {
516 if (!ci->slot_stat) {
518 DVB_CA_EN50221_POLL_CAM_PRESENT;
519 write_regm(ci, 0x03, 0x08, 0x08);
525 write_regm(ci, 0x03, 0x00, 0x08);
526 dev_info(&ci->client->dev, "NO CAM\n");
531 ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
533 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
539 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
541 struct cxd *ci = ca->data;
544 mutex_lock(&ci->lock);
546 read_reg(ci, 0x01, &slotstat);
547 mutex_unlock(&ci->lock);
549 return ci->slot_stat;
552 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
554 struct cxd *ci = ca->data;
558 mutex_lock(&ci->lock);
560 mutex_unlock(&ci->lock);
565 mutex_lock(&ci->lock);
566 read_reg(ci, 0x0f, &msb);
567 read_reg(ci, 0x10, &lsb);
568 len = ((u16)msb << 8) | lsb;
569 if (len > ecount || len < 2) {
570 /* read it anyway or cxd may hang */
571 read_block(ci, 0x12, ci->rbuf, len);
572 mutex_unlock(&ci->lock);
575 read_block(ci, 0x12, ebuf, len);
577 mutex_unlock(&ci->lock);
581 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
583 struct cxd *ci = ca->data;
587 mutex_lock(&ci->lock);
588 write_reg(ci, 0x0d, ecount >> 8);
589 write_reg(ci, 0x0e, ecount & 0xff);
590 write_block(ci, 0x11, ebuf, ecount);
592 mutex_unlock(&ci->lock);
596 static struct dvb_ca_en50221 en_templ = {
597 .read_attribute_mem = read_attribute_mem,
598 .write_attribute_mem = write_attribute_mem,
599 .read_cam_control = read_cam_control,
600 .write_cam_control = write_cam_control,
601 .slot_reset = slot_reset,
602 .slot_shutdown = slot_shutdown,
603 .slot_ts_enable = slot_ts_enable,
604 .poll_slot_status = poll_slot_status,
605 .read_data = read_data,
606 .write_data = write_data,
609 static int cxd2099_probe(struct i2c_client *client,
610 const struct i2c_device_id *id)
613 struct cxd2099_cfg *cfg = client->dev.platform_data;
614 static const struct regmap_config rm_cfg = {
621 ci = kzalloc(sizeof(*ci), GFP_KERNEL);
628 memcpy(&ci->cfg, cfg, sizeof(ci->cfg));
630 ci->regmap = regmap_init_i2c(client, &rm_cfg);
631 if (IS_ERR(ci->regmap)) {
632 ret = PTR_ERR(ci->regmap);
636 ret = regmap_read(ci->regmap, 0x00, &val);
638 dev_info(&client->dev, "No CXD2099AR detected at 0x%02x\n",
643 mutex_init(&ci->lock);
644 ci->lastaddress = 0xff;
645 ci->clk_reg_b = 0x4a;
646 ci->clk_reg_f = 0x1b;
651 dev_info(&client->dev, "Attached CXD2099AR at 0x%02x\n", client->addr);
656 ci->en.read_data = NULL;
657 ci->en.write_data = NULL;
659 dev_info(&client->dev, "Using CXD2099AR buffer mode");
662 i2c_set_clientdata(client, ci);
667 regmap_exit(ci->regmap);
675 static int cxd2099_remove(struct i2c_client *client)
677 struct cxd *ci = i2c_get_clientdata(client);
679 regmap_exit(ci->regmap);
685 static const struct i2c_device_id cxd2099_id[] = {
689 MODULE_DEVICE_TABLE(i2c, cxd2099_id);
691 static struct i2c_driver cxd2099_driver = {
695 .probe = cxd2099_probe,
696 .remove = cxd2099_remove,
697 .id_table = cxd2099_id,
700 module_i2c_driver(cxd2099_driver);
702 MODULE_DESCRIPTION("Sony CXD2099AR Common Interface controller driver");
703 MODULE_AUTHOR("Ralph Metzler");
704 MODULE_LICENSE("GPL");