1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2022 Linaro Ltd
4 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
6 #include <linux/bits.h>
7 #include <linux/bitfield.h>
8 #include <linux/led-class-multicolor.h>
9 #include <linux/module.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pwm.h>
14 #include <linux/regmap.h>
15 #include <linux/slab.h>
17 #define LPG_SUBTYPE_REG 0x05
18 #define LPG_SUBTYPE_LPG 0x2
19 #define LPG_SUBTYPE_PWM 0xb
20 #define LPG_SUBTYPE_LPG_LITE 0x11
21 #define LPG_PATTERN_CONFIG_REG 0x40
22 #define LPG_SIZE_CLK_REG 0x41
23 #define PWM_CLK_SELECT_MASK GENMASK(1, 0)
24 #define LPG_PREDIV_CLK_REG 0x42
25 #define PWM_FREQ_PRE_DIV_MASK GENMASK(6, 5)
26 #define PWM_FREQ_EXP_MASK GENMASK(2, 0)
27 #define PWM_TYPE_CONFIG_REG 0x43
28 #define PWM_VALUE_REG 0x44
29 #define PWM_ENABLE_CONTROL_REG 0x46
30 #define PWM_SYNC_REG 0x47
31 #define LPG_RAMP_DURATION_REG 0x50
32 #define LPG_HI_PAUSE_REG 0x52
33 #define LPG_LO_PAUSE_REG 0x54
34 #define LPG_HI_IDX_REG 0x56
35 #define LPG_LO_IDX_REG 0x57
36 #define PWM_SEC_ACCESS_REG 0xd0
37 #define PWM_DTEST_REG(x) (0xe2 + (x) - 1)
39 #define TRI_LED_SRC_SEL 0x45
40 #define TRI_LED_EN_CTL 0x46
41 #define TRI_LED_ATC_CTL 0x47
43 #define LPG_LUT_REG(x) (0x40 + (x) * 2)
44 #define RAMP_CONTROL_REG 0xc8
46 #define LPG_RESOLUTION 512
53 * struct lpg - LPG device context
54 * @dev: pointer to LPG device
55 * @map: regmap for register access
56 * @lock: used to synchronize LED and pwm callback requests
57 * @pwm: PWM-chip object, if operating in PWM mode
58 * @data: reference to version specific data
59 * @lut_base: base address of the LUT block (optional)
60 * @lut_size: number of entries in the LUT block
61 * @lut_bitmap: allocation bitmap for LUT entries
62 * @triled_base: base address of the TRILED block (optional)
63 * @triled_src: power-source for the TRILED
64 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
65 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
66 * @channels: list of PWM channels
67 * @num_channels: number of @channels
77 const struct lpg_data *data;
81 unsigned long *lut_bitmap;
85 bool triled_has_atc_ctl;
86 bool triled_has_src_sel;
88 struct lpg_channel *channels;
89 unsigned int num_channels;
93 * struct lpg_channel - per channel data
94 * @lpg: reference to parent lpg
95 * @base: base address of the PWM channel
96 * @triled_mask: mask in TRILED to enable this channel
97 * @lut_mask: mask in LUT to start pattern generator for this channel
98 * @subtype: PMIC hardware block subtype
99 * @in_use: channel is exposed to LED framework
100 * @color: color of the LED attached to this channel
101 * @dtest_line: DTEST line for output, or 0 if disabled
102 * @dtest_value: DTEST line configuration
103 * @pwm_value: duty (in microseconds) of the generated pulses, overridden by LUT
104 * @enabled: output enabled?
105 * @period: period (in nanoseconds) of the generated pulses
106 * @clk_sel: reference clock frequency selector
107 * @pre_div_sel: divider selector of the reference clock
108 * @pre_div_exp: exponential divider of the reference clock
109 * @ramp_enabled: duty cycle is driven by iterating over lookup table
110 * @ramp_ping_pong: reverse through pattern, rather than wrapping to start
111 * @ramp_oneshot: perform only a single pass over the pattern
112 * @ramp_reverse: iterate over pattern backwards
113 * @ramp_tick_ms: length (in milliseconds) of one step in the pattern
114 * @ramp_lo_pause_ms: pause (in milliseconds) before iterating over pattern
115 * @ramp_hi_pause_ms: pause (in milliseconds) after iterating over pattern
116 * @pattern_lo_idx: start index of associated pattern
117 * @pattern_hi_idx: last index of associated pattern
123 unsigned int triled_mask;
124 unsigned int lut_mask;
125 unsigned int subtype;
138 unsigned int clk_sel;
139 unsigned int pre_div_sel;
140 unsigned int pre_div_exp;
146 unsigned short ramp_tick_ms;
147 unsigned long ramp_lo_pause_ms;
148 unsigned long ramp_hi_pause_ms;
150 unsigned int pattern_lo_idx;
151 unsigned int pattern_hi_idx;
155 * struct lpg_led - logical LED object
156 * @lpg: lpg context reference
157 * @cdev: LED class device
158 * @mcdev: Multicolor LED class device
159 * @num_channels: number of @channels
160 * @channels: list of channels associated with the LED
165 struct led_classdev cdev;
166 struct led_classdev_mc mcdev;
168 unsigned int num_channels;
169 struct lpg_channel *channels[];
173 * struct lpg_channel_data - per channel initialization data
174 * @base: base address for PWM channel registers
175 * @triled_mask: bitmask for controlling this channel in TRILED
177 struct lpg_channel_data {
183 * struct lpg_data - initialization data
184 * @lut_base: base address of LUT block
185 * @lut_size: number of entries in LUT
186 * @triled_base: base address of TRILED
187 * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
188 * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
189 * @num_channels: number of channels in LPG
190 * @channels: list of channel initialization data
193 unsigned int lut_base;
194 unsigned int lut_size;
195 unsigned int triled_base;
196 bool triled_has_atc_ctl;
197 bool triled_has_src_sel;
199 const struct lpg_channel_data *channels;
202 static int triled_set(struct lpg *lpg, unsigned int mask, unsigned int enable)
204 /* Skip if we don't have a triled block */
205 if (!lpg->triled_base)
208 return regmap_update_bits(lpg->map, lpg->triled_base + TRI_LED_EN_CTL,
212 static int lpg_lut_store(struct lpg *lpg, struct led_pattern *pattern,
213 size_t len, unsigned int *lo_idx, unsigned int *hi_idx)
219 idx = bitmap_find_next_zero_area(lpg->lut_bitmap, lpg->lut_size,
221 if (idx >= lpg->lut_size)
224 for (i = 0; i < len; i++) {
225 val = pattern[i].brightness;
227 regmap_bulk_write(lpg->map, lpg->lut_base + LPG_LUT_REG(idx + i),
231 bitmap_set(lpg->lut_bitmap, idx, len);
234 *hi_idx = idx + len - 1;
239 static void lpg_lut_free(struct lpg *lpg, unsigned int lo_idx, unsigned int hi_idx)
243 len = hi_idx - lo_idx + 1;
247 bitmap_clear(lpg->lut_bitmap, lo_idx, len);
250 static int lpg_lut_sync(struct lpg *lpg, unsigned int mask)
252 return regmap_write(lpg->map, lpg->lut_base + RAMP_CONTROL_REG, mask);
255 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000};
256 static const unsigned int lpg_pre_divs[] = {1, 3, 5, 6};
258 static int lpg_calc_freq(struct lpg_channel *chan, uint64_t period)
260 unsigned int clk_sel, best_clk = 0;
261 unsigned int div, best_div = 0;
262 unsigned int m, best_m = 0;
264 unsigned int best_err = UINT_MAX;
269 * The PWM period is determined by:
271 * resolution * pre_div * 2^M
272 * period = --------------------------
275 * With resolution fixed at 2^9 bits, pre_div = {1, 3, 5, 6} and
278 * This allows for periods between 27uS and 384s, as the PWM framework
279 * wants a period of equal or lower length than requested, reject
280 * anything below 27uS.
282 if (period <= (u64)NSEC_PER_SEC * LPG_RESOLUTION / 19200000)
285 /* Limit period to largest possible value, to avoid overflows */
286 max_period = (u64)NSEC_PER_SEC * LPG_RESOLUTION * 6 * (1 << LPG_MAX_M) / 1024;
287 if (period > max_period)
291 * Search for the pre_div, refclk and M by solving the rewritten formula
292 * for each refclk and pre_div value:
295 * M = log2 -------------------------------------
296 * NSEC_PER_SEC * pre_div * resolution
298 for (clk_sel = 1; clk_sel < ARRAY_SIZE(lpg_clk_rates); clk_sel++) {
299 u64 numerator = period * lpg_clk_rates[clk_sel];
301 for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) {
302 u64 denominator = (u64)NSEC_PER_SEC * lpg_pre_divs[div] * LPG_RESOLUTION;
306 if (numerator < denominator)
309 ratio = div64_u64(numerator, denominator);
314 actual = DIV_ROUND_UP_ULL(denominator * (1 << m), lpg_clk_rates[clk_sel]);
316 error = period - actual;
317 if (error < best_err) {
323 best_period = actual;
328 chan->clk_sel = best_clk;
329 chan->pre_div_sel = best_div;
330 chan->pre_div_exp = best_m;
331 chan->period = best_period;
336 static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty)
338 unsigned int max = LPG_RESOLUTION - 1;
341 val = div64_u64(duty * lpg_clk_rates[chan->clk_sel],
342 (u64)NSEC_PER_SEC * lpg_pre_divs[chan->pre_div_sel] * (1 << chan->pre_div_exp));
344 chan->pwm_value = min(val, max);
347 static void lpg_apply_freq(struct lpg_channel *chan)
350 struct lpg *lpg = chan->lpg;
357 /* Specify 9bit resolution, based on the subtype of the channel */
358 switch (chan->subtype) {
359 case LPG_SUBTYPE_LPG:
360 val |= GENMASK(5, 4);
362 case LPG_SUBTYPE_PWM:
365 case LPG_SUBTYPE_LPG_LITE:
371 regmap_write(lpg->map, chan->base + LPG_SIZE_CLK_REG, val);
373 val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) |
374 FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp);
375 regmap_write(lpg->map, chan->base + LPG_PREDIV_CLK_REG, val);
378 #define LPG_ENABLE_GLITCH_REMOVAL BIT(5)
380 static void lpg_enable_glitch(struct lpg_channel *chan)
382 struct lpg *lpg = chan->lpg;
384 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
385 LPG_ENABLE_GLITCH_REMOVAL, 0);
388 static void lpg_disable_glitch(struct lpg_channel *chan)
390 struct lpg *lpg = chan->lpg;
392 regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
393 LPG_ENABLE_GLITCH_REMOVAL,
394 LPG_ENABLE_GLITCH_REMOVAL);
397 static void lpg_apply_pwm_value(struct lpg_channel *chan)
399 struct lpg *lpg = chan->lpg;
400 u16 val = chan->pwm_value;
405 regmap_bulk_write(lpg->map, chan->base + PWM_VALUE_REG, &val, sizeof(val));
408 #define LPG_PATTERN_CONFIG_LO_TO_HI BIT(4)
409 #define LPG_PATTERN_CONFIG_REPEAT BIT(3)
410 #define LPG_PATTERN_CONFIG_TOGGLE BIT(2)
411 #define LPG_PATTERN_CONFIG_PAUSE_HI BIT(1)
412 #define LPG_PATTERN_CONFIG_PAUSE_LO BIT(0)
414 static void lpg_apply_lut_control(struct lpg_channel *chan)
416 struct lpg *lpg = chan->lpg;
417 unsigned int hi_pause;
418 unsigned int lo_pause;
419 unsigned int conf = 0;
420 unsigned int lo_idx = chan->pattern_lo_idx;
421 unsigned int hi_idx = chan->pattern_hi_idx;
422 u16 step = chan->ramp_tick_ms;
424 if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx)
427 hi_pause = DIV_ROUND_UP(chan->ramp_hi_pause_ms, step);
428 lo_pause = DIV_ROUND_UP(chan->ramp_lo_pause_ms, step);
430 if (!chan->ramp_reverse)
431 conf |= LPG_PATTERN_CONFIG_LO_TO_HI;
432 if (!chan->ramp_oneshot)
433 conf |= LPG_PATTERN_CONFIG_REPEAT;
434 if (chan->ramp_ping_pong)
435 conf |= LPG_PATTERN_CONFIG_TOGGLE;
436 if (chan->ramp_hi_pause_ms)
437 conf |= LPG_PATTERN_CONFIG_PAUSE_HI;
438 if (chan->ramp_lo_pause_ms)
439 conf |= LPG_PATTERN_CONFIG_PAUSE_LO;
441 regmap_write(lpg->map, chan->base + LPG_PATTERN_CONFIG_REG, conf);
442 regmap_write(lpg->map, chan->base + LPG_HI_IDX_REG, hi_idx);
443 regmap_write(lpg->map, chan->base + LPG_LO_IDX_REG, lo_idx);
445 regmap_bulk_write(lpg->map, chan->base + LPG_RAMP_DURATION_REG, &step, sizeof(step));
446 regmap_write(lpg->map, chan->base + LPG_HI_PAUSE_REG, hi_pause);
447 regmap_write(lpg->map, chan->base + LPG_LO_PAUSE_REG, lo_pause);
450 #define LPG_ENABLE_CONTROL_OUTPUT BIT(7)
451 #define LPG_ENABLE_CONTROL_BUFFER_TRISTATE BIT(5)
452 #define LPG_ENABLE_CONTROL_SRC_PWM BIT(2)
453 #define LPG_ENABLE_CONTROL_RAMP_GEN BIT(1)
455 static void lpg_apply_control(struct lpg_channel *chan)
458 struct lpg *lpg = chan->lpg;
460 ctrl = LPG_ENABLE_CONTROL_BUFFER_TRISTATE;
463 ctrl |= LPG_ENABLE_CONTROL_OUTPUT;
465 if (chan->pattern_lo_idx != chan->pattern_hi_idx)
466 ctrl |= LPG_ENABLE_CONTROL_RAMP_GEN;
468 ctrl |= LPG_ENABLE_CONTROL_SRC_PWM;
470 regmap_write(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, ctrl);
473 * Due to LPG hardware bug, in the PWM mode, having enabled PWM,
474 * We have to write PWM values one more time.
477 lpg_apply_pwm_value(chan);
480 #define LPG_SYNC_PWM BIT(0)
482 static void lpg_apply_sync(struct lpg_channel *chan)
484 struct lpg *lpg = chan->lpg;
486 regmap_write(lpg->map, chan->base + PWM_SYNC_REG, LPG_SYNC_PWM);
489 static int lpg_parse_dtest(struct lpg *lpg)
491 struct lpg_channel *chan;
492 struct device_node *np = lpg->dev->of_node;
497 count = of_property_count_u32_elems(np, "qcom,dtest");
498 if (count == -EINVAL) {
500 } else if (count < 0) {
503 } else if (count != lpg->data->num_channels * 2) {
504 dev_err(lpg->dev, "qcom,dtest needs to be %d items\n",
505 lpg->data->num_channels * 2);
509 for (i = 0; i < lpg->data->num_channels; i++) {
510 chan = &lpg->channels[i];
512 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2,
517 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2 + 1,
526 dev_err(lpg->dev, "malformed qcom,dtest\n");
530 static void lpg_apply_dtest(struct lpg_channel *chan)
532 struct lpg *lpg = chan->lpg;
534 if (!chan->dtest_line)
537 regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5);
538 regmap_write(lpg->map, chan->base + PWM_DTEST_REG(chan->dtest_line),
542 static void lpg_apply(struct lpg_channel *chan)
544 lpg_disable_glitch(chan);
545 lpg_apply_freq(chan);
546 lpg_apply_pwm_value(chan);
547 lpg_apply_control(chan);
548 lpg_apply_sync(chan);
549 lpg_apply_lut_control(chan);
550 lpg_enable_glitch(chan);
553 static void lpg_brightness_set(struct lpg_led *led, struct led_classdev *cdev,
554 struct mc_subled *subleds)
556 enum led_brightness brightness;
557 struct lpg_channel *chan;
558 unsigned int triled_enabled = 0;
559 unsigned int triled_mask = 0;
560 unsigned int lut_mask = 0;
562 struct lpg *lpg = led->lpg;
565 for (i = 0; i < led->num_channels; i++) {
566 chan = led->channels[i];
567 brightness = subleds[i].brightness;
569 if (brightness == LED_OFF) {
570 chan->enabled = false;
571 chan->ramp_enabled = false;
572 } else if (chan->pattern_lo_idx != chan->pattern_hi_idx) {
573 lpg_calc_freq(chan, NSEC_PER_MSEC);
575 chan->enabled = true;
576 chan->ramp_enabled = true;
578 lut_mask |= chan->lut_mask;
579 triled_enabled |= chan->triled_mask;
581 lpg_calc_freq(chan, NSEC_PER_MSEC);
583 duty = div_u64(brightness * chan->period, cdev->max_brightness);
584 lpg_calc_duty(chan, duty);
585 chan->enabled = true;
586 chan->ramp_enabled = false;
588 triled_enabled |= chan->triled_mask;
591 triled_mask |= chan->triled_mask;
596 /* Toggle triled lines */
598 triled_set(lpg, triled_mask, triled_enabled);
600 /* Trigger start of ramp generator(s) */
602 lpg_lut_sync(lpg, lut_mask);
605 static void lpg_brightness_single_set(struct led_classdev *cdev,
606 enum led_brightness value)
608 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
609 struct mc_subled info;
611 mutex_lock(&led->lpg->lock);
613 info.brightness = value;
614 lpg_brightness_set(led, cdev, &info);
616 mutex_unlock(&led->lpg->lock);
619 static void lpg_brightness_mc_set(struct led_classdev *cdev,
620 enum led_brightness value)
622 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
623 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
625 mutex_lock(&led->lpg->lock);
627 led_mc_calc_color_components(mc, value);
628 lpg_brightness_set(led, cdev, mc->subled_info);
630 mutex_unlock(&led->lpg->lock);
633 static int lpg_blink_set(struct lpg_led *led,
634 unsigned long *delay_on, unsigned long *delay_off)
636 struct lpg_channel *chan;
638 unsigned int triled_mask = 0;
639 struct lpg *lpg = led->lpg;
643 if (!*delay_on && !*delay_off) {
648 duty = *delay_on * NSEC_PER_MSEC;
649 period = (*delay_on + *delay_off) * NSEC_PER_MSEC;
651 for (i = 0; i < led->num_channels; i++) {
652 chan = led->channels[i];
654 lpg_calc_freq(chan, period);
655 lpg_calc_duty(chan, duty);
657 chan->enabled = true;
658 chan->ramp_enabled = false;
660 triled_mask |= chan->triled_mask;
665 /* Enable triled lines */
666 triled_set(lpg, triled_mask, triled_mask);
668 chan = led->channels[0];
669 duty = div_u64(chan->pwm_value * chan->period, LPG_RESOLUTION);
670 *delay_on = div_u64(duty, NSEC_PER_MSEC);
671 *delay_off = div_u64(chan->period - duty, NSEC_PER_MSEC);
676 static int lpg_blink_single_set(struct led_classdev *cdev,
677 unsigned long *delay_on, unsigned long *delay_off)
679 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
682 mutex_lock(&led->lpg->lock);
684 ret = lpg_blink_set(led, delay_on, delay_off);
686 mutex_unlock(&led->lpg->lock);
691 static int lpg_blink_mc_set(struct led_classdev *cdev,
692 unsigned long *delay_on, unsigned long *delay_off)
694 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
695 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
698 mutex_lock(&led->lpg->lock);
700 ret = lpg_blink_set(led, delay_on, delay_off);
702 mutex_unlock(&led->lpg->lock);
707 static int lpg_pattern_set(struct lpg_led *led, struct led_pattern *led_pattern,
710 struct lpg_channel *chan;
711 struct lpg *lpg = led->lpg;
712 struct led_pattern *pattern;
713 unsigned int brightness_a;
714 unsigned int brightness_b;
715 unsigned int actual_len;
716 unsigned int hi_pause;
717 unsigned int lo_pause;
718 unsigned int delta_t;
722 bool ping_pong = true;
725 /* Hardware only support oneshot or indefinite loops */
726 if (repeat != -1 && repeat != 1)
730 * The standardized leds-trigger-pattern format defines that the
731 * brightness of the LED follows a linear transition from one entry
732 * in the pattern to the next, over the given delta_t time. It
733 * describes that the way to perform instant transitions a zero-length
734 * entry should be added following a pattern entry.
736 * The LPG hardware is only able to perform the latter (no linear
737 * transitions), so require each entry in the pattern to be followed by
738 * a zero-length transition.
743 pattern = kcalloc(len / 2, sizeof(*pattern), GFP_KERNEL);
747 for (i = 0; i < len; i += 2) {
748 if (led_pattern[i].brightness != led_pattern[i + 1].brightness)
749 goto out_free_pattern;
750 if (led_pattern[i + 1].delta_t != 0)
751 goto out_free_pattern;
753 pattern[i / 2].brightness = led_pattern[i].brightness;
754 pattern[i / 2].delta_t = led_pattern[i].delta_t;
760 * Specifying a pattern of length 1 causes the hardware to iterate
761 * through the entire LUT, so prohibit this.
764 goto out_free_pattern;
767 * The LPG plays patterns with at a fixed pace, a "low pause" can be
768 * used to stretch the first delay of the pattern and a "high pause"
771 * In order to save space the pattern can be played in "ping pong"
772 * mode, in which the pattern is first played forward, then "high
773 * pause" is applied, then the pattern is played backwards and finally
774 * the "low pause" is applied.
776 * The middle elements of the pattern are used to determine delta_t and
777 * the "low pause" and "high pause" multipliers are derrived from this.
779 * The first element in the pattern is used to determine "low pause".
781 * If the specified pattern is a palindrome the ping pong mode is
782 * enabled. In this scenario the delta_t of the middle entry (i.e. the
783 * last in the programmed pattern) determines the "high pause".
786 /* Detect palindromes and use "ping pong" to reduce LUT usage */
787 for (i = 0; i < len / 2; i++) {
788 brightness_a = pattern[i].brightness;
789 brightness_b = pattern[len - i - 1].brightness;
791 if (brightness_a != brightness_b) {
797 /* The pattern length to be written to the LUT */
799 actual_len = (len + 1) / 2;
804 * Validate that all delta_t in the pattern are the same, with the
805 * exception of the middle element in case of ping_pong.
807 delta_t = pattern[1].delta_t;
808 for (i = 2; i < len; i++) {
809 if (pattern[i].delta_t != delta_t) {
811 * Allow last entry in the full or shortened pattern to
812 * specify hi pause. Reject other variations.
814 if (i != actual_len - 1)
815 goto out_free_pattern;
819 /* LPG_RAMP_DURATION_REG is a 9bit */
820 if (delta_t >= BIT(9))
821 goto out_free_pattern;
823 /* Find "low pause" and "high pause" in the pattern */
824 lo_pause = pattern[0].delta_t;
825 hi_pause = pattern[actual_len - 1].delta_t;
827 mutex_lock(&lpg->lock);
828 ret = lpg_lut_store(lpg, pattern, actual_len, &lo_idx, &hi_idx);
832 for (i = 0; i < led->num_channels; i++) {
833 chan = led->channels[i];
835 chan->ramp_tick_ms = delta_t;
836 chan->ramp_ping_pong = ping_pong;
837 chan->ramp_oneshot = repeat != -1;
839 chan->ramp_lo_pause_ms = lo_pause;
840 chan->ramp_hi_pause_ms = hi_pause;
842 chan->pattern_lo_idx = lo_idx;
843 chan->pattern_hi_idx = hi_idx;
847 mutex_unlock(&lpg->lock);
854 static int lpg_pattern_single_set(struct led_classdev *cdev,
855 struct led_pattern *pattern, u32 len,
858 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
861 ret = lpg_pattern_set(led, pattern, len, repeat);
865 lpg_brightness_single_set(cdev, LED_FULL);
870 static int lpg_pattern_mc_set(struct led_classdev *cdev,
871 struct led_pattern *pattern, u32 len,
874 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
875 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
878 ret = lpg_pattern_set(led, pattern, len, repeat);
882 led_mc_calc_color_components(mc, LED_FULL);
883 lpg_brightness_set(led, cdev, mc->subled_info);
888 static int lpg_pattern_clear(struct lpg_led *led)
890 struct lpg_channel *chan;
891 struct lpg *lpg = led->lpg;
894 mutex_lock(&lpg->lock);
896 chan = led->channels[0];
897 lpg_lut_free(lpg, chan->pattern_lo_idx, chan->pattern_hi_idx);
899 for (i = 0; i < led->num_channels; i++) {
900 chan = led->channels[i];
901 chan->pattern_lo_idx = 0;
902 chan->pattern_hi_idx = 0;
905 mutex_unlock(&lpg->lock);
910 static int lpg_pattern_single_clear(struct led_classdev *cdev)
912 struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
914 return lpg_pattern_clear(led);
917 static int lpg_pattern_mc_clear(struct led_classdev *cdev)
919 struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
920 struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
922 return lpg_pattern_clear(led);
925 static int lpg_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
927 struct lpg *lpg = container_of(chip, struct lpg, pwm);
928 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
930 return chan->in_use ? -EBUSY : 0;
935 * - Updating both duty and period is not done atomically, so the output signal
936 * will momentarily be a mix of the settings.
937 * - Changed parameters takes effect immediately.
938 * - A disabled channel outputs a logical 0.
940 static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
941 const struct pwm_state *state)
943 struct lpg *lpg = container_of(chip, struct lpg, pwm);
944 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
947 if (state->polarity != PWM_POLARITY_NORMAL)
950 mutex_lock(&lpg->lock);
952 if (state->enabled) {
953 ret = lpg_calc_freq(chan, state->period);
957 lpg_calc_duty(chan, state->duty_cycle);
959 chan->enabled = state->enabled;
963 triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0);
966 mutex_unlock(&lpg->lock);
971 static void lpg_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
972 struct pwm_state *state)
974 struct lpg *lpg = container_of(chip, struct lpg, pwm);
975 struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
976 unsigned int pre_div;
983 ret = regmap_read(lpg->map, chan->base + LPG_SIZE_CLK_REG, &val);
987 refclk = lpg_clk_rates[val & PWM_CLK_SELECT_MASK];
989 ret = regmap_read(lpg->map, chan->base + LPG_PREDIV_CLK_REG, &val);
993 pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)];
994 m = FIELD_GET(PWM_FREQ_EXP_MASK, val);
996 ret = regmap_bulk_read(lpg->map, chan->base + PWM_VALUE_REG, &pwm_value, sizeof(pwm_value));
1000 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * LPG_RESOLUTION * pre_div * (1 << m), refclk);
1001 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk);
1004 state->duty_cycle = 0;
1007 ret = regmap_read(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, &val);
1011 state->enabled = FIELD_GET(LPG_ENABLE_CONTROL_OUTPUT, val);
1012 state->polarity = PWM_POLARITY_NORMAL;
1014 if (state->duty_cycle > state->period)
1015 state->duty_cycle = state->period;
1018 static const struct pwm_ops lpg_pwm_ops = {
1019 .request = lpg_pwm_request,
1020 .apply = lpg_pwm_apply,
1021 .get_state = lpg_pwm_get_state,
1022 .owner = THIS_MODULE,
1025 static int lpg_add_pwm(struct lpg *lpg)
1030 lpg->pwm.dev = lpg->dev;
1031 lpg->pwm.npwm = lpg->num_channels;
1032 lpg->pwm.ops = &lpg_pwm_ops;
1034 ret = pwmchip_add(&lpg->pwm);
1036 dev_err(lpg->dev, "failed to add PWM chip: ret %d\n", ret);
1041 static int lpg_parse_channel(struct lpg *lpg, struct device_node *np,
1042 struct lpg_channel **channel)
1044 struct lpg_channel *chan;
1045 u32 color = LED_COLOR_ID_GREEN;
1049 ret = of_property_read_u32(np, "reg", ®);
1050 if (ret || !reg || reg > lpg->num_channels) {
1051 dev_err(lpg->dev, "invalid \"reg\" of %pOFn\n", np);
1055 chan = &lpg->channels[reg - 1];
1056 chan->in_use = true;
1058 ret = of_property_read_u32(np, "color", &color);
1059 if (ret < 0 && ret != -EINVAL) {
1060 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1064 chan->color = color;
1071 static int lpg_add_led(struct lpg *lpg, struct device_node *np)
1073 struct led_init_data init_data = {};
1074 struct led_classdev *cdev;
1075 struct device_node *child;
1076 struct mc_subled *info;
1077 struct lpg_led *led;
1084 ret = of_property_read_u32(np, "color", &color);
1085 if (ret < 0 && ret != -EINVAL) {
1086 dev_err(lpg->dev, "failed to parse \"color\" of %pOF\n", np);
1090 if (color == LED_COLOR_ID_RGB)
1091 num_channels = of_get_available_child_count(np);
1095 led = devm_kzalloc(lpg->dev, struct_size(led, channels, num_channels), GFP_KERNEL);
1100 led->num_channels = num_channels;
1102 if (color == LED_COLOR_ID_RGB) {
1103 info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL);
1107 for_each_available_child_of_node(np, child) {
1108 ret = lpg_parse_channel(lpg, child, &led->channels[i]);
1112 info[i].color_index = led->channels[i]->color;
1113 info[i].intensity = 0;
1117 led->mcdev.subled_info = info;
1118 led->mcdev.num_colors = num_channels;
1120 cdev = &led->mcdev.led_cdev;
1121 cdev->brightness_set = lpg_brightness_mc_set;
1122 cdev->blink_set = lpg_blink_mc_set;
1124 /* Register pattern accessors only if we have a LUT block */
1125 if (lpg->lut_base) {
1126 cdev->pattern_set = lpg_pattern_mc_set;
1127 cdev->pattern_clear = lpg_pattern_mc_clear;
1130 ret = lpg_parse_channel(lpg, np, &led->channels[0]);
1135 cdev->brightness_set = lpg_brightness_single_set;
1136 cdev->blink_set = lpg_blink_single_set;
1138 /* Register pattern accessors only if we have a LUT block */
1139 if (lpg->lut_base) {
1140 cdev->pattern_set = lpg_pattern_single_set;
1141 cdev->pattern_clear = lpg_pattern_single_clear;
1145 cdev->default_trigger = of_get_property(np, "linux,default-trigger", NULL);
1146 cdev->max_brightness = LPG_RESOLUTION - 1;
1148 if (!of_property_read_string(np, "default-state", &state) &&
1149 !strcmp(state, "on"))
1150 cdev->brightness = cdev->max_brightness;
1152 cdev->brightness = LED_OFF;
1154 cdev->brightness_set(cdev, cdev->brightness);
1156 init_data.fwnode = of_fwnode_handle(np);
1158 if (color == LED_COLOR_ID_RGB)
1159 ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data);
1161 ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data);
1163 dev_err(lpg->dev, "unable to register %s\n", cdev->name);
1168 static int lpg_init_channels(struct lpg *lpg)
1170 const struct lpg_data *data = lpg->data;
1171 struct lpg_channel *chan;
1174 lpg->num_channels = data->num_channels;
1175 lpg->channels = devm_kcalloc(lpg->dev, data->num_channels,
1176 sizeof(struct lpg_channel), GFP_KERNEL);
1180 for (i = 0; i < data->num_channels; i++) {
1181 chan = &lpg->channels[i];
1184 chan->base = data->channels[i].base;
1185 chan->triled_mask = data->channels[i].triled_mask;
1186 chan->lut_mask = BIT(i);
1188 regmap_read(lpg->map, chan->base + LPG_SUBTYPE_REG, &chan->subtype);
1194 static int lpg_init_triled(struct lpg *lpg)
1196 struct device_node *np = lpg->dev->of_node;
1199 /* Skip initialization if we don't have a triled block */
1200 if (!lpg->data->triled_base)
1203 lpg->triled_base = lpg->data->triled_base;
1204 lpg->triled_has_atc_ctl = lpg->data->triled_has_atc_ctl;
1205 lpg->triled_has_src_sel = lpg->data->triled_has_src_sel;
1207 if (lpg->triled_has_src_sel) {
1208 ret = of_property_read_u32(np, "qcom,power-source", &lpg->triled_src);
1209 if (ret || lpg->triled_src == 2 || lpg->triled_src > 3) {
1210 dev_err(lpg->dev, "invalid power source\n");
1215 /* Disable automatic trickle charge LED */
1216 if (lpg->triled_has_atc_ctl)
1217 regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0);
1219 /* Configure power source */
1220 if (lpg->triled_has_src_sel)
1221 regmap_write(lpg->map, lpg->triled_base + TRI_LED_SRC_SEL, lpg->triled_src);
1223 /* Default all outputs to off */
1224 regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0);
1229 static int lpg_init_lut(struct lpg *lpg)
1231 const struct lpg_data *data = lpg->data;
1233 if (!data->lut_base)
1236 lpg->lut_base = data->lut_base;
1237 lpg->lut_size = data->lut_size;
1239 lpg->lut_bitmap = devm_bitmap_zalloc(lpg->dev, lpg->lut_size, GFP_KERNEL);
1240 if (!lpg->lut_bitmap)
1246 static int lpg_probe(struct platform_device *pdev)
1248 struct device_node *np;
1253 lpg = devm_kzalloc(&pdev->dev, sizeof(*lpg), GFP_KERNEL);
1257 lpg->data = of_device_get_match_data(&pdev->dev);
1261 platform_set_drvdata(pdev, lpg);
1263 lpg->dev = &pdev->dev;
1264 mutex_init(&lpg->lock);
1266 lpg->map = dev_get_regmap(pdev->dev.parent, NULL);
1268 return dev_err_probe(&pdev->dev, -ENXIO, "parent regmap unavailable\n");
1270 ret = lpg_init_channels(lpg);
1274 ret = lpg_parse_dtest(lpg);
1278 ret = lpg_init_triled(lpg);
1282 ret = lpg_init_lut(lpg);
1286 for_each_available_child_of_node(pdev->dev.of_node, np) {
1287 ret = lpg_add_led(lpg, np);
1292 for (i = 0; i < lpg->num_channels; i++)
1293 lpg_apply_dtest(&lpg->channels[i]);
1295 return lpg_add_pwm(lpg);
1298 static int lpg_remove(struct platform_device *pdev)
1300 struct lpg *lpg = platform_get_drvdata(pdev);
1302 pwmchip_remove(&lpg->pwm);
1307 static const struct lpg_data pm8916_pwm_data = {
1309 .channels = (const struct lpg_channel_data[]) {
1314 static const struct lpg_data pm8941_lpg_data = {
1318 .triled_base = 0xd000,
1319 .triled_has_atc_ctl = true,
1320 .triled_has_src_sel = true,
1323 .channels = (const struct lpg_channel_data[]) {
1328 { .base = 0xb500, .triled_mask = BIT(5) },
1329 { .base = 0xb600, .triled_mask = BIT(6) },
1330 { .base = 0xb700, .triled_mask = BIT(7) },
1335 static const struct lpg_data pm8994_lpg_data = {
1340 .channels = (const struct lpg_channel_data[]) {
1350 static const struct lpg_data pmi8994_lpg_data = {
1354 .triled_base = 0xd000,
1355 .triled_has_atc_ctl = true,
1356 .triled_has_src_sel = true,
1359 .channels = (const struct lpg_channel_data[]) {
1360 { .base = 0xb100, .triled_mask = BIT(5) },
1361 { .base = 0xb200, .triled_mask = BIT(6) },
1362 { .base = 0xb300, .triled_mask = BIT(7) },
1367 static const struct lpg_data pmi8998_lpg_data = {
1371 .triled_base = 0xd000,
1374 .channels = (const struct lpg_channel_data[]) {
1377 { .base = 0xb300, .triled_mask = BIT(5) },
1378 { .base = 0xb400, .triled_mask = BIT(6) },
1379 { .base = 0xb500, .triled_mask = BIT(7) },
1384 static const struct lpg_data pm8150b_lpg_data = {
1388 .triled_base = 0xd000,
1391 .channels = (const struct lpg_channel_data[]) {
1392 { .base = 0xb100, .triled_mask = BIT(7) },
1393 { .base = 0xb200, .triled_mask = BIT(6) },
1397 static const struct lpg_data pm8150l_lpg_data = {
1401 .triled_base = 0xd000,
1404 .channels = (const struct lpg_channel_data[]) {
1405 { .base = 0xb100, .triled_mask = BIT(7) },
1406 { .base = 0xb200, .triled_mask = BIT(6) },
1407 { .base = 0xb300, .triled_mask = BIT(5) },
1414 static const struct lpg_data pm8350c_pwm_data = {
1415 .triled_base = 0xef00,
1418 .channels = (const struct lpg_channel_data[]) {
1419 { .base = 0xe800, .triled_mask = BIT(7) },
1420 { .base = 0xe900, .triled_mask = BIT(6) },
1421 { .base = 0xea00, .triled_mask = BIT(5) },
1426 static const struct of_device_id lpg_of_table[] = {
1427 { .compatible = "qcom,pm8150b-lpg", .data = &pm8150b_lpg_data },
1428 { .compatible = "qcom,pm8150l-lpg", .data = &pm8150l_lpg_data },
1429 { .compatible = "qcom,pm8350c-pwm", .data = &pm8350c_pwm_data },
1430 { .compatible = "qcom,pm8916-pwm", .data = &pm8916_pwm_data },
1431 { .compatible = "qcom,pm8941-lpg", .data = &pm8941_lpg_data },
1432 { .compatible = "qcom,pm8994-lpg", .data = &pm8994_lpg_data },
1433 { .compatible = "qcom,pmi8994-lpg", .data = &pmi8994_lpg_data },
1434 { .compatible = "qcom,pmi8998-lpg", .data = &pmi8998_lpg_data },
1435 { .compatible = "qcom,pmc8180c-lpg", .data = &pm8150l_lpg_data },
1438 MODULE_DEVICE_TABLE(of, lpg_of_table);
1440 static struct platform_driver lpg_driver = {
1442 .remove = lpg_remove,
1444 .name = "qcom-spmi-lpg",
1445 .of_match_table = lpg_of_table,
1448 module_platform_driver(lpg_driver);
1450 MODULE_DESCRIPTION("Qualcomm LPG LED driver");
1451 MODULE_LICENSE("GPL v2");