drivers/isdn/hisax/w6692.c

   1 /* $Id: w6692.c,v 1.18.2.4 2004/02/11 13:21:34 keil Exp $
   2  *
   3  * Winbond W6692 specific routines
   4  *
   5  * Author       Petr Novak
   6  * Copyright    by Petr Novak        <petr.novak@i.cz>
   7  *
   8  * This software may be used and distributed according to the terms
   9  * of the GNU General Public License, incorporated herein by reference.
  10  *
  11  */
  12
  13 #include <linux/init.h>
  14 #include "hisax.h"
  15 #include "w6692.h"
  16 #include "isdnl1.h"
  17 #include <linux/interrupt.h>
  18 #include <linux/pci.h>
  19 #include <linux/slab.h>
  20
  21 /* table entry in the PCI devices list */
  22 typedef struct {
  23         int vendor_id;
  24         int device_id;
  25         char *vendor_name;
  26         char *card_name;
  27 } PCI_ENTRY;
  28
  29 static const PCI_ENTRY id_list[] =
  30 {
  31         {PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692, "Winbond", "W6692"},
  32         {PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH, "Dynalink/AsusCom", "IS64PH"},
  33         {0, 0, "U.S.Robotics", "ISDN PCI Card TA"}
  34 };
  35
  36 #define W6692_SV_USR   0x16ec
  37 #define W6692_SD_USR   0x3409
  38 #define W6692_WINBOND  0
  39 #define W6692_DYNALINK 1
  40 #define W6692_USR      2
  41
  42 static const char *w6692_revision = "$Revision: 1.18.2.4 $";
  43
  44 #define DBUSY_TIMER_VALUE 80
  45
  46 static char *W6692Ver[] =
  47 {"W6692 V00", "W6692 V01", "W6692 V10",
  48  "W6692 V11"};
  49
  50 static void
  51 W6692Version(struct IsdnCardState *cs, char *s)
  52 {
  53         int val;
  54
  55         val = cs->readW6692(cs, W_D_RBCH);
  56         printk(KERN_INFO "%s Winbond W6692 version (%x): %s\n", s, val, W6692Ver[(val >> 6) & 3]);
  57 }
  58
  59 static void
  60 ph_command(struct IsdnCardState *cs, unsigned int command)
  61 {
  62         if (cs->debug & L1_DEB_ISAC)
  63                 debugl1(cs, "ph_command %x", command);
  64         cs->writeisac(cs, W_CIX, command);
  65 }
  66
  67
  68 static void
  69 W6692_new_ph(struct IsdnCardState *cs)
  70 {
  71         switch (cs->dc.w6692.ph_state) {
  72         case (W_L1CMD_RST):
  73                 ph_command(cs, W_L1CMD_DRC);
  74                 l1_msg(cs, HW_RESET | INDICATION, NULL);
  75                 /* fallthru */
  76         case (W_L1IND_CD):
  77                 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
  78                 break;
  79         case (W_L1IND_DRD):
  80                 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
  81                 break;
  82         case (W_L1IND_CE):
  83                 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
  84                 break;
  85         case (W_L1IND_LD):
  86                 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
  87                 break;
  88         case (W_L1IND_ARD):
  89                 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
  90                 break;
  91         case (W_L1IND_AI8):
  92                 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
  93                 break;
  94         case (W_L1IND_AI10):
  95                 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
  96                 break;
  97         default:
  98                 break;
  99         }
 100 }
 101
 102 static void
 103 W6692_bh(struct work_struct *work)
 104 {
 105         struct IsdnCardState *cs =
 106                 container_of(work, struct IsdnCardState, tqueue);
 107         struct PStack *stptr;
 108
 109         if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
 110                 if (cs->debug)
 111                         debugl1(cs, "D-Channel Busy cleared");
 112                 stptr = cs->stlist;
 113                 while (stptr != NULL) {
 114                         stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL);
 115                         stptr = stptr->next;
 116                 }
 117         }
 118         if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
 119                 W6692_new_ph(cs);
 120         if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
 121                 DChannel_proc_rcv(cs);
 122         if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
 123                 DChannel_proc_xmt(cs);
 124 /*
 125   if (test_and_clear_bit(D_RX_MON1, &cs->event))
 126   arcofi_fsm(cs, ARCOFI_RX_END, NULL);
 127   if (test_and_clear_bit(D_TX_MON1, &cs->event))
 128   arcofi_fsm(cs, ARCOFI_TX_END, NULL);
 129 */
 130 }
 131
 132 static void
 133 W6692_empty_fifo(struct IsdnCardState *cs, int count)
 134 {
 135         u_char *ptr;
 136
 137         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 138                 debugl1(cs, "W6692_empty_fifo");
 139
 140         if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
 141                 if (cs->debug & L1_DEB_WARN)
 142                         debugl1(cs, "W6692_empty_fifo overrun %d",
 143                                 cs->rcvidx + count);
 144                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 145                 cs->rcvidx = 0;
 146                 return;
 147         }
 148         ptr = cs->rcvbuf + cs->rcvidx;
 149         cs->rcvidx += count;
 150         cs->readW6692fifo(cs, ptr, count);
 151         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK);
 152         if (cs->debug & L1_DEB_ISAC_FIFO) {
 153                 char *t = cs->dlog;
 154
 155                 t += sprintf(t, "W6692_empty_fifo cnt %d", count);
 156                 QuickHex(t, ptr, count);
 157                 debugl1(cs, "%s", cs->dlog);
 158         }
 159 }
 160
 161 static void
 162 W6692_fill_fifo(struct IsdnCardState *cs)
 163 {
 164         int count, more;
 165         u_char *ptr;
 166
 167         if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
 168                 debugl1(cs, "W6692_fill_fifo");
 169
 170         if (!cs->tx_skb)
 171                 return;
 172
 173         count = cs->tx_skb->len;
 174         if (count <= 0)
 175                 return;
 176
 177         more = 0;
 178         if (count > W_D_FIFO_THRESH) {
 179                 more = !0;
 180                 count = W_D_FIFO_THRESH;
 181         }
 182         ptr = cs->tx_skb->data;
 183         skb_pull(cs->tx_skb, count);
 184         cs->tx_cnt += count;
 185         cs->writeW6692fifo(cs, ptr, count);
 186         cs->writeW6692(cs, W_D_CMDR, more ? W_D_CMDR_XMS : (W_D_CMDR_XMS | W_D_CMDR_XME));
 187         if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 188                 debugl1(cs, "W6692_fill_fifo dbusytimer running");
 189                 del_timer(&cs->dbusytimer);
 190         }
 191         cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
 192         add_timer(&cs->dbusytimer);
 193         if (cs->debug & L1_DEB_ISAC_FIFO) {
 194                 char *t = cs->dlog;
 195
 196                 t += sprintf(t, "W6692_fill_fifo cnt %d", count);
 197                 QuickHex(t, ptr, count);
 198                 debugl1(cs, "%s", cs->dlog);
 199         }
 200 }
 201
 202 static void
 203 W6692B_empty_fifo(struct BCState *bcs, int count)
 204 {
 205         u_char *ptr;
 206         struct IsdnCardState *cs = bcs->cs;
 207
 208         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 209                 debugl1(cs, "W6692B_empty_fifo");
 210
 211         if (bcs->hw.w6692.rcvidx + count > HSCX_BUFMAX) {
 212                 if (cs->debug & L1_DEB_WARN)
 213                         debugl1(cs, "W6692B_empty_fifo: incoming packet too large");
 214                 cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 215                 bcs->hw.w6692.rcvidx = 0;
 216                 return;
 217         }
 218         ptr = bcs->hw.w6692.rcvbuf + bcs->hw.w6692.rcvidx;
 219         bcs->hw.w6692.rcvidx += count;
 220         READW6692BFIFO(cs, bcs->channel, ptr, count);
 221         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
 222         if (cs->debug & L1_DEB_HSCX_FIFO) {
 223                 char *t = bcs->blog;
 224
 225                 t += sprintf(t, "W6692B_empty_fifo %c cnt %d",
 226                              bcs->channel + '1', count);
 227                 QuickHex(t, ptr, count);
 228                 debugl1(cs, "%s", bcs->blog);
 229         }
 230 }
 231
 232 static void
 233 W6692B_fill_fifo(struct BCState *bcs)
 234 {
 235         struct IsdnCardState *cs = bcs->cs;
 236         int more, count;
 237         u_char *ptr;
 238
 239         if (!bcs->tx_skb)
 240                 return;
 241         if (bcs->tx_skb->len <= 0)
 242                 return;
 243
 244         more = (bcs->mode == L1_MODE_TRANS) ? 1 : 0;
 245         if (bcs->tx_skb->len > W_B_FIFO_THRESH) {
 246                 more = 1;
 247                 count = W_B_FIFO_THRESH;
 248         } else
 249                 count = bcs->tx_skb->len;
 250
 251         if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
 252                 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " " : " last "), count);
 253
 254         ptr = bcs->tx_skb->data;
 255         skb_pull(bcs->tx_skb, count);
 256         bcs->tx_cnt -= count;
 257         bcs->hw.w6692.count += count;
 258         WRITEW6692BFIFO(cs, bcs->channel, ptr, count);
 259         cs->BC_Write_Reg(cs, bcs->channel, W_B_CMDR, W_B_CMDR_RACT | W_B_CMDR_XMS | (more ? 0 : W_B_CMDR_XME));
 260         if (cs->debug & L1_DEB_HSCX_FIFO) {
 261                 char *t = bcs->blog;
 262
 263                 t += sprintf(t, "W6692B_fill_fifo %c cnt %d",
 264                              bcs->channel + '1', count);
 265                 QuickHex(t, ptr, count);
 266                 debugl1(cs, "%s", bcs->blog);
 267         }
 268 }
 269
 270 static void
 271 W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
 272 {
 273         u_char val;
 274         u_char r;
 275         struct BCState *bcs;
 276         struct sk_buff *skb;
 277         int count;
 278
 279         bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs + 1);
 280         val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
 281         debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
 282
 283         if (!test_bit(BC_FLG_INIT, &bcs->Flag)) {
 284                 debugl1(cs, "W6692B not INIT yet");
 285                 return;
 286         }
 287         if (val & W_B_EXI_RME) {        /* RME */
 288                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 289                 if (r & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
 290                         if (cs->debug & L1_DEB_WARN)
 291                                 debugl1(cs, "W6692 B STAR %x", r);
 292                         if ((r & W_B_STAR_RDOV) && bcs->mode)
 293                                 if (cs->debug & L1_DEB_WARN)
 294                                         debugl1(cs, "W6692 B RDOV mode=%d",
 295                                                 bcs->mode);
 296                         if (r & W_B_STAR_CRCE)
 297                                 if (cs->debug & L1_DEB_WARN)
 298                                         debugl1(cs, "W6692 B CRC error");
 299                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 300                 } else {
 301                         count = cs->BC_Read_Reg(cs, bchan, W_B_RBCL) & (W_B_FIFO_THRESH - 1);
 302                         if (count == 0)
 303                                 count = W_B_FIFO_THRESH;
 304                         W6692B_empty_fifo(bcs, count);
 305                         if ((count = bcs->hw.w6692.rcvidx) > 0) {
 306                                 if (cs->debug & L1_DEB_HSCX_FIFO)
 307                                         debugl1(cs, "W6692 Bchan Frame %d", count);
 308                                 if (!(skb = dev_alloc_skb(count)))
 309                                         printk(KERN_WARNING "W6692: Bchan receive out of memory\n");
 310                                 else {
 311                                         skb_put_data(skb,
 312                                                      bcs->hw.w6692.rcvbuf,
 313                                                      count);
 314                                         skb_queue_tail(&bcs->rqueue, skb);
 315                                 }
 316                         }
 317                 }
 318                 bcs->hw.w6692.rcvidx = 0;
 319                 schedule_event(bcs, B_RCVBUFREADY);
 320         }
 321         if (val & W_B_EXI_RMR) {        /* RMR */
 322                 W6692B_empty_fifo(bcs, W_B_FIFO_THRESH);
 323                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 324                 if (r & W_B_STAR_RDOV) {
 325                         if (cs->debug & L1_DEB_WARN)
 326                                 debugl1(cs, "W6692 B RDOV(RMR) mode=%d", bcs->mode);
 327                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
 328                         if (bcs->mode != L1_MODE_TRANS)
 329                                 bcs->hw.w6692.rcvidx = 0;
 330                 }
 331                 if (bcs->mode == L1_MODE_TRANS) {
 332                         /* receive audio data */
 333                         if (!(skb = dev_alloc_skb(W_B_FIFO_THRESH)))
 334                                 printk(KERN_WARNING "HiSax: receive out of memory\n");
 335                         else {
 336                                 skb_put_data(skb, bcs->hw.w6692.rcvbuf,
 337                                              W_B_FIFO_THRESH);
 338                                 skb_queue_tail(&bcs->rqueue, skb);
 339                         }
 340                         bcs->hw.w6692.rcvidx = 0;
 341                         schedule_event(bcs, B_RCVBUFREADY);
 342                 }
 343         }
 344         if (val & W_B_EXI_XDUN) {       /* XDUN */
 345                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 346                 if (cs->debug & L1_DEB_WARN)
 347                         debugl1(cs, "W6692 B EXIR %x Lost TX", val);
 348                 if (bcs->mode == 1)
 349                         W6692B_fill_fifo(bcs);
 350                 else {
 351                         /* Here we lost an TX interrupt, so
 352                          * restart transmitting the whole frame.
 353                          */
 354                         if (bcs->tx_skb) {
 355                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 356                                 bcs->tx_cnt += bcs->hw.w6692.count;
 357                                 bcs->hw.w6692.count = 0;
 358                         }
 359                 }
 360                 return;
 361         }
 362         if (val & W_B_EXI_XFR) {        /* XFR */
 363                 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
 364                 if (r & W_B_STAR_XDOW) {
 365                         if (cs->debug & L1_DEB_WARN)
 366                                 debugl1(cs, "W6692 B STAR %x XDOW", r);
 367                         cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
 368                         if (bcs->tx_skb && (bcs->mode != 1)) {
 369                                 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
 370                                 bcs->tx_cnt += bcs->hw.w6692.count;
 371                                 bcs->hw.w6692.count = 0;
 372                         }
 373                 }
 374                 if (bcs->tx_skb) {
 375                         if (bcs->tx_skb->len) {
 376                                 W6692B_fill_fifo(bcs);
 377                                 return;
 378                         } else {
 379                                 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
 380                                     (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
 381                                         u_long flags;
 382                                         spin_lock_irqsave(&bcs->aclock, flags);
 383                                         bcs->ackcnt += bcs->hw.w6692.count;
 384                                         spin_unlock_irqrestore(&bcs->aclock, flags);
 385                                         schedule_event(bcs, B_ACKPENDING);
 386                                 }
 387                                 dev_kfree_skb_irq(bcs->tx_skb);
 388                                 bcs->hw.w6692.count = 0;
 389                                 bcs->tx_skb = NULL;
 390                         }
 391                 }
 392                 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
 393                         bcs->hw.w6692.count = 0;
 394                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 395                         W6692B_fill_fifo(bcs);
 396                 } else {
 397                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 398                         schedule_event(bcs, B_XMTBUFREADY);
 399                 }
 400         }
 401 }
 402
 403 static irqreturn_t
 404 W6692_interrupt(int intno, void *dev_id)
 405 {
 406         struct IsdnCardState    *cs = dev_id;
 407         u_char                  val, exval, v1;
 408         struct sk_buff          *skb;
 409         u_int                   count;
 410         u_long                  flags;
 411         int                     icnt = 5;
 412
 413         spin_lock_irqsave(&cs->lock, flags);
 414         val = cs->readW6692(cs, W_ISTA);
 415         if (!val) {
 416                 spin_unlock_irqrestore(&cs->lock, flags);
 417                 return IRQ_NONE;
 418         }
 419 StartW6692:
 420         if (cs->debug & L1_DEB_ISAC)
 421                 debugl1(cs, "W6692 ISTA %x", val);
 422
 423         if (val & W_INT_D_RME) {        /* RME */
 424                 exval = cs->readW6692(cs, W_D_RSTA);
 425                 if (exval & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
 426                         if (exval & W_D_RSTA_RDOV)
 427                                 if (cs->debug & L1_DEB_WARN)
 428                                         debugl1(cs, "W6692 RDOV");
 429                         if (exval & W_D_RSTA_CRCE)
 430                                 if (cs->debug & L1_DEB_WARN)
 431                                         debugl1(cs, "W6692 D-channel CRC error");
 432                         if (exval & W_D_RSTA_RMB)
 433                                 if (cs->debug & L1_DEB_WARN)
 434                                         debugl1(cs, "W6692 D-channel ABORT");
 435                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
 436                 } else {
 437                         count = cs->readW6692(cs, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
 438                         if (count == 0)
 439                                 count = W_D_FIFO_THRESH;
 440                         W6692_empty_fifo(cs, count);
 441                         if ((count = cs->rcvidx) > 0) {
 442                                 cs->rcvidx = 0;
 443                                 if (!(skb = alloc_skb(count, GFP_ATOMIC)))
 444                                         printk(KERN_WARNING "HiSax: D receive out of memory\n");
 445                                 else {
 446                                         skb_put_data(skb, cs->rcvbuf, count);
 447                                         skb_queue_tail(&cs->rq, skb);
 448                                 }
 449                         }
 450                 }
 451                 cs->rcvidx = 0;
 452                 schedule_event(cs, D_RCVBUFREADY);
 453         }
 454         if (val & W_INT_D_RMR) {        /* RMR */
 455                 W6692_empty_fifo(cs, W_D_FIFO_THRESH);
 456         }
 457         if (val & W_INT_D_XFR) {        /* XFR */
 458                 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 459                         del_timer(&cs->dbusytimer);
 460                 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 461                         schedule_event(cs, D_CLEARBUSY);
 462                 if (cs->tx_skb) {
 463                         if (cs->tx_skb->len) {
 464                                 W6692_fill_fifo(cs);
 465                                 goto afterXFR;
 466                         } else {
 467                                 dev_kfree_skb_irq(cs->tx_skb);
 468                                 cs->tx_cnt = 0;
 469                                 cs->tx_skb = NULL;
 470                         }
 471                 }
 472                 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
 473                         cs->tx_cnt = 0;
 474                         W6692_fill_fifo(cs);
 475                 } else
 476                         schedule_event(cs, D_XMTBUFREADY);
 477         }
 478 afterXFR:
 479         if (val & (W_INT_XINT0 | W_INT_XINT1)) {        /* XINT0/1 - never */
 480                 if (cs->debug & L1_DEB_ISAC)
 481                         debugl1(cs, "W6692 spurious XINT!");
 482         }
 483         if (val & W_INT_D_EXI) {        /* EXI */
 484                 exval = cs->readW6692(cs, W_D_EXIR);
 485                 if (cs->debug & L1_DEB_WARN)
 486                         debugl1(cs, "W6692 D_EXIR %02x", exval);
 487                 if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {    /* Transmit underrun/collision */
 488                         debugl1(cs, "W6692 D-chan underrun/collision");
 489                         printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL\n");
 490                         if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 491                                 del_timer(&cs->dbusytimer);
 492                         if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 493                                 schedule_event(cs, D_CLEARBUSY);
 494                         if (cs->tx_skb) {       /* Restart frame */
 495                                 skb_push(cs->tx_skb, cs->tx_cnt);
 496                                 cs->tx_cnt = 0;
 497                                 W6692_fill_fifo(cs);
 498                         } else {
 499                                 printk(KERN_WARNING "HiSax: W6692 XDUN/XCOL no skb\n");
 500                                 debugl1(cs, "W6692 XDUN/XCOL no skb");
 501                                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);
 502                         }
 503                 }
 504                 if (exval & W_D_EXI_RDOV) {     /* RDOV */
 505                         debugl1(cs, "W6692 D-channel RDOV");
 506                         printk(KERN_WARNING "HiSax: W6692 D-RDOV\n");
 507                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST);
 508                 }
 509                 if (exval & W_D_EXI_TIN2) {     /* TIN2 - never */
 510                         debugl1(cs, "W6692 spurious TIN2 interrupt");
 511                 }
 512                 if (exval & W_D_EXI_MOC) {      /* MOC - not supported */
 513                         debugl1(cs, "W6692 spurious MOC interrupt");
 514                         v1 = cs->readW6692(cs, W_MOSR);
 515                         debugl1(cs, "W6692 MOSR %02x", v1);
 516                 }
 517                 if (exval & W_D_EXI_ISC) {      /* ISC - Level1 change */
 518                         v1 = cs->readW6692(cs, W_CIR);
 519                         if (cs->debug & L1_DEB_ISAC)
 520                                 debugl1(cs, "W6692 ISC CIR=0x%02X", v1);
 521                         if (v1 & W_CIR_ICC) {
 522                                 cs->dc.w6692.ph_state = v1 & W_CIR_COD_MASK;
 523                                 if (cs->debug & L1_DEB_ISAC)
 524                                         debugl1(cs, "ph_state_change %x", cs->dc.w6692.ph_state);
 525                                 schedule_event(cs, D_L1STATECHANGE);
 526                         }
 527                         if (v1 & W_CIR_SCC) {
 528                                 v1 = cs->readW6692(cs, W_SQR);
 529                                 debugl1(cs, "W6692 SCC SQR=0x%02X", v1);
 530                         }
 531                 }
 532                 if (exval & W_D_EXI_WEXP) {
 533                         debugl1(cs, "W6692 spurious WEXP interrupt!");
 534                 }
 535                 if (exval & W_D_EXI_TEXP) {
 536                         debugl1(cs, "W6692 spurious TEXP interrupt!");
 537                 }
 538         }
 539         if (val & W_INT_B1_EXI) {
 540                 debugl1(cs, "W6692 B channel 1 interrupt");
 541                 W6692B_interrupt(cs, 0);
 542         }
 543         if (val & W_INT_B2_EXI) {
 544                 debugl1(cs, "W6692 B channel 2 interrupt");
 545                 W6692B_interrupt(cs, 1);
 546         }
 547         val = cs->readW6692(cs, W_ISTA);
 548         if (val && icnt) {
 549                 icnt--;
 550                 goto StartW6692;
 551         }
 552         if (!icnt) {
 553                 printk(KERN_WARNING "W6692 IRQ LOOP\n");
 554                 cs->writeW6692(cs, W_IMASK, 0xff);
 555         }
 556         spin_unlock_irqrestore(&cs->lock, flags);
 557         return IRQ_HANDLED;
 558 }
 559
 560 static void
 561 W6692_l1hw(struct PStack *st, int pr, void *arg)
 562 {
 563         struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
 564         struct sk_buff *skb = arg;
 565         u_long flags;
 566         int val;
 567
 568         switch (pr) {
 569         case (PH_DATA | REQUEST):
 570                 if (cs->debug & DEB_DLOG_HEX)
 571                         LogFrame(cs, skb->data, skb->len);
 572                 if (cs->debug & DEB_DLOG_VERBOSE)
 573                         dlogframe(cs, skb, 0);
 574                 spin_lock_irqsave(&cs->lock, flags);
 575                 if (cs->tx_skb) {
 576                         skb_queue_tail(&cs->sq, skb);
 577 #ifdef L2FRAME_DEBUG            /* psa */
 578                         if (cs->debug & L1_DEB_LAPD)
 579                                 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
 580 #endif
 581                 } else {
 582                         cs->tx_skb = skb;
 583                         cs->tx_cnt = 0;
 584 #ifdef L2FRAME_DEBUG            /* psa */
 585                         if (cs->debug & L1_DEB_LAPD)
 586                                 Logl2Frame(cs, skb, "PH_DATA", 0);
 587 #endif
 588                         W6692_fill_fifo(cs);
 589                 }
 590                 spin_unlock_irqrestore(&cs->lock, flags);
 591                 break;
 592         case (PH_PULL | INDICATION):
 593                 spin_lock_irqsave(&cs->lock, flags);
 594                 if (cs->tx_skb) {
 595                         if (cs->debug & L1_DEB_WARN)
 596                                 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
 597                         skb_queue_tail(&cs->sq, skb);
 598                         spin_unlock_irqrestore(&cs->lock, flags);
 599                         break;
 600                 }
 601                 if (cs->debug & DEB_DLOG_HEX)
 602                         LogFrame(cs, skb->data, skb->len);
 603                 if (cs->debug & DEB_DLOG_VERBOSE)
 604                         dlogframe(cs, skb, 0);
 605                 cs->tx_skb = skb;
 606                 cs->tx_cnt = 0;
 607 #ifdef L2FRAME_DEBUG            /* psa */
 608                 if (cs->debug & L1_DEB_LAPD)
 609                         Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
 610 #endif
 611                 W6692_fill_fifo(cs);
 612                 spin_unlock_irqrestore(&cs->lock, flags);
 613                 break;
 614         case (PH_PULL | REQUEST):
 615 #ifdef L2FRAME_DEBUG            /* psa */
 616                 if (cs->debug & L1_DEB_LAPD)
 617                         debugl1(cs, "-> PH_REQUEST_PULL");
 618 #endif
 619                 if (!cs->tx_skb) {
 620                         test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 621                         st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 622                 } else
 623                         test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 624                 break;
 625         case (HW_RESET | REQUEST):
 626                 spin_lock_irqsave(&cs->lock, flags);
 627                 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
 628                         ph_command(cs, W_L1CMD_ECK);
 629                         spin_unlock_irqrestore(&cs->lock, flags);
 630                 } else {
 631                         ph_command(cs, W_L1CMD_RST);
 632                         cs->dc.w6692.ph_state = W_L1CMD_RST;
 633                         spin_unlock_irqrestore(&cs->lock, flags);
 634                         W6692_new_ph(cs);
 635                 }
 636                 break;
 637         case (HW_ENABLE | REQUEST):
 638                 spin_lock_irqsave(&cs->lock, flags);
 639                 ph_command(cs, W_L1CMD_ECK);
 640                 spin_unlock_irqrestore(&cs->lock, flags);
 641                 break;
 642         case (HW_INFO3 | REQUEST):
 643                 spin_lock_irqsave(&cs->lock, flags);
 644                 ph_command(cs, W_L1CMD_AR8);
 645                 spin_unlock_irqrestore(&cs->lock, flags);
 646                 break;
 647         case (HW_TESTLOOP | REQUEST):
 648                 val = 0;
 649                 if (1 & (long) arg)
 650                         val |= 0x0c;
 651                 if (2 & (long) arg)
 652                         val |= 0x3;
 653                 /* !!! not implemented yet */
 654                 break;
 655         case (HW_DEACTIVATE | RESPONSE):
 656                 skb_queue_purge(&cs->rq);
 657                 skb_queue_purge(&cs->sq);
 658                 if (cs->tx_skb) {
 659                         dev_kfree_skb_any(cs->tx_skb);
 660                         cs->tx_skb = NULL;
 661                 }
 662                 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
 663                         del_timer(&cs->dbusytimer);
 664                 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
 665                         schedule_event(cs, D_CLEARBUSY);
 666                 break;
 667         default:
 668                 if (cs->debug & L1_DEB_WARN)
 669                         debugl1(cs, "W6692_l1hw unknown %04x", pr);
 670                 break;
 671         }
 672 }
 673
 674 static void
 675 setstack_W6692(struct PStack *st, struct IsdnCardState *cs)
 676 {
 677         st->l1.l1hw = W6692_l1hw;
 678 }
 679
 680 static void
 681 DC_Close_W6692(struct IsdnCardState *cs)
 682 {
 683 }
 684
 685 static void
 686 dbusy_timer_handler(struct timer_list *t)
 687 {
 688         struct IsdnCardState *cs = from_timer(cs, t, dbusytimer);
 689         struct PStack *stptr;
 690         int rbch, star;
 691         u_long flags;
 692
 693         spin_lock_irqsave(&cs->lock, flags);
 694         if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
 695                 rbch = cs->readW6692(cs, W_D_RBCH);
 696                 star = cs->readW6692(cs, W_D_STAR);
 697                 if (cs->debug)
 698                         debugl1(cs, "D-Channel Busy D_RBCH %02x D_STAR %02x",
 699                                 rbch, star);
 700                 if (star & W_D_STAR_XBZ) {      /* D-Channel Busy */
 701                         test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
 702                         stptr = cs->stlist;
 703                         while (stptr != NULL) {
 704                                 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL);
 705                                 stptr = stptr->next;
 706                         }
 707                 } else {
 708                         /* discard frame; reset transceiver */
 709                         test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
 710                         if (cs->tx_skb) {
 711                                 dev_kfree_skb_any(cs->tx_skb);
 712                                 cs->tx_cnt = 0;
 713                                 cs->tx_skb = NULL;
 714                         } else {
 715                                 printk(KERN_WARNING "HiSax: W6692 D-Channel Busy no skb\n");
 716                                 debugl1(cs, "D-Channel Busy no skb");
 717                         }
 718                         cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_XRST);    /* Transmitter reset */
 719                         spin_unlock_irqrestore(&cs->lock, flags);
 720                         cs->irq_func(cs->irq, cs);
 721                         return;
 722                 }
 723         }
 724         spin_unlock_irqrestore(&cs->lock, flags);
 725 }
 726
 727 static void
 728 W6692Bmode(struct BCState *bcs, int mode, int bchan)
 729 {
 730         struct IsdnCardState *cs = bcs->cs;
 731
 732         if (cs->debug & L1_DEB_HSCX)
 733                 debugl1(cs, "w6692 %c mode %d ichan %d",
 734                         '1' + bchan, mode, bchan);
 735         bcs->mode = mode;
 736         bcs->channel = bchan;
 737         bcs->hw.w6692.bchan = bchan;
 738
 739         switch (mode) {
 740         case (L1_MODE_NULL):
 741                 cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
 742                 break;
 743         case (L1_MODE_TRANS):
 744                 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
 745                 break;
 746         case (L1_MODE_HDLC):
 747                 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
 748                 cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
 749                 cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
 750                 break;
 751         }
 752         if (mode)
 753                 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
 754                                  W_B_CMDR_RACT | W_B_CMDR_XRST);
 755         cs->BC_Write_Reg(cs, bchan, W_B_EXIM, 0x00);
 756 }
 757
 758 static void
 759 W6692_l2l1(struct PStack *st, int pr, void *arg)
 760 {
 761         struct sk_buff *skb = arg;
 762         struct BCState *bcs = st->l1.bcs;
 763         u_long flags;
 764
 765         switch (pr) {
 766         case (PH_DATA | REQUEST):
 767                 spin_lock_irqsave(&bcs->cs->lock, flags);
 768                 if (bcs->tx_skb) {
 769                         skb_queue_tail(&bcs->squeue, skb);
 770                 } else {
 771                         bcs->tx_skb = skb;
 772                         test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 773                         bcs->hw.w6692.count = 0;
 774                         bcs->cs->BC_Send_Data(bcs);
 775                 }
 776                 spin_unlock_irqrestore(&bcs->cs->lock, flags);
 777                 break;
 778         case (PH_PULL | INDICATION):
 779                 if (bcs->tx_skb) {
 780                         printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
 781                         break;
 782                 }
 783                 spin_lock_irqsave(&bcs->cs->lock, flags);
 784                 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
 785                 bcs->tx_skb = skb;
 786                 bcs->hw.w6692.count = 0;
 787                 bcs->cs->BC_Send_Data(bcs);
 788                 spin_unlock_irqrestore(&bcs->cs->lock, flags);
 789                 break;
 790         case (PH_PULL | REQUEST):
 791                 if (!bcs->tx_skb) {
 792                         test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 793                         st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
 794                 } else
 795                         test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
 796                 break;
 797         case (PH_ACTIVATE | REQUEST):
 798                 spin_lock_irqsave(&bcs->cs->lock, flags);
 799                 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
 800                 W6692Bmode(bcs, st->l1.mode, st->l1.bc);
 801                 spin_unlock_irqrestore(&bcs->cs->lock, flags);
 802                 l1_msg_b(st, pr, arg);
 803                 break;
 804         case (PH_DEACTIVATE | REQUEST):
 805                 l1_msg_b(st, pr, arg);
 806                 break;
 807         case (PH_DEACTIVATE | CONFIRM):
 808                 spin_lock_irqsave(&bcs->cs->lock, flags);
 809                 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
 810                 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 811                 W6692Bmode(bcs, 0, st->l1.bc);
 812                 spin_unlock_irqrestore(&bcs->cs->lock, flags);
 813                 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
 814                 break;
 815         }
 816 }
 817
 818 static void
 819 close_w6692state(struct BCState *bcs)
 820 {
 821         W6692Bmode(bcs, 0, bcs->channel);
 822         if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
 823                 kfree(bcs->hw.w6692.rcvbuf);
 824                 bcs->hw.w6692.rcvbuf = NULL;
 825                 kfree(bcs->blog);
 826                 bcs->blog = NULL;
 827                 skb_queue_purge(&bcs->rqueue);
 828                 skb_queue_purge(&bcs->squeue);
 829                 if (bcs->tx_skb) {
 830                         dev_kfree_skb_any(bcs->tx_skb);
 831                         bcs->tx_skb = NULL;
 832                         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 833                 }
 834         }
 835 }
 836
 837 static int
 838 open_w6692state(struct IsdnCardState *cs, struct BCState *bcs)
 839 {
 840         if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
 841                 if (!(bcs->hw.w6692.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
 842                         printk(KERN_WARNING
 843                                "HiSax: No memory for w6692.rcvbuf\n");
 844                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 845                         return (1);
 846                 }
 847                 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
 848                         printk(KERN_WARNING
 849                                "HiSax: No memory for bcs->blog\n");
 850                         test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
 851                         kfree(bcs->hw.w6692.rcvbuf);
 852                         bcs->hw.w6692.rcvbuf = NULL;
 853                         return (2);
 854                 }
 855                 skb_queue_head_init(&bcs->rqueue);
 856                 skb_queue_head_init(&bcs->squeue);
 857         }
 858         bcs->tx_skb = NULL;
 859         test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
 860         bcs->event = 0;
 861         bcs->hw.w6692.rcvidx = 0;
 862         bcs->tx_cnt = 0;
 863         return (0);
 864 }
 865
 866 static int
 867 setstack_w6692(struct PStack *st, struct BCState *bcs)
 868 {
 869         bcs->channel = st->l1.bc;
 870         if (open_w6692state(st->l1.hardware, bcs))
 871                 return (-1);
 872         st->l1.bcs = bcs;
 873         st->l2.l2l1 = W6692_l2l1;
 874         setstack_manager(st);
 875         bcs->st = st;
 876         setstack_l1_B(st);
 877         return (0);
 878 }
 879
 880 static void resetW6692(struct IsdnCardState *cs)
 881 {
 882         cs->writeW6692(cs, W_D_CTL, W_D_CTL_SRST);
 883         mdelay(10);
 884         cs->writeW6692(cs, W_D_CTL, 0x00);
 885         mdelay(10);
 886         cs->writeW6692(cs, W_IMASK, 0xff);
 887         cs->writeW6692(cs, W_D_SAM, 0xff);
 888         cs->writeW6692(cs, W_D_TAM, 0xff);
 889         cs->writeW6692(cs, W_D_EXIM, 0x00);
 890         cs->writeW6692(cs, W_D_MODE, W_D_MODE_RACT);
 891         cs->writeW6692(cs, W_IMASK, 0x18);
 892         if (cs->subtyp == W6692_USR) {
 893                 /* seems that USR implemented some power control features
 894                  * Pin 79 is connected to the oscilator circuit so we
 895                  * have to handle it here
 896                  */
 897                 cs->writeW6692(cs, W_PCTL, 0x80);
 898                 cs->writeW6692(cs, W_XDATA, 0x00);
 899         }
 900 }
 901
 902 static void initW6692(struct IsdnCardState *cs, int part)
 903 {
 904         if (part & 1) {
 905                 cs->setstack_d = setstack_W6692;
 906                 cs->DC_Close = DC_Close_W6692;
 907                 timer_setup(&cs->dbusytimer, dbusy_timer_handler, 0);
 908                 resetW6692(cs);
 909                 ph_command(cs, W_L1CMD_RST);
 910                 cs->dc.w6692.ph_state = W_L1CMD_RST;
 911                 W6692_new_ph(cs);
 912                 ph_command(cs, W_L1CMD_ECK);
 913
 914                 cs->bcs[0].BC_SetStack = setstack_w6692;
 915                 cs->bcs[1].BC_SetStack = setstack_w6692;
 916                 cs->bcs[0].BC_Close = close_w6692state;
 917                 cs->bcs[1].BC_Close = close_w6692state;
 918                 W6692Bmode(cs->bcs, 0, 0);
 919                 W6692Bmode(cs->bcs + 1, 0, 0);
 920         }
 921         if (part & 2) {
 922                 /* Reenable all IRQ */
 923                 cs->writeW6692(cs, W_IMASK, 0x18);
 924                 cs->writeW6692(cs, W_D_EXIM, 0x00);
 925                 cs->BC_Write_Reg(cs, 0, W_B_EXIM, 0x00);
 926                 cs->BC_Write_Reg(cs, 1, W_B_EXIM, 0x00);
 927                 /* Reset D-chan receiver and transmitter */
 928                 cs->writeW6692(cs, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
 929         }
 930 }
 931
 932 /* Interface functions */
 933
 934 static u_char
 935 ReadW6692(struct IsdnCardState *cs, u_char offset)
 936 {
 937         return (inb(cs->hw.w6692.iobase + offset));
 938 }
 939
 940 static void
 941 WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
 942 {
 943         outb(value, cs->hw.w6692.iobase + offset);
 944 }
 945
 946 static void
 947 ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
 948 {
 949         insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
 950 }
 951
 952 static void
 953 WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
 954 {
 955         outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
 956 }
 957
 958 static u_char
 959 ReadW6692B(struct IsdnCardState *cs, int bchan, u_char offset)
 960 {
 961         return (inb(cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset));
 962 }
 963
 964 static void
 965 WriteW6692B(struct IsdnCardState *cs, int bchan, u_char offset, u_char value)
 966 {
 967         outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset);
 968 }
 969
 970 static int
 971 w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
 972 {
 973         switch (mt) {
 974         case CARD_RESET:
 975                 resetW6692(cs);
 976                 return (0);
 977         case CARD_RELEASE:
 978                 cs->writeW6692(cs, W_IMASK, 0xff);
 979                 release_region(cs->hw.w6692.iobase, 256);
 980                 if (cs->subtyp == W6692_USR) {
 981                         cs->writeW6692(cs, W_XDATA, 0x04);
 982                 }
 983                 return (0);
 984         case CARD_INIT:
 985                 initW6692(cs, 3);
 986                 return (0);
 987         case CARD_TEST:
 988                 return (0);
 989         }
 990         return (0);
 991 }
 992
 993 static int id_idx;
 994
 995 static struct pci_dev *dev_w6692 = NULL;
 996
 997 int setup_w6692(struct IsdnCard *card)
 998 {
 999         struct IsdnCardState *cs = card->cs;
1000         char tmp[64];
1001         u_char found = 0;
1002         u_char pci_irq = 0;
1003         u_int pci_ioaddr = 0;
1004
1005         strcpy(tmp, w6692_revision);
1006         printk(KERN_INFO "HiSax: W6692 driver Rev. %s\n", HiSax_getrev(tmp));
1007         if (cs->typ != ISDN_CTYPE_W6692)
1008                 return (0);
1009
1010         while (id_list[id_idx].vendor_id) {
1011                 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id,
1012                                                   id_list[id_idx].device_id,
1013                                                   dev_w6692);
1014                 if (dev_w6692) {
1015                         if (pci_enable_device(dev_w6692))
1016                                 continue;
1017                         cs->subtyp = id_idx;
1018                         break;
1019                 }
1020                 id_idx++;
1021         }
1022         if (dev_w6692) {
1023                 found = 1;
1024                 pci_irq = dev_w6692->irq;
1025                 /* I think address 0 is allways the configuration area */
1026                 /* and address 1 is the real IO space KKe 03.09.99 */
1027                 pci_ioaddr = pci_resource_start(dev_w6692, 1);
1028                 /* USR ISDN PCI card TA need some special handling */
1029                 if (cs->subtyp == W6692_WINBOND) {
1030                         if ((W6692_SV_USR == dev_w6692->subsystem_vendor) &&
1031                             (W6692_SD_USR == dev_w6692->subsystem_device)) {
1032                                 cs->subtyp = W6692_USR;
1033                         }
1034                 }
1035         }
1036         if (!found) {
1037                 printk(KERN_WARNING "W6692: No PCI card found\n");
1038                 return (0);
1039         }
1040         cs->irq = pci_irq;
1041         if (!cs->irq) {
1042                 printk(KERN_WARNING "W6692: No IRQ for PCI card found\n");
1043                 return (0);
1044         }
1045         if (!pci_ioaddr) {
1046                 printk(KERN_WARNING "W6692: NO I/O Base Address found\n");
1047                 return (0);
1048         }
1049         cs->hw.w6692.iobase = pci_ioaddr;
1050         printk(KERN_INFO "Found: %s %s, I/O base: 0x%x, irq: %d\n",
1051                id_list[cs->subtyp].vendor_name, id_list[cs->subtyp].card_name,
1052                pci_ioaddr, pci_irq);
1053         if (!request_region(cs->hw.w6692.iobase, 256, id_list[cs->subtyp].card_name)) {
1054                 printk(KERN_WARNING
1055                        "HiSax: %s I/O ports %x-%x already in use\n",
1056                        id_list[cs->subtyp].card_name,
1057                        cs->hw.w6692.iobase,
1058                        cs->hw.w6692.iobase + 255);
1059                 return (0);
1060         }
1061
1062         printk(KERN_INFO
1063                "HiSax: %s config irq:%d I/O:%x\n",
1064                id_list[cs->subtyp].card_name, cs->irq,
1065                cs->hw.w6692.iobase);
1066
1067         INIT_WORK(&cs->tqueue, W6692_bh);
1068         cs->readW6692 = &ReadW6692;
1069         cs->writeW6692 = &WriteW6692;
1070         cs->readisacfifo = &ReadISACfifo;
1071         cs->writeisacfifo = &WriteISACfifo;
1072         cs->BC_Read_Reg = &ReadW6692B;
1073         cs->BC_Write_Reg = &WriteW6692B;
1074         cs->BC_Send_Data = &W6692B_fill_fifo;
1075         cs->cardmsg = &w6692_card_msg;
1076         cs->irq_func = &W6692_interrupt;
1077         cs->irq_flags |= IRQF_SHARED;
1078         W6692Version(cs, "W6692:");
1079         printk(KERN_INFO "W6692 ISTA=0x%X\n", ReadW6692(cs, W_ISTA));
1080         printk(KERN_INFO "W6692 IMASK=0x%X\n", ReadW6692(cs, W_IMASK));
1081         printk(KERN_INFO "W6692 D_EXIR=0x%X\n", ReadW6692(cs, W_D_EXIR));
1082         printk(KERN_INFO "W6692 D_EXIM=0x%X\n", ReadW6692(cs, W_D_EXIM));
1083         printk(KERN_INFO "W6692 D_RSTA=0x%X\n", ReadW6692(cs, W_D_RSTA));
1084         return (1);
1085 }