GNU Linux-libre 6.9.1-gnu
[releases.git] / drivers / isdn / hardware / mISDN / avmfritz.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * avm_fritz.c    low level stuff for AVM FRITZ!CARD PCI ISDN cards
4  *                Thanks to AVM, Berlin for informations
5  *
6  * Author       Karsten Keil <keil@isdn4linux.de>
7  *
8  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
9  */
10 #include <linux/interrupt.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/delay.h>
14 #include <linux/mISDNhw.h>
15 #include <linux/slab.h>
16 #include <asm/unaligned.h>
17 #include "ipac.h"
18
19
20 #define AVMFRITZ_REV    "2.3"
21
22 static int AVM_cnt;
23 static int debug;
24
25 enum {
26         AVM_FRITZ_PCI,
27         AVM_FRITZ_PCIV2,
28 };
29
30 #define HDLC_FIFO               0x0
31 #define HDLC_STATUS             0x4
32 #define CHIP_WINDOW             0x10
33
34 #define CHIP_INDEX              0x4
35 #define AVM_HDLC_1              0x00
36 #define AVM_HDLC_2              0x01
37 #define AVM_ISAC_FIFO           0x02
38 #define AVM_ISAC_REG_LOW        0x04
39 #define AVM_ISAC_REG_HIGH       0x06
40
41 #define AVM_STATUS0_IRQ_ISAC    0x01
42 #define AVM_STATUS0_IRQ_HDLC    0x02
43 #define AVM_STATUS0_IRQ_TIMER   0x04
44 #define AVM_STATUS0_IRQ_MASK    0x07
45
46 #define AVM_STATUS0_RESET       0x01
47 #define AVM_STATUS0_DIS_TIMER   0x02
48 #define AVM_STATUS0_RES_TIMER   0x04
49 #define AVM_STATUS0_ENA_IRQ     0x08
50 #define AVM_STATUS0_TESTBIT     0x10
51
52 #define AVM_STATUS1_INT_SEL     0x0f
53 #define AVM_STATUS1_ENA_IOM     0x80
54
55 #define HDLC_MODE_ITF_FLG       0x01
56 #define HDLC_MODE_TRANS         0x02
57 #define HDLC_MODE_CCR_7         0x04
58 #define HDLC_MODE_CCR_16        0x08
59 #define HDLC_FIFO_SIZE_128      0x20
60 #define HDLC_MODE_TESTLOOP      0x80
61
62 #define HDLC_INT_XPR            0x80
63 #define HDLC_INT_XDU            0x40
64 #define HDLC_INT_RPR            0x20
65 #define HDLC_INT_MASK           0xE0
66
67 #define HDLC_STAT_RME           0x01
68 #define HDLC_STAT_RDO           0x10
69 #define HDLC_STAT_CRCVFRRAB     0x0E
70 #define HDLC_STAT_CRCVFR        0x06
71 #define HDLC_STAT_RML_MASK_V1   0x3f00
72 #define HDLC_STAT_RML_MASK_V2   0x7f00
73
74 #define HDLC_CMD_XRS            0x80
75 #define HDLC_CMD_XME            0x01
76 #define HDLC_CMD_RRS            0x20
77 #define HDLC_CMD_XML_MASK       0x3f00
78
79 #define HDLC_FIFO_SIZE_V1       32
80 #define HDLC_FIFO_SIZE_V2       128
81
82 /* Fritz PCI v2.0 */
83
84 #define AVM_HDLC_FIFO_1         0x10
85 #define AVM_HDLC_FIFO_2         0x18
86
87 #define AVM_HDLC_STATUS_1       0x14
88 #define AVM_HDLC_STATUS_2       0x1c
89
90 #define AVM_ISACX_INDEX         0x04
91 #define AVM_ISACX_DATA          0x08
92
93 /* data struct */
94 #define LOG_SIZE                63
95
96 struct hdlc_stat_reg {
97 #ifdef __BIG_ENDIAN
98         u8 fill;
99         u8 mode;
100         u8 xml;
101         u8 cmd;
102 #else
103         u8 cmd;
104         u8 xml;
105         u8 mode;
106         u8 fill;
107 #endif
108 } __attribute__((packed));
109
110 struct hdlc_hw {
111         union {
112                 u32 ctrl;
113                 struct hdlc_stat_reg sr;
114         } ctrl;
115         u32 stat;
116 };
117
118 struct fritzcard {
119         struct list_head        list;
120         struct pci_dev          *pdev;
121         char                    name[MISDN_MAX_IDLEN];
122         u8                      type;
123         u8                      ctrlreg;
124         u16                     irq;
125         u32                     irqcnt;
126         u32                     addr;
127         spinlock_t              lock; /* hw lock */
128         struct isac_hw          isac;
129         struct hdlc_hw          hdlc[2];
130         struct bchannel         bch[2];
131         char                    log[LOG_SIZE + 1];
132 };
133
134 static LIST_HEAD(Cards);
135 static DEFINE_RWLOCK(card_lock); /* protect Cards */
136
137 static void
138 _set_debug(struct fritzcard *card)
139 {
140         card->isac.dch.debug = debug;
141         card->bch[0].debug = debug;
142         card->bch[1].debug = debug;
143 }
144
145 static int
146 set_debug(const char *val, const struct kernel_param *kp)
147 {
148         int ret;
149         struct fritzcard *card;
150
151         ret = param_set_uint(val, kp);
152         if (!ret) {
153                 read_lock(&card_lock);
154                 list_for_each_entry(card, &Cards, list)
155                         _set_debug(card);
156                 read_unlock(&card_lock);
157         }
158         return ret;
159 }
160
161 MODULE_AUTHOR("Karsten Keil");
162 MODULE_LICENSE("GPL v2");
163 MODULE_VERSION(AVMFRITZ_REV);
164 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
165 MODULE_PARM_DESC(debug, "avmfritz debug mask");
166
167 /* Interface functions */
168
169 static u8
170 ReadISAC_V1(void *p, u8 offset)
171 {
172         struct fritzcard *fc = p;
173         u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
174
175         outb(idx, fc->addr + CHIP_INDEX);
176         return inb(fc->addr + CHIP_WINDOW + (offset & 0xf));
177 }
178
179 static void
180 WriteISAC_V1(void *p, u8 offset, u8 value)
181 {
182         struct fritzcard *fc = p;
183         u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
184
185         outb(idx, fc->addr + CHIP_INDEX);
186         outb(value, fc->addr + CHIP_WINDOW + (offset & 0xf));
187 }
188
189 static void
190 ReadFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
191 {
192         struct fritzcard *fc = p;
193
194         outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
195         insb(fc->addr + CHIP_WINDOW, data, size);
196 }
197
198 static void
199 WriteFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
200 {
201         struct fritzcard *fc = p;
202
203         outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
204         outsb(fc->addr + CHIP_WINDOW, data, size);
205 }
206
207 static u8
208 ReadISAC_V2(void *p, u8 offset)
209 {
210         struct fritzcard *fc = p;
211
212         outl(offset, fc->addr + AVM_ISACX_INDEX);
213         return 0xff & inl(fc->addr + AVM_ISACX_DATA);
214 }
215
216 static void
217 WriteISAC_V2(void *p, u8 offset, u8 value)
218 {
219         struct fritzcard *fc = p;
220
221         outl(offset, fc->addr + AVM_ISACX_INDEX);
222         outl(value, fc->addr + AVM_ISACX_DATA);
223 }
224
225 static void
226 ReadFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
227 {
228         struct fritzcard *fc = p;
229         int i;
230
231         outl(off, fc->addr + AVM_ISACX_INDEX);
232         for (i = 0; i < size; i++)
233                 data[i] = 0xff & inl(fc->addr + AVM_ISACX_DATA);
234 }
235
236 static void
237 WriteFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
238 {
239         struct fritzcard *fc = p;
240         int i;
241
242         outl(off, fc->addr + AVM_ISACX_INDEX);
243         for (i = 0; i < size; i++)
244                 outl(data[i], fc->addr + AVM_ISACX_DATA);
245 }
246
247 static struct bchannel *
248 Sel_BCS(struct fritzcard *fc, u32 channel)
249 {
250         if (test_bit(FLG_ACTIVE, &fc->bch[0].Flags) &&
251             (fc->bch[0].nr & channel))
252                 return &fc->bch[0];
253         else if (test_bit(FLG_ACTIVE, &fc->bch[1].Flags) &&
254                  (fc->bch[1].nr & channel))
255                 return &fc->bch[1];
256         else
257                 return NULL;
258 }
259
260 static inline void
261 __write_ctrl_pci(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
262         u32 idx = channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1;
263
264         outl(idx, fc->addr + CHIP_INDEX);
265         outl(hdlc->ctrl.ctrl, fc->addr + CHIP_WINDOW + HDLC_STATUS);
266 }
267
268 static inline void
269 __write_ctrl_pciv2(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
270         outl(hdlc->ctrl.ctrl, fc->addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
271                                           AVM_HDLC_STATUS_1));
272 }
273
274 static void
275 write_ctrl(struct bchannel *bch, int which) {
276         struct fritzcard *fc = bch->hw;
277         struct hdlc_hw *hdlc;
278
279         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
280         pr_debug("%s: hdlc %c wr%x ctrl %x\n", fc->name, '@' + bch->nr,
281                  which, hdlc->ctrl.ctrl);
282         switch (fc->type) {
283         case AVM_FRITZ_PCIV2:
284                 __write_ctrl_pciv2(fc, hdlc, bch->nr);
285                 break;
286         case AVM_FRITZ_PCI:
287                 __write_ctrl_pci(fc, hdlc, bch->nr);
288                 break;
289         }
290 }
291
292
293 static inline u32
294 __read_status_pci(u_long addr, u32 channel)
295 {
296         outl(channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1, addr + CHIP_INDEX);
297         return inl(addr + CHIP_WINDOW + HDLC_STATUS);
298 }
299
300 static inline u32
301 __read_status_pciv2(u_long addr, u32 channel)
302 {
303         return inl(addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
304                            AVM_HDLC_STATUS_1));
305 }
306
307
308 static u32
309 read_status(struct fritzcard *fc, u32 channel)
310 {
311         switch (fc->type) {
312         case AVM_FRITZ_PCIV2:
313                 return __read_status_pciv2(fc->addr, channel);
314         case AVM_FRITZ_PCI:
315                 return __read_status_pci(fc->addr, channel);
316         }
317         /* dummy */
318         return 0;
319 }
320
321 static void
322 enable_hwirq(struct fritzcard *fc)
323 {
324         fc->ctrlreg |= AVM_STATUS0_ENA_IRQ;
325         outb(fc->ctrlreg, fc->addr + 2);
326 }
327
328 static void
329 disable_hwirq(struct fritzcard *fc)
330 {
331         fc->ctrlreg &= ~AVM_STATUS0_ENA_IRQ;
332         outb(fc->ctrlreg, fc->addr + 2);
333 }
334
335 static int
336 modehdlc(struct bchannel *bch, int protocol)
337 {
338         struct fritzcard *fc = bch->hw;
339         struct hdlc_hw *hdlc;
340         u8 mode;
341
342         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
343         pr_debug("%s: hdlc %c protocol %x-->%x ch %d\n", fc->name,
344                  '@' + bch->nr, bch->state, protocol, bch->nr);
345         hdlc->ctrl.ctrl = 0;
346         mode = (fc->type == AVM_FRITZ_PCIV2) ? HDLC_FIFO_SIZE_128 : 0;
347
348         switch (protocol) {
349         case -1: /* used for init */
350                 bch->state = -1;
351                 fallthrough;
352         case ISDN_P_NONE:
353                 if (bch->state == ISDN_P_NONE)
354                         break;
355                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
356                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
357                 write_ctrl(bch, 5);
358                 bch->state = ISDN_P_NONE;
359                 test_and_clear_bit(FLG_HDLC, &bch->Flags);
360                 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags);
361                 break;
362         case ISDN_P_B_RAW:
363                 bch->state = protocol;
364                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
365                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
366                 write_ctrl(bch, 5);
367                 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
368                 write_ctrl(bch, 1);
369                 hdlc->ctrl.sr.cmd = 0;
370                 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags);
371                 break;
372         case ISDN_P_B_HDLC:
373                 bch->state = protocol;
374                 hdlc->ctrl.sr.cmd  = HDLC_CMD_XRS | HDLC_CMD_RRS;
375                 hdlc->ctrl.sr.mode = mode | HDLC_MODE_ITF_FLG;
376                 write_ctrl(bch, 5);
377                 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
378                 write_ctrl(bch, 1);
379                 hdlc->ctrl.sr.cmd = 0;
380                 test_and_set_bit(FLG_HDLC, &bch->Flags);
381                 break;
382         default:
383                 pr_info("%s: protocol not known %x\n", fc->name, protocol);
384                 return -ENOPROTOOPT;
385         }
386         return 0;
387 }
388
389 static void
390 hdlc_empty_fifo(struct bchannel *bch, int count)
391 {
392         u32 *ptr;
393         u8 *p;
394         u32  val, addr;
395         int cnt;
396         struct fritzcard *fc = bch->hw;
397
398         pr_debug("%s: %s %d\n", fc->name, __func__, count);
399         if (test_bit(FLG_RX_OFF, &bch->Flags)) {
400                 p = NULL;
401                 bch->dropcnt += count;
402         } else {
403                 cnt = bchannel_get_rxbuf(bch, count);
404                 if (cnt < 0) {
405                         pr_warn("%s.B%d: No bufferspace for %d bytes\n",
406                                 fc->name, bch->nr, count);
407                         return;
408                 }
409                 p = skb_put(bch->rx_skb, count);
410         }
411         ptr = (u32 *)p;
412         if (fc->type == AVM_FRITZ_PCIV2)
413                 addr = fc->addr + (bch->nr == 2 ?
414                                    AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
415         else {
416                 addr = fc->addr + CHIP_WINDOW;
417                 outl(bch->nr == 2 ? AVM_HDLC_2 : AVM_HDLC_1, fc->addr);
418         }
419         cnt = 0;
420         while (cnt < count) {
421                 val = le32_to_cpu(inl(addr));
422                 if (p) {
423                         put_unaligned(val, ptr);
424                         ptr++;
425                 }
426                 cnt += 4;
427         }
428         if (p && (debug & DEBUG_HW_BFIFO)) {
429                 snprintf(fc->log, LOG_SIZE, "B%1d-recv %s %d ",
430                          bch->nr, fc->name, count);
431                 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
432         }
433 }
434
435 static void
436 hdlc_fill_fifo(struct bchannel *bch)
437 {
438         struct fritzcard *fc = bch->hw;
439         struct hdlc_hw *hdlc;
440         int count, fs, cnt = 0, idx;
441         bool fillempty = false;
442         u8 *p;
443         u32 *ptr, val, addr;
444
445         idx = (bch->nr - 1) & 1;
446         hdlc = &fc->hdlc[idx];
447         fs = (fc->type == AVM_FRITZ_PCIV2) ?
448                 HDLC_FIFO_SIZE_V2 : HDLC_FIFO_SIZE_V1;
449         if (!bch->tx_skb) {
450                 if (!test_bit(FLG_TX_EMPTY, &bch->Flags))
451                         return;
452                 count = fs;
453                 p = bch->fill;
454                 fillempty = true;
455         } else {
456                 count = bch->tx_skb->len - bch->tx_idx;
457                 if (count <= 0)
458                         return;
459                 p = bch->tx_skb->data + bch->tx_idx;
460         }
461         hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XME;
462         if (count > fs) {
463                 count = fs;
464         } else {
465                 if (test_bit(FLG_HDLC, &bch->Flags))
466                         hdlc->ctrl.sr.cmd |= HDLC_CMD_XME;
467         }
468         ptr = (u32 *)p;
469         if (!fillempty) {
470                 pr_debug("%s.B%d: %d/%d/%d", fc->name, bch->nr, count,
471                          bch->tx_idx, bch->tx_skb->len);
472                 bch->tx_idx += count;
473         } else {
474                 pr_debug("%s.B%d: fillempty %d\n", fc->name, bch->nr, count);
475         }
476         hdlc->ctrl.sr.xml = ((count == fs) ? 0 : count);
477         if (fc->type == AVM_FRITZ_PCIV2) {
478                 __write_ctrl_pciv2(fc, hdlc, bch->nr);
479                 addr = fc->addr + (bch->nr == 2 ?
480                                    AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
481         } else {
482                 __write_ctrl_pci(fc, hdlc, bch->nr);
483                 addr = fc->addr + CHIP_WINDOW;
484         }
485         if (fillempty) {
486                 while (cnt < count) {
487                         /* all bytes the same - no worry about endian */
488                         outl(*ptr, addr);
489                         cnt += 4;
490                 }
491         } else {
492                 while (cnt < count) {
493                         val = get_unaligned(ptr);
494                         outl(cpu_to_le32(val), addr);
495                         ptr++;
496                         cnt += 4;
497                 }
498         }
499         if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
500                 snprintf(fc->log, LOG_SIZE, "B%1d-send %s %d ",
501                          bch->nr, fc->name, count);
502                 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
503         }
504 }
505
506 static void
507 HDLC_irq_xpr(struct bchannel *bch)
508 {
509         if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) {
510                 hdlc_fill_fifo(bch);
511         } else {
512                 dev_kfree_skb(bch->tx_skb);
513                 if (get_next_bframe(bch)) {
514                         hdlc_fill_fifo(bch);
515                         test_and_clear_bit(FLG_TX_EMPTY, &bch->Flags);
516                 } else if (test_bit(FLG_TX_EMPTY, &bch->Flags)) {
517                         hdlc_fill_fifo(bch);
518                 }
519         }
520 }
521
522 static void
523 HDLC_irq(struct bchannel *bch, u32 stat)
524 {
525         struct fritzcard *fc = bch->hw;
526         int             len, fs;
527         u32             rmlMask;
528         struct hdlc_hw  *hdlc;
529
530         hdlc = &fc->hdlc[(bch->nr - 1) & 1];
531         pr_debug("%s: ch%d stat %#x\n", fc->name, bch->nr, stat);
532         if (fc->type == AVM_FRITZ_PCIV2) {
533                 rmlMask = HDLC_STAT_RML_MASK_V2;
534                 fs = HDLC_FIFO_SIZE_V2;
535         } else {
536                 rmlMask = HDLC_STAT_RML_MASK_V1;
537                 fs = HDLC_FIFO_SIZE_V1;
538         }
539         if (stat & HDLC_INT_RPR) {
540                 if (stat & HDLC_STAT_RDO) {
541                         pr_warn("%s: ch%d stat %x RDO\n",
542                                 fc->name, bch->nr, stat);
543                         hdlc->ctrl.sr.xml = 0;
544                         hdlc->ctrl.sr.cmd |= HDLC_CMD_RRS;
545                         write_ctrl(bch, 1);
546                         hdlc->ctrl.sr.cmd &= ~HDLC_CMD_RRS;
547                         write_ctrl(bch, 1);
548                         if (bch->rx_skb)
549                                 skb_trim(bch->rx_skb, 0);
550                 } else {
551                         len = (stat & rmlMask) >> 8;
552                         if (!len)
553                                 len = fs;
554                         hdlc_empty_fifo(bch, len);
555                         if (!bch->rx_skb)
556                                 goto handle_tx;
557                         if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
558                                 recv_Bchannel(bch, 0, false);
559                         } else if (stat & HDLC_STAT_RME) {
560                                 if ((stat & HDLC_STAT_CRCVFRRAB) ==
561                                     HDLC_STAT_CRCVFR) {
562                                         recv_Bchannel(bch, 0, false);
563                                 } else {
564                                         pr_warn("%s: got invalid frame\n",
565                                                 fc->name);
566                                         skb_trim(bch->rx_skb, 0);
567                                 }
568                         }
569                 }
570         }
571 handle_tx:
572         if (stat & HDLC_INT_XDU) {
573                 /* Here we lost an TX interrupt, so
574                  * restart transmitting the whole frame on HDLC
575                  * in transparent mode we send the next data
576                  */
577                 pr_warn("%s: ch%d stat %x XDU %s\n", fc->name, bch->nr,
578                         stat, bch->tx_skb ? "tx_skb" : "no tx_skb");
579                 if (bch->tx_skb && bch->tx_skb->len) {
580                         if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
581                                 bch->tx_idx = 0;
582                 } else if (test_bit(FLG_FILLEMPTY, &bch->Flags)) {
583                         test_and_set_bit(FLG_TX_EMPTY, &bch->Flags);
584                 }
585                 hdlc->ctrl.sr.xml = 0;
586                 hdlc->ctrl.sr.cmd |= HDLC_CMD_XRS;
587                 write_ctrl(bch, 1);
588                 hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XRS;
589                 HDLC_irq_xpr(bch);
590                 return;
591         } else if (stat & HDLC_INT_XPR)
592                 HDLC_irq_xpr(bch);
593 }
594
595 static inline void
596 HDLC_irq_main(struct fritzcard *fc)
597 {
598         u32 stat;
599         struct bchannel *bch;
600
601         stat = read_status(fc, 1);
602         if (stat & HDLC_INT_MASK) {
603                 bch = Sel_BCS(fc, 1);
604                 if (bch)
605                         HDLC_irq(bch, stat);
606                 else
607                         pr_debug("%s: spurious ch1 IRQ\n", fc->name);
608         }
609         stat = read_status(fc, 2);
610         if (stat & HDLC_INT_MASK) {
611                 bch = Sel_BCS(fc, 2);
612                 if (bch)
613                         HDLC_irq(bch, stat);
614                 else
615                         pr_debug("%s: spurious ch2 IRQ\n", fc->name);
616         }
617 }
618
619 static irqreturn_t
620 avm_fritz_interrupt(int intno, void *dev_id)
621 {
622         struct fritzcard *fc = dev_id;
623         u8 val;
624         u8 sval;
625
626         spin_lock(&fc->lock);
627         sval = inb(fc->addr + 2);
628         pr_debug("%s: irq stat0 %x\n", fc->name, sval);
629         if ((sval & AVM_STATUS0_IRQ_MASK) == AVM_STATUS0_IRQ_MASK) {
630                 /* shared  IRQ from other HW */
631                 spin_unlock(&fc->lock);
632                 return IRQ_NONE;
633         }
634         fc->irqcnt++;
635
636         if (!(sval & AVM_STATUS0_IRQ_ISAC)) {
637                 val = ReadISAC_V1(fc, ISAC_ISTA);
638                 mISDNisac_irq(&fc->isac, val);
639         }
640         if (!(sval & AVM_STATUS0_IRQ_HDLC))
641                 HDLC_irq_main(fc);
642         spin_unlock(&fc->lock);
643         return IRQ_HANDLED;
644 }
645
646 static irqreturn_t
647 avm_fritzv2_interrupt(int intno, void *dev_id)
648 {
649         struct fritzcard *fc = dev_id;
650         u8 val;
651         u8 sval;
652
653         spin_lock(&fc->lock);
654         sval = inb(fc->addr + 2);
655         pr_debug("%s: irq stat0 %x\n", fc->name, sval);
656         if (!(sval & AVM_STATUS0_IRQ_MASK)) {
657                 /* shared  IRQ from other HW */
658                 spin_unlock(&fc->lock);
659                 return IRQ_NONE;
660         }
661         fc->irqcnt++;
662
663         if (sval & AVM_STATUS0_IRQ_HDLC)
664                 HDLC_irq_main(fc);
665         if (sval & AVM_STATUS0_IRQ_ISAC) {
666                 val = ReadISAC_V2(fc, ISACX_ISTA);
667                 mISDNisac_irq(&fc->isac, val);
668         }
669         if (sval & AVM_STATUS0_IRQ_TIMER) {
670                 pr_debug("%s: timer irq\n", fc->name);
671                 outb(fc->ctrlreg | AVM_STATUS0_RES_TIMER, fc->addr + 2);
672                 udelay(1);
673                 outb(fc->ctrlreg, fc->addr + 2);
674         }
675         spin_unlock(&fc->lock);
676         return IRQ_HANDLED;
677 }
678
679 static int
680 avm_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
681 {
682         struct bchannel *bch = container_of(ch, struct bchannel, ch);
683         struct fritzcard *fc = bch->hw;
684         int ret = -EINVAL;
685         struct mISDNhead *hh = mISDN_HEAD_P(skb);
686         unsigned long flags;
687
688         switch (hh->prim) {
689         case PH_DATA_REQ:
690                 spin_lock_irqsave(&fc->lock, flags);
691                 ret = bchannel_senddata(bch, skb);
692                 if (ret > 0) { /* direct TX */
693                         hdlc_fill_fifo(bch);
694                         ret = 0;
695                 }
696                 spin_unlock_irqrestore(&fc->lock, flags);
697                 return ret;
698         case PH_ACTIVATE_REQ:
699                 spin_lock_irqsave(&fc->lock, flags);
700                 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
701                         ret = modehdlc(bch, ch->protocol);
702                 else
703                         ret = 0;
704                 spin_unlock_irqrestore(&fc->lock, flags);
705                 if (!ret)
706                         _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
707                                     NULL, GFP_KERNEL);
708                 break;
709         case PH_DEACTIVATE_REQ:
710                 spin_lock_irqsave(&fc->lock, flags);
711                 mISDN_clear_bchannel(bch);
712                 modehdlc(bch, ISDN_P_NONE);
713                 spin_unlock_irqrestore(&fc->lock, flags);
714                 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
715                             NULL, GFP_KERNEL);
716                 ret = 0;
717                 break;
718         }
719         if (!ret)
720                 dev_kfree_skb(skb);
721         return ret;
722 }
723
724 static void
725 inithdlc(struct fritzcard *fc)
726 {
727         modehdlc(&fc->bch[0], -1);
728         modehdlc(&fc->bch[1], -1);
729 }
730
731 static void
732 clear_pending_hdlc_ints(struct fritzcard *fc)
733 {
734         u32 val;
735
736         val = read_status(fc, 1);
737         pr_debug("%s: HDLC 1 STA %x\n", fc->name, val);
738         val = read_status(fc, 2);
739         pr_debug("%s: HDLC 2 STA %x\n", fc->name, val);
740 }
741
742 static void
743 reset_avm(struct fritzcard *fc)
744 {
745         switch (fc->type) {
746         case AVM_FRITZ_PCI:
747                 fc->ctrlreg = AVM_STATUS0_RESET | AVM_STATUS0_DIS_TIMER;
748                 break;
749         case AVM_FRITZ_PCIV2:
750                 fc->ctrlreg = AVM_STATUS0_RESET;
751                 break;
752         }
753         if (debug & DEBUG_HW)
754                 pr_notice("%s: reset\n", fc->name);
755         disable_hwirq(fc);
756         mdelay(5);
757         switch (fc->type) {
758         case AVM_FRITZ_PCI:
759                 fc->ctrlreg = AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER;
760                 disable_hwirq(fc);
761                 outb(AVM_STATUS1_ENA_IOM, fc->addr + 3);
762                 break;
763         case AVM_FRITZ_PCIV2:
764                 fc->ctrlreg = 0;
765                 disable_hwirq(fc);
766                 break;
767         }
768         mdelay(1);
769         if (debug & DEBUG_HW)
770                 pr_notice("%s: S0/S1 %x/%x\n", fc->name,
771                           inb(fc->addr + 2), inb(fc->addr + 3));
772 }
773
774 static int
775 init_card(struct fritzcard *fc)
776 {
777         int             ret, cnt = 3;
778         u_long          flags;
779
780         reset_avm(fc); /* disable IRQ */
781         if (fc->type == AVM_FRITZ_PCIV2)
782                 ret = request_irq(fc->irq, avm_fritzv2_interrupt,
783                                   IRQF_SHARED, fc->name, fc);
784         else
785                 ret = request_irq(fc->irq, avm_fritz_interrupt,
786                                   IRQF_SHARED, fc->name, fc);
787         if (ret) {
788                 pr_info("%s: couldn't get interrupt %d\n",
789                         fc->name, fc->irq);
790                 return ret;
791         }
792         while (cnt--) {
793                 spin_lock_irqsave(&fc->lock, flags);
794                 ret = fc->isac.init(&fc->isac);
795                 if (ret) {
796                         spin_unlock_irqrestore(&fc->lock, flags);
797                         pr_info("%s: ISAC init failed with %d\n",
798                                 fc->name, ret);
799                         break;
800                 }
801                 clear_pending_hdlc_ints(fc);
802                 inithdlc(fc);
803                 enable_hwirq(fc);
804                 /* RESET Receiver and Transmitter */
805                 if (fc->type == AVM_FRITZ_PCIV2) {
806                         WriteISAC_V2(fc, ISACX_MASK, 0);
807                         WriteISAC_V2(fc, ISACX_CMDRD, 0x41);
808                 } else {
809                         WriteISAC_V1(fc, ISAC_MASK, 0);
810                         WriteISAC_V1(fc, ISAC_CMDR, 0x41);
811                 }
812                 spin_unlock_irqrestore(&fc->lock, flags);
813                 /* Timeout 10ms */
814                 msleep_interruptible(10);
815                 if (debug & DEBUG_HW)
816                         pr_notice("%s: IRQ %d count %d\n", fc->name,
817                                   fc->irq, fc->irqcnt);
818                 if (!fc->irqcnt) {
819                         pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
820                                 fc->name, fc->irq, 3 - cnt);
821                         reset_avm(fc);
822                 } else
823                         return 0;
824         }
825         free_irq(fc->irq, fc);
826         return -EIO;
827 }
828
829 static int
830 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
831 {
832         return mISDN_ctrl_bchannel(bch, cq);
833 }
834
835 static int
836 avm_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
837 {
838         struct bchannel *bch = container_of(ch, struct bchannel, ch);
839         struct fritzcard *fc = bch->hw;
840         int ret = -EINVAL;
841         u_long flags;
842
843         pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
844         switch (cmd) {
845         case CLOSE_CHANNEL:
846                 test_and_clear_bit(FLG_OPEN, &bch->Flags);
847                 cancel_work_sync(&bch->workq);
848                 spin_lock_irqsave(&fc->lock, flags);
849                 mISDN_clear_bchannel(bch);
850                 modehdlc(bch, ISDN_P_NONE);
851                 spin_unlock_irqrestore(&fc->lock, flags);
852                 ch->protocol = ISDN_P_NONE;
853                 ch->peer = NULL;
854                 module_put(THIS_MODULE);
855                 ret = 0;
856                 break;
857         case CONTROL_CHANNEL:
858                 ret = channel_bctrl(bch, arg);
859                 break;
860         default:
861                 pr_info("%s: %s unknown prim(%x)\n", fc->name, __func__, cmd);
862         }
863         return ret;
864 }
865
866 static int
867 channel_ctrl(struct fritzcard  *fc, struct mISDN_ctrl_req *cq)
868 {
869         int     ret = 0;
870
871         switch (cq->op) {
872         case MISDN_CTRL_GETOP:
873                 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
874                 break;
875         case MISDN_CTRL_LOOP:
876                 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
877                 if (cq->channel < 0 || cq->channel > 3) {
878                         ret = -EINVAL;
879                         break;
880                 }
881                 ret = fc->isac.ctrl(&fc->isac, HW_TESTLOOP, cq->channel);
882                 break;
883         case MISDN_CTRL_L1_TIMER3:
884                 ret = fc->isac.ctrl(&fc->isac, HW_TIMER3_VALUE, cq->p1);
885                 break;
886         default:
887                 pr_info("%s: %s unknown Op %x\n", fc->name, __func__, cq->op);
888                 ret = -EINVAL;
889                 break;
890         }
891         return ret;
892 }
893
894 static int
895 open_bchannel(struct fritzcard *fc, struct channel_req *rq)
896 {
897         struct bchannel         *bch;
898
899         if (rq->adr.channel == 0 || rq->adr.channel > 2)
900                 return -EINVAL;
901         if (rq->protocol == ISDN_P_NONE)
902                 return -EINVAL;
903         bch = &fc->bch[rq->adr.channel - 1];
904         if (test_and_set_bit(FLG_OPEN, &bch->Flags))
905                 return -EBUSY; /* b-channel can be only open once */
906         bch->ch.protocol = rq->protocol;
907         rq->ch = &bch->ch;
908         return 0;
909 }
910
911 /*
912  * device control function
913  */
914 static int
915 avm_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
916 {
917         struct mISDNdevice      *dev = container_of(ch, struct mISDNdevice, D);
918         struct dchannel         *dch = container_of(dev, struct dchannel, dev);
919         struct fritzcard        *fc = dch->hw;
920         struct channel_req      *rq;
921         int                     err = 0;
922
923         pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
924         switch (cmd) {
925         case OPEN_CHANNEL:
926                 rq = arg;
927                 if (rq->protocol == ISDN_P_TE_S0)
928                         err = fc->isac.open(&fc->isac, rq);
929                 else
930                         err = open_bchannel(fc, rq);
931                 if (err)
932                         break;
933                 if (!try_module_get(THIS_MODULE))
934                         pr_info("%s: cannot get module\n", fc->name);
935                 break;
936         case CLOSE_CHANNEL:
937                 pr_debug("%s: dev(%d) close from %p\n", fc->name, dch->dev.id,
938                          __builtin_return_address(0));
939                 module_put(THIS_MODULE);
940                 break;
941         case CONTROL_CHANNEL:
942                 err = channel_ctrl(fc, arg);
943                 break;
944         default:
945                 pr_debug("%s: %s unknown command %x\n",
946                          fc->name, __func__, cmd);
947                 return -EINVAL;
948         }
949         return err;
950 }
951
952 static int
953 setup_fritz(struct fritzcard *fc)
954 {
955         u32 val, ver;
956
957         if (!request_region(fc->addr, 32, fc->name)) {
958                 pr_info("%s: AVM config port %x-%x already in use\n",
959                         fc->name, fc->addr, fc->addr + 31);
960                 return -EIO;
961         }
962         switch (fc->type) {
963         case AVM_FRITZ_PCI:
964                 val = inl(fc->addr);
965                 outl(AVM_HDLC_1, fc->addr + CHIP_INDEX);
966                 ver = inl(fc->addr + CHIP_WINDOW + HDLC_STATUS) >> 24;
967                 if (debug & DEBUG_HW) {
968                         pr_notice("%s: PCI stat %#x\n", fc->name, val);
969                         pr_notice("%s: PCI Class %X Rev %d\n", fc->name,
970                                   val & 0xff, (val >> 8) & 0xff);
971                         pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
972                 }
973                 ASSIGN_FUNC(V1, ISAC, fc->isac);
974                 fc->isac.type = IPAC_TYPE_ISAC;
975                 break;
976         case AVM_FRITZ_PCIV2:
977                 val = inl(fc->addr);
978                 ver = inl(fc->addr + AVM_HDLC_STATUS_1) >> 24;
979                 if (debug & DEBUG_HW) {
980                         pr_notice("%s: PCI V2 stat %#x\n", fc->name, val);
981                         pr_notice("%s: PCI V2 Class %X Rev %d\n", fc->name,
982                                   val & 0xff, (val >> 8) & 0xff);
983                         pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
984                 }
985                 ASSIGN_FUNC(V2, ISAC, fc->isac);
986                 fc->isac.type = IPAC_TYPE_ISACX;
987                 break;
988         default:
989                 release_region(fc->addr, 32);
990                 pr_info("%s: AVM unknown type %d\n", fc->name, fc->type);
991                 return -ENODEV;
992         }
993         pr_notice("%s: %s config irq:%d base:0x%X\n", fc->name,
994                   (fc->type == AVM_FRITZ_PCI) ? "AVM Fritz!CARD PCI" :
995                   "AVM Fritz!CARD PCIv2", fc->irq, fc->addr);
996         return 0;
997 }
998
999 static void
1000 release_card(struct fritzcard *card)
1001 {
1002         u_long flags;
1003
1004         disable_hwirq(card);
1005         spin_lock_irqsave(&card->lock, flags);
1006         modehdlc(&card->bch[0], ISDN_P_NONE);
1007         modehdlc(&card->bch[1], ISDN_P_NONE);
1008         spin_unlock_irqrestore(&card->lock, flags);
1009         card->isac.release(&card->isac);
1010         free_irq(card->irq, card);
1011         mISDN_freebchannel(&card->bch[1]);
1012         mISDN_freebchannel(&card->bch[0]);
1013         mISDN_unregister_device(&card->isac.dch.dev);
1014         release_region(card->addr, 32);
1015         pci_disable_device(card->pdev);
1016         pci_set_drvdata(card->pdev, NULL);
1017         write_lock_irqsave(&card_lock, flags);
1018         list_del(&card->list);
1019         write_unlock_irqrestore(&card_lock, flags);
1020         kfree(card);
1021         AVM_cnt--;
1022 }
1023
1024 static int
1025 setup_instance(struct fritzcard *card)
1026 {
1027         int i, err;
1028         unsigned short minsize;
1029         u_long flags;
1030
1031         snprintf(card->name, MISDN_MAX_IDLEN - 1, "AVM.%d", AVM_cnt + 1);
1032         write_lock_irqsave(&card_lock, flags);
1033         list_add_tail(&card->list, &Cards);
1034         write_unlock_irqrestore(&card_lock, flags);
1035
1036         _set_debug(card);
1037         card->isac.name = card->name;
1038         spin_lock_init(&card->lock);
1039         card->isac.hwlock = &card->lock;
1040         mISDNisac_init(&card->isac, card);
1041
1042         card->isac.dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1043                 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1044         card->isac.dch.dev.D.ctrl = avm_dctrl;
1045         for (i = 0; i < 2; i++) {
1046                 card->bch[i].nr = i + 1;
1047                 set_channelmap(i + 1, card->isac.dch.dev.channelmap);
1048                 if (AVM_FRITZ_PCIV2 == card->type)
1049                         minsize = HDLC_FIFO_SIZE_V2;
1050                 else
1051                         minsize = HDLC_FIFO_SIZE_V1;
1052                 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, minsize);
1053                 card->bch[i].hw = card;
1054                 card->bch[i].ch.send = avm_l2l1B;
1055                 card->bch[i].ch.ctrl = avm_bctrl;
1056                 card->bch[i].ch.nr = i + 1;
1057                 list_add(&card->bch[i].ch.list, &card->isac.dch.dev.bchannels);
1058         }
1059         err = setup_fritz(card);
1060         if (err)
1061                 goto error;
1062         err = mISDN_register_device(&card->isac.dch.dev, &card->pdev->dev,
1063                                     card->name);
1064         if (err)
1065                 goto error_reg;
1066         err = init_card(card);
1067         if (!err)  {
1068                 AVM_cnt++;
1069                 pr_notice("AVM %d cards installed DEBUG\n", AVM_cnt);
1070                 return 0;
1071         }
1072         mISDN_unregister_device(&card->isac.dch.dev);
1073 error_reg:
1074         release_region(card->addr, 32);
1075 error:
1076         card->isac.release(&card->isac);
1077         mISDN_freebchannel(&card->bch[1]);
1078         mISDN_freebchannel(&card->bch[0]);
1079         write_lock_irqsave(&card_lock, flags);
1080         list_del(&card->list);
1081         write_unlock_irqrestore(&card_lock, flags);
1082         kfree(card);
1083         return err;
1084 }
1085
1086 static int
1087 fritzpci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1088 {
1089         int err = -ENOMEM;
1090         struct fritzcard *card;
1091
1092         card = kzalloc(sizeof(struct fritzcard), GFP_KERNEL);
1093         if (!card) {
1094                 pr_info("No kmem for fritzcard\n");
1095                 return err;
1096         }
1097         if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
1098                 card->type = AVM_FRITZ_PCIV2;
1099         else
1100                 card->type = AVM_FRITZ_PCI;
1101         card->pdev = pdev;
1102         err = pci_enable_device(pdev);
1103         if (err) {
1104                 kfree(card);
1105                 return err;
1106         }
1107
1108         pr_notice("mISDN: found adapter %s at %s\n",
1109                   (char *) ent->driver_data, pci_name(pdev));
1110
1111         card->addr = pci_resource_start(pdev, 1);
1112         card->irq = pdev->irq;
1113         pci_set_drvdata(pdev, card);
1114         err = setup_instance(card);
1115         if (err)
1116                 pci_set_drvdata(pdev, NULL);
1117         return err;
1118 }
1119
1120 static void
1121 fritz_remove_pci(struct pci_dev *pdev)
1122 {
1123         struct fritzcard *card = pci_get_drvdata(pdev);
1124
1125         if (card)
1126                 release_card(card);
1127         else
1128                 if (debug)
1129                         pr_info("%s: drvdata already removed\n", __func__);
1130 }
1131
1132 static const struct pci_device_id fcpci_ids[] = {
1133         { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1, PCI_ANY_ID, PCI_ANY_ID,
1134           0, 0, (unsigned long) "Fritz!Card PCI"},
1135         { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1_V2, PCI_ANY_ID, PCI_ANY_ID,
1136           0, 0, (unsigned long) "Fritz!Card PCI v2" },
1137         { }
1138 };
1139 MODULE_DEVICE_TABLE(pci, fcpci_ids);
1140
1141 static struct pci_driver fcpci_driver = {
1142         .name = "fcpci",
1143         .probe = fritzpci_probe,
1144         .remove = fritz_remove_pci,
1145         .id_table = fcpci_ids,
1146 };
1147
1148 static int __init AVM_init(void)
1149 {
1150         int err;
1151
1152         pr_notice("AVM Fritz PCI driver Rev. %s\n", AVMFRITZ_REV);
1153         err = pci_register_driver(&fcpci_driver);
1154         return err;
1155 }
1156
1157 static void __exit AVM_cleanup(void)
1158 {
1159         pci_unregister_driver(&fcpci_driver);
1160 }
1161
1162 module_init(AVM_init);
1163 module_exit(AVM_cleanup);