1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@flygoat.com>
4 * Loongson PCH MSI support
7 #define pr_fmt(fmt) "pch-msi: " fmt
9 #include <linux/irqchip.h>
10 #include <linux/msi.h>
12 #include <linux/of_address.h>
13 #include <linux/of_irq.h>
14 #include <linux/of_pci.h>
15 #include <linux/pci.h>
16 #include <linux/slab.h>
19 struct mutex msi_map_lock;
21 u32 irq_first; /* The vector number that MSIs starts */
22 u32 num_irqs; /* The number of vectors for MSIs */
23 unsigned long *msi_map;
26 static void pch_msi_mask_msi_irq(struct irq_data *d)
29 irq_chip_mask_parent(d);
32 static void pch_msi_unmask_msi_irq(struct irq_data *d)
34 irq_chip_unmask_parent(d);
35 pci_msi_unmask_irq(d);
38 static struct irq_chip pch_msi_irq_chip = {
39 .name = "PCH PCI MSI",
40 .irq_mask = pch_msi_mask_msi_irq,
41 .irq_unmask = pch_msi_unmask_msi_irq,
42 .irq_ack = irq_chip_ack_parent,
43 .irq_set_affinity = irq_chip_set_affinity_parent,
46 static int pch_msi_allocate_hwirq(struct pch_msi_data *priv, int num_req)
50 mutex_lock(&priv->msi_map_lock);
52 first = bitmap_find_free_region(priv->msi_map, priv->num_irqs,
53 get_count_order(num_req));
55 mutex_unlock(&priv->msi_map_lock);
59 mutex_unlock(&priv->msi_map_lock);
61 return priv->irq_first + first;
64 static void pch_msi_free_hwirq(struct pch_msi_data *priv,
65 int hwirq, int num_req)
67 int first = hwirq - priv->irq_first;
69 mutex_lock(&priv->msi_map_lock);
70 bitmap_release_region(priv->msi_map, first, get_count_order(num_req));
71 mutex_unlock(&priv->msi_map_lock);
74 static void pch_msi_compose_msi_msg(struct irq_data *data,
77 struct pch_msi_data *priv = irq_data_get_irq_chip_data(data);
79 msg->address_hi = upper_32_bits(priv->doorbell);
80 msg->address_lo = lower_32_bits(priv->doorbell);
81 msg->data = data->hwirq;
84 static struct msi_domain_info pch_msi_domain_info = {
85 .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
86 MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
87 .chip = &pch_msi_irq_chip,
90 static struct irq_chip middle_irq_chip = {
92 .irq_mask = irq_chip_mask_parent,
93 .irq_unmask = irq_chip_unmask_parent,
94 .irq_ack = irq_chip_ack_parent,
95 .irq_set_affinity = irq_chip_set_affinity_parent,
96 .irq_compose_msi_msg = pch_msi_compose_msi_msg,
99 static int pch_msi_parent_domain_alloc(struct irq_domain *domain,
100 unsigned int virq, int hwirq)
102 struct irq_fwspec fwspec;
104 fwspec.fwnode = domain->parent->fwnode;
105 fwspec.param_count = 1;
106 fwspec.param[0] = hwirq;
108 return irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
111 static int pch_msi_middle_domain_alloc(struct irq_domain *domain,
113 unsigned int nr_irqs, void *args)
115 struct pch_msi_data *priv = domain->host_data;
118 hwirq = pch_msi_allocate_hwirq(priv, nr_irqs);
122 for (i = 0; i < nr_irqs; i++) {
123 err = pch_msi_parent_domain_alloc(domain, virq + i, hwirq + i);
127 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
128 &middle_irq_chip, priv);
134 pch_msi_free_hwirq(priv, hwirq, nr_irqs);
135 irq_domain_free_irqs_parent(domain, virq, i - 1);
140 static void pch_msi_middle_domain_free(struct irq_domain *domain,
142 unsigned int nr_irqs)
144 struct irq_data *d = irq_domain_get_irq_data(domain, virq);
145 struct pch_msi_data *priv = irq_data_get_irq_chip_data(d);
147 irq_domain_free_irqs_parent(domain, virq, nr_irqs);
148 pch_msi_free_hwirq(priv, d->hwirq, nr_irqs);
151 static const struct irq_domain_ops pch_msi_middle_domain_ops = {
152 .alloc = pch_msi_middle_domain_alloc,
153 .free = pch_msi_middle_domain_free,
156 static int pch_msi_init_domains(struct pch_msi_data *priv,
157 struct device_node *node,
158 struct irq_domain *parent)
160 struct irq_domain *middle_domain, *msi_domain;
162 middle_domain = irq_domain_create_linear(of_node_to_fwnode(node),
164 &pch_msi_middle_domain_ops,
166 if (!middle_domain) {
167 pr_err("Failed to create the MSI middle domain\n");
171 middle_domain->parent = parent;
172 irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS);
174 msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node),
175 &pch_msi_domain_info,
178 pr_err("Failed to create PCI MSI domain\n");
179 irq_domain_remove(middle_domain);
186 static int pch_msi_init(struct device_node *node,
187 struct device_node *parent)
189 struct pch_msi_data *priv;
190 struct irq_domain *parent_domain;
194 parent_domain = irq_find_host(parent);
195 if (!parent_domain) {
196 pr_err("Failed to find the parent domain\n");
200 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
204 mutex_init(&priv->msi_map_lock);
206 ret = of_address_to_resource(node, 0, &res);
208 pr_err("Failed to allocate resource\n");
212 priv->doorbell = res.start;
214 if (of_property_read_u32(node, "loongson,msi-base-vec",
216 pr_err("Unable to parse MSI vec base\n");
221 if (of_property_read_u32(node, "loongson,msi-num-vecs",
223 pr_err("Unable to parse MSI vec number\n");
228 priv->msi_map = bitmap_zalloc(priv->num_irqs, GFP_KERNEL);
229 if (!priv->msi_map) {
234 pr_debug("Registering %d MSIs, starting at %d\n",
235 priv->num_irqs, priv->irq_first);
237 ret = pch_msi_init_domains(priv, node, parent_domain);
244 kfree(priv->msi_map);
250 IRQCHIP_DECLARE(pch_msi, "loongson,pch-msi-1.0", pch_msi_init);