1 // SPDX-License-Identifier: GPL-2.0
4 * Hyper-V stub IOMMU driver.
6 * Copyright (C) 2019, Microsoft, Inc.
8 * Author : Lan Tianyu <Tianyu.Lan@microsoft.com>
11 #include <linux/types.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/iommu.h>
15 #include <linux/module.h>
19 #include <asm/hw_irq.h>
20 #include <asm/io_apic.h>
21 #include <asm/irq_remapping.h>
22 #include <asm/hypervisor.h>
23 #include <asm/mshyperv.h>
25 #include "irq_remapping.h"
27 #ifdef CONFIG_IRQ_REMAP
30 * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
31 * Redirection Table. Hyper-V exposes one single IO-APIC and so define
32 * 24 IO APIC remmapping entries.
34 #define IOAPIC_REMAPPING_ENTRY 24
36 static cpumask_t ioapic_max_cpumask = { CPU_BITS_NONE };
37 static struct irq_domain *ioapic_ir_domain;
39 static int hyperv_ir_set_affinity(struct irq_data *data,
40 const struct cpumask *mask, bool force)
42 struct irq_data *parent = data->parent_data;
43 struct irq_cfg *cfg = irqd_cfg(data);
46 /* Return error If new irq affinity is out of ioapic_max_cpumask. */
47 if (!cpumask_subset(mask, &ioapic_max_cpumask))
50 ret = parent->chip->irq_set_affinity(parent, mask, force);
51 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
54 send_cleanup_vector(cfg);
59 static struct irq_chip hyperv_ir_chip = {
61 .irq_ack = apic_ack_irq,
62 .irq_set_affinity = hyperv_ir_set_affinity,
65 static int hyperv_irq_remapping_alloc(struct irq_domain *domain,
66 unsigned int virq, unsigned int nr_irqs,
69 struct irq_alloc_info *info = arg;
70 struct irq_data *irq_data;
71 struct irq_desc *desc;
74 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
77 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
81 irq_data = irq_domain_get_irq_data(domain, virq);
83 irq_domain_free_irqs_common(domain, virq, nr_irqs);
87 irq_data->chip = &hyperv_ir_chip;
90 * Hypver-V IO APIC irq affinity should be in the scope of
91 * ioapic_max_cpumask because no irq remapping support.
93 desc = irq_data_to_desc(irq_data);
94 cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask);
99 static void hyperv_irq_remapping_free(struct irq_domain *domain,
100 unsigned int virq, unsigned int nr_irqs)
102 irq_domain_free_irqs_common(domain, virq, nr_irqs);
105 static int hyperv_irq_remapping_select(struct irq_domain *d,
106 struct irq_fwspec *fwspec,
107 enum irq_domain_bus_token bus_token)
109 /* Claim the only I/O APIC emulated by Hyper-V */
110 return x86_fwspec_is_ioapic(fwspec);
113 static const struct irq_domain_ops hyperv_ir_domain_ops = {
114 .select = hyperv_irq_remapping_select,
115 .alloc = hyperv_irq_remapping_alloc,
116 .free = hyperv_irq_remapping_free,
119 static const struct irq_domain_ops hyperv_root_ir_domain_ops;
120 static int __init hyperv_prepare_irq_remapping(void)
122 struct fwnode_handle *fn;
125 const struct irq_domain_ops *ops;
127 if (!hypervisor_is_type(X86_HYPER_MS_HYPERV) ||
128 x86_init.hyper.msi_ext_dest_id() ||
132 if (hv_root_partition) {
133 name = "HYPERV-ROOT-IR";
134 ops = &hyperv_root_ir_domain_ops;
137 ops = &hyperv_ir_domain_ops;
140 fn = irq_domain_alloc_named_id_fwnode(name, 0);
145 irq_domain_create_hierarchy(arch_get_ir_parent_domain(),
146 0, IOAPIC_REMAPPING_ENTRY, fn, ops, NULL);
148 if (!ioapic_ir_domain) {
149 irq_domain_free_fwnode(fn);
153 if (hv_root_partition)
154 return 0; /* The rest is only relevant to guests */
157 * Hyper-V doesn't provide irq remapping function for
158 * IO-APIC and so IO-APIC only accepts 8-bit APIC ID.
159 * Cpu's APIC ID is read from ACPI MADT table and APIC IDs
160 * in the MADT table on Hyper-v are sorted monotonic increasingly.
161 * APIC ID reflects cpu topology. There maybe some APIC ID
162 * gaps when cpu number in a socket is not power of two. Prepare
163 * max cpu affinity for IOAPIC irqs. Scan cpu 0-255 and set cpu
164 * into ioapic_max_cpumask if its APIC ID is less than 256.
166 for (i = min_t(unsigned int, num_possible_cpus() - 1, 255); i >= 0; i--)
167 if (cpu_physical_id(i) < 256)
168 cpumask_set_cpu(i, &ioapic_max_cpumask);
173 static int __init hyperv_enable_irq_remapping(void)
175 return IRQ_REMAP_X2APIC_MODE;
178 struct irq_remap_ops hyperv_irq_remap_ops = {
179 .prepare = hyperv_prepare_irq_remapping,
180 .enable = hyperv_enable_irq_remapping,
183 /* IRQ remapping domain when Linux runs as the root partition */
184 struct hyperv_root_ir_data {
187 struct hv_interrupt_entry entry;
191 hyperv_root_ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg)
197 struct cpumask *affinity;
199 struct hv_interrupt_entry entry;
200 struct hyperv_root_ir_data *data = irq_data->chip_data;
201 struct IO_APIC_route_entry e;
203 cfg = irqd_cfg(irq_data);
204 affinity = irq_data_get_effective_affinity_mask(irq_data);
205 cpu = cpumask_first_and(affinity, cpu_online_mask);
207 vector = cfg->vector;
208 ioapic_id = data->ioapic_id;
210 if (data->entry.source == HV_DEVICE_TYPE_IOAPIC
211 && data->entry.ioapic_rte.as_uint64) {
214 status = hv_unmap_ioapic_interrupt(ioapic_id, &entry);
216 if (status != HV_STATUS_SUCCESS)
217 pr_debug("%s: unexpected unmap status %lld\n", __func__, status);
219 data->entry.ioapic_rte.as_uint64 = 0;
220 data->entry.source = 0; /* Invalid source */
224 status = hv_map_ioapic_interrupt(ioapic_id, data->is_level, cpu,
227 if (status != HV_STATUS_SUCCESS) {
228 pr_err("%s: map hypercall failed, status %lld\n", __func__, status);
234 /* Turn it into an IO_APIC_route_entry, and generate MSI MSG. */
235 e.w1 = entry.ioapic_rte.low_uint32;
236 e.w2 = entry.ioapic_rte.high_uint32;
238 memset(msg, 0, sizeof(*msg));
239 msg->arch_data.vector = e.vector;
240 msg->arch_data.delivery_mode = e.delivery_mode;
241 msg->arch_addr_lo.dest_mode_logical = e.dest_mode_logical;
242 msg->arch_addr_lo.dmar_format = e.ir_format;
243 msg->arch_addr_lo.dmar_index_0_14 = e.ir_index_0_14;
246 static int hyperv_root_ir_set_affinity(struct irq_data *data,
247 const struct cpumask *mask, bool force)
249 struct irq_data *parent = data->parent_data;
250 struct irq_cfg *cfg = irqd_cfg(data);
253 ret = parent->chip->irq_set_affinity(parent, mask, force);
254 if (ret < 0 || ret == IRQ_SET_MASK_OK_DONE)
257 send_cleanup_vector(cfg);
262 static struct irq_chip hyperv_root_ir_chip = {
263 .name = "HYPERV-ROOT-IR",
264 .irq_ack = apic_ack_irq,
265 .irq_set_affinity = hyperv_root_ir_set_affinity,
266 .irq_compose_msi_msg = hyperv_root_ir_compose_msi_msg,
269 static int hyperv_root_irq_remapping_alloc(struct irq_domain *domain,
270 unsigned int virq, unsigned int nr_irqs,
273 struct irq_alloc_info *info = arg;
274 struct irq_data *irq_data;
275 struct hyperv_root_ir_data *data;
278 if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
281 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
285 data = kzalloc(sizeof(*data), GFP_KERNEL);
287 irq_domain_free_irqs_common(domain, virq, nr_irqs);
291 irq_data = irq_domain_get_irq_data(domain, virq);
294 irq_domain_free_irqs_common(domain, virq, nr_irqs);
298 data->ioapic_id = info->devid;
299 data->is_level = info->ioapic.is_level;
301 irq_data->chip = &hyperv_root_ir_chip;
302 irq_data->chip_data = data;
307 static void hyperv_root_irq_remapping_free(struct irq_domain *domain,
308 unsigned int virq, unsigned int nr_irqs)
310 struct irq_data *irq_data;
311 struct hyperv_root_ir_data *data;
312 struct hv_interrupt_entry *e;
315 for (i = 0; i < nr_irqs; i++) {
316 irq_data = irq_domain_get_irq_data(domain, virq + i);
318 if (irq_data && irq_data->chip_data) {
319 data = irq_data->chip_data;
322 if (e->source == HV_DEVICE_TYPE_IOAPIC
323 && e->ioapic_rte.as_uint64)
324 hv_unmap_ioapic_interrupt(data->ioapic_id,
331 irq_domain_free_irqs_common(domain, virq, nr_irqs);
334 static const struct irq_domain_ops hyperv_root_ir_domain_ops = {
335 .select = hyperv_irq_remapping_select,
336 .alloc = hyperv_root_irq_remapping_alloc,
337 .free = hyperv_root_irq_remapping_free,