1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
4 * Author: Joerg Roedel <jroedel@suse.de>
10 #include <linux/iommu.h>
12 #include "amd_iommu_types.h"
14 extern int amd_iommu_get_num_iommus(void);
15 extern int amd_iommu_init_dma_ops(void);
16 extern int amd_iommu_init_passthrough(void);
17 extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
18 extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
19 extern void amd_iommu_apply_erratum_63(u16 devid);
20 extern void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
21 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
22 extern int amd_iommu_init_devices(void);
23 extern void amd_iommu_uninit_devices(void);
24 extern void amd_iommu_init_notifier(void);
25 extern int amd_iommu_init_api(void);
27 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
28 void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
30 static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {}
33 /* Needed for interrupt remapping */
34 extern int amd_iommu_prepare(void);
35 extern int amd_iommu_enable(void);
36 extern void amd_iommu_disable(void);
37 extern int amd_iommu_reenable(int);
38 extern int amd_iommu_enable_faulting(void);
39 extern int amd_iommu_guest_ir;
41 /* IOMMUv2 specific functions */
44 extern bool amd_iommu_v2_supported(void);
45 extern struct amd_iommu *get_amd_iommu(unsigned int idx);
46 extern u8 amd_iommu_pc_get_max_banks(unsigned int idx);
47 extern bool amd_iommu_pc_supported(void);
48 extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);
49 extern int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
51 extern int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
54 extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
55 extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
56 extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
57 extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
58 extern int amd_iommu_flush_page(struct iommu_domain *dom, u32 pasid,
60 extern int amd_iommu_flush_tlb(struct iommu_domain *dom, u32 pasid);
61 extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, u32 pasid,
63 extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, u32 pasid);
64 extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
66 #ifdef CONFIG_IRQ_REMAP
67 extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
69 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
75 #define PPR_SUCCESS 0x0
76 #define PPR_INVALID 0x1
77 #define PPR_FAILURE 0xf
79 extern int amd_iommu_complete_ppr(struct pci_dev *pdev, u32 pasid,
82 static inline bool is_rd890_iommu(struct pci_dev *pdev)
84 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
85 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
88 static inline bool iommu_feature(struct amd_iommu *iommu, u64 mask)
90 return !!(iommu->features & mask);
93 static inline u64 iommu_virt_to_phys(void *vaddr)
95 return (u64)__sme_set(virt_to_phys(vaddr));
98 static inline void *iommu_phys_to_virt(unsigned long paddr)
100 return phys_to_virt(__sme_clr(paddr));
103 extern bool translation_pre_enabled(struct amd_iommu *iommu);
104 extern bool amd_iommu_is_attach_deferred(struct iommu_domain *domain,
106 extern int __init add_special_device(u8 type, u8 id, u16 *devid,
110 void amd_iommu_apply_ivrs_quirks(void);
112 static inline void amd_iommu_apply_ivrs_quirks(void) { }