1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Ltd
7 #include <linux/device.h>
8 #include <linux/interconnect.h>
9 #include <linux/interconnect-provider.h>
10 #include <linux/module.h>
11 #include <linux/of_platform.h>
12 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
14 #include "bcm-voter.h"
18 static struct qcom_icc_node qhm_qspi = {
20 .id = SC8280XP_MASTER_QSPI_0,
24 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
27 static struct qcom_icc_node qhm_qup1 = {
29 .id = SC8280XP_MASTER_QUP_1,
33 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
36 static struct qcom_icc_node qhm_qup2 = {
38 .id = SC8280XP_MASTER_QUP_2,
42 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
45 static struct qcom_icc_node qnm_a1noc_cfg = {
46 .name = "qnm_a1noc_cfg",
47 .id = SC8280XP_MASTER_A1NOC_CFG,
50 .links = { SC8280XP_SLAVE_SERVICE_A1NOC },
53 static struct qcom_icc_node qxm_ipa = {
55 .id = SC8280XP_MASTER_IPA,
59 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
62 static struct qcom_icc_node xm_emac_1 = {
64 .id = SC8280XP_MASTER_EMAC_1,
68 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
71 static struct qcom_icc_node xm_sdc4 = {
73 .id = SC8280XP_MASTER_SDCC_4,
77 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
80 static struct qcom_icc_node xm_ufs_mem = {
82 .id = SC8280XP_MASTER_UFS_MEM,
86 .links = { SC8280XP_SLAVE_A1NOC_SNOC },
89 static struct qcom_icc_node xm_usb3_0 = {
91 .id = SC8280XP_MASTER_USB3_0,
95 .links = { SC8280XP_SLAVE_USB_NOC_SNOC },
98 static struct qcom_icc_node xm_usb3_1 = {
100 .id = SC8280XP_MASTER_USB3_1,
104 .links = { SC8280XP_SLAVE_USB_NOC_SNOC },
107 static struct qcom_icc_node xm_usb3_mp = {
108 .name = "xm_usb3_mp",
109 .id = SC8280XP_MASTER_USB3_MP,
113 .links = { SC8280XP_SLAVE_USB_NOC_SNOC },
116 static struct qcom_icc_node xm_usb4_host0 = {
117 .name = "xm_usb4_host0",
118 .id = SC8280XP_MASTER_USB4_0,
122 .links = { SC8280XP_SLAVE_USB_NOC_SNOC },
125 static struct qcom_icc_node xm_usb4_host1 = {
126 .name = "xm_usb4_host1",
127 .id = SC8280XP_MASTER_USB4_1,
131 .links = { SC8280XP_SLAVE_USB_NOC_SNOC },
134 static struct qcom_icc_node qhm_qdss_bam = {
135 .name = "qhm_qdss_bam",
136 .id = SC8280XP_MASTER_QDSS_BAM,
140 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
143 static struct qcom_icc_node qhm_qup0 = {
145 .id = SC8280XP_MASTER_QUP_0,
149 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
152 static struct qcom_icc_node qnm_a2noc_cfg = {
153 .name = "qnm_a2noc_cfg",
154 .id = SC8280XP_MASTER_A2NOC_CFG,
158 .links = { SC8280XP_SLAVE_SERVICE_A2NOC },
161 static struct qcom_icc_node qxm_crypto = {
162 .name = "qxm_crypto",
163 .id = SC8280XP_MASTER_CRYPTO,
167 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
170 static struct qcom_icc_node qxm_sensorss_q6 = {
171 .name = "qxm_sensorss_q6",
172 .id = SC8280XP_MASTER_SENSORS_PROC,
176 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
179 static struct qcom_icc_node qxm_sp = {
181 .id = SC8280XP_MASTER_SP,
185 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
188 static struct qcom_icc_node xm_emac_0 = {
190 .id = SC8280XP_MASTER_EMAC,
194 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
197 static struct qcom_icc_node xm_pcie3_0 = {
198 .name = "xm_pcie3_0",
199 .id = SC8280XP_MASTER_PCIE_0,
203 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
206 static struct qcom_icc_node xm_pcie3_1 = {
207 .name = "xm_pcie3_1",
208 .id = SC8280XP_MASTER_PCIE_1,
212 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
215 static struct qcom_icc_node xm_pcie3_2a = {
216 .name = "xm_pcie3_2a",
217 .id = SC8280XP_MASTER_PCIE_2A,
221 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
224 static struct qcom_icc_node xm_pcie3_2b = {
225 .name = "xm_pcie3_2b",
226 .id = SC8280XP_MASTER_PCIE_2B,
230 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
233 static struct qcom_icc_node xm_pcie3_3a = {
234 .name = "xm_pcie3_3a",
235 .id = SC8280XP_MASTER_PCIE_3A,
239 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
242 static struct qcom_icc_node xm_pcie3_3b = {
243 .name = "xm_pcie3_3b",
244 .id = SC8280XP_MASTER_PCIE_3B,
248 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
251 static struct qcom_icc_node xm_pcie3_4 = {
252 .name = "xm_pcie3_4",
253 .id = SC8280XP_MASTER_PCIE_4,
257 .links = { SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC },
260 static struct qcom_icc_node xm_qdss_etr = {
261 .name = "xm_qdss_etr",
262 .id = SC8280XP_MASTER_QDSS_ETR,
266 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
269 static struct qcom_icc_node xm_sdc2 = {
271 .id = SC8280XP_MASTER_SDCC_2,
275 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
278 static struct qcom_icc_node xm_ufs_card = {
279 .name = "xm_ufs_card",
280 .id = SC8280XP_MASTER_UFS_CARD,
284 .links = { SC8280XP_SLAVE_A2NOC_SNOC },
287 static struct qcom_icc_node ipa_core_master = {
288 .name = "ipa_core_master",
289 .id = SC8280XP_MASTER_IPA_CORE,
293 .links = { SC8280XP_SLAVE_IPA_CORE },
296 static struct qcom_icc_node qup0_core_master = {
297 .name = "qup0_core_master",
298 .id = SC8280XP_MASTER_QUP_CORE_0,
302 .links = { SC8280XP_SLAVE_QUP_CORE_0 },
305 static struct qcom_icc_node qup1_core_master = {
306 .name = "qup1_core_master",
307 .id = SC8280XP_MASTER_QUP_CORE_1,
311 .links = { SC8280XP_SLAVE_QUP_CORE_1 },
314 static struct qcom_icc_node qup2_core_master = {
315 .name = "qup2_core_master",
316 .id = SC8280XP_MASTER_QUP_CORE_2,
320 .links = { SC8280XP_SLAVE_QUP_CORE_2 },
323 static struct qcom_icc_node qnm_gemnoc_cnoc = {
324 .name = "qnm_gemnoc_cnoc",
325 .id = SC8280XP_MASTER_GEM_NOC_CNOC,
329 .links = { SC8280XP_SLAVE_AHB2PHY_0,
330 SC8280XP_SLAVE_AHB2PHY_1,
331 SC8280XP_SLAVE_AHB2PHY_2,
333 SC8280XP_SLAVE_APPSS,
334 SC8280XP_SLAVE_CAMERA_CFG,
335 SC8280XP_SLAVE_CLK_CTL,
336 SC8280XP_SLAVE_CDSP_CFG,
337 SC8280XP_SLAVE_CDSP1_CFG,
338 SC8280XP_SLAVE_RBCPR_CX_CFG,
339 SC8280XP_SLAVE_RBCPR_MMCX_CFG,
340 SC8280XP_SLAVE_RBCPR_MX_CFG,
341 SC8280XP_SLAVE_CPR_NSPCX,
342 SC8280XP_SLAVE_CRYPTO_0_CFG,
343 SC8280XP_SLAVE_CX_RDPM,
344 SC8280XP_SLAVE_DCC_CFG,
345 SC8280XP_SLAVE_DISPLAY_CFG,
346 SC8280XP_SLAVE_DISPLAY1_CFG,
347 SC8280XP_SLAVE_EMAC_CFG,
348 SC8280XP_SLAVE_EMAC1_CFG,
349 SC8280XP_SLAVE_GFX3D_CFG,
351 SC8280XP_SLAVE_IMEM_CFG,
352 SC8280XP_SLAVE_IPA_CFG,
353 SC8280XP_SLAVE_IPC_ROUTER_CFG,
354 SC8280XP_SLAVE_LPASS,
355 SC8280XP_SLAVE_MX_RDPM,
356 SC8280XP_SLAVE_MXC_RDPM,
357 SC8280XP_SLAVE_PCIE_0_CFG,
358 SC8280XP_SLAVE_PCIE_1_CFG,
359 SC8280XP_SLAVE_PCIE_2A_CFG,
360 SC8280XP_SLAVE_PCIE_2B_CFG,
361 SC8280XP_SLAVE_PCIE_3A_CFG,
362 SC8280XP_SLAVE_PCIE_3B_CFG,
363 SC8280XP_SLAVE_PCIE_4_CFG,
364 SC8280XP_SLAVE_PCIE_RSC_CFG,
366 SC8280XP_SLAVE_PIMEM_CFG,
367 SC8280XP_SLAVE_PKA_WRAPPER_CFG,
368 SC8280XP_SLAVE_PMU_WRAPPER_CFG,
369 SC8280XP_SLAVE_QDSS_CFG,
370 SC8280XP_SLAVE_QSPI_0,
371 SC8280XP_SLAVE_QUP_0,
372 SC8280XP_SLAVE_QUP_1,
373 SC8280XP_SLAVE_QUP_2,
374 SC8280XP_SLAVE_SDCC_2,
375 SC8280XP_SLAVE_SDCC_4,
376 SC8280XP_SLAVE_SECURITY,
377 SC8280XP_SLAVE_SMMUV3_CFG,
378 SC8280XP_SLAVE_SMSS_CFG,
379 SC8280XP_SLAVE_SPSS_CFG,
382 SC8280XP_SLAVE_UFS_CARD_CFG,
383 SC8280XP_SLAVE_UFS_MEM_CFG,
384 SC8280XP_SLAVE_USB3_0,
385 SC8280XP_SLAVE_USB3_1,
386 SC8280XP_SLAVE_USB3_MP,
387 SC8280XP_SLAVE_USB4_0,
388 SC8280XP_SLAVE_USB4_1,
389 SC8280XP_SLAVE_VENUS_CFG,
390 SC8280XP_SLAVE_VSENSE_CTRL_CFG,
391 SC8280XP_SLAVE_VSENSE_CTRL_R_CFG,
392 SC8280XP_SLAVE_A1NOC_CFG,
393 SC8280XP_SLAVE_A2NOC_CFG,
394 SC8280XP_SLAVE_ANOC_PCIE_BRIDGE_CFG,
395 SC8280XP_SLAVE_DDRSS_CFG,
396 SC8280XP_SLAVE_CNOC_MNOC_CFG,
397 SC8280XP_SLAVE_SNOC_CFG,
398 SC8280XP_SLAVE_SNOC_SF_BRIDGE_CFG,
400 SC8280XP_SLAVE_PIMEM,
401 SC8280XP_SLAVE_SERVICE_CNOC,
402 SC8280XP_SLAVE_QDSS_STM,
408 static struct qcom_icc_node qnm_gemnoc_pcie = {
409 .name = "qnm_gemnoc_pcie",
410 .id = SC8280XP_MASTER_GEM_NOC_PCIE_SNOC,
414 .links = { SC8280XP_SLAVE_PCIE_0,
415 SC8280XP_SLAVE_PCIE_1,
416 SC8280XP_SLAVE_PCIE_2A,
417 SC8280XP_SLAVE_PCIE_2B,
418 SC8280XP_SLAVE_PCIE_3A,
419 SC8280XP_SLAVE_PCIE_3B,
420 SC8280XP_SLAVE_PCIE_4
424 static struct qcom_icc_node qnm_cnoc_dc_noc = {
425 .name = "qnm_cnoc_dc_noc",
426 .id = SC8280XP_MASTER_CNOC_DC_NOC,
430 .links = { SC8280XP_SLAVE_LLCC_CFG,
431 SC8280XP_SLAVE_GEM_NOC_CFG
435 static struct qcom_icc_node alm_gpu_tcu = {
436 .name = "alm_gpu_tcu",
437 .id = SC8280XP_MASTER_GPU_TCU,
441 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
446 static struct qcom_icc_node alm_pcie_tcu = {
447 .name = "alm_pcie_tcu",
448 .id = SC8280XP_MASTER_PCIE_TCU,
452 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
457 static struct qcom_icc_node alm_sys_tcu = {
458 .name = "alm_sys_tcu",
459 .id = SC8280XP_MASTER_SYS_TCU,
463 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
468 static struct qcom_icc_node chm_apps = {
470 .id = SC8280XP_MASTER_APPSS_PROC,
474 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
476 SC8280XP_SLAVE_GEM_NOC_PCIE_CNOC
480 static struct qcom_icc_node qnm_cmpnoc0 = {
481 .name = "qnm_cmpnoc0",
482 .id = SC8280XP_MASTER_COMPUTE_NOC,
486 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
491 static struct qcom_icc_node qnm_cmpnoc1 = {
492 .name = "qnm_cmpnoc1",
493 .id = SC8280XP_MASTER_COMPUTE_NOC_1,
497 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
502 static struct qcom_icc_node qnm_gemnoc_cfg = {
503 .name = "qnm_gemnoc_cfg",
504 .id = SC8280XP_MASTER_GEM_NOC_CFG,
508 .links = { SC8280XP_SLAVE_SERVICE_GEM_NOC_1,
509 SC8280XP_SLAVE_SERVICE_GEM_NOC_2,
510 SC8280XP_SLAVE_SERVICE_GEM_NOC
514 static struct qcom_icc_node qnm_gpu = {
516 .id = SC8280XP_MASTER_GFX3D,
520 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
525 static struct qcom_icc_node qnm_mnoc_hf = {
526 .name = "qnm_mnoc_hf",
527 .id = SC8280XP_MASTER_MNOC_HF_MEM_NOC,
531 .links = { SC8280XP_SLAVE_LLCC,
532 SC8280XP_SLAVE_GEM_NOC_PCIE_CNOC
536 static struct qcom_icc_node qnm_mnoc_sf = {
537 .name = "qnm_mnoc_sf",
538 .id = SC8280XP_MASTER_MNOC_SF_MEM_NOC,
542 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
547 static struct qcom_icc_node qnm_pcie = {
549 .id = SC8280XP_MASTER_ANOC_PCIE_GEM_NOC,
553 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
558 static struct qcom_icc_node qnm_snoc_gc = {
559 .name = "qnm_snoc_gc",
560 .id = SC8280XP_MASTER_SNOC_GC_MEM_NOC,
564 .links = { SC8280XP_SLAVE_LLCC },
567 static struct qcom_icc_node qnm_snoc_sf = {
568 .name = "qnm_snoc_sf",
569 .id = SC8280XP_MASTER_SNOC_SF_MEM_NOC,
573 .links = { SC8280XP_SLAVE_GEM_NOC_CNOC,
575 SC8280XP_SLAVE_GEM_NOC_PCIE_CNOC },
578 static struct qcom_icc_node qhm_config_noc = {
579 .name = "qhm_config_noc",
580 .id = SC8280XP_MASTER_CNOC_LPASS_AG_NOC,
584 .links = { SC8280XP_SLAVE_LPASS_CORE_CFG,
585 SC8280XP_SLAVE_LPASS_LPI_CFG,
586 SC8280XP_SLAVE_LPASS_MPU_CFG,
587 SC8280XP_SLAVE_LPASS_TOP_CFG,
588 SC8280XP_SLAVE_SERVICES_LPASS_AML_NOC,
589 SC8280XP_SLAVE_SERVICE_LPASS_AG_NOC
593 static struct qcom_icc_node qxm_lpass_dsp = {
594 .name = "qxm_lpass_dsp",
595 .id = SC8280XP_MASTER_LPASS_PROC,
599 .links = { SC8280XP_SLAVE_LPASS_TOP_CFG,
600 SC8280XP_SLAVE_LPASS_SNOC,
601 SC8280XP_SLAVE_SERVICES_LPASS_AML_NOC,
602 SC8280XP_SLAVE_SERVICE_LPASS_AG_NOC
606 static struct qcom_icc_node llcc_mc = {
608 .id = SC8280XP_MASTER_LLCC,
612 .links = { SC8280XP_SLAVE_EBI1 },
615 static struct qcom_icc_node qnm_camnoc_hf = {
616 .name = "qnm_camnoc_hf",
617 .id = SC8280XP_MASTER_CAMNOC_HF,
621 .links = { SC8280XP_SLAVE_MNOC_HF_MEM_NOC },
624 static struct qcom_icc_node qnm_mdp0_0 = {
625 .name = "qnm_mdp0_0",
626 .id = SC8280XP_MASTER_MDP0,
630 .links = { SC8280XP_SLAVE_MNOC_HF_MEM_NOC },
633 static struct qcom_icc_node qnm_mdp0_1 = {
634 .name = "qnm_mdp0_1",
635 .id = SC8280XP_MASTER_MDP1,
639 .links = { SC8280XP_SLAVE_MNOC_HF_MEM_NOC },
642 static struct qcom_icc_node qnm_mdp1_0 = {
643 .name = "qnm_mdp1_0",
644 .id = SC8280XP_MASTER_MDP_CORE1_0,
648 .links = { SC8280XP_SLAVE_MNOC_HF_MEM_NOC },
651 static struct qcom_icc_node qnm_mdp1_1 = {
652 .name = "qnm_mdp1_1",
653 .id = SC8280XP_MASTER_MDP_CORE1_1,
657 .links = { SC8280XP_SLAVE_MNOC_HF_MEM_NOC },
660 static struct qcom_icc_node qnm_mnoc_cfg = {
661 .name = "qnm_mnoc_cfg",
662 .id = SC8280XP_MASTER_CNOC_MNOC_CFG,
666 .links = { SC8280XP_SLAVE_SERVICE_MNOC },
669 static struct qcom_icc_node qnm_rot_0 = {
671 .id = SC8280XP_MASTER_ROTATOR,
675 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
678 static struct qcom_icc_node qnm_rot_1 = {
680 .id = SC8280XP_MASTER_ROTATOR_1,
684 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
687 static struct qcom_icc_node qnm_video0 = {
688 .name = "qnm_video0",
689 .id = SC8280XP_MASTER_VIDEO_P0,
693 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
696 static struct qcom_icc_node qnm_video1 = {
697 .name = "qnm_video1",
698 .id = SC8280XP_MASTER_VIDEO_P1,
702 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
705 static struct qcom_icc_node qnm_video_cvp = {
706 .name = "qnm_video_cvp",
707 .id = SC8280XP_MASTER_VIDEO_PROC,
711 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
714 static struct qcom_icc_node qxm_camnoc_icp = {
715 .name = "qxm_camnoc_icp",
716 .id = SC8280XP_MASTER_CAMNOC_ICP,
720 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
723 static struct qcom_icc_node qxm_camnoc_sf = {
724 .name = "qxm_camnoc_sf",
725 .id = SC8280XP_MASTER_CAMNOC_SF,
729 .links = { SC8280XP_SLAVE_MNOC_SF_MEM_NOC },
732 static struct qcom_icc_node qhm_nsp_noc_config = {
733 .name = "qhm_nsp_noc_config",
734 .id = SC8280XP_MASTER_CDSP_NOC_CFG,
738 .links = { SC8280XP_SLAVE_SERVICE_NSP_NOC },
741 static struct qcom_icc_node qxm_nsp = {
743 .id = SC8280XP_MASTER_CDSP_PROC,
747 .links = { SC8280XP_SLAVE_CDSP_MEM_NOC,
748 SC8280XP_SLAVE_NSP_XFR
752 static struct qcom_icc_node qhm_nspb_noc_config = {
753 .name = "qhm_nspb_noc_config",
754 .id = SC8280XP_MASTER_CDSPB_NOC_CFG,
758 .links = { SC8280XP_SLAVE_SERVICE_NSPB_NOC },
761 static struct qcom_icc_node qxm_nspb = {
763 .id = SC8280XP_MASTER_CDSP_PROC_B,
767 .links = { SC8280XP_SLAVE_CDSPB_MEM_NOC,
768 SC8280XP_SLAVE_NSPB_XFR
772 static struct qcom_icc_node qnm_aggre1_noc = {
773 .name = "qnm_aggre1_noc",
774 .id = SC8280XP_MASTER_A1NOC_SNOC,
778 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_SF },
781 static struct qcom_icc_node qnm_aggre2_noc = {
782 .name = "qnm_aggre2_noc",
783 .id = SC8280XP_MASTER_A2NOC_SNOC,
787 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_SF },
790 static struct qcom_icc_node qnm_aggre_usb_noc = {
791 .name = "qnm_aggre_usb_noc",
792 .id = SC8280XP_MASTER_USB_NOC_SNOC,
796 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_SF },
799 static struct qcom_icc_node qnm_lpass_noc = {
800 .name = "qnm_lpass_noc",
801 .id = SC8280XP_MASTER_LPASS_ANOC,
805 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_SF },
808 static struct qcom_icc_node qnm_snoc_cfg = {
809 .name = "qnm_snoc_cfg",
810 .id = SC8280XP_MASTER_SNOC_CFG,
814 .links = { SC8280XP_SLAVE_SERVICE_SNOC },
817 static struct qcom_icc_node qxm_pimem = {
819 .id = SC8280XP_MASTER_PIMEM,
823 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_GC },
826 static struct qcom_icc_node xm_gic = {
828 .id = SC8280XP_MASTER_GIC,
832 .links = { SC8280XP_SLAVE_SNOC_GEM_NOC_GC },
835 static struct qcom_icc_node qns_a1noc_snoc = {
836 .name = "qns_a1noc_snoc",
837 .id = SC8280XP_SLAVE_A1NOC_SNOC,
841 .links = { SC8280XP_MASTER_A1NOC_SNOC },
844 static struct qcom_icc_node qns_aggre_usb_snoc = {
845 .name = "qns_aggre_usb_snoc",
846 .id = SC8280XP_SLAVE_USB_NOC_SNOC,
850 .links = { SC8280XP_MASTER_USB_NOC_SNOC },
853 static struct qcom_icc_node srvc_aggre1_noc = {
854 .name = "srvc_aggre1_noc",
855 .id = SC8280XP_SLAVE_SERVICE_A1NOC,
860 static struct qcom_icc_node qns_a2noc_snoc = {
861 .name = "qns_a2noc_snoc",
862 .id = SC8280XP_SLAVE_A2NOC_SNOC,
866 .links = { SC8280XP_MASTER_A2NOC_SNOC },
869 static struct qcom_icc_node qns_pcie_gem_noc = {
870 .name = "qns_pcie_gem_noc",
871 .id = SC8280XP_SLAVE_ANOC_PCIE_GEM_NOC,
875 .links = { SC8280XP_MASTER_ANOC_PCIE_GEM_NOC },
878 static struct qcom_icc_node srvc_aggre2_noc = {
879 .name = "srvc_aggre2_noc",
880 .id = SC8280XP_SLAVE_SERVICE_A2NOC,
885 static struct qcom_icc_node ipa_core_slave = {
886 .name = "ipa_core_slave",
887 .id = SC8280XP_SLAVE_IPA_CORE,
892 static struct qcom_icc_node qup0_core_slave = {
893 .name = "qup0_core_slave",
894 .id = SC8280XP_SLAVE_QUP_CORE_0,
899 static struct qcom_icc_node qup1_core_slave = {
900 .name = "qup1_core_slave",
901 .id = SC8280XP_SLAVE_QUP_CORE_1,
906 static struct qcom_icc_node qup2_core_slave = {
907 .name = "qup2_core_slave",
908 .id = SC8280XP_SLAVE_QUP_CORE_2,
913 static struct qcom_icc_node qhs_ahb2phy0 = {
914 .name = "qhs_ahb2phy0",
915 .id = SC8280XP_SLAVE_AHB2PHY_0,
920 static struct qcom_icc_node qhs_ahb2phy1 = {
921 .name = "qhs_ahb2phy1",
922 .id = SC8280XP_SLAVE_AHB2PHY_1,
927 static struct qcom_icc_node qhs_ahb2phy2 = {
928 .name = "qhs_ahb2phy2",
929 .id = SC8280XP_SLAVE_AHB2PHY_2,
934 static struct qcom_icc_node qhs_aoss = {
936 .id = SC8280XP_SLAVE_AOSS,
941 static struct qcom_icc_node qhs_apss = {
943 .id = SC8280XP_SLAVE_APPSS,
948 static struct qcom_icc_node qhs_camera_cfg = {
949 .name = "qhs_camera_cfg",
950 .id = SC8280XP_SLAVE_CAMERA_CFG,
955 static struct qcom_icc_node qhs_clk_ctl = {
956 .name = "qhs_clk_ctl",
957 .id = SC8280XP_SLAVE_CLK_CTL,
962 static struct qcom_icc_node qhs_compute0_cfg = {
963 .name = "qhs_compute0_cfg",
964 .id = SC8280XP_SLAVE_CDSP_CFG,
968 .links = { SC8280XP_MASTER_CDSP_NOC_CFG },
971 static struct qcom_icc_node qhs_compute1_cfg = {
972 .name = "qhs_compute1_cfg",
973 .id = SC8280XP_SLAVE_CDSP1_CFG,
977 .links = { SC8280XP_MASTER_CDSPB_NOC_CFG },
980 static struct qcom_icc_node qhs_cpr_cx = {
981 .name = "qhs_cpr_cx",
982 .id = SC8280XP_SLAVE_RBCPR_CX_CFG,
987 static struct qcom_icc_node qhs_cpr_mmcx = {
988 .name = "qhs_cpr_mmcx",
989 .id = SC8280XP_SLAVE_RBCPR_MMCX_CFG,
994 static struct qcom_icc_node qhs_cpr_mx = {
995 .name = "qhs_cpr_mx",
996 .id = SC8280XP_SLAVE_RBCPR_MX_CFG,
1001 static struct qcom_icc_node qhs_cpr_nspcx = {
1002 .name = "qhs_cpr_nspcx",
1003 .id = SC8280XP_SLAVE_CPR_NSPCX,
1008 static struct qcom_icc_node qhs_crypto0_cfg = {
1009 .name = "qhs_crypto0_cfg",
1010 .id = SC8280XP_SLAVE_CRYPTO_0_CFG,
1015 static struct qcom_icc_node qhs_cx_rdpm = {
1016 .name = "qhs_cx_rdpm",
1017 .id = SC8280XP_SLAVE_CX_RDPM,
1022 static struct qcom_icc_node qhs_dcc_cfg = {
1023 .name = "qhs_dcc_cfg",
1024 .id = SC8280XP_SLAVE_DCC_CFG,
1029 static struct qcom_icc_node qhs_display0_cfg = {
1030 .name = "qhs_display0_cfg",
1031 .id = SC8280XP_SLAVE_DISPLAY_CFG,
1036 static struct qcom_icc_node qhs_display1_cfg = {
1037 .name = "qhs_display1_cfg",
1038 .id = SC8280XP_SLAVE_DISPLAY1_CFG,
1043 static struct qcom_icc_node qhs_emac0_cfg = {
1044 .name = "qhs_emac0_cfg",
1045 .id = SC8280XP_SLAVE_EMAC_CFG,
1050 static struct qcom_icc_node qhs_emac1_cfg = {
1051 .name = "qhs_emac1_cfg",
1052 .id = SC8280XP_SLAVE_EMAC1_CFG,
1057 static struct qcom_icc_node qhs_gpuss_cfg = {
1058 .name = "qhs_gpuss_cfg",
1059 .id = SC8280XP_SLAVE_GFX3D_CFG,
1064 static struct qcom_icc_node qhs_hwkm = {
1066 .id = SC8280XP_SLAVE_HWKM,
1071 static struct qcom_icc_node qhs_imem_cfg = {
1072 .name = "qhs_imem_cfg",
1073 .id = SC8280XP_SLAVE_IMEM_CFG,
1078 static struct qcom_icc_node qhs_ipa = {
1080 .id = SC8280XP_SLAVE_IPA_CFG,
1085 static struct qcom_icc_node qhs_ipc_router = {
1086 .name = "qhs_ipc_router",
1087 .id = SC8280XP_SLAVE_IPC_ROUTER_CFG,
1092 static struct qcom_icc_node qhs_lpass_cfg = {
1093 .name = "qhs_lpass_cfg",
1094 .id = SC8280XP_SLAVE_LPASS,
1098 .links = { SC8280XP_MASTER_CNOC_LPASS_AG_NOC },
1101 static struct qcom_icc_node qhs_mx_rdpm = {
1102 .name = "qhs_mx_rdpm",
1103 .id = SC8280XP_SLAVE_MX_RDPM,
1108 static struct qcom_icc_node qhs_mxc_rdpm = {
1109 .name = "qhs_mxc_rdpm",
1110 .id = SC8280XP_SLAVE_MXC_RDPM,
1115 static struct qcom_icc_node qhs_pcie0_cfg = {
1116 .name = "qhs_pcie0_cfg",
1117 .id = SC8280XP_SLAVE_PCIE_0_CFG,
1122 static struct qcom_icc_node qhs_pcie1_cfg = {
1123 .name = "qhs_pcie1_cfg",
1124 .id = SC8280XP_SLAVE_PCIE_1_CFG,
1129 static struct qcom_icc_node qhs_pcie2a_cfg = {
1130 .name = "qhs_pcie2a_cfg",
1131 .id = SC8280XP_SLAVE_PCIE_2A_CFG,
1136 static struct qcom_icc_node qhs_pcie2b_cfg = {
1137 .name = "qhs_pcie2b_cfg",
1138 .id = SC8280XP_SLAVE_PCIE_2B_CFG,
1143 static struct qcom_icc_node qhs_pcie3a_cfg = {
1144 .name = "qhs_pcie3a_cfg",
1145 .id = SC8280XP_SLAVE_PCIE_3A_CFG,
1150 static struct qcom_icc_node qhs_pcie3b_cfg = {
1151 .name = "qhs_pcie3b_cfg",
1152 .id = SC8280XP_SLAVE_PCIE_3B_CFG,
1157 static struct qcom_icc_node qhs_pcie4_cfg = {
1158 .name = "qhs_pcie4_cfg",
1159 .id = SC8280XP_SLAVE_PCIE_4_CFG,
1164 static struct qcom_icc_node qhs_pcie_rsc_cfg = {
1165 .name = "qhs_pcie_rsc_cfg",
1166 .id = SC8280XP_SLAVE_PCIE_RSC_CFG,
1171 static struct qcom_icc_node qhs_pdm = {
1173 .id = SC8280XP_SLAVE_PDM,
1178 static struct qcom_icc_node qhs_pimem_cfg = {
1179 .name = "qhs_pimem_cfg",
1180 .id = SC8280XP_SLAVE_PIMEM_CFG,
1185 static struct qcom_icc_node qhs_pka_wrapper_cfg = {
1186 .name = "qhs_pka_wrapper_cfg",
1187 .id = SC8280XP_SLAVE_PKA_WRAPPER_CFG,
1192 static struct qcom_icc_node qhs_pmu_wrapper_cfg = {
1193 .name = "qhs_pmu_wrapper_cfg",
1194 .id = SC8280XP_SLAVE_PMU_WRAPPER_CFG,
1199 static struct qcom_icc_node qhs_qdss_cfg = {
1200 .name = "qhs_qdss_cfg",
1201 .id = SC8280XP_SLAVE_QDSS_CFG,
1206 static struct qcom_icc_node qhs_qspi = {
1208 .id = SC8280XP_SLAVE_QSPI_0,
1213 static struct qcom_icc_node qhs_qup0 = {
1215 .id = SC8280XP_SLAVE_QUP_0,
1220 static struct qcom_icc_node qhs_qup1 = {
1222 .id = SC8280XP_SLAVE_QUP_1,
1227 static struct qcom_icc_node qhs_qup2 = {
1229 .id = SC8280XP_SLAVE_QUP_2,
1234 static struct qcom_icc_node qhs_sdc2 = {
1236 .id = SC8280XP_SLAVE_SDCC_2,
1241 static struct qcom_icc_node qhs_sdc4 = {
1243 .id = SC8280XP_SLAVE_SDCC_4,
1248 static struct qcom_icc_node qhs_security = {
1249 .name = "qhs_security",
1250 .id = SC8280XP_SLAVE_SECURITY,
1255 static struct qcom_icc_node qhs_smmuv3_cfg = {
1256 .name = "qhs_smmuv3_cfg",
1257 .id = SC8280XP_SLAVE_SMMUV3_CFG,
1262 static struct qcom_icc_node qhs_smss_cfg = {
1263 .name = "qhs_smss_cfg",
1264 .id = SC8280XP_SLAVE_SMSS_CFG,
1269 static struct qcom_icc_node qhs_spss_cfg = {
1270 .name = "qhs_spss_cfg",
1271 .id = SC8280XP_SLAVE_SPSS_CFG,
1276 static struct qcom_icc_node qhs_tcsr = {
1278 .id = SC8280XP_SLAVE_TCSR,
1283 static struct qcom_icc_node qhs_tlmm = {
1285 .id = SC8280XP_SLAVE_TLMM,
1290 static struct qcom_icc_node qhs_ufs_card_cfg = {
1291 .name = "qhs_ufs_card_cfg",
1292 .id = SC8280XP_SLAVE_UFS_CARD_CFG,
1297 static struct qcom_icc_node qhs_ufs_mem_cfg = {
1298 .name = "qhs_ufs_mem_cfg",
1299 .id = SC8280XP_SLAVE_UFS_MEM_CFG,
1304 static struct qcom_icc_node qhs_usb3_0 = {
1305 .name = "qhs_usb3_0",
1306 .id = SC8280XP_SLAVE_USB3_0,
1311 static struct qcom_icc_node qhs_usb3_1 = {
1312 .name = "qhs_usb3_1",
1313 .id = SC8280XP_SLAVE_USB3_1,
1318 static struct qcom_icc_node qhs_usb3_mp = {
1319 .name = "qhs_usb3_mp",
1320 .id = SC8280XP_SLAVE_USB3_MP,
1325 static struct qcom_icc_node qhs_usb4_host_0 = {
1326 .name = "qhs_usb4_host_0",
1327 .id = SC8280XP_SLAVE_USB4_0,
1332 static struct qcom_icc_node qhs_usb4_host_1 = {
1333 .name = "qhs_usb4_host_1",
1334 .id = SC8280XP_SLAVE_USB4_1,
1339 static struct qcom_icc_node qhs_venus_cfg = {
1340 .name = "qhs_venus_cfg",
1341 .id = SC8280XP_SLAVE_VENUS_CFG,
1346 static struct qcom_icc_node qhs_vsense_ctrl_cfg = {
1347 .name = "qhs_vsense_ctrl_cfg",
1348 .id = SC8280XP_SLAVE_VSENSE_CTRL_CFG,
1353 static struct qcom_icc_node qhs_vsense_ctrl_r_cfg = {
1354 .name = "qhs_vsense_ctrl_r_cfg",
1355 .id = SC8280XP_SLAVE_VSENSE_CTRL_R_CFG,
1360 static struct qcom_icc_node qns_a1_noc_cfg = {
1361 .name = "qns_a1_noc_cfg",
1362 .id = SC8280XP_SLAVE_A1NOC_CFG,
1366 .links = { SC8280XP_MASTER_A1NOC_CFG },
1369 static struct qcom_icc_node qns_a2_noc_cfg = {
1370 .name = "qns_a2_noc_cfg",
1371 .id = SC8280XP_SLAVE_A2NOC_CFG,
1375 .links = { SC8280XP_MASTER_A2NOC_CFG },
1378 static struct qcom_icc_node qns_anoc_pcie_bridge_cfg = {
1379 .name = "qns_anoc_pcie_bridge_cfg",
1380 .id = SC8280XP_SLAVE_ANOC_PCIE_BRIDGE_CFG,
1385 static struct qcom_icc_node qns_ddrss_cfg = {
1386 .name = "qns_ddrss_cfg",
1387 .id = SC8280XP_SLAVE_DDRSS_CFG,
1391 .links = { SC8280XP_MASTER_CNOC_DC_NOC },
1394 static struct qcom_icc_node qns_mnoc_cfg = {
1395 .name = "qns_mnoc_cfg",
1396 .id = SC8280XP_SLAVE_CNOC_MNOC_CFG,
1400 .links = { SC8280XP_MASTER_CNOC_MNOC_CFG },
1403 static struct qcom_icc_node qns_snoc_cfg = {
1404 .name = "qns_snoc_cfg",
1405 .id = SC8280XP_SLAVE_SNOC_CFG,
1409 .links = { SC8280XP_MASTER_SNOC_CFG },
1412 static struct qcom_icc_node qns_snoc_sf_bridge_cfg = {
1413 .name = "qns_snoc_sf_bridge_cfg",
1414 .id = SC8280XP_SLAVE_SNOC_SF_BRIDGE_CFG,
1419 static struct qcom_icc_node qxs_imem = {
1421 .id = SC8280XP_SLAVE_IMEM,
1426 static struct qcom_icc_node qxs_pimem = {
1427 .name = "qxs_pimem",
1428 .id = SC8280XP_SLAVE_PIMEM,
1433 static struct qcom_icc_node srvc_cnoc = {
1434 .name = "srvc_cnoc",
1435 .id = SC8280XP_SLAVE_SERVICE_CNOC,
1440 static struct qcom_icc_node xs_pcie_0 = {
1441 .name = "xs_pcie_0",
1442 .id = SC8280XP_SLAVE_PCIE_0,
1447 static struct qcom_icc_node xs_pcie_1 = {
1448 .name = "xs_pcie_1",
1449 .id = SC8280XP_SLAVE_PCIE_1,
1454 static struct qcom_icc_node xs_pcie_2a = {
1455 .name = "xs_pcie_2a",
1456 .id = SC8280XP_SLAVE_PCIE_2A,
1461 static struct qcom_icc_node xs_pcie_2b = {
1462 .name = "xs_pcie_2b",
1463 .id = SC8280XP_SLAVE_PCIE_2B,
1468 static struct qcom_icc_node xs_pcie_3a = {
1469 .name = "xs_pcie_3a",
1470 .id = SC8280XP_SLAVE_PCIE_3A,
1475 static struct qcom_icc_node xs_pcie_3b = {
1476 .name = "xs_pcie_3b",
1477 .id = SC8280XP_SLAVE_PCIE_3B,
1482 static struct qcom_icc_node xs_pcie_4 = {
1483 .name = "xs_pcie_4",
1484 .id = SC8280XP_SLAVE_PCIE_4,
1489 static struct qcom_icc_node xs_qdss_stm = {
1490 .name = "xs_qdss_stm",
1491 .id = SC8280XP_SLAVE_QDSS_STM,
1496 static struct qcom_icc_node xs_smss = {
1498 .id = SC8280XP_SLAVE_SMSS,
1503 static struct qcom_icc_node xs_sys_tcu_cfg = {
1504 .name = "xs_sys_tcu_cfg",
1505 .id = SC8280XP_SLAVE_TCU,
1510 static struct qcom_icc_node qhs_llcc = {
1512 .id = SC8280XP_SLAVE_LLCC_CFG,
1517 static struct qcom_icc_node qns_gemnoc = {
1518 .name = "qns_gemnoc",
1519 .id = SC8280XP_SLAVE_GEM_NOC_CFG,
1523 .links = { SC8280XP_MASTER_GEM_NOC_CFG },
1526 static struct qcom_icc_node qns_gem_noc_cnoc = {
1527 .name = "qns_gem_noc_cnoc",
1528 .id = SC8280XP_SLAVE_GEM_NOC_CNOC,
1532 .links = { SC8280XP_MASTER_GEM_NOC_CNOC },
1535 static struct qcom_icc_node qns_llcc = {
1537 .id = SC8280XP_SLAVE_LLCC,
1541 .links = { SC8280XP_MASTER_LLCC },
1544 static struct qcom_icc_node qns_pcie = {
1546 .id = SC8280XP_SLAVE_GEM_NOC_PCIE_CNOC,
1550 .links = { SC8280XP_MASTER_GEM_NOC_PCIE_SNOC },
1553 static struct qcom_icc_node srvc_even_gemnoc = {
1554 .name = "srvc_even_gemnoc",
1555 .id = SC8280XP_SLAVE_SERVICE_GEM_NOC_1,
1560 static struct qcom_icc_node srvc_odd_gemnoc = {
1561 .name = "srvc_odd_gemnoc",
1562 .id = SC8280XP_SLAVE_SERVICE_GEM_NOC_2,
1567 static struct qcom_icc_node srvc_sys_gemnoc = {
1568 .name = "srvc_sys_gemnoc",
1569 .id = SC8280XP_SLAVE_SERVICE_GEM_NOC,
1574 static struct qcom_icc_node qhs_lpass_core = {
1575 .name = "qhs_lpass_core",
1576 .id = SC8280XP_SLAVE_LPASS_CORE_CFG,
1581 static struct qcom_icc_node qhs_lpass_lpi = {
1582 .name = "qhs_lpass_lpi",
1583 .id = SC8280XP_SLAVE_LPASS_LPI_CFG,
1588 static struct qcom_icc_node qhs_lpass_mpu = {
1589 .name = "qhs_lpass_mpu",
1590 .id = SC8280XP_SLAVE_LPASS_MPU_CFG,
1595 static struct qcom_icc_node qhs_lpass_top = {
1596 .name = "qhs_lpass_top",
1597 .id = SC8280XP_SLAVE_LPASS_TOP_CFG,
1602 static struct qcom_icc_node qns_sysnoc = {
1603 .name = "qns_sysnoc",
1604 .id = SC8280XP_SLAVE_LPASS_SNOC,
1608 .links = { SC8280XP_MASTER_LPASS_ANOC },
1611 static struct qcom_icc_node srvc_niu_aml_noc = {
1612 .name = "srvc_niu_aml_noc",
1613 .id = SC8280XP_SLAVE_SERVICES_LPASS_AML_NOC,
1618 static struct qcom_icc_node srvc_niu_lpass_agnoc = {
1619 .name = "srvc_niu_lpass_agnoc",
1620 .id = SC8280XP_SLAVE_SERVICE_LPASS_AG_NOC,
1625 static struct qcom_icc_node ebi = {
1627 .id = SC8280XP_SLAVE_EBI1,
1632 static struct qcom_icc_node qns_mem_noc_hf = {
1633 .name = "qns_mem_noc_hf",
1634 .id = SC8280XP_SLAVE_MNOC_HF_MEM_NOC,
1638 .links = { SC8280XP_MASTER_MNOC_HF_MEM_NOC },
1641 static struct qcom_icc_node qns_mem_noc_sf = {
1642 .name = "qns_mem_noc_sf",
1643 .id = SC8280XP_SLAVE_MNOC_SF_MEM_NOC,
1647 .links = { SC8280XP_MASTER_MNOC_SF_MEM_NOC },
1650 static struct qcom_icc_node srvc_mnoc = {
1651 .name = "srvc_mnoc",
1652 .id = SC8280XP_SLAVE_SERVICE_MNOC,
1657 static struct qcom_icc_node qns_nsp_gemnoc = {
1658 .name = "qns_nsp_gemnoc",
1659 .id = SC8280XP_SLAVE_CDSP_MEM_NOC,
1663 .links = { SC8280XP_MASTER_COMPUTE_NOC },
1666 static struct qcom_icc_node qxs_nsp_xfr = {
1667 .name = "qxs_nsp_xfr",
1668 .id = SC8280XP_SLAVE_NSP_XFR,
1673 static struct qcom_icc_node service_nsp_noc = {
1674 .name = "service_nsp_noc",
1675 .id = SC8280XP_SLAVE_SERVICE_NSP_NOC,
1680 static struct qcom_icc_node qns_nspb_gemnoc = {
1681 .name = "qns_nspb_gemnoc",
1682 .id = SC8280XP_SLAVE_CDSPB_MEM_NOC,
1686 .links = { SC8280XP_MASTER_COMPUTE_NOC_1 },
1689 static struct qcom_icc_node qxs_nspb_xfr = {
1690 .name = "qxs_nspb_xfr",
1691 .id = SC8280XP_SLAVE_NSPB_XFR,
1696 static struct qcom_icc_node service_nspb_noc = {
1697 .name = "service_nspb_noc",
1698 .id = SC8280XP_SLAVE_SERVICE_NSPB_NOC,
1703 static struct qcom_icc_node qns_gemnoc_gc = {
1704 .name = "qns_gemnoc_gc",
1705 .id = SC8280XP_SLAVE_SNOC_GEM_NOC_GC,
1709 .links = { SC8280XP_MASTER_SNOC_GC_MEM_NOC },
1712 static struct qcom_icc_node qns_gemnoc_sf = {
1713 .name = "qns_gemnoc_sf",
1714 .id = SC8280XP_SLAVE_SNOC_GEM_NOC_SF,
1718 .links = { SC8280XP_MASTER_SNOC_SF_MEM_NOC },
1721 static struct qcom_icc_node srvc_snoc = {
1722 .name = "srvc_snoc",
1723 .id = SC8280XP_SLAVE_SERVICE_SNOC,
1728 static struct qcom_icc_bcm bcm_acv = {
1734 static struct qcom_icc_bcm bcm_ce0 = {
1737 .nodes = { &qxm_crypto },
1740 static struct qcom_icc_bcm bcm_cn0 = {
1744 .nodes = { &qnm_gemnoc_cnoc,
1756 static struct qcom_icc_bcm bcm_cn1 = {
1759 .nodes = { &qhs_ahb2phy0,
1797 &qhs_pka_wrapper_cfg,
1798 &qhs_pmu_wrapper_cfg,
1816 &qhs_vsense_ctrl_cfg,
1817 &qhs_vsense_ctrl_r_cfg,
1820 &qns_anoc_pcie_bridge_cfg,
1824 &qns_snoc_sf_bridge_cfg,
1829 static struct qcom_icc_bcm bcm_cn2 = {
1832 .nodes = { &qhs_qspi,
1839 static struct qcom_icc_bcm bcm_cn3 = {
1842 .nodes = { &qxs_imem,
1848 static struct qcom_icc_bcm bcm_ip0 = {
1851 .nodes = { &ipa_core_slave },
1854 static struct qcom_icc_bcm bcm_mc0 = {
1861 static struct qcom_icc_bcm bcm_mm0 = {
1865 .nodes = { &qnm_camnoc_hf,
1873 static struct qcom_icc_bcm bcm_mm1 = {
1876 .nodes = { &qnm_rot_0,
1887 static struct qcom_icc_bcm bcm_nsa0 = {
1890 .nodes = { &qns_nsp_gemnoc,
1895 static struct qcom_icc_bcm bcm_nsa1 = {
1898 .nodes = { &qxm_nsp },
1901 static struct qcom_icc_bcm bcm_nsb0 = {
1904 .nodes = { &qns_nspb_gemnoc,
1909 static struct qcom_icc_bcm bcm_nsb1 = {
1912 .nodes = { &qxm_nspb },
1915 static struct qcom_icc_bcm bcm_pci0 = {
1918 .nodes = { &qns_pcie_gem_noc },
1921 static struct qcom_icc_bcm bcm_qup0 = {
1925 .nodes = { &qup0_core_slave },
1928 static struct qcom_icc_bcm bcm_qup1 = {
1932 .nodes = { &qup1_core_slave },
1935 static struct qcom_icc_bcm bcm_qup2 = {
1939 .nodes = { &qup2_core_slave },
1942 static struct qcom_icc_bcm bcm_sh0 = {
1946 .nodes = { &qns_llcc },
1949 static struct qcom_icc_bcm bcm_sh2 = {
1952 .nodes = { &chm_apps },
1955 static struct qcom_icc_bcm bcm_sn0 = {
1959 .nodes = { &qns_gemnoc_sf },
1962 static struct qcom_icc_bcm bcm_sn1 = {
1965 .nodes = { &qns_gemnoc_gc },
1968 static struct qcom_icc_bcm bcm_sn2 = {
1971 .nodes = { &qxs_pimem },
1974 static struct qcom_icc_bcm bcm_sn3 = {
1977 .nodes = { &qns_a1noc_snoc,
1982 static struct qcom_icc_bcm bcm_sn4 = {
1985 .nodes = { &qns_a2noc_snoc,
1990 static struct qcom_icc_bcm bcm_sn5 = {
1993 .nodes = { &qns_aggre_usb_snoc,
1998 static struct qcom_icc_bcm bcm_sn9 = {
2001 .nodes = { &qns_sysnoc,
2006 static struct qcom_icc_bcm bcm_sn10 = {
2009 .nodes = { &xs_qdss_stm },
2012 static struct qcom_icc_bcm * const aggre1_noc_bcms[] = {
2017 static struct qcom_icc_node * const aggre1_noc_nodes[] = {
2018 [MASTER_QSPI_0] = &qhm_qspi,
2019 [MASTER_QUP_1] = &qhm_qup1,
2020 [MASTER_QUP_2] = &qhm_qup2,
2021 [MASTER_A1NOC_CFG] = &qnm_a1noc_cfg,
2022 [MASTER_IPA] = &qxm_ipa,
2023 [MASTER_EMAC_1] = &xm_emac_1,
2024 [MASTER_SDCC_4] = &xm_sdc4,
2025 [MASTER_UFS_MEM] = &xm_ufs_mem,
2026 [MASTER_USB3_0] = &xm_usb3_0,
2027 [MASTER_USB3_1] = &xm_usb3_1,
2028 [MASTER_USB3_MP] = &xm_usb3_mp,
2029 [MASTER_USB4_0] = &xm_usb4_host0,
2030 [MASTER_USB4_1] = &xm_usb4_host1,
2031 [SLAVE_A1NOC_SNOC] = &qns_a1noc_snoc,
2032 [SLAVE_USB_NOC_SNOC] = &qns_aggre_usb_snoc,
2033 [SLAVE_SERVICE_A1NOC] = &srvc_aggre1_noc,
2036 static const struct qcom_icc_desc sc8280xp_aggre1_noc = {
2037 .nodes = aggre1_noc_nodes,
2038 .num_nodes = ARRAY_SIZE(aggre1_noc_nodes),
2039 .bcms = aggre1_noc_bcms,
2040 .num_bcms = ARRAY_SIZE(aggre1_noc_bcms),
2043 static struct qcom_icc_bcm * const aggre2_noc_bcms[] = {
2049 static struct qcom_icc_node * const aggre2_noc_nodes[] = {
2050 [MASTER_QDSS_BAM] = &qhm_qdss_bam,
2051 [MASTER_QUP_0] = &qhm_qup0,
2052 [MASTER_A2NOC_CFG] = &qnm_a2noc_cfg,
2053 [MASTER_CRYPTO] = &qxm_crypto,
2054 [MASTER_SENSORS_PROC] = &qxm_sensorss_q6,
2055 [MASTER_SP] = &qxm_sp,
2056 [MASTER_EMAC] = &xm_emac_0,
2057 [MASTER_PCIE_0] = &xm_pcie3_0,
2058 [MASTER_PCIE_1] = &xm_pcie3_1,
2059 [MASTER_PCIE_2A] = &xm_pcie3_2a,
2060 [MASTER_PCIE_2B] = &xm_pcie3_2b,
2061 [MASTER_PCIE_3A] = &xm_pcie3_3a,
2062 [MASTER_PCIE_3B] = &xm_pcie3_3b,
2063 [MASTER_PCIE_4] = &xm_pcie3_4,
2064 [MASTER_QDSS_ETR] = &xm_qdss_etr,
2065 [MASTER_SDCC_2] = &xm_sdc2,
2066 [MASTER_UFS_CARD] = &xm_ufs_card,
2067 [SLAVE_A2NOC_SNOC] = &qns_a2noc_snoc,
2068 [SLAVE_ANOC_PCIE_GEM_NOC] = &qns_pcie_gem_noc,
2069 [SLAVE_SERVICE_A2NOC] = &srvc_aggre2_noc,
2072 static const struct qcom_icc_desc sc8280xp_aggre2_noc = {
2073 .nodes = aggre2_noc_nodes,
2074 .num_nodes = ARRAY_SIZE(aggre2_noc_nodes),
2075 .bcms = aggre2_noc_bcms,
2076 .num_bcms = ARRAY_SIZE(aggre2_noc_bcms),
2079 static struct qcom_icc_bcm * const clk_virt_bcms[] = {
2086 static struct qcom_icc_node * const clk_virt_nodes[] = {
2087 [MASTER_IPA_CORE] = &ipa_core_master,
2088 [MASTER_QUP_CORE_0] = &qup0_core_master,
2089 [MASTER_QUP_CORE_1] = &qup1_core_master,
2090 [MASTER_QUP_CORE_2] = &qup2_core_master,
2091 [SLAVE_IPA_CORE] = &ipa_core_slave,
2092 [SLAVE_QUP_CORE_0] = &qup0_core_slave,
2093 [SLAVE_QUP_CORE_1] = &qup1_core_slave,
2094 [SLAVE_QUP_CORE_2] = &qup2_core_slave,
2097 static const struct qcom_icc_desc sc8280xp_clk_virt = {
2098 .nodes = clk_virt_nodes,
2099 .num_nodes = ARRAY_SIZE(clk_virt_nodes),
2100 .bcms = clk_virt_bcms,
2101 .num_bcms = ARRAY_SIZE(clk_virt_bcms),
2104 static struct qcom_icc_bcm * const config_noc_bcms[] = {
2113 static struct qcom_icc_node * const config_noc_nodes[] = {
2114 [MASTER_GEM_NOC_CNOC] = &qnm_gemnoc_cnoc,
2115 [MASTER_GEM_NOC_PCIE_SNOC] = &qnm_gemnoc_pcie,
2116 [SLAVE_AHB2PHY_0] = &qhs_ahb2phy0,
2117 [SLAVE_AHB2PHY_1] = &qhs_ahb2phy1,
2118 [SLAVE_AHB2PHY_2] = &qhs_ahb2phy2,
2119 [SLAVE_AOSS] = &qhs_aoss,
2120 [SLAVE_APPSS] = &qhs_apss,
2121 [SLAVE_CAMERA_CFG] = &qhs_camera_cfg,
2122 [SLAVE_CLK_CTL] = &qhs_clk_ctl,
2123 [SLAVE_CDSP_CFG] = &qhs_compute0_cfg,
2124 [SLAVE_CDSP1_CFG] = &qhs_compute1_cfg,
2125 [SLAVE_RBCPR_CX_CFG] = &qhs_cpr_cx,
2126 [SLAVE_RBCPR_MMCX_CFG] = &qhs_cpr_mmcx,
2127 [SLAVE_RBCPR_MX_CFG] = &qhs_cpr_mx,
2128 [SLAVE_CPR_NSPCX] = &qhs_cpr_nspcx,
2129 [SLAVE_CRYPTO_0_CFG] = &qhs_crypto0_cfg,
2130 [SLAVE_CX_RDPM] = &qhs_cx_rdpm,
2131 [SLAVE_DCC_CFG] = &qhs_dcc_cfg,
2132 [SLAVE_DISPLAY_CFG] = &qhs_display0_cfg,
2133 [SLAVE_DISPLAY1_CFG] = &qhs_display1_cfg,
2134 [SLAVE_EMAC_CFG] = &qhs_emac0_cfg,
2135 [SLAVE_EMAC1_CFG] = &qhs_emac1_cfg,
2136 [SLAVE_GFX3D_CFG] = &qhs_gpuss_cfg,
2137 [SLAVE_HWKM] = &qhs_hwkm,
2138 [SLAVE_IMEM_CFG] = &qhs_imem_cfg,
2139 [SLAVE_IPA_CFG] = &qhs_ipa,
2140 [SLAVE_IPC_ROUTER_CFG] = &qhs_ipc_router,
2141 [SLAVE_LPASS] = &qhs_lpass_cfg,
2142 [SLAVE_MX_RDPM] = &qhs_mx_rdpm,
2143 [SLAVE_MXC_RDPM] = &qhs_mxc_rdpm,
2144 [SLAVE_PCIE_0_CFG] = &qhs_pcie0_cfg,
2145 [SLAVE_PCIE_1_CFG] = &qhs_pcie1_cfg,
2146 [SLAVE_PCIE_2A_CFG] = &qhs_pcie2a_cfg,
2147 [SLAVE_PCIE_2B_CFG] = &qhs_pcie2b_cfg,
2148 [SLAVE_PCIE_3A_CFG] = &qhs_pcie3a_cfg,
2149 [SLAVE_PCIE_3B_CFG] = &qhs_pcie3b_cfg,
2150 [SLAVE_PCIE_4_CFG] = &qhs_pcie4_cfg,
2151 [SLAVE_PCIE_RSC_CFG] = &qhs_pcie_rsc_cfg,
2152 [SLAVE_PDM] = &qhs_pdm,
2153 [SLAVE_PIMEM_CFG] = &qhs_pimem_cfg,
2154 [SLAVE_PKA_WRAPPER_CFG] = &qhs_pka_wrapper_cfg,
2155 [SLAVE_PMU_WRAPPER_CFG] = &qhs_pmu_wrapper_cfg,
2156 [SLAVE_QDSS_CFG] = &qhs_qdss_cfg,
2157 [SLAVE_QSPI_0] = &qhs_qspi,
2158 [SLAVE_QUP_0] = &qhs_qup0,
2159 [SLAVE_QUP_1] = &qhs_qup1,
2160 [SLAVE_QUP_2] = &qhs_qup2,
2161 [SLAVE_SDCC_2] = &qhs_sdc2,
2162 [SLAVE_SDCC_4] = &qhs_sdc4,
2163 [SLAVE_SECURITY] = &qhs_security,
2164 [SLAVE_SMMUV3_CFG] = &qhs_smmuv3_cfg,
2165 [SLAVE_SMSS_CFG] = &qhs_smss_cfg,
2166 [SLAVE_SPSS_CFG] = &qhs_spss_cfg,
2167 [SLAVE_TCSR] = &qhs_tcsr,
2168 [SLAVE_TLMM] = &qhs_tlmm,
2169 [SLAVE_UFS_CARD_CFG] = &qhs_ufs_card_cfg,
2170 [SLAVE_UFS_MEM_CFG] = &qhs_ufs_mem_cfg,
2171 [SLAVE_USB3_0] = &qhs_usb3_0,
2172 [SLAVE_USB3_1] = &qhs_usb3_1,
2173 [SLAVE_USB3_MP] = &qhs_usb3_mp,
2174 [SLAVE_USB4_0] = &qhs_usb4_host_0,
2175 [SLAVE_USB4_1] = &qhs_usb4_host_1,
2176 [SLAVE_VENUS_CFG] = &qhs_venus_cfg,
2177 [SLAVE_VSENSE_CTRL_CFG] = &qhs_vsense_ctrl_cfg,
2178 [SLAVE_VSENSE_CTRL_R_CFG] = &qhs_vsense_ctrl_r_cfg,
2179 [SLAVE_A1NOC_CFG] = &qns_a1_noc_cfg,
2180 [SLAVE_A2NOC_CFG] = &qns_a2_noc_cfg,
2181 [SLAVE_ANOC_PCIE_BRIDGE_CFG] = &qns_anoc_pcie_bridge_cfg,
2182 [SLAVE_DDRSS_CFG] = &qns_ddrss_cfg,
2183 [SLAVE_CNOC_MNOC_CFG] = &qns_mnoc_cfg,
2184 [SLAVE_SNOC_CFG] = &qns_snoc_cfg,
2185 [SLAVE_SNOC_SF_BRIDGE_CFG] = &qns_snoc_sf_bridge_cfg,
2186 [SLAVE_IMEM] = &qxs_imem,
2187 [SLAVE_PIMEM] = &qxs_pimem,
2188 [SLAVE_SERVICE_CNOC] = &srvc_cnoc,
2189 [SLAVE_PCIE_0] = &xs_pcie_0,
2190 [SLAVE_PCIE_1] = &xs_pcie_1,
2191 [SLAVE_PCIE_2A] = &xs_pcie_2a,
2192 [SLAVE_PCIE_2B] = &xs_pcie_2b,
2193 [SLAVE_PCIE_3A] = &xs_pcie_3a,
2194 [SLAVE_PCIE_3B] = &xs_pcie_3b,
2195 [SLAVE_PCIE_4] = &xs_pcie_4,
2196 [SLAVE_QDSS_STM] = &xs_qdss_stm,
2197 [SLAVE_SMSS] = &xs_smss,
2198 [SLAVE_TCU] = &xs_sys_tcu_cfg,
2201 static const struct qcom_icc_desc sc8280xp_config_noc = {
2202 .nodes = config_noc_nodes,
2203 .num_nodes = ARRAY_SIZE(config_noc_nodes),
2204 .bcms = config_noc_bcms,
2205 .num_bcms = ARRAY_SIZE(config_noc_bcms),
2208 static struct qcom_icc_bcm * const dc_noc_bcms[] = {
2211 static struct qcom_icc_node * const dc_noc_nodes[] = {
2212 [MASTER_CNOC_DC_NOC] = &qnm_cnoc_dc_noc,
2213 [SLAVE_LLCC_CFG] = &qhs_llcc,
2214 [SLAVE_GEM_NOC_CFG] = &qns_gemnoc,
2217 static const struct qcom_icc_desc sc8280xp_dc_noc = {
2218 .nodes = dc_noc_nodes,
2219 .num_nodes = ARRAY_SIZE(dc_noc_nodes),
2220 .bcms = dc_noc_bcms,
2221 .num_bcms = ARRAY_SIZE(dc_noc_bcms),
2224 static struct qcom_icc_bcm * const gem_noc_bcms[] = {
2229 static struct qcom_icc_node * const gem_noc_nodes[] = {
2230 [MASTER_GPU_TCU] = &alm_gpu_tcu,
2231 [MASTER_PCIE_TCU] = &alm_pcie_tcu,
2232 [MASTER_SYS_TCU] = &alm_sys_tcu,
2233 [MASTER_APPSS_PROC] = &chm_apps,
2234 [MASTER_COMPUTE_NOC] = &qnm_cmpnoc0,
2235 [MASTER_COMPUTE_NOC_1] = &qnm_cmpnoc1,
2236 [MASTER_GEM_NOC_CFG] = &qnm_gemnoc_cfg,
2237 [MASTER_GFX3D] = &qnm_gpu,
2238 [MASTER_MNOC_HF_MEM_NOC] = &qnm_mnoc_hf,
2239 [MASTER_MNOC_SF_MEM_NOC] = &qnm_mnoc_sf,
2240 [MASTER_ANOC_PCIE_GEM_NOC] = &qnm_pcie,
2241 [MASTER_SNOC_GC_MEM_NOC] = &qnm_snoc_gc,
2242 [MASTER_SNOC_SF_MEM_NOC] = &qnm_snoc_sf,
2243 [SLAVE_GEM_NOC_CNOC] = &qns_gem_noc_cnoc,
2244 [SLAVE_LLCC] = &qns_llcc,
2245 [SLAVE_GEM_NOC_PCIE_CNOC] = &qns_pcie,
2246 [SLAVE_SERVICE_GEM_NOC_1] = &srvc_even_gemnoc,
2247 [SLAVE_SERVICE_GEM_NOC_2] = &srvc_odd_gemnoc,
2248 [SLAVE_SERVICE_GEM_NOC] = &srvc_sys_gemnoc,
2251 static const struct qcom_icc_desc sc8280xp_gem_noc = {
2252 .nodes = gem_noc_nodes,
2253 .num_nodes = ARRAY_SIZE(gem_noc_nodes),
2254 .bcms = gem_noc_bcms,
2255 .num_bcms = ARRAY_SIZE(gem_noc_bcms),
2258 static struct qcom_icc_bcm * const lpass_ag_noc_bcms[] = {
2262 static struct qcom_icc_node * const lpass_ag_noc_nodes[] = {
2263 [MASTER_CNOC_LPASS_AG_NOC] = &qhm_config_noc,
2264 [MASTER_LPASS_PROC] = &qxm_lpass_dsp,
2265 [SLAVE_LPASS_CORE_CFG] = &qhs_lpass_core,
2266 [SLAVE_LPASS_LPI_CFG] = &qhs_lpass_lpi,
2267 [SLAVE_LPASS_MPU_CFG] = &qhs_lpass_mpu,
2268 [SLAVE_LPASS_TOP_CFG] = &qhs_lpass_top,
2269 [SLAVE_LPASS_SNOC] = &qns_sysnoc,
2270 [SLAVE_SERVICES_LPASS_AML_NOC] = &srvc_niu_aml_noc,
2271 [SLAVE_SERVICE_LPASS_AG_NOC] = &srvc_niu_lpass_agnoc,
2274 static const struct qcom_icc_desc sc8280xp_lpass_ag_noc = {
2275 .nodes = lpass_ag_noc_nodes,
2276 .num_nodes = ARRAY_SIZE(lpass_ag_noc_nodes),
2277 .bcms = lpass_ag_noc_bcms,
2278 .num_bcms = ARRAY_SIZE(lpass_ag_noc_bcms),
2281 static struct qcom_icc_bcm * const mc_virt_bcms[] = {
2286 static struct qcom_icc_node * const mc_virt_nodes[] = {
2287 [MASTER_LLCC] = &llcc_mc,
2288 [SLAVE_EBI1] = &ebi,
2291 static const struct qcom_icc_desc sc8280xp_mc_virt = {
2292 .nodes = mc_virt_nodes,
2293 .num_nodes = ARRAY_SIZE(mc_virt_nodes),
2294 .bcms = mc_virt_bcms,
2295 .num_bcms = ARRAY_SIZE(mc_virt_bcms),
2298 static struct qcom_icc_bcm * const mmss_noc_bcms[] = {
2303 static struct qcom_icc_node * const mmss_noc_nodes[] = {
2304 [MASTER_CAMNOC_HF] = &qnm_camnoc_hf,
2305 [MASTER_MDP0] = &qnm_mdp0_0,
2306 [MASTER_MDP1] = &qnm_mdp0_1,
2307 [MASTER_MDP_CORE1_0] = &qnm_mdp1_0,
2308 [MASTER_MDP_CORE1_1] = &qnm_mdp1_1,
2309 [MASTER_CNOC_MNOC_CFG] = &qnm_mnoc_cfg,
2310 [MASTER_ROTATOR] = &qnm_rot_0,
2311 [MASTER_ROTATOR_1] = &qnm_rot_1,
2312 [MASTER_VIDEO_P0] = &qnm_video0,
2313 [MASTER_VIDEO_P1] = &qnm_video1,
2314 [MASTER_VIDEO_PROC] = &qnm_video_cvp,
2315 [MASTER_CAMNOC_ICP] = &qxm_camnoc_icp,
2316 [MASTER_CAMNOC_SF] = &qxm_camnoc_sf,
2317 [SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf,
2318 [SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf,
2319 [SLAVE_SERVICE_MNOC] = &srvc_mnoc,
2322 static const struct qcom_icc_desc sc8280xp_mmss_noc = {
2323 .nodes = mmss_noc_nodes,
2324 .num_nodes = ARRAY_SIZE(mmss_noc_nodes),
2325 .bcms = mmss_noc_bcms,
2326 .num_bcms = ARRAY_SIZE(mmss_noc_bcms),
2329 static struct qcom_icc_bcm * const nspa_noc_bcms[] = {
2334 static struct qcom_icc_node * const nspa_noc_nodes[] = {
2335 [MASTER_CDSP_NOC_CFG] = &qhm_nsp_noc_config,
2336 [MASTER_CDSP_PROC] = &qxm_nsp,
2337 [SLAVE_CDSP_MEM_NOC] = &qns_nsp_gemnoc,
2338 [SLAVE_NSP_XFR] = &qxs_nsp_xfr,
2339 [SLAVE_SERVICE_NSP_NOC] = &service_nsp_noc,
2342 static const struct qcom_icc_desc sc8280xp_nspa_noc = {
2343 .nodes = nspa_noc_nodes,
2344 .num_nodes = ARRAY_SIZE(nspa_noc_nodes),
2345 .bcms = nspa_noc_bcms,
2346 .num_bcms = ARRAY_SIZE(nspa_noc_bcms),
2349 static struct qcom_icc_bcm * const nspb_noc_bcms[] = {
2354 static struct qcom_icc_node * const nspb_noc_nodes[] = {
2355 [MASTER_CDSPB_NOC_CFG] = &qhm_nspb_noc_config,
2356 [MASTER_CDSP_PROC_B] = &qxm_nspb,
2357 [SLAVE_CDSPB_MEM_NOC] = &qns_nspb_gemnoc,
2358 [SLAVE_NSPB_XFR] = &qxs_nspb_xfr,
2359 [SLAVE_SERVICE_NSPB_NOC] = &service_nspb_noc,
2362 static const struct qcom_icc_desc sc8280xp_nspb_noc = {
2363 .nodes = nspb_noc_nodes,
2364 .num_nodes = ARRAY_SIZE(nspb_noc_nodes),
2365 .bcms = nspb_noc_bcms,
2366 .num_bcms = ARRAY_SIZE(nspb_noc_bcms),
2369 static struct qcom_icc_bcm * const system_noc_main_bcms[] = {
2378 static struct qcom_icc_node * const system_noc_main_nodes[] = {
2379 [MASTER_A1NOC_SNOC] = &qnm_aggre1_noc,
2380 [MASTER_A2NOC_SNOC] = &qnm_aggre2_noc,
2381 [MASTER_USB_NOC_SNOC] = &qnm_aggre_usb_noc,
2382 [MASTER_LPASS_ANOC] = &qnm_lpass_noc,
2383 [MASTER_SNOC_CFG] = &qnm_snoc_cfg,
2384 [MASTER_PIMEM] = &qxm_pimem,
2385 [MASTER_GIC] = &xm_gic,
2386 [SLAVE_SNOC_GEM_NOC_GC] = &qns_gemnoc_gc,
2387 [SLAVE_SNOC_GEM_NOC_SF] = &qns_gemnoc_sf,
2388 [SLAVE_SERVICE_SNOC] = &srvc_snoc,
2391 static const struct qcom_icc_desc sc8280xp_system_noc_main = {
2392 .nodes = system_noc_main_nodes,
2393 .num_nodes = ARRAY_SIZE(system_noc_main_nodes),
2394 .bcms = system_noc_main_bcms,
2395 .num_bcms = ARRAY_SIZE(system_noc_main_bcms),
2398 static const struct of_device_id qnoc_of_match[] = {
2399 { .compatible = "qcom,sc8280xp-aggre1-noc", .data = &sc8280xp_aggre1_noc, },
2400 { .compatible = "qcom,sc8280xp-aggre2-noc", .data = &sc8280xp_aggre2_noc, },
2401 { .compatible = "qcom,sc8280xp-clk-virt", .data = &sc8280xp_clk_virt, },
2402 { .compatible = "qcom,sc8280xp-config-noc", .data = &sc8280xp_config_noc, },
2403 { .compatible = "qcom,sc8280xp-dc-noc", .data = &sc8280xp_dc_noc, },
2404 { .compatible = "qcom,sc8280xp-gem-noc", .data = &sc8280xp_gem_noc, },
2405 { .compatible = "qcom,sc8280xp-lpass-ag-noc", .data = &sc8280xp_lpass_ag_noc, },
2406 { .compatible = "qcom,sc8280xp-mc-virt", .data = &sc8280xp_mc_virt, },
2407 { .compatible = "qcom,sc8280xp-mmss-noc", .data = &sc8280xp_mmss_noc, },
2408 { .compatible = "qcom,sc8280xp-nspa-noc", .data = &sc8280xp_nspa_noc, },
2409 { .compatible = "qcom,sc8280xp-nspb-noc", .data = &sc8280xp_nspb_noc, },
2410 { .compatible = "qcom,sc8280xp-system-noc", .data = &sc8280xp_system_noc_main, },
2413 MODULE_DEVICE_TABLE(of, qnoc_of_match);
2415 static struct platform_driver qnoc_driver = {
2416 .probe = qcom_icc_rpmh_probe,
2417 .remove = qcom_icc_rpmh_remove,
2419 .name = "qnoc-sc8280xp",
2420 .of_match_table = qnoc_of_match,
2421 .sync_state = icc_sync_state,
2425 static int __init qnoc_driver_init(void)
2427 return platform_driver_register(&qnoc_driver);
2429 core_initcall(qnoc_driver_init);
2431 static void __exit qnoc_driver_exit(void)
2433 platform_driver_unregister(&qnoc_driver);
2435 module_exit(qnoc_driver_exit);
2437 MODULE_DESCRIPTION("Qualcomm SC8280XP NoC driver");
2438 MODULE_LICENSE("GPL");